diff options
Diffstat (limited to 'gcc')
15 files changed, 1409 insertions, 4 deletions
diff --git a/gcc/config/aarch64/aarch64-sme.md b/gcc/config/aarch64/aarch64-sme.md index b8bb4cc..bfe368e 100644 --- a/gcc/config/aarch64/aarch64-sme.md +++ b/gcc/config/aarch64/aarch64-sme.md @@ -38,6 +38,7 @@ ;; ---- Binary arithmetic on ZA tile ;; ---- Binary arithmetic on ZA slice ;; ---- Binary arithmetic, writing to ZA slice +;; ---- Absolute minimum/maximum ;; ;; == Ternary arithmetic ;; ---- [INT] Dot product @@ -1264,6 +1265,23 @@ "<sme_int_op>\tza.<Vetype>[%w0, %1, vgx<vector_count>], %2, %3.<Vetype>" ) +;; ------------------------------------------------------------------------- +;; ---- Absolute minimum/maximum +;; ------------------------------------------------------------------------- +;; Includes: +;; - svamin (SME2+faminmax) +;; - svamin (SME2+faminmax) +;; ------------------------------------------------------------------------- + +(define_insn "@aarch64_sme_<faminmax_uns_op><mode>" + [(set (match_operand:SVE_Fx24 0 "register_operand" "=Uw<vector_count>") + (unspec:SVE_Fx24 [(match_operand:SVE_Fx24 1 "register_operand" "%0") + (match_operand:SVE_Fx24 2 "register_operand" "Uw<vector_count>")] + FAMINMAX_UNS))] + "TARGET_SME2 && TARGET_FAMINMAX" + "<faminmax_uns_op>\t%0, %1, %2" +) + ;; ========================================================================= ;; == Ternary arithmetic ;; ========================================================================= diff --git a/gcc/config/aarch64/aarch64-sve-builtins-sme.def b/gcc/config/aarch64/aarch64-sve-builtins-sme.def index f75c0a5..8e6aadc 100644 --- a/gcc/config/aarch64/aarch64-sve-builtins-sme.def +++ b/gcc/config/aarch64/aarch64-sve-builtins-sme.def @@ -92,6 +92,11 @@ DEF_SME_FUNCTION (svstr_zt, str_zt, none, none) DEF_SME_FUNCTION (svzero_zt, inherent_zt, none, none) #undef REQUIRED_EXTENSIONS +#define REQUIRED_EXTENSIONS streaming_only (AARCH64_FL_SME2 && AARCH64_FL_FAMINMAX) +DEF_SME_FUNCTION_GS (svamin, binary_opt_single_n, all_float, x24, none) +DEF_SME_FUNCTION_GS (svamax, binary_opt_single_n, all_float, x24, none) +#undef REQUIRED_EXTENSIONS + /* The d_za entries in this section just declare C _za64 overloads, which will then be resolved to either an integer function or a floating-point function. They are needed because the integer and diff --git a/gcc/config/aarch64/aarch64-sve-builtins-sve2.cc b/gcc/config/aarch64/aarch64-sve-builtins-sve2.cc index abe21a8..73004a8 100644 --- a/gcc/config/aarch64/aarch64-sve-builtins-sve2.cc +++ b/gcc/config/aarch64/aarch64-sve-builtins-sve2.cc @@ -930,6 +930,44 @@ public: unsigned int m_bits; }; +/* The same as cond_or_uncond_unspec_function but the intrinsics with vector + modes are SME2 extensions instead of SVE. */ +class faminmaximpl : public function_base +{ +public: + CONSTEXPR faminmaximpl (int cond_unspec, int uncond_unspec) + : m_cond_unspec (cond_unspec), m_uncond_unspec (uncond_unspec) + {} + + rtx + expand (function_expander &e) const override + { + if (e.group_suffix ().vectors_per_tuple > 1) + { + /* SME2+faminmax intrinsics. */ + gcc_assert (e.pred == PRED_none); + auto mode = e.tuple_mode (0); + auto icode = (code_for_aarch64_sme (m_uncond_unspec, mode)); + return e.use_exact_insn (icode); + } + /* SVE+faminmax intrinsics. */ + else if (e.pred == PRED_none) + { + auto mode = e.tuple_mode (0); + auto icode = (e.mode_suffix_id == MODE_single + ? code_for_aarch64_sve_single (m_uncond_unspec, mode) + : code_for_aarch64_sve (m_uncond_unspec, mode)); + return e.use_exact_insn (icode); + } + return e.map_to_unspecs (m_cond_unspec, m_cond_unspec, m_cond_unspec); + } + + /* The unspecs for the conditional and unconditional instructions, + respectively. */ + int m_cond_unspec; + int m_uncond_unspec; +}; + } /* end anonymous namespace */ namespace aarch64_sve { @@ -958,10 +996,8 @@ FUNCTION (svaesd, fixed_insn_function, (CODE_FOR_aarch64_sve2_aesd)) FUNCTION (svaese, fixed_insn_function, (CODE_FOR_aarch64_sve2_aese)) FUNCTION (svaesimc, fixed_insn_function, (CODE_FOR_aarch64_sve2_aesimc)) FUNCTION (svaesmc, fixed_insn_function, (CODE_FOR_aarch64_sve2_aesmc)) -FUNCTION (svamax, cond_or_uncond_unspec_function, - (UNSPEC_COND_FAMAX, UNSPEC_FAMAX)) -FUNCTION (svamin, cond_or_uncond_unspec_function, - (UNSPEC_COND_FAMIN, UNSPEC_FAMIN)) +FUNCTION (svamax, faminmaximpl, (UNSPEC_COND_FAMAX, UNSPEC_FAMAX)) +FUNCTION (svamin, faminmaximpl, (UNSPEC_COND_FAMIN, UNSPEC_FAMIN)) FUNCTION (svandqv, reduction, (UNSPEC_ANDQV, UNSPEC_ANDQV, -1)) FUNCTION (svbcax, CODE_FOR_MODE0 (aarch64_sve2_bcax),) FUNCTION (svbdep, unspec_based_function, (UNSPEC_BDEP, UNSPEC_BDEP, -1)) diff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/amax_f16_x2.c b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/amax_f16_x2.c new file mode 100644 index 0000000..90b5438 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/amax_f16_x2.c @@ -0,0 +1,97 @@ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sme2_acle.h" +#pragma GCC target "+faminmax" + +/* +** amax_z0_z0_z4: +** famax {z0\.h - z1\.h}, {z0\.h - z1\.h}, {z4\.h - z5\.h} +** ret +*/ +TEST_XN (amax_z0_z0_z4, svfloat16x2_t, z0, + svamax_f16_x2 (z0, z4), + svamax (z0, z4)) + +/* +** amax_z0_z4_z0: +** famax {z0\.h - z1\.h}, {z0\.h - z1\.h}, {z4\.h - z5\.h} +** ret +*/ +TEST_XN (amax_z0_z4_z0, svfloat16x2_t, z0, + svamax_f16_x2 (z4, z0), + svamax (z4, z0)) + +/* +** amax_z0_z4_z28: +** ( +** mov [^\n]+ +** mov [^\n]+ +** famax [^\n]+, {z28\.h - z29\.h} +** | +** famax [^\n]+, {z28\.h - z29\.h} +** mov [^\n]+ +** mov [^\n]+ +** ) +** ret +*/ +TEST_XN (amax_z0_z4_z28, svfloat16x2_t, z0, + svamax_f16_x2 (z4, z28), + svamax (z4, z28)) + +/* +** amax_z18_z18_z4: +** famax {z18\.h - z19\.h}, {z18\.h - z19\.h}, {z4\.h - z5\.h} +** ret +*/ +TEST_XN (amax_z18_z18_z4, svfloat16x2_t, z18, + svamax_f16_x2 (z18, z4), + svamax (z18, z4)) + +/* +** amax_z23_z23_z18: +** mov [^\n]+ +** mov [^\n]+ +** famax [^\n]+, {z18\.h - z19\.h} +** mov [^\n]+ +** mov [^\n]+ +** ret +*/ +TEST_XN (amax_z23_z23_z18, svfloat16x2_t, z23, + svamax_f16_x2 (z23, z18), + svamax (z23, z18)) + +/* +** amax_z28_z28_z0: +** famax {z28\.h - z29\.h}, {z28\.h - z29\.h}, {z0\.h - z1\.h} +** ret +*/ +TEST_XN (amax_z28_z28_z0, svfloat16x2_t, z28, + svamax_f16_x2 (z28, z0), + svamax (z28, z0)) + +/* +** amax_z0_z0_z18: +** famax {z0\.h - z1\.h}, {z0\.h - z1\.h}, {z18\.h - z19\.h} +** ret +*/ +TEST_XN (amax_z0_z0_z18, svfloat16x2_t, z0, + svamax_f16_x2 (z0, z18), + svamax (z0, z18)) + +/* +** amax_z4_z4_z23: +** ( +** mov [^\n]+ +** mov [^\n]+ +** famax {z4\.h - z5\.h}, {z4\.h - z5\.h}, [^\n]+ +** | +** famax {z4\.h - z5\.h}, {z4\.h - z5\.h}, [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** ) +** ret +*/ +TEST_XN (amax_z4_z4_z23, svfloat16x2_t, z4, + svamax_f16_x2 (z4, z23), + svamax (z4, z23)) + diff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/amax_f16_x4.c b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/amax_f16_x4.c new file mode 100644 index 0000000..d168ad7 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/amax_f16_x4.c @@ -0,0 +1,128 @@ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sme2_acle.h" +#pragma GCC target "+faminmax" + +/* +** amax_z0_z0_z4: +** famax {z0\.h - z3\.h}, {z0\.h - z3\.h}, {z4\.h - z7\.h} +** ret +*/ +TEST_XN (amax_z0_z0_z4, svfloat16x4_t, z0, + svamax_f16_x4 (z0, z4), + svamax (z0, z4)) + +/* +** amax_z0_z4_z0: +** famax {z0\.h - z3\.h}, {z0\.h - z3\.h}, {z4\.h - z7\.h} +** ret +*/ +TEST_XN (amax_z0_z4_z0, svfloat16x4_t, z0, + svamax_f16_x4 (z4, z0), + svamax (z4, z0)) + +/* +** amax_z0_z4_z28: +** ( +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** famax [^\n]+, {z28\.h - z31\.h} +** | +** famax [^\n]+, {z28\.h - z31\.h} +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** ) +** ret +*/ +TEST_XN (amax_z0_z4_z28, svfloat16x4_t, z0, + svamax_f16_x4 (z4, z28), + svamax (z4, z28)) + +/* +** amax_z18_z18_z4: +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** famax [^\n]+, {z4\.h - z7\.h} +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** ret +*/ +TEST_XN (amax_z18_z18_z4, svfloat16x4_t, z18, + svamax_f16_x4 (z18, z4), + svamax (z18, z4)) + +/* +** amax_z23_z23_z28: +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** famax [^\n]+, {z28\.h - z31\.h} +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** ret +*/ +TEST_XN (amax_z23_z23_z28, svfloat16x4_t, z23, + svamax_f16_x4 (z23, z28), + svamax (z23, z28)) + +/* +** amax_z28_z28_z0: +** famax {z28\.h - z31\.h}, {z28\.h - z31\.h}, {z0\.h - z3\.h} +** ret +*/ +TEST_XN (amax_z28_z28_z0, svfloat16x4_t, z28, + svamax_f16_x4 (z28, z0), + svamax (z28, z0)) + +/* +** amax_z0_z0_z18: +** ( +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** famax {z0\.h - z3\.h}, {z0\.h - z3\.h}, [^\n]+ +** | +** famax {z0\.h - z3\.h}, {z0\.h - z3\.h}, [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** ) +** ret +*/ +TEST_XN (amax_z0_z0_z18, svfloat16x4_t, z0, + svamax_f16_x4 (z0, z18), + svamax (z0, z18)) + +/* +** amax_z4_z4_z23: +** ( +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** famax {z4\.h - z7\.h}, {z4\.h - z7\.h}, [^\n]+ +** | +** famax {z4\.h - z7\.h}, {z4\.h - z7\.h}, [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** ) +** ret +*/ +TEST_XN (amax_z4_z4_z23, svfloat16x4_t, z4, + svamax_f16_x4 (z4, z23), + svamax (z4, z23)) diff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/amax_f32_x2.c b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/amax_f32_x2.c new file mode 100644 index 0000000..618d50b9 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/amax_f32_x2.c @@ -0,0 +1,96 @@ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sme2_acle.h" +#pragma GCC target "+faminmax" + +/* +** amax_z0_z0_z4: +** famax {z0\.s - z1\.s}, {z0\.s - z1\.s}, {z4\.s - z5\.s} +** ret +*/ +TEST_XN (amax_z0_z0_z4, svfloat32x2_t, z0, + svamax_f32_x2 (z0, z4), + svamax (z0, z4)) + +/* +** amax_z0_z4_z0: +** famax {z0\.s - z1\.s}, {z0\.s - z1\.s}, {z4\.s - z5\.s} +** ret +*/ +TEST_XN (amax_z0_z4_z0, svfloat32x2_t, z0, + svamax_f32_x2 (z4, z0), + svamax (z4, z0)) + +/* +** amax_z0_z4_z28: +** ( +** mov [^\n]+ +** mov [^\n]+ +** famax [^\n]+, {z28\.s - z29\.s} +** | +** famax [^\n]+, {z28\.s - z29\.s} +** mov [^\n]+ +** mov [^\n]+ +** ) +** ret +*/ +TEST_XN (amax_z0_z4_z28, svfloat32x2_t, z0, + svamax_f32_x2 (z4, z28), + svamax (z4, z28)) + +/* +** amax_z18_z18_z4: +** famax {z18\.s - z19\.s}, {z18\.s - z19\.s}, {z4\.s - z5\.s} +** ret +*/ +TEST_XN (amax_z18_z18_z4, svfloat32x2_t, z18, + svamax_f32_x2 (z18, z4), + svamax (z18, z4)) + +/* +** amax_z23_z23_z18: +** mov [^\n]+ +** mov [^\n]+ +** famax [^\n]+, {z18\.s - z19\.s} +** mov [^\n]+ +** mov [^\n]+ +** ret +*/ +TEST_XN (amax_z23_z23_z18, svfloat32x2_t, z23, + svamax_f32_x2 (z23, z18), + svamax (z23, z18)) + +/* +** amax_z28_z28_z0: +** famax {z28\.s - z29\.s}, {z28\.s - z29\.s}, {z0\.s - z1\.s} +** ret +*/ +TEST_XN (amax_z28_z28_z0, svfloat32x2_t, z28, + svamax_f32_x2 (z28, z0), + svamax (z28, z0)) + +/* +** amax_z0_z0_z18: +** famax {z0\.s - z1\.s}, {z0\.s - z1\.s}, {z18\.s - z19\.s} +** ret +*/ +TEST_XN (amax_z0_z0_z18, svfloat32x2_t, z0, + svamax_f32_x2 (z0, z18), + svamax (z0, z18)) + +/* +** amax_z4_z4_z23: +** ( +** mov [^\n]+ +** mov [^\n]+ +** famax {z4\.s - z5\.s}, {z4\.s - z5\.s}, [^\n]+ +** | +** famax {z4\.s - z5\.s}, {z4\.s - z5\.s}, [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** ) +** ret +*/ +TEST_XN (amax_z4_z4_z23, svfloat32x2_t, z4, + svamax_f32_x2 (z4, z23), + svamax (z4, z23)) diff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/amax_f32_x4.c b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/amax_f32_x4.c new file mode 100644 index 0000000..981e78c --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/amax_f32_x4.c @@ -0,0 +1,129 @@ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sme2_acle.h" +#pragma GCC target "+faminmax" + +/* +** amax_z0_z0_z4: +** famax {z0\.s - z3\.s}, {z0\.s - z3\.s}, {z4\.s - z7\.s} +** ret +*/ +TEST_XN (amax_z0_z0_z4, svfloat32x4_t, z0, + svamax_f32_x4 (z0, z4), + svamax (z0, z4)) + +/* +** amax_z0_z4_z0: +** famax {z0\.s - z3\.s}, {z0\.s - z3\.s}, {z4\.s - z7\.s} +** ret +*/ +TEST_XN (amax_z0_z4_z0, svfloat32x4_t, z0, + svamax_f32_x4 (z4, z0), + svamax (z4, z0)) + +/* +** amax_z0_z4_z28: +** ( +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** famax [^\n]+, {z28\.s - z31\.s} +** | +** famax [^\n]+, {z28\.s - z31\.s} +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** ) +** ret +*/ +TEST_XN (amax_z0_z4_z28, svfloat32x4_t, z0, + svamax_f32_x4 (z4, z28), + svamax (z4, z28)) + +/* +** amax_z18_z18_z4: +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** famax [^\n]+, {z4\.s - z7\.s} +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** ret +*/ +TEST_XN (amax_z18_z18_z4, svfloat32x4_t, z18, + svamax_f32_x4 (z18, z4), + svamax (z18, z4)) + +/* +** amax_z23_z23_z28: +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** famax [^\n]+, {z28\.s - z31\.s} +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** ret +*/ +TEST_XN (amax_z23_z23_z28, svfloat32x4_t, z23, + svamax_f32_x4 (z23, z28), + svamax (z23, z28)) + +/* +** amax_z28_z28_z0: +** famax {z28\.s - z31\.s}, {z28\.s - z31\.s}, {z0\.s - z3\.s} +** ret +*/ +TEST_XN (amax_z28_z28_z0, svfloat32x4_t, z28, + svamax_f32_x4 (z28, z0), + svamax (z28, z0)) + +/* +** amax_z0_z0_z18: +** ( +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** famax {z0\.s - z3\.s}, {z0\.s - z3\.s}, [^\n]+ +** | +** famax {z0\.s - z3\.s}, {z0\.s - z3\.s}, [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** ) +** ret +*/ +TEST_XN (amax_z0_z0_z18, svfloat32x4_t, z0, + svamax_f32_x4 (z0, z18), + svamax (z0, z18)) + +/* +** amax_z4_z4_z23: +** ( +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** famax {z4\.s - z7\.s}, {z4\.s - z7\.s}, [^\n]+ +** | +** famax {z4\.s - z7\.s}, {z4\.s - z7\.s}, [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** ) +** ret +*/ +TEST_XN (amax_z4_z4_z23, svfloat32x4_t, z4, + svamax_f32_x4 (z4, z23), + svamax (z4, z23)) + diff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/amax_f64_x2.c b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/amax_f64_x2.c new file mode 100644 index 0000000..e93a409 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/amax_f64_x2.c @@ -0,0 +1,96 @@ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sme2_acle.h" +#pragma GCC target "+faminmax" + +/* +** amax_z0_z0_z4: +** famax {z0\.d - z1\.d}, {z0\.d - z1\.d}, {z4\.d - z5\.d} +** ret +*/ +TEST_XN (amax_z0_z0_z4, svfloat64x2_t, z0, + svamax_f64_x2 (z0, z4), + svamax (z0, z4)) + +/* +** amax_z0_z4_z0: +** famax {z0\.d - z1\.d}, {z0\.d - z1\.d}, {z4\.d - z5\.d} +** ret +*/ +TEST_XN (amax_z0_z4_z0, svfloat64x2_t, z0, + svamax_f64_x2 (z4, z0), + svamax (z4, z0)) + +/* +** amax_z0_z4_z28: +** ( +** mov [^\n]+ +** mov [^\n]+ +** famax [^\n]+, {z28\.d - z29\.d} +** | +** famax [^\n]+, {z28\.d - z29\.d} +** mov [^\n]+ +** mov [^\n]+ +** ) +** ret +*/ +TEST_XN (amax_z0_z4_z28, svfloat64x2_t, z0, + svamax_f64_x2 (z4, z28), + svamax (z4, z28)) + +/* +** amax_z18_z18_z4: +** famax {z18\.d - z19\.d}, {z18\.d - z19\.d}, {z4\.d - z5\.d} +** ret +*/ +TEST_XN (amax_z18_z18_z4, svfloat64x2_t, z18, + svamax_f64_x2 (z18, z4), + svamax (z18, z4)) + +/* +** amax_z23_z23_z18: +** mov [^\n]+ +** mov [^\n]+ +** famax [^\n]+, {z18\.d - z19\.d} +** mov [^\n]+ +** mov [^\n]+ +** ret +*/ +TEST_XN (amax_z23_z23_z18, svfloat64x2_t, z23, + svamax_f64_x2 (z23, z18), + svamax (z23, z18)) + +/* +** amax_z28_z28_z0: +** famax {z28\.d - z29\.d}, {z28\.d - z29\.d}, {z0\.d - z1\.d} +** ret +*/ +TEST_XN (amax_z28_z28_z0, svfloat64x2_t, z28, + svamax_f64_x2 (z28, z0), + svamax (z28, z0)) + +/* +** amax_z0_z0_z18: +** famax {z0\.d - z1\.d}, {z0\.d - z1\.d}, {z18\.d - z19\.d} +** ret +*/ +TEST_XN (amax_z0_z0_z18, svfloat64x2_t, z0, + svamax_f64_x2 (z0, z18), + svamax (z0, z18)) + +/* +** amax_z4_z4_z23: +** ( +** mov [^\n]+ +** mov [^\n]+ +** famax {z4\.d - z5\.d}, {z4\.d - z5\.d}, [^\n]+ +** | +** famax {z4\.d - z5\.d}, {z4\.d - z5\.d}, [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** ) +** ret +*/ +TEST_XN (amax_z4_z4_z23, svfloat64x2_t, z4, + svamax_f64_x2 (z4, z23), + svamax (z4, z23)) diff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/amax_f64_x4.c b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/amax_f64_x4.c new file mode 100644 index 0000000..2db629e --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/amax_f64_x4.c @@ -0,0 +1,128 @@ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sme2_acle.h" +#pragma GCC target "+faminmax" + +/* +** amax_z0_z0_z4: +** famax {z0\.d - z3\.d}, {z0\.d - z3\.d}, {z4\.d - z7\.d} +** ret +*/ +TEST_XN (amax_z0_z0_z4, svfloat64x4_t, z0, + svamax_f64_x4 (z0, z4), + svamax (z0, z4)) + +/* +** amax_z0_z4_z0: +** famax {z0\.d - z3\.d}, {z0\.d - z3\.d}, {z4\.d - z7\.d} +** ret +*/ +TEST_XN (amax_z0_z4_z0, svfloat64x4_t, z0, + svamax_f64_x4 (z4, z0), + svamax (z4, z0)) + +/* +** amax_z0_z4_z28: +** ( +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** famax [^\n]+, {z28\.d - z31\.d} +** | +** famax [^\n]+, {z28\.d - z31\.d} +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** ) +** ret +*/ +TEST_XN (amax_z0_z4_z28, svfloat64x4_t, z0, + svamax_f64_x4 (z4, z28), + svamax (z4, z28)) + +/* +** amax_z18_z18_z4: +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** famax [^\n]+, {z4\.d - z7\.d} +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** ret +*/ +TEST_XN (amax_z18_z18_z4, svfloat64x4_t, z18, + svamax_f64_x4 (z18, z4), + svamax (z18, z4)) + +/* +** amax_z23_z23_z28: +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** famax [^\n]+, {z28\.d - z31\.d} +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** ret +*/ +TEST_XN (amax_z23_z23_z28, svfloat64x4_t, z23, + svamax_f64_x4 (z23, z28), + svamax (z23, z28)) + +/* +** amax_z28_z28_z0: +** famax {z28\.d - z31\.d}, {z28\.d - z31\.d}, {z0\.d - z3\.d} +** ret +*/ +TEST_XN (amax_z28_z28_z0, svfloat64x4_t, z28, + svamax_f64_x4 (z28, z0), + svamax (z28, z0)) + +/* +** amax_z0_z0_z18: +** ( +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** famax {z0\.d - z3\.d}, {z0\.d - z3\.d}, [^\n]+ +** | +** famax {z0\.d - z3\.d}, {z0\.d - z3\.d}, [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** ) +** ret +*/ +TEST_XN (amax_z0_z0_z18, svfloat64x4_t, z0, + svamax_f64_x4 (z0, z18), + svamax (z0, z18)) + +/* +** amax_z4_z4_z23: +** ( +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** famax {z4\.d - z7\.d}, {z4\.d - z7\.d}, [^\n]+ +** | +** famax {z4\.d - z7\.d}, {z4\.d - z7\.d}, [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** ) +** ret +*/ +TEST_XN (amax_z4_z4_z23, svfloat64x4_t, z4, + svamax_f64_x4 (z4, z23), + svamax (z4, z23)) diff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/amin_f16_x2.c b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/amin_f16_x2.c new file mode 100644 index 0000000..74604e1 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/amin_f16_x2.c @@ -0,0 +1,96 @@ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sme2_acle.h" +#pragma GCC target "+faminmax" + +/* +** amin_z0_z0_z4: +** famin {z0\.h - z1\.h}, {z0\.h - z1\.h}, {z4\.h - z5\.h} +** ret +*/ +TEST_XN (amin_z0_z0_z4, svfloat16x2_t, z0, + svamin_f16_x2 (z0, z4), + svamin (z0, z4)) + +/* +** amin_z0_z4_z0: +** famin {z0\.h - z1\.h}, {z0\.h - z1\.h}, {z4\.h - z5\.h} +** ret +*/ +TEST_XN (amin_z0_z4_z0, svfloat16x2_t, z0, + svamin_f16_x2 (z4, z0), + svamin (z4, z0)) + +/* +** amin_z0_z4_z28: +** ( +** mov [^\n]+ +** mov [^\n]+ +** famin [^\n]+, {z28\.h - z29\.h} +** | +** famin [^\n]+, {z28\.h - z29\.h} +** mov [^\n]+ +** mov [^\n]+ +** ) +** ret +*/ +TEST_XN (amin_z0_z4_z28, svfloat16x2_t, z0, + svamin_f16_x2 (z4, z28), + svamin (z4, z28)) + +/* +** amin_z18_z18_z4: +** famin {z18\.h - z19\.h}, {z18\.h - z19\.h}, {z4\.h - z5\.h} +** ret +*/ +TEST_XN (amin_z18_z18_z4, svfloat16x2_t, z18, + svamin_f16_x2 (z18, z4), + svamin (z18, z4)) + +/* +** amin_z23_z23_z18: +** mov [^\n]+ +** mov [^\n]+ +** famin [^\n]+, {z18\.h - z19\.h} +** mov [^\n]+ +** mov [^\n]+ +** ret +*/ +TEST_XN (amin_z23_z23_z18, svfloat16x2_t, z23, + svamin_f16_x2 (z23, z18), + svamin (z23, z18)) + +/* +** amin_z28_z28_z0: +** famin {z28\.h - z29\.h}, {z28\.h - z29\.h}, {z0\.h - z1\.h} +** ret +*/ +TEST_XN (amin_z28_z28_z0, svfloat16x2_t, z28, + svamin_f16_x2 (z28, z0), + svamin (z28, z0)) + +/* +** amin_z0_z0_z18: +** famin {z0\.h - z1\.h}, {z0\.h - z1\.h}, {z18\.h - z19\.h} +** ret +*/ +TEST_XN (amin_z0_z0_z18, svfloat16x2_t, z0, + svamin_f16_x2 (z0, z18), + svamin (z0, z18)) + +/* +** amin_z4_z4_z23: +** ( +** mov [^\n]+ +** mov [^\n]+ +** famin {z4\.h - z5\.h}, {z4\.h - z5\.h}, [^\n]+ +** | +** famin {z4\.h - z5\.h}, {z4\.h - z5\.h}, [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** ) +** ret +*/ +TEST_XN (amin_z4_z4_z23, svfloat16x2_t, z4, + svamin_f16_x2 (z4, z23), + svamin (z4, z23)) diff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/amin_f16_x4.c b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/amin_f16_x4.c new file mode 100644 index 0000000..bc3779b --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/amin_f16_x4.c @@ -0,0 +1,128 @@ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sme2_acle.h" +#pragma GCC target "+faminmax" + +/* +** amin_z0_z0_z4: +** famin {z0\.h - z3\.h}, {z0\.h - z3\.h}, {z4\.h - z7\.h} +** ret +*/ +TEST_XN (amin_z0_z0_z4, svfloat16x4_t, z0, + svamin_f16_x4 (z0, z4), + svamin (z0, z4)) + +/* +** amin_z0_z4_z0: +** famin {z0\.h - z3\.h}, {z0\.h - z3\.h}, {z4\.h - z7\.h} +** ret +*/ +TEST_XN (amin_z0_z4_z0, svfloat16x4_t, z0, + svamin_f16_x4 (z4, z0), + svamin (z4, z0)) + +/* +** amin_z0_z4_z28: +** ( +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** famin [^\n]+, {z28\.h - z31\.h} +** | +** famin [^\n]+, {z28\.h - z31\.h} +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** ) +** ret +*/ +TEST_XN (amin_z0_z4_z28, svfloat16x4_t, z0, + svamin_f16_x4 (z4, z28), + svamin (z4, z28)) + +/* +** amin_z18_z18_z4: +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** famin [^\n]+, {z4\.h - z7\.h} +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** ret +*/ +TEST_XN (amin_z18_z18_z4, svfloat16x4_t, z18, + svamin_f16_x4 (z18, z4), + svamin (z18, z4)) + +/* +** amin_z23_z23_z28: +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** famin [^\n]+, {z28\.h - z31\.h} +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** ret +*/ +TEST_XN (amin_z23_z23_z28, svfloat16x4_t, z23, + svamin_f16_x4 (z23, z28), + svamin (z23, z28)) + +/* +** amin_z28_z28_z0: +** famin {z28\.h - z31\.h}, {z28\.h - z31\.h}, {z0\.h - z3\.h} +** ret +*/ +TEST_XN (amin_z28_z28_z0, svfloat16x4_t, z28, + svamin_f16_x4 (z28, z0), + svamin (z28, z0)) + +/* +** amin_z0_z0_z18: +** ( +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** famin {z0\.h - z3\.h}, {z0\.h - z3\.h}, [^\n]+ +** | +** famin {z0\.h - z3\.h}, {z0\.h - z3\.h}, [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** ) +** ret +*/ +TEST_XN (amin_z0_z0_z18, svfloat16x4_t, z0, + svamin_f16_x4 (z0, z18), + svamin (z0, z18)) + +/* +** amin_z4_z4_z23: +** ( +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** famin {z4\.h - z7\.h}, {z4\.h - z7\.h}, [^\n]+ +** | +** famin {z4\.h - z7\.h}, {z4\.h - z7\.h}, [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** ) +** ret +*/ +TEST_XN (amin_z4_z4_z23, svfloat16x4_t, z4, + svamin_f16_x4 (z4, z23), + svamin (z4, z23)) diff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/amin_f32_x2.c b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/amin_f32_x2.c new file mode 100644 index 0000000..43e3075 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/amin_f32_x2.c @@ -0,0 +1,96 @@ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sme2_acle.h" +#pragma GCC target "+faminmax" + +/* +** amin_z0_z0_z4: +** famin {z0\.s - z1\.s}, {z0\.s - z1\.s}, {z4\.s - z5\.s} +** ret +*/ +TEST_XN (amin_z0_z0_z4, svfloat32x2_t, z0, + svamin_f32_x2 (z0, z4), + svamin (z0, z4)) + +/* +** amin_z0_z4_z0: +** famin {z0\.s - z1\.s}, {z0\.s - z1\.s}, {z4\.s - z5\.s} +** ret +*/ +TEST_XN (amin_z0_z4_z0, svfloat32x2_t, z0, + svamin_f32_x2 (z4, z0), + svamin (z4, z0)) + +/* +** amin_z0_z4_z28: +** ( +** mov [^\n]+ +** mov [^\n]+ +** famin [^\n]+, {z28\.s - z29\.s} +** | +** famin [^\n]+, {z28\.s - z29\.s} +** mov [^\n]+ +** mov [^\n]+ +** ) +** ret +*/ +TEST_XN (amin_z0_z4_z28, svfloat32x2_t, z0, + svamin_f32_x2 (z4, z28), + svamin (z4, z28)) + +/* +** amin_z18_z18_z4: +** famin {z18\.s - z19\.s}, {z18\.s - z19\.s}, {z4\.s - z5\.s} +** ret +*/ +TEST_XN (amin_z18_z18_z4, svfloat32x2_t, z18, + svamin_f32_x2 (z18, z4), + svamin (z18, z4)) + +/* +** amin_z23_z23_z18: +** mov [^\n]+ +** mov [^\n]+ +** famin [^\n]+, {z18\.s - z19\.s} +** mov [^\n]+ +** mov [^\n]+ +** ret +*/ +TEST_XN (amin_z23_z23_z18, svfloat32x2_t, z23, + svamin_f32_x2 (z23, z18), + svamin (z23, z18)) + +/* +** amin_z28_z28_z0: +** famin {z28\.s - z29\.s}, {z28\.s - z29\.s}, {z0\.s - z1\.s} +** ret +*/ +TEST_XN (amin_z28_z28_z0, svfloat32x2_t, z28, + svamin_f32_x2 (z28, z0), + svamin (z28, z0)) + +/* +** amin_z0_z0_z18: +** famin {z0\.s - z1\.s}, {z0\.s - z1\.s}, {z18\.s - z19\.s} +** ret +*/ +TEST_XN (amin_z0_z0_z18, svfloat32x2_t, z0, + svamin_f32_x2 (z0, z18), + svamin (z0, z18)) + +/* +** amin_z4_z4_z23: +** ( +** mov [^\n]+ +** mov [^\n]+ +** famin {z4\.s - z5\.s}, {z4\.s - z5\.s}, [^\n]+ +** | +** famin {z4\.s - z5\.s}, {z4\.s - z5\.s}, [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** ) +** ret +*/ +TEST_XN (amin_z4_z4_z23, svfloat32x2_t, z4, + svamin_f32_x2 (z4, z23), + svamin (z4, z23)) diff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/amin_f32_x4.c b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/amin_f32_x4.c new file mode 100644 index 0000000..6bd20f8f --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/amin_f32_x4.c @@ -0,0 +1,128 @@ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sme2_acle.h" +#pragma GCC target "+faminmax" + +/* +** amin_z0_z0_z4: +** famin {z0\.s - z3\.s}, {z0\.s - z3\.s}, {z4\.s - z7\.s} +** ret +*/ +TEST_XN (amin_z0_z0_z4, svfloat32x4_t, z0, + svamin_f32_x4 (z0, z4), + svamin (z0, z4)) + +/* +** amin_z0_z4_z0: +** famin {z0\.s - z3\.s}, {z0\.s - z3\.s}, {z4\.s - z7\.s} +** ret +*/ +TEST_XN (amin_z0_z4_z0, svfloat32x4_t, z0, + svamin_f32_x4 (z4, z0), + svamin (z4, z0)) + +/* +** amin_z0_z4_z28: +** ( +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** famin [^\n]+, {z28\.s - z31\.s} +** | +** famin [^\n]+, {z28\.s - z31\.s} +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** ) +** ret +*/ +TEST_XN (amin_z0_z4_z28, svfloat32x4_t, z0, + svamin_f32_x4 (z4, z28), + svamin (z4, z28)) + +/* +** amin_z18_z18_z4: +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** famin [^\n]+, {z4\.s - z7\.s} +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** ret +*/ +TEST_XN (amin_z18_z18_z4, svfloat32x4_t, z18, + svamin_f32_x4 (z18, z4), + svamin (z18, z4)) + +/* +** amin_z23_z23_z28: +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** famin [^\n]+, {z28\.s - z31\.s} +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** ret +*/ +TEST_XN (amin_z23_z23_z28, svfloat32x4_t, z23, + svamin_f32_x4 (z23, z28), + svamin (z23, z28)) + +/* +** amin_z28_z28_z0: +** famin {z28\.s - z31\.s}, {z28\.s - z31\.s}, {z0\.s - z3\.s} +** ret +*/ +TEST_XN (amin_z28_z28_z0, svfloat32x4_t, z28, + svamin_f32_x4 (z28, z0), + svamin (z28, z0)) + +/* +** amin_z0_z0_z18: +** ( +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** famin {z0\.s - z3\.s}, {z0\.s - z3\.s}, [^\n]+ +** | +** famin {z0\.s - z3\.s}, {z0\.s - z3\.s}, [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** ) +** ret +*/ +TEST_XN (amin_z0_z0_z18, svfloat32x4_t, z0, + svamin_f32_x4 (z0, z18), + svamin (z0, z18)) + +/* +** amin_z4_z4_z23: +** ( +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** famin {z4\.s - z7\.s}, {z4\.s - z7\.s}, [^\n]+ +** | +** famin {z4\.s - z7\.s}, {z4\.s - z7\.s}, [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** ) +** ret +*/ +TEST_XN (amin_z4_z4_z23, svfloat32x4_t, z4, + svamin_f32_x4 (z4, z23), + svamin (z4, z23)) diff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/amin_f64_x2.c b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/amin_f64_x2.c new file mode 100644 index 0000000..3bbef3f --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/amin_f64_x2.c @@ -0,0 +1,96 @@ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sme2_acle.h" +#pragma GCC target "+faminmax" + +/* +** amin_z0_z0_z4: +** famin {z0\.d - z1\.d}, {z0\.d - z1\.d}, {z4\.d - z5\.d} +** ret +*/ +TEST_XN (amin_z0_z0_z4, svfloat64x2_t, z0, + svamin_f64_x2 (z0, z4), + svamin (z0, z4)) + +/* +** amin_z0_z4_z0: +** famin {z0\.d - z1\.d}, {z0\.d - z1\.d}, {z4\.d - z5\.d} +** ret +*/ +TEST_XN (amin_z0_z4_z0, svfloat64x2_t, z0, + svamin_f64_x2 (z4, z0), + svamin (z4, z0)) + +/* +** amin_z0_z4_z28: +** ( +** mov [^\n]+ +** mov [^\n]+ +** famin [^\n]+, {z28\.d - z29\.d} +** | +** famin [^\n]+, {z28\.d - z29\.d} +** mov [^\n]+ +** mov [^\n]+ +** ) +** ret +*/ +TEST_XN (amin_z0_z4_z28, svfloat64x2_t, z0, + svamin_f64_x2 (z4, z28), + svamin (z4, z28)) + +/* +** amin_z18_z18_z4: +** famin {z18\.d - z19\.d}, {z18\.d - z19\.d}, {z4\.d - z5\.d} +** ret +*/ +TEST_XN (amin_z18_z18_z4, svfloat64x2_t, z18, + svamin_f64_x2 (z18, z4), + svamin (z18, z4)) + +/* +** amin_z23_z23_z18: +** mov [^\n]+ +** mov [^\n]+ +** famin [^\n]+, {z18\.d - z19\.d} +** mov [^\n]+ +** mov [^\n]+ +** ret +*/ +TEST_XN (amin_z23_z23_z18, svfloat64x2_t, z23, + svamin_f64_x2 (z23, z18), + svamin (z23, z18)) + +/* +** amin_z28_z28_z0: +** famin {z28\.d - z29\.d}, {z28\.d - z29\.d}, {z0\.d - z1\.d} +** ret +*/ +TEST_XN (amin_z28_z28_z0, svfloat64x2_t, z28, + svamin_f64_x2 (z28, z0), + svamin (z28, z0)) + +/* +** amin_z0_z0_z18: +** famin {z0\.d - z1\.d}, {z0\.d - z1\.d}, {z18\.d - z19\.d} +** ret +*/ +TEST_XN (amin_z0_z0_z18, svfloat64x2_t, z0, + svamin_f64_x2 (z0, z18), + svamin (z0, z18)) + +/* +** amin_z4_z4_z23: +** ( +** mov [^\n]+ +** mov [^\n]+ +** famin {z4\.d - z5\.d}, {z4\.d - z5\.d}, [^\n]+ +** | +** famin {z4\.d - z5\.d}, {z4\.d - z5\.d}, [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** ) +** ret +*/ +TEST_XN (amin_z4_z4_z23, svfloat64x2_t, z4, + svamin_f64_x2 (z4, z23), + svamin (z4, z23)) diff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/amin_f64_x4.c b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/amin_f64_x4.c new file mode 100644 index 0000000..6f4c9b7 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/amin_f64_x4.c @@ -0,0 +1,128 @@ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sme2_acle.h" +#pragma GCC target "+faminmax" + +/* +** amin_z0_z0_z4: +** famin {z0\.d - z3\.d}, {z0\.d - z3\.d}, {z4\.d - z7\.d} +** ret +*/ +TEST_XN (amin_z0_z0_z4, svfloat64x4_t, z0, + svamin_f64_x4 (z0, z4), + svamin (z0, z4)) + +/* +** amin_z0_z4_z0: +** famin {z0\.d - z3\.d}, {z0\.d - z3\.d}, {z4\.d - z7\.d} +** ret +*/ +TEST_XN (amin_z0_z4_z0, svfloat64x4_t, z0, + svamin_f64_x4 (z4, z0), + svamin (z4, z0)) + +/* +** amin_z0_z4_z28: +** ( +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** famin [^\n]+, {z28\.d - z31\.d} +** | +** famin [^\n]+, {z28\.d - z31\.d} +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** ) +** ret +*/ +TEST_XN (amin_z0_z4_z28, svfloat64x4_t, z0, + svamin_f64_x4 (z4, z28), + svamin (z4, z28)) + +/* +** amin_z18_z18_z4: +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** famin [^\n]+, {z4\.d - z7\.d} +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** ret +*/ +TEST_XN (amin_z18_z18_z4, svfloat64x4_t, z18, + svamin_f64_x4 (z18, z4), + svamin (z18, z4)) + +/* +** amin_z23_z23_z28: +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** famin [^\n]+, {z28\.d - z31\.d} +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** ret +*/ +TEST_XN (amin_z23_z23_z28, svfloat64x4_t, z23, + svamin_f64_x4 (z23, z28), + svamin (z23, z28)) + +/* +** amin_z28_z28_z0: +** famin {z28\.d - z31\.d}, {z28\.d - z31\.d}, {z0\.d - z3\.d} +** ret +*/ +TEST_XN (amin_z28_z28_z0, svfloat64x4_t, z28, + svamin_f64_x4 (z28, z0), + svamin (z28, z0)) + +/* +** amin_z0_z0_z18: +** ( +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** famin {z0\.d - z3\.d}, {z0\.d - z3\.d}, [^\n]+ +** | +** famin {z0\.d - z3\.d}, {z0\.d - z3\.d}, [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** ) +** ret +*/ +TEST_XN (amin_z0_z0_z18, svfloat64x4_t, z0, + svamin_f64_x4 (z0, z18), + svamin (z0, z18)) + +/* +** amin_z4_z4_z23: +** ( +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** famin {z4\.d - z7\.d}, {z4\.d - z7\.d}, [^\n]+ +** | +** famin {z4\.d - z7\.d}, {z4\.d - z7\.d}, [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** ) +** ret +*/ +TEST_XN (amin_z4_z4_z23, svfloat64x4_t, z4, + svamin_f64_x4 (z4, z23), + svamin (z4, z23)) |