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-rw-r--r--gcc/ChangeLog13
-rw-r--r--gcc/cfgexpand.c7
-rw-r--r--gcc/expmed.c2
-rw-r--r--gcc/expmed.h6
-rw-r--r--gcc/expr.c4
-rw-r--r--gcc/expr.h2
-rw-r--r--gcc/optabs.c10
-rw-r--r--gcc/optabs.h2
8 files changed, 37 insertions, 9 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index d6423ff..16b3e35 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,4 +1,15 @@
-2014-11-17 Zhenqiang Chen <zhenqiang.chen@linaor.org>
+2014-11-17 Zhenqiang Chen <zhenqiang.chen@linaro.org>
+
+ * cfgexpand.c (expand_gimple_cond): Check ccmp.
+ * expmed.c (emit_cstore): Make it global.
+ * expmed.h: #include "insn-codes.h"
+ (emit_cstore): New prototype.
+ * expr.c (expand_operands): Make it global.
+ * expr.h (expand_operands): New prototype.
+ * optabs.c (get_rtx_code): Make it global.
+ * optabs.h (get_rtx_code): New prototype.
+
+2014-11-17 Zhenqiang Chen <zhenqiang.chen@linaro.org>
* target.def (gen_ccmp_first, gen_ccmp_first): Add two new hooks.
* doc/tm.texi.in (TARGET_GEN_CCMP_FIRST, TARGET_GEN_CCMP_NEXT): New.
diff --git a/gcc/cfgexpand.c b/gcc/cfgexpand.c
index 15d7638..19e87ec 100644
--- a/gcc/cfgexpand.c
+++ b/gcc/cfgexpand.c
@@ -2129,9 +2129,10 @@ expand_gimple_cond (basic_block bb, gimple stmt)
op0 = gimple_assign_rhs1 (second);
op1 = gimple_assign_rhs2 (second);
}
- /* If jumps are cheap turn some more codes into
- jumpy sequences. */
- else if (BRANCH_COST (optimize_insn_for_speed_p (), false) < 4)
+ /* If jumps are cheap and the target does not support conditional
+ compare, turn some more codes into jumpy sequences. */
+ else if (BRANCH_COST (optimize_insn_for_speed_p (), false) < 4
+ && targetm.gen_ccmp_first == NULL)
{
if ((code2 == BIT_AND_EXPR
&& TYPE_PRECISION (TREE_TYPE (op0)) == 1
diff --git a/gcc/expmed.c b/gcc/expmed.c
index b099dc2..0304e46 100644
--- a/gcc/expmed.c
+++ b/gcc/expmed.c
@@ -5109,7 +5109,7 @@ expand_and (machine_mode mode, rtx op0, rtx op1, rtx target)
}
/* Helper function for emit_store_flag. */
-static rtx
+rtx
emit_cstore (rtx target, enum insn_code icode, enum rtx_code code,
machine_mode mode, machine_mode compare_mode,
int unsignedp, rtx x, rtx y, int normalizep,
diff --git a/gcc/expmed.h b/gcc/expmed.h
index 446341e..41d5d5f 100644
--- a/gcc/expmed.h
+++ b/gcc/expmed.h
@@ -20,6 +20,8 @@ along with GCC; see the file COPYING3. If not see
#ifndef EXPMED_H
#define EXPMED_H 1
+#include "insn-codes.h"
+
enum alg_code {
alg_unknown,
alg_zero,
@@ -665,4 +667,8 @@ convert_cost (machine_mode to_mode, machine_mode from_mode,
}
extern int mult_by_coeff_cost (HOST_WIDE_INT, machine_mode, bool);
+extern rtx emit_cstore (rtx target, enum insn_code icode, enum rtx_code code,
+ enum machine_mode mode, enum machine_mode compare_mode,
+ int unsignedp, rtx x, rtx y, int normalizep,
+ enum machine_mode target_mode);
#endif
diff --git a/gcc/expr.c b/gcc/expr.c
index 930549f..7b1cb29 100644
--- a/gcc/expr.c
+++ b/gcc/expr.c
@@ -159,8 +159,6 @@ static rtx store_field (rtx, HOST_WIDE_INT, HOST_WIDE_INT,
static unsigned HOST_WIDE_INT highest_pow2_factor_for_target (const_tree, const_tree);
static int is_aligning_offset (const_tree, const_tree);
-static void expand_operands (tree, tree, rtx, rtx*, rtx*,
- enum expand_modifier);
static rtx reduce_to_bit_field_precision (rtx, rtx, tree);
static rtx do_store_flag (sepops, rtx, machine_mode);
#ifdef PUSH_ROUNDING
@@ -7573,7 +7571,7 @@ convert_tree_comp_to_rtx (enum tree_code tcode, int unsignedp)
The value may be stored in TARGET if TARGET is nonzero. The
MODIFIER argument is as documented by expand_expr. */
-static void
+void
expand_operands (tree exp0, tree exp1, rtx target, rtx *op0, rtx *op1,
enum expand_modifier modifier)
{
diff --git a/gcc/expr.h b/gcc/expr.h
index 02cce0f..2f54c35 100644
--- a/gcc/expr.h
+++ b/gcc/expr.h
@@ -619,4 +619,6 @@ extern bool categorize_ctor_elements (const_tree, HOST_WIDE_INT *,
by EXP. This does not include any offset in DECL_FIELD_BIT_OFFSET. */
extern tree component_ref_field_offset (tree);
+extern void expand_operands (tree, tree, rtx, rtx*, rtx*,
+ enum expand_modifier);
#endif /* GCC_EXPR_H */
diff --git a/gcc/optabs.c b/gcc/optabs.c
index 0acedb9..35ee7ec 100644
--- a/gcc/optabs.c
+++ b/gcc/optabs.c
@@ -6454,7 +6454,7 @@ gen_cond_trap (enum rtx_code code, rtx op1, rtx op2, rtx tcode)
/* Return rtx code for TCODE. Use UNSIGNEDP to select signed
or unsigned operation code. */
-static enum rtx_code
+enum rtx_code
get_rtx_code (enum tree_code tcode, bool unsignedp)
{
enum rtx_code code;
@@ -6504,6 +6504,14 @@ get_rtx_code (enum tree_code tcode, bool unsignedp)
code = LTGT;
break;
+ case BIT_AND_EXPR:
+ code = AND;
+ break;
+
+ case BIT_IOR_EXPR:
+ code = IOR;
+ break;
+
default:
gcc_unreachable ();
}
diff --git a/gcc/optabs.h b/gcc/optabs.h
index 982a593..bfb33ef 100644
--- a/gcc/optabs.h
+++ b/gcc/optabs.h
@@ -566,4 +566,6 @@ extern bool get_best_mem_extraction_insn (extraction_insn *,
extern bool lshift_cheap_p (bool);
+extern enum rtx_code get_rtx_code (enum tree_code tcode, bool unsignedp);
+
#endif /* GCC_OPTABS_H */