diff options
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 15 | ||||
| -rw-r--r-- | gcc/config/m68k/coff.h | 13 | ||||
| -rw-r--r-- | gcc/config/m68k/linux.h | 17 | ||||
| -rw-r--r-- | gcc/config/m68k/m68k-none.h | 19 | ||||
| -rw-r--r-- | gcc/config/m68k/m68k.c | 400 | ||||
| -rw-r--r-- | gcc/config/m68k/m68k.h | 289 | ||||
| -rw-r--r-- | gcc/config/m68k/m68k.md | 661 | ||||
| -rw-r--r-- | gcc/config/m68k/netbsd-elf.h | 17 | ||||
| -rw-r--r-- | gcc/config/m68k/sgs.h | 17 | ||||
| -rw-r--r-- | gcc/doc/invoke.texi | 6 | ||||
| -rw-r--r-- | gcc/doc/md.texi | 9 |
11 files changed, 87 insertions, 1376 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 23b8ff1..b860f0f 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,18 @@ +2003-05-17 Andreas Schwab <schwab@suse.de> + + * config/m68k/coff.h: Remove support for Sun FPA and Sun SKY board. + * config/m68k/linux.h: Likewise. + * config/m68k/m68k-none.h: Likewise. + * config/m68k/netbsd-elf.h: Likewise. + * config/m68k/sgs.h: Likewise. + * config/m68k/m68k.h: Likewise. + * config/m68k/m68k.md: Likewise. + * config/m68k/m68k.c: Likewise. + * doc/md.texi (Machine Constraints): Remove Sun FPA specific + constraints. + * doc/invoke.texi (Option Summary): Remove -mfpa. + (M680x0 Options): Likewise. + 2003-05-17 David Edelsohn <edelsohn@gnu.org> * rs6000.c (rs6000_function_value): Simplify REAL_TYPE logic. diff --git a/gcc/config/m68k/coff.h b/gcc/config/m68k/coff.h index 13cb4ae..062a4b6 100644 --- a/gcc/config/m68k/coff.h +++ b/gcc/config/m68k/coff.h @@ -1,6 +1,6 @@ /* Definitions of target machine for GNU compiler. m68k series COFF object files and debugging, version. - Copyright (C) 1994, 1996, 1997, 2000, 2002 Free Software Foundation, Inc. + Copyright (C) 1994, 1996, 1997, 2000, 2002, 2003 Free Software Foundation, Inc. This file is part of GNU CC. @@ -71,21 +71,10 @@ Boston, MA 02111-1307, USA. */ /* Here are the new register names. */ #undef REGISTER_NAMES -#ifndef SUPPORT_SUN_FPA #define REGISTER_NAMES \ {"%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7", \ "%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%a6", "%sp", \ "%fp0", "%fp1", "%fp2", "%fp3", "%fp4", "%fp5", "%fp6", "%fp7" } -#else /* SUPPORTED_SUN_FPA */ -#define REGISTER_NAMES \ -{"%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7", \ - "%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%a6", "%sp", \ - "%fp0", "%fp1", "%fp2", "%fp3", "%fp4", "%fp5", "%fp6", "%fp7", \ - "%fpa0", "%fpa1", "%fpa2", "%fpa3", "%fpa4", "%fpa5", "%fpa6", "%fpa7", \ - "%fpa8", "%fpa9", "%fpa10", "%fpa11", "%fpa12", "%fpa13", "%fpa14", "%fpa15", \ - "%fpa16", "%fpa17", "%fpa18", "%fpa19", "%fpa20", "%fpa21", "%fpa22", "%fpa23", \ - "%fpa24", "%fpa25", "%fpa26", "%fpa27", "%fpa28", "%fpa29", "%fpa30", "%fpa31" } -#endif /* defined SUPPORT_SUN_FPA */ #undef ASM_FILE_START #define ASM_FILE_START(FILE) \ diff --git a/gcc/config/m68k/linux.h b/gcc/config/m68k/linux.h index 7693af1..7a90756 100644 --- a/gcc/config/m68k/linux.h +++ b/gcc/config/m68k/linux.h @@ -1,6 +1,6 @@ /* Definitions for Motorola 68k running Linux-based GNU systems with ELF format. - Copyright (C) 1995, 1996, 1997, 1998, 1999, 2000, 2002 Free Software Foundation, Inc. + Copyright (C) 1995, 1996, 1997, 1998, 1999, 2000, 2002, 2003 Free Software Foundation, Inc. This file is part of GNU CC. @@ -80,26 +80,11 @@ Boston, MA 02111-1307, USA. */ #undef REGISTER_NAMES -#ifndef SUPPORT_SUN_FPA - #define REGISTER_NAMES \ {"%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7", \ "%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%a6", "%sp", \ "%fp0", "%fp1", "%fp2", "%fp3", "%fp4", "%fp5", "%fp6", "%fp7" } -#else /* SUPPORTED_SUN_FPA */ - -#define REGISTER_NAMES \ -{"%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7", \ - "%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%a6", "%sp", \ - "%fp0", "%fp1", "%fp2", "%fp3", "%fp4", "%fp5", "%fp6", "%fp7", \ - "%fpa0", "%fpa1", "%fpa2", "%fpa3", "%fpa4", "%fpa5", "%fpa6", "%fpa7", \ - "%fpa8", "%fpa9", "%fpa10","%fpa11","%fpa12","%fpa13","%fpa14","%fpa15", \ - "%fpa16","%fpa17","%fpa18","%fpa19","%fpa20","%fpa21","%fpa22","%fpa23", \ - "%fpa24","%fpa25","%fpa26","%fpa27","%fpa28","%fpa29","%fpa30","%fpa31" } - -#endif /* defined SUPPORT_SUN_FPA */ - #undef SIZE_TYPE #define SIZE_TYPE "unsigned int" diff --git a/gcc/config/m68k/m68k-none.h b/gcc/config/m68k/m68k-none.h index fb3b6f4..eb9cdae 100644 --- a/gcc/config/m68k/m68k-none.h +++ b/gcc/config/m68k/m68k-none.h @@ -1,5 +1,5 @@ /* Definitions of target machine for GNU compiler. "naked" 68020. - Copyright (C) 1994, 1996 Free Software Foundation, Inc. + Copyright (C) 1994, 1996, 2003 Free Software Foundation, Inc. This file is part of GNU CC. @@ -92,22 +92,15 @@ Unrecognized value in TARGET_CPU_DEFAULT. #undef CPP_PREDEFINES #define CPP_PREDEFINES "-Dmc68000" -/* Define one of __HAVE_68881__, __HAVE_FPA__, __HAVE_SKY__, or nothing - (soft float), appropriately. */ +/* Define __HAVE_68881__ or nothing (soft float), appropriately. */ #undef CPP_FPU_SPEC #if TARGET_DEFAULT & MASK_68881 #define CPP_FPU_SPEC "\ -%{!mc68000:%{!m68000:%{!m68302:%{!mcpu32:%{!m68332:%{!m5200:%{!msoft-float:%{!mno-68881:%{!mfpa:%{!msky:-D__HAVE_68881__ }}}}}}}}}} \ -%{m68881:-D__HAVE_68881__ }%{mfpa:-D__HAVE_FPA__ }%{msky:-D__HAVE_SKY__ }" -#else -/* This can't currently happen, but we code it anyway to show how it's done. */ -#if TARGET_DEFAULT & MASK_FPA -#define CPP_FPU_SPEC \ -"%{!msoft-float:%{m68881:-D__HAVE_68881__ }%{!m68881:-D__HAVE_FPA__ }}" +%{!mc68000:%{!m68000:%{!m68302:%{!mcpu32:%{!m68332:%{!m5200:%{!msoft-float:%{!mno-68881:-D__HAVE_68881__ }}}}}}}} \ +%{m68881:-D__HAVE_68881__ }" #else #define CPP_FPU_SPEC "\ -%{m68881:-D__HAVE_68881__ }%{mfpa:-D__HAVE_FPA__ }%{msky:-D__HAVE_SKY__ }" -#endif +%{m68881:-D__HAVE_68881__ }" #endif /* Names to predefine in the preprocessor for this target machine. @@ -175,8 +168,6 @@ Unrecognized value in TARGET_CPU_DEFAULT. #define SUBTARGET_EXTRA_SPECS /* Avoid building multilib libraries for the defaults. - t-m68kbare doesn't support -mfpa in the multilib'd libraries, so we don't - either. For targets not handled here, just build the full set of multilibs. The default is m68k 99.9% of the time anyway. */ diff --git a/gcc/config/m68k/m68k.c b/gcc/config/m68k/m68k.c index 6f554a5..05cffcc 100644 --- a/gcc/config/m68k/m68k.c +++ b/gcc/config/m68k/m68k.c @@ -45,16 +45,6 @@ Boston, MA 02111-1307, USA. */ /* Needed for use_return_insn. */ #include "flags.h" -#ifdef SUPPORT_SUN_FPA - -/* Index into this array by (register number >> 3) to find the - smallest class which contains that register. */ -const enum reg_class regno_reg_class[] - = { DATA_REGS, ADDR_REGS, FP_REGS, - LO_FPA_REGS, LO_FPA_REGS, FPA_REGS, FPA_REGS }; - -#endif /* defined SUPPORT_SUN_FPA */ - /* This flag is used to communicate between movhi and ASM_OUTPUT_CASE_END, if SGS_SWITCH_TABLE. */ int switch_table_difference_label_flag; @@ -480,31 +470,6 @@ m68k_output_function_prologue (stream, size) dwarf2out_def_cfa ("", STACK_POINTER_REGNUM, cfa_offset); } } -#ifdef SUPPORT_SUN_FPA - for (regno = 24; regno < 56; regno++) - if (m68k_save_reg (regno)) - { -#ifdef MOTOROLA - asm_fprintf (stream, "\tfpmovd %s,-(%Rsp)\n", - reg_names[regno]); -#else - asm_fprintf (stream, "\tfpmoved %s,%Rsp@-\n", - reg_names[regno]); -#endif - if (dwarf2out_do_frame ()) - { - char *l = dwarf2out_cfi_label (); - - cfa_store_offset += 8; - if (! frame_pointer_needed) - { - cfa_offset = cfa_store_offset; - dwarf2out_def_cfa (l, STACK_POINTER_REGNUM, cfa_offset); - } - dwarf2out_reg_save (l, regno, -cfa_store_offset); - } - } -#endif if (TARGET_68881) { for (regno = 16; regno < 24; regno++) @@ -712,11 +677,11 @@ m68k_output_function_epilogue (stream, size) register int regno; register int mask, fmask; register int nregs; - HOST_WIDE_INT offset, foffset, fpoffset; + HOST_WIDE_INT offset, foffset; HOST_WIDE_INT fsize = ((size) + 3) & -4; int big = 0; - nregs = 0; fmask = 0; fpoffset = 0; + nregs = 0; fmask = 0; for (regno = 16; regno < 24; regno++) if (m68k_save_reg (regno)) { @@ -724,7 +689,7 @@ m68k_output_function_epilogue (stream, size) fmask |= 1 << (23 - regno); } - foffset = fpoffset + nregs * 12; + foffset = nregs * 12; nregs = 0; mask = 0; for (regno = 0; regno < 16; regno++) @@ -737,7 +702,7 @@ m68k_output_function_epilogue (stream, size) offset = foffset + nregs * 4; if (offset + fsize >= 0x8000 && frame_pointer_needed - && (mask || fmask || fpoffset)) + && (mask || fmask)) { fprintf (stream, "\tmovel $%d,a0\n", -fsize); fsize = 0, big = 1; @@ -779,22 +744,6 @@ m68k_output_function_epilogue (stream, size) foffset + fsize, fmask); } - if (fpoffset != 0) - for (regno = 55; regno >= 24; regno--) - if (m68k_save_reg (regno)) - { - if (big) - fprintf(stream, "\tfpmoved -%d(a6,a0.l), %s\n", - fpoffset + fsize, reg_names[regno]); - else if (! frame_pointer_needed) - fprintf(stream, "\tfpmoved (sp)+, %s\n", - reg_names[regno]); - else - fprintf(stream, "\tfpmoved -%d(a6), %s\n", - fpoffset + fsize, reg_names[regno]); - fpoffset -= 8; - } - if (frame_pointer_needed) fprintf (stream, "\tunlk a6\n"); else if (fsize) @@ -824,7 +773,7 @@ m68k_output_function_epilogue (stream, size) register int regno; register int mask, fmask; register int nregs; - HOST_WIDE_INT offset, foffset, fpoffset; + HOST_WIDE_INT offset, foffset; HOST_WIDE_INT fsize = (size + 3) & -4; int big = 0; rtx insn = get_last_insn (); @@ -844,14 +793,7 @@ m68k_output_function_epilogue (stream, size) #ifdef FUNCTION_EXTRA_EPILOGUE FUNCTION_EXTRA_EPILOGUE (stream, size); #endif - nregs = 0; fmask = 0; fpoffset = 0; -#ifdef SUPPORT_SUN_FPA - for (regno = 24 ; regno < 56 ; regno++) - if (m68k_save_reg (regno)) - nregs++; - fpoffset = nregs * 8; -#endif - nregs = 0; + nregs = 0; fmask = 0; if (TARGET_68881) { for (regno = 16; regno < 24; regno++) @@ -861,7 +803,7 @@ m68k_output_function_epilogue (stream, size) fmask |= 1 << (23 - regno); } } - foffset = fpoffset + nregs * 12; + foffset = nregs * 12; nregs = 0; mask = 0; for (regno = 0; regno < 16; regno++) if (m68k_save_reg (regno)) @@ -877,7 +819,7 @@ m68k_output_function_epilogue (stream, size) || (! current_function_calls_alloca && leaf_function_p ()); if (offset + fsize >= 0x8000 && ! restore_from_sp - && (mask || fmask || fpoffset)) + && (mask || fmask)) { #ifdef MOTOROLA asm_fprintf (stream, "\t%Omove.l %0I%d,%Ra1\n", -fsize); @@ -1012,50 +954,6 @@ m68k_output_function_epilogue (stream, size) #endif } } - if (fpoffset != 0) - for (regno = 55; regno >= 24; regno--) - if (m68k_save_reg (regno)) - { - if (big) - { -#ifdef MOTOROLA - asm_fprintf (stream, "\tfpmovd -%d(%s,%Ra1.l), %s\n", - fpoffset + fsize, - reg_names[FRAME_POINTER_REGNUM], - reg_names[regno]); -#else - asm_fprintf (stream, "\tfpmoved %s@(-%d,%Ra1:l), %s\n", - reg_names[FRAME_POINTER_REGNUM], - fpoffset + fsize, reg_names[regno]); -#endif - } - else if (restore_from_sp) - { -#ifdef MOTOROLA - asm_fprintf (stream, "\tfpmovd (%Rsp)+,%s\n", - reg_names[regno]); -#else - asm_fprintf (stream, "\tfpmoved %Rsp@+, %s\n", - reg_names[regno]); -#endif - } - else - { -#ifdef MOTOROLA - fprintf (stream, "\tfpmovd -"HOST_WIDE_INT_PRINT_DEC - "(%s), %s\n", - fpoffset + fsize, - reg_names[FRAME_POINTER_REGNUM], - reg_names[regno]); -#else - fprintf (stream, "\tfpmoved %s@(-"HOST_WIDE_INT_PRINT_DEC - "), %s\n", - reg_names[FRAME_POINTER_REGNUM], - fpoffset + fsize, reg_names[regno]); -#endif - } - fpoffset -= 8; - } if (frame_pointer_needed) fprintf (stream, "\tunlk %s\n", reg_names[FRAME_POINTER_REGNUM]); @@ -2133,10 +2031,6 @@ static const char * singlemove_string (operands) rtx *operands; { -#ifdef SUPPORT_SUN_FPA - if (FPA_REG_P (operands[0]) || FPA_REG_P (operands[1])) - return "fpmoves %1,%0"; -#endif if (GET_CODE (operands[1]) == CONST_INT) return output_move_simode_const (operands); return "move%.l %1,%0"; @@ -2624,18 +2518,7 @@ notice_update_cc (exp, insn) rtx exp; rtx insn; { - /* If the cc is being set from the fpa and the expression is not an - explicit floating point test instruction (which has code to deal with - this), reinit the CC. */ - if (((cc_status.value1 && FPA_REG_P (cc_status.value1)) - || (cc_status.value2 && FPA_REG_P (cc_status.value2))) - && !(GET_CODE (exp) == PARALLEL - && GET_CODE (XVECEXP (exp, 0, 0)) == SET - && XEXP (XVECEXP (exp, 0, 0), 0) == cc0_rtx)) - { - CC_STATUS_INIT; - } - else if (GET_CODE (exp) == SET) + if (GET_CODE (exp) == SET) { if (GET_CODE (SET_SRC (exp)) == CALL) { @@ -2696,8 +2579,7 @@ notice_update_cc (exp, insn) && ADDRESS_REG_P (cc_status.value2) && GET_MODE (cc_status.value2) == QImode) CC_STATUS_INIT; - if (cc_status.value2 != 0 - && !(cc_status.value1 && FPA_REG_P (cc_status.value1))) + if (cc_status.value2 != 0) switch (GET_CODE (cc_status.value2)) { case PLUS: case MINUS: case MULT: @@ -2724,9 +2606,7 @@ notice_update_cc (exp, insn) && reg_overlap_mentioned_p (cc_status.value1, cc_status.value2)) cc_status.value2 = 0; if (((cc_status.value1 && FP_REG_P (cc_status.value1)) - || (cc_status.value2 && FP_REG_P (cc_status.value2))) - && !((cc_status.value1 && FPA_REG_P (cc_status.value1)) - || (cc_status.value2 && FPA_REG_P (cc_status.value2)))) + || (cc_status.value2 && FP_REG_P (cc_status.value2)))) cc_status.flags = CC_IN_68881; } @@ -2734,68 +2614,32 @@ const char * output_move_const_double (operands) rtx *operands; { -#ifdef SUPPORT_SUN_FPA - if (TARGET_FPA && FPA_REG_P (operands[0])) - { - int code = standard_sun_fpa_constant_p (operands[1]); + int code = standard_68881_constant_p (operands[1]); - if (code != 0) - { - static char buf[40]; - - sprintf (buf, "fpmove%%.d %%%%%d,%%0", code & 0x1ff); - return buf; - } - return "fpmove%.d %1,%0"; - } - else -#endif + if (code != 0) { - int code = standard_68881_constant_p (operands[1]); - - if (code != 0) - { - static char buf[40]; + static char buf[40]; - sprintf (buf, "fmovecr %%#0x%x,%%0", code & 0xff); - return buf; - } - return "fmove%.d %1,%0"; + sprintf (buf, "fmovecr %%#0x%x,%%0", code & 0xff); + return buf; } + return "fmove%.d %1,%0"; } const char * output_move_const_single (operands) rtx *operands; { -#ifdef SUPPORT_SUN_FPA - if (TARGET_FPA) - { - int code = standard_sun_fpa_constant_p (operands[1]); - - if (code != 0) - { - static char buf[40]; + int code = standard_68881_constant_p (operands[1]); - sprintf (buf, "fpmove%%.s %%%%%d,%%0", code & 0x1ff); - return buf; - } - return "fpmove%.s %1,%0"; - } - else -#endif /* defined SUPPORT_SUN_FPA */ + if (code != 0) { - int code = standard_68881_constant_p (operands[1]); + static char buf[40]; - if (code != 0) - { - static char buf[40]; - - sprintf (buf, "fmovecr %%#0x%x,%%0", code & 0xff); - return buf; - } - return "fmove%.s %f1,%0"; + sprintf (buf, "fmovecr %%#0x%x,%%0", code & 0xff); + return buf; } + return "fmove%.s %f1,%0"; } /* Return nonzero if X, a CONST_DOUBLE, has a value that we can get @@ -2913,165 +2757,6 @@ floating_exact_log2 (x) return 0; } -#ifdef SUPPORT_SUN_FPA -/* Return nonzero if X, a CONST_DOUBLE, has a value that we can get - from the Sun FPA's constant RAM. - The value returned, anded with 0x1ff, gives the code to use in fpmove - to get the desired constant. */ - -static int inited_FPA_table = 0; - -static const char *const strings_FPA[38] = { -/* small rationals */ - "0.0", - "1.0", - "0.5", - "-1.0", - "2.0", - "3.0", - "4.0", - "8.0", - "0.25", - "0.125", - "10.0", - "-0.5", -/* Decimal equivalents of double precision values */ - "2.718281828459045091", /* D_E */ - "6.283185307179586477", /* 2 pi */ - "3.141592653589793116", /* D_PI */ - "1.570796326794896619", /* pi/2 */ - "1.414213562373095145", /* D_SQRT2 */ - "0.7071067811865475244", /* 1/sqrt(2) */ - "-1.570796326794896619", /* -pi/2 */ - "1.442695040888963387", /* D_LOG2ofE */ - "3.321928024887362182", /* D_LOG2of10 */ - "0.6931471805599452862", /* D_LOGEof2 */ - "2.302585092994045901", /* D_LOGEof10 */ - "0.3010299956639811980", /* D_LOG10of2 */ - "0.4342944819032518167", /* D_LOG10ofE */ -/* Decimal equivalents of single precision values */ - "2.718281745910644531", /* S_E */ - "6.283185307179586477", /* 2 pi */ - "3.141592741012573242", /* S_PI */ - "1.570796326794896619", /* pi/2 */ - "1.414213538169860840", /* S_SQRT2 */ - "0.7071067811865475244", /* 1/sqrt(2) */ - "-1.570796326794896619", /* -pi/2 */ - "1.442695021629333496", /* S_LOG2ofE */ - "3.321928024291992188", /* S_LOG2of10 */ - "0.6931471824645996094", /* S_LOGEof2 */ - "2.302585124969482442", /* S_LOGEof10 */ - "0.3010300099849700928", /* S_LOG10of2 */ - "0.4342944920063018799", /* S_LOG10ofE */ -}; - - -static const int codes_FPA[38] = { -/* small rationals */ - 0x200, - 0xe, - 0xf, - 0x10, - 0x11, - 0xb1, - 0x12, - 0x13, - 0x15, - 0x16, - 0x17, - 0x2e, -/* double precision */ - 0x8, - 0x9, - 0xa, - 0xb, - 0xc, - 0xd, - 0x27, - 0x28, - 0x29, - 0x2a, - 0x2b, - 0x2c, - 0x2d, -/* single precision */ - 0x8, - 0x9, - 0xa, - 0xb, - 0xc, - 0xd, - 0x27, - 0x28, - 0x29, - 0x2a, - 0x2b, - 0x2c, - 0x2d - }; - -REAL_VALUE_TYPE values_FPA[38]; - -/* This code has been fixed for cross-compilation. */ - -static void init_FPA_table PARAMS ((void)); -static void -init_FPA_table () -{ - enum machine_mode mode; - int i; - REAL_VALUE_TYPE r; - - mode = DFmode; - for (i = 0; i < 38; i++) - { - if (i == 25) - mode = SFmode; - r = REAL_VALUE_ATOF (strings_FPA[i], mode); - values_FPA[i] = r; - } - inited_FPA_table = 1; -} - - -int -standard_sun_fpa_constant_p (x) - rtx x; -{ - REAL_VALUE_TYPE r; - int i; - - if (! inited_FPA_table) - init_FPA_table (); - - REAL_VALUE_FROM_CONST_DOUBLE (r, x); - - for (i=0; i<12; i++) - { - if (REAL_VALUES_EQUAL (r, values_FPA[i])) - return (codes_FPA[i]); - } - - if (GET_MODE (x) == SFmode) - { - for (i=25; i<38; i++) - { - if (REAL_VALUES_EQUAL (r, values_FPA[i])) - return (codes_FPA[i]); - } - } - else - { - for (i=12; i<25; i++) - { - if (REAL_VALUES_EQUAL (r, values_FPA[i])) - return (codes_FPA[i]); - } - } - return 0x0; -} -#endif /* define SUPPORT_SUN_FPA */ - /* A C compound statement to output to stdio stream STREAM the assembler syntax for an instruction operand X. X is an RTL expression. @@ -3113,13 +2798,8 @@ standard_sun_fpa_constant_p (x) 'f' for float insn (print a CONST_DOUBLE as a float rather than in hex) 'o' for operands to go directly to output_operand_address (bypassing print_operand_address--used only for SYMBOL_REFs under TARGET_PCREL) - 'w' for FPA insn (print a CONST_DOUBLE as a SunFPA constant rather - than directly). Second part of 'y' below. 'x' for float insn (print a CONST_DOUBLE as a float rather than in hex), or print pair of registers as rx:ry. - 'y' for a FPA insn (print pair of registers as rx:ry). This also outputs - CONST_DOUBLE's as SunFPA constant RAM registers if - possible, so it should not be used except for the SunFPA. */ @@ -3129,10 +2809,6 @@ print_operand (file, op, letter) rtx op; /* operand to print */ int letter; /* %<letter> or 0 */ { -#ifdef SUPPORT_SUN_FPA - int i; -#endif - if (letter == '.') { #if defined (MOTOROLA) && !defined (CRDS) @@ -3199,24 +2875,12 @@ print_operand (file, op, letter) } else if (GET_CODE (op) == REG) { -#ifdef SUPPORT_SUN_FPA - if (REGNO (op) < 16 - && (letter == 'y' || letter == 'x') - && GET_MODE (op) == DFmode) - { - fprintf (file, "%s:%s", reg_names[REGNO (op)], - reg_names[REGNO (op)+1]); - } + if (letter == 'R') + /* Print out the second register name of a register pair. + I.e., R (6) => 7. */ + fputs (reg_names[REGNO (op) + 1], file); else -#endif - { - if (letter == 'R') - /* Print out the second register name of a register pair. - I.e., R (6) => 7. */ - fputs (reg_names[REGNO (op) + 1], file); - else - fputs (reg_names[REGNO (op)], file); - } + fputs (reg_names[REGNO (op)], file); } else if (GET_CODE (op) == MEM) { @@ -3234,14 +2898,6 @@ print_operand (file, op, letter) #endif } } -#ifdef SUPPORT_SUN_FPA - else if ((letter == 'y' || letter == 'w') - && GET_CODE (op) == CONST_DOUBLE - && (i = standard_sun_fpa_constant_p (op))) - { - fprintf (file, "%%%d", i & 0x1ff); - } -#endif else if (GET_CODE (op) == CONST_DOUBLE && GET_MODE (op) == SFmode) { REAL_VALUE_TYPE r; diff --git a/gcc/config/m68k/m68k.h b/gcc/config/m68k/m68k.h index 1aed47e..383dbb9 100644 --- a/gcc/config/m68k/m68k.h +++ b/gcc/config/m68k/m68k.h @@ -1,7 +1,7 @@ /* Definitions of target machine for GNU compiler. Sun 68000/68020 version. Copyright (C) 1987, 1988, 1993, 1994, 1995, 1996, 1997, 1998, 1999, - 2000, 2001, 2002 Free Software Foundation, Inc. + 2000, 2001, 2002, 2003 Free Software Foundation, Inc. This file is part of GNU CC. @@ -46,15 +46,6 @@ Boston, MA 02111-1307, USA. */ #define TARGET_VERSION fprintf (stderr, " (68k, MIT syntax)"); #endif -/* Define SUPPORT_SUN_FPA to include support for generating code for - the Sun Floating Point Accelerator, an optional product for Sun 3 - machines. By default, it is not defined. Avoid defining it unless - you need to output code for the Sun3+FPA architecture, as it has the - effect of slowing down the register set operations in hard-reg-set.h - (total number of registers will exceed number of bits in a long, - if defined, causing the set operations to expand to loops). - SUPPORT_SUN_FPA is typically defined in sun3.h. */ - /* Run-time compilation parameters selecting different hardware subsets. */ extern int target_flags; @@ -90,14 +81,6 @@ extern int target_flags; #define MASK_SHORT 32 #define TARGET_SHORT (target_flags & MASK_SHORT) -/* Compile with special insns for Sun FPA. */ -#define MASK_FPA 64 -#define TARGET_FPA (target_flags & MASK_FPA) - -/* Compile (actually, link) for Sun SKY board. */ -#define MASK_SKY 128 -#define TARGET_SKY (target_flags & MASK_SKY) - /* Optimize for 68040, but still allow execution on 68020 (-m68020-40 or -m68040). The 68040 will execute all 68030 and 68881/2 instructions, but some @@ -182,21 +165,8 @@ extern int target_flags; N_("Consider type `int' to be 16 bits wide") }, \ { "noshort", - MASK_SHORT, \ N_("Consider type `int' to be 32 bits wide") }, \ - { "fpa", -(MASK_SKY|MASK_68040_ONLY|MASK_68881), \ - N_("Generate code for a Sun FPA") }, \ - { "fpa", MASK_FPA, "" }, \ - { "nofpa", - MASK_FPA, \ - N_("Do not generate code for a Sun FPA") }, \ - { "sky", -(MASK_FPA|MASK_68040_ONLY|MASK_68881), \ - N_("Generate code for a Sun Sky board") }, \ - { "sky", MASK_SKY, \ - N_("Generate code for a Sun Sky board") }, \ - { "nosky", - MASK_SKY, \ - N_("Do not use Sky linkage convention") }, \ - { "68881", - (MASK_FPA|MASK_SKY), \ - N_("Generate code for a 68881") }, \ { "68881", MASK_68881, "" }, \ - { "soft-float", - (MASK_FPA|MASK_SKY|MASK_68040_ONLY|MASK_68881), \ + { "soft-float", - (MASK_68040_ONLY|MASK_68881), \ N_("Generate code with library calls for floating point") }, \ { "68020-40", -(MASK_5200|MASK_68060|MASK_68040_ONLY), \ N_("Generate code for a 68040, without any new instructions") }, \ @@ -367,17 +337,11 @@ extern int target_flags; For the 68000, we give the data registers numbers 0-7, the address registers numbers 010-017, and the 68881 floating point registers numbers 020-027. */ -#ifndef SUPPORT_SUN_FPA #define FIRST_PSEUDO_REGISTER 24 -#else -#define FIRST_PSEUDO_REGISTER 56 -#endif /* This defines the register which is used to hold the offset table for PIC. */ #define PIC_OFFSET_TABLE_REGNUM (flag_pic ? 13 : INVALID_REGNUM) -#ifndef SUPPORT_SUN_FPA - /* 1 for registers that have pervasive standard uses and are not available for the register allocator. On the 68000, only the stack pointer is such. */ @@ -404,81 +368,12 @@ extern int target_flags; 1, 1, 0, 0, 0, 0, 0, 1, \ 1, 1, 0, 0, 0, 0, 0, 0 } -#else /* SUPPORT_SUN_FPA */ - -/* 1 for registers that have pervasive standard uses - and are not available for the register allocator. - On the 68000, only the stack pointer is such. */ - -/* fpa0 is also reserved so that it can be used to move data back and - forth between high fpa regs and everything else. */ - -#define FIXED_REGISTERS \ - {/* Data registers. */ \ - 0, 0, 0, 0, 0, 0, 0, 0, \ - \ - /* Address registers. */ \ - 0, 0, 0, 0, 0, 0, 0, 1, \ - \ - /* Floating point registers \ - (if available). */ \ - 0, 0, 0, 0, 0, 0, 0, 0, \ - \ - /* Sun3 FPA registers. */ \ - 1, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0 } - -/* 1 for registers not available across function calls. - These must include the FIXED_REGISTERS and also any - registers that can be used without being saved. - The latter must include the registers where values are returned - and the register where structure-value addresses are passed. - Aside from that, you can include as many other registers as you like. */ -#define CALL_USED_REGISTERS \ - {1, 1, 0, 0, 0, 0, 0, 0, \ - 1, 1, 0, 0, 0, 0, 0, 1, \ - 1, 1, 0, 0, 0, 0, 0, 0, \ - /* FPA registers. */ \ - 1, 1, 1, 1, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0 } - -#endif /* defined SUPPORT_SUN_FPA */ - /* Make sure everything's fine if we *don't* have a given processor. This assumes that putting a register in fixed_regs will keep the compiler's mitts completely off it. We don't bother to zero it out of register classes. */ -#ifdef SUPPORT_SUN_FPA - -#define CONDITIONAL_REGISTER_USAGE \ -{ \ - int i; \ - HARD_REG_SET x; \ - if (! TARGET_FPA) \ - { \ - COPY_HARD_REG_SET (x, reg_class_contents[(int)FPA_REGS]); \ - for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \ - if (TEST_HARD_REG_BIT (x, i)) \ - fixed_regs[i] = call_used_regs[i] = 1; \ - } \ - if (! TARGET_68881) \ - { \ - COPY_HARD_REG_SET (x, reg_class_contents[(int)FP_REGS]); \ - for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \ - if (TEST_HARD_REG_BIT (x, i)) \ - fixed_regs[i] = call_used_regs[i] = 1; \ - } \ - if (PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM) \ - fixed_regs[PIC_OFFSET_TABLE_REGNUM] \ - = call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \ -} -#else #define CONDITIONAL_REGISTER_USAGE \ { \ int i; \ @@ -495,8 +390,6 @@ extern int target_flags; = call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \ } -#endif /* defined SUPPORT_SUN_FPA */ - /* Return number of consecutive hard regs needed starting at reg REGNO to hold something of mode MODE. This is ordinarily the length in words of a value of mode MODE @@ -509,8 +402,6 @@ extern int target_flags; ((REGNO) >= 16 ? GET_MODE_NUNITS (MODE) \ : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)) -#ifndef SUPPORT_SUN_FPA - /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. On the 68000, the cpu registers can hold any mode but the 68881 registers can hold only SFmode or DFmode. */ @@ -523,38 +414,6 @@ extern int target_flags; || GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT) \ && GET_MODE_UNIT_SIZE (MODE) <= 12)) -#else /* defined SUPPORT_SUN_FPA */ - -/* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. - On the 68000, the cpu registers can hold any mode but the 68881 registers - can hold only SFmode or DFmode. However, the Sun FPA register can - (apparently) hold whatever you feel like putting in them. - If using the fpa, don't put a double in d7/a0. */ - -/* ??? This is confused. The check to prohibit d7/a0 overlaps should always - be enabled regardless of whether TARGET_FPA is specified. It isn't clear - what the other d/a register checks are for. Every check using REGNO - actually needs to use a range, e.g. 24>=X<56 not <56. There is probably - no one using this code anymore. - This code used to be used to suppress register usage for the 68881 by - saying that the 68881 registers couldn't hold values of any mode if there - was no 68881. This was wrong, because reload (etc.) will still try - to save and restore call-saved registers during, for instance, non-local - goto. */ -#define HARD_REGNO_MODE_OK(REGNO, MODE) \ -(((REGNO) < 16 \ - && !(TARGET_FPA \ - && GET_MODE_CLASS ((MODE)) != MODE_INT \ - && GET_MODE_UNIT_SIZE ((MODE)) > 4 \ - && (REGNO) < 8 && (REGNO) + GET_MODE_SIZE ((MODE)) / 4 > 8 \ - && (REGNO) % (GET_MODE_UNIT_SIZE ((MODE)) / 4) != 0)) \ - || ((REGNO) >= 16 && (REGNO) < 24 \ - ? ((GET_MODE_CLASS (MODE) == MODE_FLOAT \ - || GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT) \ - && GET_MODE_UNIT_SIZE (MODE) <= 12) \ - : ((REGNO) < 56 ? TARGET_FPA && GET_MODE_UNIT_SIZE (MODE) <= 8 : 0))) - -#endif /* defined SUPPORT_SUN_FPA */ /* Value is 1 if it is a good idea to tie two pseudo registers when one has mode MODE1 and one has mode MODE2. @@ -618,8 +477,6 @@ extern int target_flags; /* The 68000 has three kinds of registers, so eight classes would be a complete set. One of them is not needed. */ -#ifndef SUPPORT_SUN_FPA - enum reg_class { NO_REGS, DATA_REGS, ADDR_REGS, FP_REGS, @@ -660,68 +517,6 @@ enum reg_class { #define REGNO_REG_CLASS(REGNO) (((REGNO)>>3)+1) -#else /* defined SUPPORT_SUN_FPA */ - -/* - * Notes on final choices: - * - * 1) Didn't feel any need to union-ize LOW_FPA_REGS with anything - * else. - * 2) Removed all unions that involve address registers with - * floating point registers (left in unions of address and data with - * floating point). - * 3) Defined GENERAL_REGS as ADDR_OR_DATA_REGS. - * 4) Defined ALL_REGS as FPA_OR_FP_OR_GENERAL_REGS. - * 4) Left in everything else. - */ -enum reg_class { NO_REGS, LO_FPA_REGS, FPA_REGS, FP_REGS, - FP_OR_FPA_REGS, DATA_REGS, DATA_OR_FPA_REGS, DATA_OR_FP_REGS, - DATA_OR_FP_OR_FPA_REGS, ADDR_REGS, GENERAL_REGS, - GENERAL_OR_FPA_REGS, GENERAL_OR_FP_REGS, ALL_REGS, - LIM_REG_CLASSES }; - -#define N_REG_CLASSES (int) LIM_REG_CLASSES - -/* Give names of register classes as strings for dump file. */ - -#define REG_CLASS_NAMES \ - { "NO_REGS", "LO_FPA_REGS", "FPA_REGS", "FP_REGS", \ - "FP_OR_FPA_REGS", "DATA_REGS", "DATA_OR_FPA_REGS", "DATA_OR_FP_REGS", \ - "DATA_OR_FP_OR_FPA_REGS", "ADDR_REGS", "GENERAL_REGS", \ - "GENERAL_OR_FPA_REGS", "GENERAL_OR_FP_REGS", "ALL_REGS" } - -/* Define which registers fit in which classes. - This is an initializer for a vector of HARD_REG_SET - of length N_REG_CLASSES. */ - -#define REG_CLASS_CONTENTS \ -{ \ - {0, 0}, /* NO_REGS */ \ - {0xff000000, 0x000000ff}, /* LO_FPA_REGS */ \ - {0xff000000, 0x00ffffff}, /* FPA_REGS */ \ - {0x00ff0000, 0x00000000}, /* FP_REGS */ \ - {0xffff0000, 0x00ffffff}, /* FP_OR_FPA_REGS */ \ - {0x000000ff, 0x00000000}, /* DATA_REGS */ \ - {0xff0000ff, 0x00ffffff}, /* DATA_OR_FPA_REGS */ \ - {0x00ff00ff, 0x00000000}, /* DATA_OR_FP_REGS */ \ - {0xffff00ff, 0x00ffffff}, /* DATA_OR_FP_OR_FPA_REGS */\ - {0x0000ff00, 0x00000000}, /* ADDR_REGS */ \ - {0x0000ffff, 0x00000000}, /* GENERAL_REGS */ \ - {0xff00ffff, 0x00ffffff}, /* GENERAL_OR_FPA_REGS */\ - {0x00ffffff, 0x00000000}, /* GENERAL_OR_FP_REGS */\ - {0xffffffff, 0x00ffffff}, /* ALL_REGS */ \ -} - -/* The same information, inverted: - Return the class number of the smallest class containing - reg number REGNO. This could be a conditional expression - or could index an array. */ - -extern const enum reg_class regno_reg_class[]; -#define REGNO_REG_CLASS(REGNO) (regno_reg_class[(REGNO)>>3]) - -#endif /* SUPPORT_SUN_FPA */ - /* The class value for index registers, and the one for base regs. */ #define INDEX_REG_CLASS GENERAL_REGS @@ -734,8 +529,6 @@ extern const enum reg_class regno_reg_class[]; that a specific kind of register will not be used for a given target without fiddling with the register classes above. */ -#ifndef SUPPORT_SUN_FPA - #define REG_CLASS_FROM_LETTER(C) \ ((C) == 'a' ? ADDR_REGS : \ ((C) == 'd' ? DATA_REGS : \ @@ -743,21 +536,6 @@ extern const enum reg_class regno_reg_class[]; NO_REGS) : \ NO_REGS))) -#else /* defined SUPPORT_SUN_FPA */ - -#define REG_CLASS_FROM_LETTER(C) \ - ((C) == 'a' ? ADDR_REGS : \ - ((C) == 'd' ? DATA_REGS : \ - ((C) == 'f' ? (TARGET_68881 ? FP_REGS : \ - NO_REGS) : \ - ((C) == 'x' ? (TARGET_FPA ? FPA_REGS : \ - NO_REGS) : \ - ((C) == 'y' ? (TARGET_FPA ? LO_FPA_REGS : \ - NO_REGS) : \ - NO_REGS))))) - -#endif /* defined SUPPORT_SUN_FPA */ - /* The letters I, J, K, L and M in a register constraint string can be used to stand for particular ranges of immediate operands. This macro defines what the ranges are. @@ -788,18 +566,10 @@ extern const enum reg_class regno_reg_class[]; * A small bit of explanation: * "G" defines all of the floating constants that are *NOT* 68881 * constants. this is so 68881 constants get reloaded and the - * fpmovecr is used. "H" defines *only* the class of constants that - * the fpa can use, because these can be gotten at in any fpa - * instruction and there is no need to force reloads. + * fpmovecr is used. */ -#ifndef SUPPORT_SUN_FPA #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \ ((C) == 'G' ? ! (TARGET_68881 && standard_68881_constant_p (VALUE)) : 0 ) -#else /* defined SUPPORT_SUN_FPA */ -#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \ - ((C) == 'G' ? ! (TARGET_68881 && standard_68881_constant_p (VALUE)) : \ - (C) == 'H' ? (TARGET_FPA && standard_sun_fpa_constant_p (VALUE)) : 0) -#endif /* defined SUPPORT_SUN_FPA */ /* A C expression that defines the optional machine-dependent constraint letters that can be used to segregate specific types of operands, @@ -877,8 +647,6 @@ extern const enum reg_class regno_reg_class[]; needed to represent mode MODE in a register of class CLASS. */ /* On the 68000, this is the size of MODE in words, except in the FP regs, where a single reg is always enough. */ -#ifndef SUPPORT_SUN_FPA - #define CLASS_MAX_NREGS(CLASS, MODE) \ ((CLASS) == FP_REGS ? 1 \ : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)) @@ -888,23 +656,6 @@ extern const enum reg_class regno_reg_class[]; (((CLASS1) == FP_REGS && (CLASS2) != FP_REGS) \ || ((CLASS2) == FP_REGS && (CLASS1) != FP_REGS) \ ? 4 : 2) - -#else /* defined SUPPORT_SUN_FPA */ - -#define CLASS_MAX_NREGS(CLASS, MODE) \ - ((CLASS) == FP_REGS || (CLASS) == FPA_REGS || (CLASS) == LO_FPA_REGS ? 1 \ - : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)) - -/* Moves between fp regs and other regs are two insns. */ -/* Likewise for high fpa regs and other regs. */ -#define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \ - ((((CLASS1) == FP_REGS && (CLASS2) != FP_REGS) \ - || ((CLASS2) == FP_REGS && (CLASS1) != FP_REGS) \ - || ((CLASS1) == FPA_REGS && (CLASS2) != FPA_REGS) \ - || ((CLASS2) == FPA_REGS && (CLASS1) != FPA_REGS)) \ - ? 4 : 2) - -#endif /* define SUPPORT_SUN_FPA */ /* Stack layout; function entry, exit and calling. */ @@ -1209,10 +960,6 @@ __transfer_from_trampoline () \ ((REGNO) < 8 || (unsigned) reg_renumber[REGNO] < 8) #define REGNO_OK_FOR_FP_P(REGNO) \ (((REGNO) ^ 020) < 8 || (unsigned) (reg_renumber[REGNO] ^ 020) < 8) -#ifdef SUPPORT_SUN_FPA -#define REGNO_OK_FOR_FPA_P(REGNO) \ -(((REGNO) >= 24 && (REGNO) < 56) || (reg_renumber[REGNO] >= 24 && reg_renumber[REGNO] < 56)) -#endif /* Now macros that check whether X is a register and also, strictly, whether it is in a specified class. @@ -1232,14 +979,6 @@ __transfer_from_trampoline () \ /* 1 if X is an address register */ #define ADDRESS_REG_P(X) (REG_P (X) && REGNO_OK_FOR_BASE_P (REGNO (X))) - -#ifdef SUPPORT_SUN_FPA -/* 1 if X is a register in the Sun FPA. */ -#define FPA_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FPA_P (REGNO (X))) -#else -/* Answer must be no if we don't have an FPA. */ -#define FPA_REG_P(X) 0 -#endif /* Maximum number of registers that can appear in a valid memory address. */ @@ -1604,26 +1343,11 @@ __transfer_from_trampoline () \ /* How to refer to registers in assembler output. This sequence is indexed by compiler's hard-register-number (see above). */ -#ifndef SUPPORT_SUN_FPA - #define REGISTER_NAMES \ {"d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7", \ "a0", "a1", "a2", "a3", "a4", "a5", "a6", "sp", \ "fp0", "fp1", "fp2", "fp3", "fp4", "fp5", "fp6", "fp7" } -#else /* SUPPORTED_SUN_FPA */ - -#define REGISTER_NAMES \ -{"d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7", \ - "a0", "a1", "a2", "a3", "a4", "a5", "a6", "sp", \ - "fp0", "fp1", "fp2", "fp3", "fp4", "fp5", "fp6", "fp7", \ - "fpa0", "fpa1", "fpa2", "fpa3", "fpa4", "fpa5", "fpa6", "fpa7", \ - "fpa8", "fpa9", "fpa10", "fpa11", "fpa12", "fpa13", "fpa14", "fpa15", \ - "fpa16", "fpa17", "fpa18", "fpa19", "fpa20", "fpa21", "fpa22", "fpa23", \ - "fpa24", "fpa25", "fpa26", "fpa27", "fpa28", "fpa29", "fpa30", "fpa31" } - -#endif /* defined SUPPORT_SUN_FPA */ - /* How to renumber registers for dbx and gdb. On the Sun-3, the floating point registers have numbers 18 to 25, not 16 to 23 as they do in the compiler. */ @@ -1786,13 +1510,8 @@ __transfer_from_trampoline () \ 'f' for float insn (print a CONST_DOUBLE as a float rather than in hex) 'o' for operands to go directly to output_operand_address (bypassing print_operand_address--used only for SYMBOL_REFs under TARGET_PCREL) - 'w' for FPA insn (print a CONST_DOUBLE as a SunFPA constant rather - than directly). Second part of 'y' below. 'x' for float insn (print a CONST_DOUBLE as a float rather than in hex), - or print pair of registers as rx:ry. - 'y' for a FPA insn (print pair of registers as rx:ry). This also outputs - CONST_DOUBLE's as SunFPA constant RAM registers if - possible, so it should not be used except for the SunFPA. */ + or print pair of registers as rx:ry. */ #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \ ((CODE) == '.' || (CODE) == '#' || (CODE) == '-' \ diff --git a/gcc/config/m68k/m68k.md b/gcc/config/m68k/m68k.md index dc2691c..539ff58 100644 --- a/gcc/config/m68k/m68k.md +++ b/gcc/config/m68k/m68k.md @@ -47,14 +47,11 @@ ;;- 'd' one of the data registers can be used. ;;- 'f' one of the m68881 registers can be used ;;- 'r' either a data or an address register can be used. -;;- 'x' if one of the Sun FPA registers -;;- 'y' if one of the Low Sun FPA registers (fpa0-fpa15). ;;- Immediate Floating point operator constraints ;;- 'G' a floating point constant that is *NOT* one of the standard ;; 68881 constant values (to force calling output_move_const_double ;; to get it from rom if it is a 68881 constant). -;;- 'H' one of the standard FPA constant values ;; ;; See the functions standard_XXX_constant_p in output-m68k.c for more ;; info. @@ -115,165 +112,6 @@ ;;- divu.l <ea>,Dr:Dq; muls.l <ea>,Dr:Dq; mulu.l <ea>,Dr:Dq; and ;;- fscale. The TARGET_68060 flag turns the use of the opcodes off. -;;- FPA port explanation: - -;;- Usage of the Sun FPA and the 68881 together - -;;- The current port of gcc to the sun fpa disallows use of the m68881 -;;- instructions completely if code is targeted for the fpa. This is -;;- for the following reasons: - -;;- 1) Expressing the preference hierarchy (ie. use the fpa if you -;;- can, the 68881 otherwise, and data registers only if you are -;;- forced to it) is a bitch with the current constraint scheme, -;;- especially since it would have to work for any combination of -;;- -mfpa, -m68881. - -;;- 2) There are no instructions to move between the two types of -;;- registers; the stack must be used as an intermediary. - -;;- It could indeed be done; I think the best way would be to have -;;- separate patterns for TARGET_FPA (which implies a 68881), -;;- TARGET_68881, and no floating point co-processor. Use -;;- define_expands for all of the named instruction patterns, and -;;- include code in the FPA instruction to deal with the 68881 with -;;- preferences specifically set to favor the fpa. Some of this has -;;- already been done: -;;- -;;- 1) Separation of most of the patterns out into a TARGET_FPA -;;- case and a TARGET_68881 case (the exceptions are the patterns -;;- which would need one define_expand and three define_insn's under -;;- it (with a lot of duplicate code between them) to replace the -;;- current single define_insn. These are mov{[ds]f,[ds]i} and the -;;- first two patterns in the md. -;;- -;;- Some would still have to be done: -;;- -;;- 1) Add code to the fpa patterns which correspond to 68881 -;;- patterns to deal with the 68881 case (including preferences!). -;;- What you might actually do here is combine the fpa and 68881 code -;;- back together into one pattern for those instructions where it's -;;- absolutely necessary and save yourself some duplicate code. I'm -;;- not completely sure as to whether you could get away with doing -;;- this only for the mov* insns, or if you'd have to do it for all -;;- named insns. -;;- 2) Add code to the mov{[ds]f,[ds]i} instructions to handle -;;- moving between fpa regs and 68881 regs. - -;;- Since the fpa is more powerful than the 68881 and also has more -;;- registers, and since I think the resultant md would be medium ugly -;;- (lot's of duplicate code, ugly constraint strings), I elected not -;;- to do this change. - -;;- Another reason why someone *might* want to do the change is to -;;- control which register classes are accessed in a slightly cleaner -;;- way than I have. See the blurb on CONDITIONAL_REGISTER_USAGE in -;;- the internals manual. - -;;- Yet another reason why someone might want to do this change is to -;;- allow use of some of the 68881 insns which have no equivalent on -;;- the fpa. The sqrt instruction comes fairly quickly to mind. - -;;- If this is ever done, don't forget to change sun3.h so that -;;- it *will* define __HAVE_68881__ when the FPA is in use. - -;;- Condition code hack - -;;- When a floating point compare is done in the fpa, the resulting -;;- condition codes are left in the fpastatus register. The values in -;;- this register must be moved into the 68000 cc register before any -;;- jump is executed. Once this has been done, regular jump -;;- instructions are fine (ie. floating point jumps are not necessary. -;;- They are only done if the cc is in the 68881). - -;;- The instructions that move the fpastatus register to the 68000 -;;- register clobber a data register (the move cannot be done direct). -;;- These instructions might be bundled either with the compare -;;- instruction, or the branch instruction. If we were using both the -;;- fpa and the 68881 together, we would wish to only mark the -;;- register clobbered if we were doing the compare in the fpa, but I -;;- think that that decision (whether to clobber the register or not) -;;- must be done before register allocation (makes sense) and hence we -;;- can't know if the floating point compare will be done in the fpa -;;- or the fp. So whenever we are asked for code that uses the fpa, -;;- we will mark a data register as clobbered. This is reasonable, as -;;- almost all floating point compare operations done with fpa code -;;- enabled will be done in the fpa. It's even more reasonable since -;;- we decided to make the 68881 and the fpa mutually exclusive. - -;;- We place to code to move the fpastatus register inside of a -;;- define_expand so that we can do it conditionally based on whether -;;- we are targeting an fpa or not. - -;;- This still leaves us with the question of where we wish to put the -;;- code to move the fpastatus reg. If we put it in the compare -;;- instruction, we can restrict the clobbering of the register to -;;- floating point compares, but we can't take advantage of floating -;;- point subtracts & etc. that alter the fpastatus register. If we -;;- put it in the branch instruction, all branches compiled with fpa -;;- code enabled will clobber a data register, but we will be able to -;;- take advantage of fpa subtracts. This balance favors putting the -;;- code in with the compare instruction. - -;;- Note that if some enterprising hacker should decide to switch -;;- this, he'll need to modify the code in NOTICE_UPDATE_CC. - -;;- Usage of the top 16 fpa registers - -;;- The only locations which we may transfer fpa registers 16-31 from -;;- or to are the fpa registers 0-15. (68000 registers and memory -;;- locations are impossible). This causes problems in gcc, which -;;- assumes that mov?? instructions require no additional registers -;;- (see section 11.7) and since floating point moves *must* be -;;- supported into general registers (see section 12.3 under -;;- HARD_REGNO_OK_FOR_MODE_P) from anywhere. - -;;- My solution was to reserve fpa0 for moves into or out of these top -;;- 16 registers and to disparage the choice to reload into or out of -;;- these registers as much as I could. That alternative is always -;;- last in the list, so it will not be used unless all else fails. I -;;- will note that according to my current information, sun's compiler -;;- doesn't use these top 16 registers at all. - -;;- There is another possible way to do it. I *believe* that if you -;;- make absolutely sure that the code will not be executed in the -;;- reload pass, you can support the mov?? names with define_expands -;;- which require new registers. This may be possible by the -;;- appropriate juggling of constraints. I may come back to this later. - -;;- Usage of constant RAM - -;;- This has been handled correctly (I believe) but the way I've done -;;- it could use a little explanation. The constant RAM can only be -;;- accessed when the instruction is in "command register" mode. -;;- "command register" mode means that no accessing of memory or the -;;- 68000 registers is being done. This can be expressed easily in -;;- constraints, so generally the mode of the instruction is -;;- determined by a branch off of which_alternative. In outputting -;;- instructions, a 'w' means to output an access to the constant ram -;;- (if the arg is CONST_DOUBLE and is one of the available -;;- constants), and 'x' means to output a register pair (if the arg is -;;- a 68000 register) and a 'y' is the combination of the above two -;;- processes. You use a 'y' in two operand DF instructions where you -;;- *know* the other operand is an fpa register, you use an 'x' in DF -;;- instructions where the arg might be a 68000 register and the -;;- instruction is *not* in "command register" mode, and you use a 'w' -;;- in two situations: 1) The instruction *is* in command register -;;- mode (and hence won't be accessing 68000 registers), or 2) The -;;- instruction is a two operand SF instruction where you know the -;;- other operand is an fpa register. - -;;- Optimization issues - -;;- I actually think that I've included all of the fpa instructions -;;- that should be included. Note that if someone is interested in -;;- doing serious floating point work on the sun fpa, I would advise -;;- the use of the "asm" instruction in gcc to allow you to use the -;;- sin, cos, and exponential functions on the fpa board. - -;;- END FPA Explanation Section. - - ;;- Some of these insn's are composites of several m68000 op codes. ;;- The assembler (or final @@??) insures that the appropriate one is ;;- selected. @@ -286,8 +124,6 @@ { if (FP_REG_P (operands[1])) return \"fmove%.d %f1,%0\"; - if (FPA_REG_P (operands[1])) - return \"fpmove%.d %1, %x0\"; return output_move_double (operands); }") @@ -402,24 +238,12 @@ (define_expand "tstsf" [(set (cc0) (match_operand:SF 0 "general_operand" ""))] - "TARGET_68881 || TARGET_FPA" + "TARGET_68881" " { m68k_last_compare_had_fp_operands = 1; - if (TARGET_FPA) - { - emit_insn (gen_tstsf_fpa (operands[0])); - DONE; - } }") -(define_insn "tstsf_fpa" - [(set (cc0) - (match_operand:SF 0 "general_operand" "xmdF")) - (clobber (match_scratch:SI 1 "=d"))] - "TARGET_FPA" - "fptst%.s %x0\;fpmove fpastatus,%1\;movw %1,cc") - (define_insn "" [(set (cc0) (match_operand:SF 0 "general_operand" "fdm"))] @@ -435,24 +259,12 @@ (define_expand "tstdf" [(set (cc0) (match_operand:DF 0 "general_operand" ""))] - "TARGET_68881 || TARGET_FPA" + "TARGET_68881" " { m68k_last_compare_had_fp_operands = 1; - if (TARGET_FPA) - { - emit_insn (gen_tstsf_fpa (operands[0])); - DONE; - } }") -(define_insn "tstdf_fpa" - [(set (cc0) - (match_operand:DF 0 "general_operand" "xrmF")) - (clobber (match_scratch:SI 1 "=d"))] - "TARGET_FPA" - "fptst%.d %x0\;fpmove fpastatus,%1\;movw %1,cc") - (define_insn "" [(set (cc0) (match_operand:DF 0 "general_operand" "fm"))] @@ -654,25 +466,12 @@ [(set (cc0) (compare (match_operand:DF 0 "general_operand" "") (match_operand:DF 1 "general_operand" "")))] - "TARGET_68881 || TARGET_FPA" + "TARGET_68881" " { m68k_last_compare_had_fp_operands = 1; - if (TARGET_FPA) - { - emit_insn (gen_cmpdf_fpa (operands[0], operands[1])); - DONE; - } }") -(define_insn "cmpdf_fpa" - [(set (cc0) - (compare (match_operand:DF 0 "general_operand" "x,y") - (match_operand:DF 1 "general_operand" "xH,rmF"))) - (clobber (match_scratch:SI 2 "=d,d"))] - "TARGET_FPA" - "fpcmp%.d %y1,%0\;fpmove fpastatus,%2\;movw %2,cc") - (define_insn "" [(set (cc0) (compare (match_operand:DF 0 "general_operand" "f,mG") @@ -708,25 +507,12 @@ [(set (cc0) (compare (match_operand:SF 0 "general_operand" "") (match_operand:SF 1 "general_operand" "")))] - "TARGET_68881 || TARGET_FPA" + "TARGET_68881" " { m68k_last_compare_had_fp_operands = 1; - if (TARGET_FPA) - { - emit_insn (gen_cmpsf_fpa (operands[0], operands[1])); - DONE; - } }") -(define_insn "cmpsf_fpa" - [(set (cc0) - (compare (match_operand:SF 0 "general_operand" "x,y") - (match_operand:SF 1 "general_operand" "xH,rmF"))) - (clobber (match_scratch:SI 2 "=d,d"))] - "TARGET_FPA" - "fpcmp%.s %w1,%x0\;fpmove fpastatus,%2\;movw %2,cc") - (define_insn "" [(set (cc0) (compare (match_operand:SF 0 "general_operand" "f,mdG") @@ -976,17 +762,12 @@ (define_insn "" ;; Notes: make sure no alternative allows g vs g. ;; We don't allow f-regs since fixed point cannot go in them. - ;; We do allow y and x regs since fixed point is allowed in them. - [(set (match_operand:SI 0 "nonimmediate_operand" "=g,d,a<,y,!*x*r*m") - (match_operand:SI 1 "general_src_operand" "daymSKT,n,i,g,*x*r*m"))] + [(set (match_operand:SI 0 "nonimmediate_operand" "=g,d,a<") + (match_operand:SI 1 "general_src_operand" "daymSKT,n,i"))] "!TARGET_5200" "* { - if (which_alternative == 4) - return \"fpmove%.l %x1,fpa0\;fpmove%.l fpa0,%x0\"; - if (FPA_REG_P (operands[1]) || FPA_REG_P (operands[0])) - return \"fpmove%.l %x1,%x0\"; return output_move_simode (operands); }") @@ -1095,32 +876,11 @@ "") (define_insn "" - [(set (match_operand:SF 0 "nonimmediate_operand" "=rmf,x,y,rm,!x,!rm") - (match_operand:SF 1 "general_operand" "rmfF,xH,rmF,y,rm,x"))] -; [(set (match_operand:SF 0 "nonimmediate_operand" "=rmf") -; (match_operand:SF 1 "general_operand" "rmfF"))] + [(set (match_operand:SF 0 "nonimmediate_operand" "=rmf") + (match_operand:SF 1 "general_operand" "rmfF"))] "!TARGET_5200" "* { - if (which_alternative >= 4) - return \"fpmove%.s %1,fpa0\;fpmove%.s fpa0,%0\"; - if (FPA_REG_P (operands[0])) - { - if (FPA_REG_P (operands[1])) - return \"fpmove%.s %x1,%x0\"; - else if (GET_CODE (operands[1]) == CONST_DOUBLE) - return output_move_const_single (operands); - else if (FP_REG_P (operands[1])) - return \"fmove%.s %1,sp@-\;fpmove%.d sp@+, %0\"; - return \"fpmove%.s %x1,%x0\"; - } - if (FPA_REG_P (operands[1])) - { - if (FP_REG_P (operands[0])) - return \"fpmove%.s %x1,sp@-\;fmove%.s sp@+,%0\"; - else - return \"fpmove%.s %x1,%x0\"; - } if (FP_REG_P (operands[0])) { if (FP_REG_P (operands[1])) @@ -1189,32 +949,13 @@ "") (define_insn "" - [(set (match_operand:DF 0 "nonimmediate_operand" - "=*rm,*rf,*rf,&*rof<>,y,*rm,x,!x,!*rm") - (match_operand:DF 1 "general_operand" - "*rf,m,0,*rofE<>,*rmE,y,xH,*rm,x"))] + [(set (match_operand:DF 0 "nonimmediate_operand" "=rm,rf,rf,&rof<>") + (match_operand:DF 1 "general_operand" "*rf,m,0,*rofE<>"))] ; [(set (match_operand:DF 0 "nonimmediate_operand" "=rm,&rf,&rof<>") ; (match_operand:DF 1 "general_operand" "rf,m,rofF<>"))] "!TARGET_5200" "* { - if (which_alternative == 7) - return \"fpmove%.d %x1,fpa0\;fpmove%.d fpa0,%x0\"; - if (FPA_REG_P (operands[0])) - { - if (GET_CODE (operands[1]) == CONST_DOUBLE) - return output_move_const_double (operands); - if (FP_REG_P (operands[1])) - return \"fmove%.d %1,sp@-\;fpmove%.d sp@+,%x0\"; - return \"fpmove%.d %x1,%x0\"; - } - else if (FPA_REG_P (operands[1])) - { - if (FP_REG_P(operands[0])) - return \"fpmove%.d %x1,sp@-\;fmoved sp@+,%0\"; - else - return \"fpmove%.d %x1,%x0\"; - } if (FP_REG_P (operands[0])) { if (FP_REG_P (operands[1])) @@ -1373,19 +1114,15 @@ ;; movdi can apply to fp regs in some cases (define_insn "" ;; Let's see if it really still needs to handle fp regs, and, if so, why. - [(set (match_operand:DI 0 "nonimmediate_operand" "=rm,r,&ro<>,y,rm,!*x,!rm") - (match_operand:DI 1 "general_operand" "rF,m,roi<>F,rmiF,y,rmF,*x"))] -; [(set (match_operand:DI 0 "nonimmediate_operand" "=rm,&r,&ro<>,!&rm,!&f,y,rm,x,!x,!rm") -; (match_operand:DI 1 "general_operand" "r,m,roi<>,fF,rfmF,rmi,y,rm,x"))] + [(set (match_operand:DI 0 "nonimmediate_operand" "=rm,r,&ro<>") + (match_operand:DI 1 "general_operand" "rF,m,roi<>F"))] +; [(set (match_operand:DI 0 "nonimmediate_operand" "=rm,&r,&ro<>,!&rm,!&f") +; (match_operand:DI 1 "general_operand" "r,m,roi<>,fF"))] ; [(set (match_operand:DI 0 "nonimmediate_operand" "=rm,&rf,&ro<>,!&rm,!&f") ; (match_operand:DI 1 "general_operand" "r,m,roi<>,fF,rfF"))] "!TARGET_5200" "* { - if (which_alternative == 8) - return \"fpmove%.d %x1,fpa0\;fpmove%.d fpa0,%x0\"; - if (FPA_REG_P (operands[0]) || FPA_REG_P (operands[1])) - return \"fpmove%.d %x1,%x0\"; if (FP_REG_P (operands[0])) { if (FP_REG_P (operands[1])) @@ -1849,17 +1586,10 @@ [(set (match_operand:DF 0 "nonimmediate_operand" "") (float_extend:DF (match_operand:SF 1 "general_operand" "")))] - "TARGET_68881 || TARGET_FPA" + "TARGET_68881" "") (define_insn "" - [(set (match_operand:DF 0 "nonimmediate_operand" "=x,y") - (float_extend:DF - (match_operand:SF 1 "general_operand" "xH,rmF")))] - "TARGET_FPA" - "fpstod %w1,%0") - -(define_insn "" [(set (match_operand:DF 0 "nonimmediate_operand" "=*fdm,f") (float_extend:DF (match_operand:SF 1 "general_operand" "f,dmF")))] @@ -1891,21 +1621,13 @@ ;; This cannot output into an f-reg because there is no way to be ;; sure of truncating in that case. -;; But on the Sun FPA, we can be sure. (define_expand "truncdfsf2" [(set (match_operand:SF 0 "nonimmediate_operand" "") (float_truncate:SF (match_operand:DF 1 "general_operand" "")))] - "TARGET_68881 || TARGET_FPA" + "TARGET_68881" "") -(define_insn "" - [(set (match_operand:SF 0 "nonimmediate_operand" "=x,y") - (float_truncate:SF - (match_operand:DF 1 "general_operand" "xH,rmF")))] - "TARGET_FPA" - "fpdtos %y1,%0") - ;; On the '040 we can truncate in a register accurately and easily. (define_insn "" [(set (match_operand:SF 0 "nonimmediate_operand" "=f") @@ -1937,16 +1659,10 @@ (define_expand "floatsisf2" [(set (match_operand:SF 0 "nonimmediate_operand" "") (float:SF (match_operand:SI 1 "general_operand" "")))] - "TARGET_68881 || TARGET_FPA" + "TARGET_68881" "") (define_insn "" - [(set (match_operand:SF 0 "nonimmediate_operand" "=y,x") - (float:SF (match_operand:SI 1 "general_operand" "rmi,x")))] - "TARGET_FPA" - "fpltos %1,%0") - -(define_insn "" [(set (match_operand:SF 0 "nonimmediate_operand" "=f") (float:SF (match_operand:SI 1 "general_operand" "dmi")))] "TARGET_68881" @@ -1955,16 +1671,10 @@ (define_expand "floatsidf2" [(set (match_operand:DF 0 "nonimmediate_operand" "") (float:DF (match_operand:SI 1 "general_operand" "")))] - "TARGET_68881 || TARGET_FPA" + "TARGET_68881" "") (define_insn "" - [(set (match_operand:DF 0 "nonimmediate_operand" "=y,x") - (float:DF (match_operand:SI 1 "general_operand" "rmi,x")))] - "TARGET_FPA" - "fpltod %1,%0") - -(define_insn "" [(set (match_operand:DF 0 "nonimmediate_operand" "=f") (float:DF (match_operand:SI 1 "general_operand" "dmi")))] "TARGET_68881" @@ -2097,21 +1807,6 @@ (fix:SI (match_operand:DF 1 "general_operand" "f")))] "TARGET_68881" "fmove%.l %1,%0") - -;; Convert a float to an integer. -;; On the Sun FPA, this is done in one step. - -(define_insn "" - [(set (match_operand:SI 0 "nonimmediate_operand" "=x,y") - (fix:SI (fix:SF (match_operand:SF 1 "general_operand" "xH,rmF"))))] - "TARGET_FPA" - "fpstol %w1,%0") - -(define_insn "" - [(set (match_operand:SI 0 "nonimmediate_operand" "=x,y") - (fix:SI (fix:DF (match_operand:DF 1 "general_operand" "xH,rmF"))))] - "TARGET_FPA" - "fpdtol %y1,%0") ;; add instructions @@ -2622,26 +2317,10 @@ [(set (match_operand:DF 0 "nonimmediate_operand" "") (plus:DF (match_operand:DF 1 "general_operand" "") (match_operand:DF 2 "general_operand" "")))] - "TARGET_68881 || TARGET_FPA" + "TARGET_68881" "") (define_insn "" - [(set (match_operand:DF 0 "nonimmediate_operand" "=x,y") - (plus:DF (match_operand:DF 1 "general_operand" "%xH,y") - (match_operand:DF 2 "general_operand" "xH,dmF")))] - "TARGET_FPA" - "* -{ - if (rtx_equal_p (operands[0], operands[1])) - return \"fpadd%.d %y2,%0\"; - if (rtx_equal_p (operands[0], operands[2])) - return \"fpadd%.d %y1,%0\"; - if (which_alternative == 0) - return \"fpadd3%.d %w2,%w1,%0\"; - return \"fpadd3%.d %x2,%x1,%0\"; -}") - -(define_insn "" [(set (match_operand:DF 0 "nonimmediate_operand" "=f") (plus:DF (float:DF (match_operand:SI 2 "general_operand" "dmi")) (match_operand:DF 1 "general_operand" "0")))] @@ -2678,26 +2357,10 @@ [(set (match_operand:SF 0 "nonimmediate_operand" "") (plus:SF (match_operand:SF 1 "general_operand" "") (match_operand:SF 2 "general_operand" "")))] - "TARGET_68881 || TARGET_FPA" + "TARGET_68881" "") (define_insn "" - [(set (match_operand:SF 0 "nonimmediate_operand" "=x,y") - (plus:SF (match_operand:SF 1 "general_operand" "%xH,y") - (match_operand:SF 2 "general_operand" "xH,rmF")))] - "TARGET_FPA" - "* -{ - if (rtx_equal_p (operands[0], operands[1])) - return \"fpadd%.s %w2,%0\"; - if (rtx_equal_p (operands[0], operands[2])) - return \"fpadd%.s %w1,%0\"; - if (which_alternative == 0) - return \"fpadd3%.s %w2,%w1,%0\"; - return \"fpadd3%.s %2,%1,%0\"; -}") - -(define_insn "" [(set (match_operand:SF 0 "nonimmediate_operand" "=f") (plus:SF (float:SF (match_operand:SI 2 "general_operand" "dmi")) (match_operand:SF 1 "general_operand" "0")))] @@ -2907,26 +2570,10 @@ [(set (match_operand:DF 0 "nonimmediate_operand" "") (minus:DF (match_operand:DF 1 "general_operand" "") (match_operand:DF 2 "general_operand" "")))] - "TARGET_68881 || TARGET_FPA" + "TARGET_68881" "") (define_insn "" - [(set (match_operand:DF 0 "nonimmediate_operand" "=x,y,y") - (minus:DF (match_operand:DF 1 "general_operand" "xH,y,dmF") - (match_operand:DF 2 "general_operand" "xH,dmF,0")))] - "TARGET_FPA" - "* -{ - if (rtx_equal_p (operands[0], operands[2])) - return \"fprsub%.d %y1,%0\"; - if (rtx_equal_p (operands[0], operands[1])) - return \"fpsub%.d %y2,%0\"; - if (which_alternative == 0) - return \"fpsub3%.d %w2,%w1,%0\"; - return \"fpsub3%.d %x2,%x1,%0\"; -}") - -(define_insn "" [(set (match_operand:DF 0 "nonimmediate_operand" "=f") (minus:DF (match_operand:DF 1 "general_operand" "0") (float:DF (match_operand:SI 2 "general_operand" "dmi"))))] @@ -2963,26 +2610,10 @@ [(set (match_operand:SF 0 "nonimmediate_operand" "") (minus:SF (match_operand:SF 1 "general_operand" "") (match_operand:SF 2 "general_operand" "")))] - "TARGET_68881 || TARGET_FPA" + "TARGET_68881" "") (define_insn "" - [(set (match_operand:SF 0 "nonimmediate_operand" "=x,y,y") - (minus:SF (match_operand:SF 1 "general_operand" "xH,y,rmF") - (match_operand:SF 2 "general_operand" "xH,rmF,0")))] - "TARGET_FPA" - "* -{ - if (rtx_equal_p (operands[0], operands[2])) - return \"fprsub%.s %w1,%0\"; - if (rtx_equal_p (operands[0], operands[1])) - return \"fpsub%.s %w2,%0\"; - if (which_alternative == 0) - return \"fpsub3%.s %w2,%w1,%0\"; - return \"fpsub3%.s %2,%1,%0\"; -}") - -(define_insn "" [(set (match_operand:SF 0 "nonimmediate_operand" "=f") (minus:SF (match_operand:SF 1 "general_operand" "0") (float:SF (match_operand:SI 2 "general_operand" "dmi"))))] @@ -3287,28 +2918,10 @@ [(set (match_operand:DF 0 "nonimmediate_operand" "") (mult:DF (match_operand:DF 1 "general_operand" "") (match_operand:DF 2 "general_operand" "")))] - "TARGET_68881 || TARGET_FPA" + "TARGET_68881" "") (define_insn "" - [(set (match_operand:DF 0 "nonimmediate_operand" "=x,y") - (mult:DF (match_operand:DF 1 "general_operand" "%xH,y") - (match_operand:DF 2 "general_operand" "xH,rmF")))] - "TARGET_FPA" - "* -{ - if (rtx_equal_p (operands[1], operands[2])) - return \"fpsqr%.d %y1,%0\"; - if (rtx_equal_p (operands[0], operands[1])) - return \"fpmul%.d %y2,%0\"; - if (rtx_equal_p (operands[0], operands[2])) - return \"fpmul%.d %y1,%0\"; - if (which_alternative == 0) - return \"fpmul3%.d %w2,%w1,%0\"; - return \"fpmul3%.d %x2,%x1,%0\"; -}") - -(define_insn "" [(set (match_operand:DF 0 "nonimmediate_operand" "=f") (mult:DF (float:DF (match_operand:SI 2 "general_operand" "dmi")) (match_operand:DF 1 "general_operand" "0")))] @@ -3352,28 +2965,10 @@ [(set (match_operand:SF 0 "nonimmediate_operand" "") (mult:SF (match_operand:SF 1 "general_operand" "") (match_operand:SF 2 "general_operand" "")))] - "TARGET_68881 || TARGET_FPA" + "TARGET_68881" "") (define_insn "" - [(set (match_operand:SF 0 "nonimmediate_operand" "=x,y") - (mult:SF (match_operand:SF 1 "general_operand" "%xH,y") - (match_operand:SF 2 "general_operand" "xH,rmF")))] - "TARGET_FPA" - "* -{ - if (rtx_equal_p (operands[1], operands[2])) - return \"fpsqr%.s %w1,%0\"; - if (rtx_equal_p (operands[0], operands[1])) - return \"fpmul%.s %w2,%0\"; - if (rtx_equal_p (operands[0], operands[2])) - return \"fpmul%.s %w1,%0\"; - if (which_alternative == 0) - return \"fpmul3%.s %w2,%w1,%0\"; - return \"fpmul3%.s %2,%1,%0\"; -}") - -(define_insn "" [(set (match_operand:SF 0 "nonimmediate_operand" "=f") (mult:SF (float:SF (match_operand:SI 2 "general_operand" "dmi")) (match_operand:SF 1 "general_operand" "0")))] @@ -3438,26 +3033,10 @@ [(set (match_operand:DF 0 "nonimmediate_operand" "") (div:DF (match_operand:DF 1 "general_operand" "") (match_operand:DF 2 "general_operand" "")))] - "TARGET_68881 || TARGET_FPA" + "TARGET_68881" "") (define_insn "" - [(set (match_operand:DF 0 "nonimmediate_operand" "=x,y,y") - (div:DF (match_operand:DF 1 "general_operand" "xH,y,rmF") - (match_operand:DF 2 "general_operand" "xH,rmF,0")))] - "TARGET_FPA" - "* -{ - if (rtx_equal_p (operands[0], operands[2])) - return \"fprdiv%.d %y1,%0\"; - if (rtx_equal_p (operands[0], operands[1])) - return \"fpdiv%.d %y2,%0\"; - if (which_alternative == 0) - return \"fpdiv3%.d %w2,%w1,%0\"; - return \"fpdiv3%.d %x2,%x1,%x0\"; -}") - -(define_insn "" [(set (match_operand:DF 0 "nonimmediate_operand" "=f") (div:DF (match_operand:DF 1 "general_operand" "0") (float:DF (match_operand:SI 2 "general_operand" "dmi"))))] @@ -3494,26 +3073,10 @@ [(set (match_operand:SF 0 "nonimmediate_operand" "") (div:SF (match_operand:SF 1 "general_operand" "") (match_operand:SF 2 "general_operand" "")))] - "TARGET_68881 || TARGET_FPA" + "TARGET_68881" "") (define_insn "" - [(set (match_operand:SF 0 "nonimmediate_operand" "=x,y,y") - (div:SF (match_operand:SF 1 "general_operand" "xH,y,rmF") - (match_operand:SF 2 "general_operand" "xH,rmF,0")))] - "TARGET_FPA" - "* -{ - if (rtx_equal_p (operands[0], operands[1])) - return \"fpdiv%.s %w2,%0\"; - if (rtx_equal_p (operands[0], operands[2])) - return \"fprdiv%.s %w1,%0\"; - if (which_alternative == 0) - return \"fpdiv3%.s %w2,%w1,%0\"; - return \"fpdiv3%.s %2,%1,%0\"; -}") - -(define_insn "" [(set (match_operand:SF 0 "nonimmediate_operand" "=f") (div:SF (match_operand:SF 1 "general_operand" "0") (float:SF (match_operand:SI 2 "general_operand" "dmi"))))] @@ -4237,7 +3800,7 @@ "" " { - if (!TARGET_FPA && !TARGET_68881) + if (!TARGET_68881) { rtx result; rtx target; @@ -4259,12 +3822,6 @@ }") (define_insn "" - [(set (match_operand:SF 0 "nonimmediate_operand" "=x,y") - (neg:SF (match_operand:SF 1 "general_operand" "xH,rmF")))] - "TARGET_FPA" - "fpneg%.s %w1,%0") - -(define_insn "" [(set (match_operand:SF 0 "nonimmediate_operand" "=f,d") (neg:SF (match_operand:SF 1 "general_operand" "fdmF,0")))] "TARGET_68881" @@ -4286,7 +3843,7 @@ "" " { - if (!TARGET_FPA && !TARGET_68881) + if (!TARGET_68881) { rtx result; rtx target; @@ -4315,12 +3872,6 @@ }") (define_insn "" - [(set (match_operand:DF 0 "nonimmediate_operand" "=x,y") - (neg:DF (match_operand:DF 1 "general_operand" "xH,rmF")))] - "TARGET_FPA" - "fpneg%.d %y1, %0") - -(define_insn "" [(set (match_operand:DF 0 "nonimmediate_operand" "=f,d") (neg:DF (match_operand:DF 1 "general_operand" "fmF,0")))] "TARGET_68881" @@ -4371,7 +3922,7 @@ "" " { - if (!TARGET_FPA && !TARGET_68881) + if (!TARGET_68881) { rtx result; rtx target; @@ -4393,12 +3944,6 @@ }") (define_insn "" - [(set (match_operand:SF 0 "nonimmediate_operand" "=x,y") - (abs:SF (match_operand:SF 1 "general_operand" "xH,rmF")))] - "TARGET_FPA" - "fpabs%.s %y1,%0") - -(define_insn "" [(set (match_operand:SF 0 "nonimmediate_operand" "=f") (abs:SF (match_operand:SF 1 "general_operand" "fdmF")))] "TARGET_68881" @@ -4415,7 +3960,7 @@ "" " { - if (!TARGET_FPA && !TARGET_68881) + if (!TARGET_68881) { rtx result; rtx target; @@ -4444,12 +3989,6 @@ }") (define_insn "" - [(set (match_operand:DF 0 "nonimmediate_operand" "=x,y") - (abs:DF (match_operand:DF 1 "general_operand" "xH,rmF")))] - "TARGET_FPA" - "fpabs%.d %y1,%0") - -(define_insn "" [(set (match_operand:DF 0 "nonimmediate_operand" "=f") (abs:DF (match_operand:DF 1 "general_operand" "fmF")))] "TARGET_68881" @@ -7806,142 +7345,6 @@ }") -;; FPA multiply and add. -(define_insn "" - [(set (match_operand:DF 0 "register_operand" "=x,y,y") - (plus:DF (mult:DF (match_operand:DF 1 "general_operand" "%x,dmF,y") - (match_operand:DF 2 "general_operand" "xH,y,y")) - (match_operand:DF 3 "general_operand" "xH,y,dmF")))] - "TARGET_FPA" - "@ - fpma%.d %1,%w2,%w3,%0 - fpma%.d %x1,%x2,%x3,%0 - fpma%.d %x1,%x2,%x3,%0") - -(define_insn "" - [(set (match_operand:SF 0 "register_operand" "=x,y,y") - (plus:SF (mult:SF (match_operand:SF 1 "general_operand" "%x,ydmF,y") - (match_operand:SF 2 "general_operand" "xH,y,ydmF")) - (match_operand:SF 3 "general_operand" "xH,ydmF,ydmF")))] - "TARGET_FPA" - "@ - fpma%.s %1,%w2,%w3,%0 - fpma%.s %1,%2,%3,%0 - fpma%.s %1,%2,%3,%0") - -;; FPA Multiply and subtract -(define_insn "" - [(set (match_operand:DF 0 "register_operand" "=x,y,y") - (minus:DF (match_operand:DF 1 "general_operand" "xH,rmF,y") - (mult:DF (match_operand:DF 2 "general_operand" "%xH,y,y") - (match_operand:DF 3 "general_operand" "x,y,rmF"))))] - "TARGET_FPA" - "@ - fpms%.d %3,%w2,%w1,%0 - fpms%.d %x3,%2,%x1,%0 - fpms%.d %x3,%2,%x1,%0") - -(define_insn "" - [(set (match_operand:SF 0 "register_operand" "=x,y,y") - (minus:SF (match_operand:SF 1 "general_operand" "xH,rmF,yrmF") - (mult:SF (match_operand:SF 2 "general_operand" "%xH,rmF,y") - (match_operand:SF 3 "general_operand" "x,y,yrmF"))))] - "TARGET_FPA" - "@ - fpms%.s %3,%w2,%w1,%0 - fpms%.s %3,%2,%1,%0 - fpms%.s %3,%2,%1,%0") - -(define_insn "" - [(set (match_operand:DF 0 "register_operand" "=x,y,y") - (minus:DF (mult:DF (match_operand:DF 1 "general_operand" "%xH,y,y") - (match_operand:DF 2 "general_operand" "x,y,rmF")) - (match_operand:DF 3 "general_operand" "xH,rmF,y")))] - "TARGET_FPA" - "@ - fpmr%.d %2,%w1,%w3,%0 - fpmr%.d %x2,%1,%x3,%0 - fpmr%.d %x2,%1,%x3,%0") - -(define_insn "" - [(set (match_operand:SF 0 "register_operand" "=x,y,y") - (minus:SF (mult:SF (match_operand:SF 1 "general_operand" "%xH,rmF,y") - (match_operand:SF 2 "general_operand" "x,y,yrmF")) - (match_operand:SF 3 "general_operand" "xH,rmF,yrmF")))] - "TARGET_FPA" - "@ - fpmr%.s %2,%w1,%w3,%0 - fpmr%.s %x2,%1,%x3,%0 - fpmr%.s %x2,%1,%x3,%0") - -;; FPA Add and multiply -(define_insn "" - [(set (match_operand:DF 0 "register_operand" "=x,y,y") - (mult:DF (plus:DF (match_operand:DF 1 "general_operand" "%xH,y,y") - (match_operand:DF 2 "general_operand" "x,y,rmF")) - (match_operand:DF 3 "general_operand" "xH,rmF,y")))] - "TARGET_FPA" - "@ - fpam%.d %2,%w1,%w3,%0 - fpam%.d %x2,%1,%x3,%0 - fpam%.d %x2,%1,%x3,%0") - -(define_insn "" - [(set (match_operand:SF 0 "register_operand" "=x,y,y") - (mult:SF (plus:SF (match_operand:SF 1 "general_operand" "%xH,rmF,y") - (match_operand:SF 2 "general_operand" "x,y,yrmF")) - (match_operand:SF 3 "general_operand" "xH,rmF,yrmF")))] - "TARGET_FPA" - "@ - fpam%.s %2,%w1,%w3,%0 - fpam%.s %x2,%1,%x3,%0 - fpam%.s %x2,%1,%x3,%0") - -;;FPA Subtract and multiply -(define_insn "" - [(set (match_operand:DF 0 "register_operand" "=x,y,y") - (mult:DF (minus:DF (match_operand:DF 1 "general_operand" "xH,y,y") - (match_operand:DF 2 "general_operand" "x,y,rmF")) - (match_operand:DF 3 "general_operand" "xH,rmF,y")))] - "TARGET_FPA" - "@ - fpsm%.d %2,%w1,%w3,%0 - fpsm%.d %x2,%1,%x3,%0 - fpsm%.d %x2,%1,%x3,%0") - -(define_insn "" - [(set (match_operand:DF 0 "register_operand" "=x,y,y") - (mult:DF (match_operand:DF 1 "general_operand" "xH,rmF,y") - (minus:DF (match_operand:DF 2 "general_operand" "xH,y,y") - (match_operand:DF 3 "general_operand" "x,y,rmF"))))] - "TARGET_FPA" - "@ - fpsm%.d %3,%w2,%w1,%0 - fpsm%.d %x3,%2,%x1,%0 - fpsm%.d %x3,%2,%x1,%0") - -(define_insn "" - [(set (match_operand:SF 0 "register_operand" "=x,y,y") - (mult:SF (minus:SF (match_operand:SF 1 "general_operand" "xH,rmF,y") - (match_operand:SF 2 "general_operand" "x,y,yrmF")) - (match_operand:SF 3 "general_operand" "xH,rmF,yrmF")))] - "TARGET_FPA" - "@ - fpsm%.s %2,%w1,%w3,%0 - fpsm%.s %x2,%1,%x3,%0 - fpsm%.s %x2,%1,%x3,%0") - -(define_insn "" - [(set (match_operand:SF 0 "register_operand" "=x,y,y") - (mult:SF (match_operand:SF 1 "general_operand" "xH,rmF,yrmF") - (minus:SF (match_operand:SF 2 "general_operand" "xH,rmF,y") - (match_operand:SF 3 "general_operand" "x,y,yrmF"))))] - "TARGET_FPA" - "@ - fpsm%.s %3,%w2,%w1,%0 - fpsm%.s %x3,%2,%x1,%0 - fpsm%.s %x3,%2,%x1,%0") - (define_expand "tstxf" [(set (cc0) (match_operand:XF 0 "nonimmediate_operand" ""))] @@ -8272,8 +7675,6 @@ "" " { - /* ??? There isn't an FPA define_insn so we could handle it here too. - For now we don't (paranoia). */ if (!TARGET_68881) { rtx result; @@ -8321,8 +7722,6 @@ "" " { - /* ??? There isn't an FPA define_insn so we could handle it here too. - For now we don't (paranoia). */ if (!TARGET_68881) { rtx result; diff --git a/gcc/config/m68k/netbsd-elf.h b/gcc/config/m68k/netbsd-elf.h index 167ddfd..2d24d4a 100644 --- a/gcc/config/m68k/netbsd-elf.h +++ b/gcc/config/m68k/netbsd-elf.h @@ -1,7 +1,7 @@ /* Definitions of target machine for GNU compiler, for m68k (including m68010) NetBSD platforms using the ELF object format. - Copyright (C) 2002 Free Software Foundation, Inc. + Copyright (C) 2002, 2003 Free Software Foundation, Inc. Contributed by Wasabi Systems. Inc. This file is derived from <m68k/m68kv4.h>, <m68k/m68kelf.h>, @@ -187,26 +187,11 @@ while (0) #undef REGISTER_NAMES -#ifndef SUPPORT_SUN_FPA - #define REGISTER_NAMES \ {"%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7", \ "%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%fp", "%sp", \ "%fp0", "%fp1", "%fp2", "%fp3", "%fp4", "%fp5", "%fp6", "%fp7" } -#else /* SUPPORT_SUN_FPA */ - -#define REGISTER_NAMES \ -{"%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7", \ - "%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%fp", "%sp", \ - "%fp0", "%fp1", "%fp2", "%fp3", "%fp4", "%fp5", "%fp6", "%fp7", \ - "%fpa0", "%fpa1", "%fpa2", "%fpa3", "%fpa4", "%fpa5", "%fpa6","%fpa7", \ - "%fpa8", "%fpa9", "%fpa10","%fpa11","%fpa12","%fpa13","%fpa14","%fpa15", \ - "%fpa16","%fpa17","%fpa18","%fpa19","%fpa20","%fpa21","%fpa22","%fpa23", \ - "%fpa24","%fpa25","%fpa26","%fpa27","%fpa28","%fpa29","%fpa30","%fpa31" } - -#endif /* ! SUPPORT_SUN_FPA */ - /* Currently, JUMP_TABLES_IN_TEXT_SECTION must be defined in order to keep switch tables in the text section. */ diff --git a/gcc/config/m68k/sgs.h b/gcc/config/m68k/sgs.h index d8f86cf..470c066 100644 --- a/gcc/config/m68k/sgs.h +++ b/gcc/config/m68k/sgs.h @@ -1,6 +1,6 @@ /* Definitions of target machine for GNU compiler for m68k targets using assemblers derived from AT&T "SGS" releases. - Copyright (C) 1991, 1993, 1996, 2000 Free Software Foundation, Inc. + Copyright (C) 1991, 1993, 1996, 2000, 2003 Free Software Foundation, Inc. Written by Fred Fish (fnf@cygnus.com) This file is part of GNU CC. @@ -79,26 +79,11 @@ Boston, MA 02111-1307, USA. */ #undef REGISTER_NAMES -#ifndef SUPPORT_SUN_FPA - #define REGISTER_NAMES \ {"%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7", \ "%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%fp", "%sp", \ "%fp0", "%fp1", "%fp2", "%fp3", "%fp4", "%fp5", "%fp6", "%fp7" } -#else /* SUPPORTED_SUN_FPA */ - -#define REGISTER_NAMES \ -{"%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7", \ - "%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%fp", "%sp", \ - "%fp0", "%fp1", "%fp2", "%fp3", "%fp4", "%fp5", "%fp6", "%fp7", \ - "%fpa0", "%fpa1", "%fpa2", "%fpa3", "%fpa4", "%fpa5", "%fpa6","%fpa7", \ - "%fpa8", "%fpa9", "%fpa10","%fpa11","%fpa12","%fpa13","%fpa14","%fpa15", \ - "%fpa16","%fpa17","%fpa18","%fpa19","%fpa20","%fpa21","%fpa22","%fpa23", \ - "%fpa24","%fpa25","%fpa26","%fpa27","%fpa28","%fpa29","%fpa30","%fpa31" } - -#endif /* defined SUPPORT_SUN_FPA */ - /* This is how to output an assembler line that says to advance the location counter to a multiple of 2**LOG bytes. */ diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 47eb09b..778454d 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -329,7 +329,7 @@ in the following sections. @emph{M680x0 Options} @gccoptlist{-m68000 -m68020 -m68020-40 -m68020-60 -m68030 -m68040 @gol -m68060 -mcpu32 -m5200 -m68881 -mbitfield -mc68000 -mc68020 @gol --mfpa -mnobitfield -mrtd -mshort -msoft-float -mpcrel @gol +-mnobitfield -mrtd -mshort -msoft-float -mpcrel @gol -malign-int -mstrict-align} @emph{M68hc1x Options} @@ -5700,10 +5700,6 @@ This results in code which can run relatively efficiently on either a 68020/68881 or a 68030 or a 68040. The generated code does use the 68881 instructions that are emulated on the 68060. -@item -mfpa -@opindex mfpa -Generate output containing Sun FPA instructions for floating point. - @item -msoft-float @opindex msoft-float Generate output containing library calls for floating point. diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi index d140186..328fcd8 100644 --- a/gcc/doc/md.texi +++ b/gcc/doc/md.texi @@ -1934,12 +1934,6 @@ Data register @item f 68881 floating-point register, if available -@item x -Sun FPA (floating-point) register, if available - -@item y -First 16 Sun FPA registers, if available - @item I Integer in the range 1 to 8 @@ -1957,9 +1951,6 @@ Signed number whose magnitude is greater than 0x100 @item G Floating point constant that is not a 68881 constant - -@item H -Floating point constant that can be used by Sun FPA @end table @item Motorola 68HC11 & 68HC12 families---@file{m68hc11.h} |