diff options
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/ChangeLog | 6 | ||||
-rw-r--r-- | gcc/config/s390/s390-builtins.def | 2 | ||||
-rw-r--r-- | gcc/config/s390/vx-builtins.md | 4 |
3 files changed, 9 insertions, 3 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 430b08b..87801a4 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,11 @@ 2017-09-26 Andreas Krebbel <krebbel@linux.vnet.ibm.com> + * config/s390/vx-builtins.md ("vmslg"): Add missing operand in + assembler output. + * config/s390/s390-builtins.def: Fix constraint on op4. + +2017-09-26 Andreas Krebbel <krebbel@linux.vnet.ibm.com> + * config/s390/s390.c (s390_expand_vec_compare): Use the new mode independent expanders. * config/s390/vector.md ("vec_cmpuneq", "vec_cmpltgt") diff --git a/gcc/config/s390/s390-builtins.def b/gcc/config/s390/s390-builtins.def index ddcf370..3f7bae7 100644 --- a/gcc/config/s390/s390-builtins.def +++ b/gcc/config/s390/s390-builtins.def @@ -2271,7 +2271,7 @@ OB_DEF_VAR (s390_vec_test_mask_dbl, s390_vtm, 0, B_DEF (s390_vtm, vec_test_mask_intv16qi,0, B_VX, 0, BT_FN_INT_UV16QI_UV16QI) B_DEF (s390_vec_msum_u128, vec_msumv2di, 0, B_VXE, O4_U2, BT_FN_UV16QI_UV2DI_UV2DI_UV16QI_INT) -B_DEF (s390_vmslg, vmslg, 0, B_VXE, O4_U2, BT_FN_INT128_UV2DI_UV2DI_INT128_INT) +B_DEF (s390_vmslg, vmslg, 0, B_VXE, O4_U4, BT_FN_INT128_UV2DI_UV2DI_INT128_INT) OB_DEF (s390_vec_eqv, s390_vec_eqv_b8, s390_vec_eqv_dbl_c, B_VXE, BT_FN_OV4SI_OV4SI_OV4SI) OB_DEF_VAR (s390_vec_eqv_b8, s390_vnx, 0, 0, BT_OV_BV16QI_BV16QI_BV16QI) diff --git a/gcc/config/s390/vx-builtins.md b/gcc/config/s390/vx-builtins.md index 4c157e3..7fb176c 100644 --- a/gcc/config/s390/vx-builtins.md +++ b/gcc/config/s390/vx-builtins.md @@ -1190,7 +1190,7 @@ (match_operand:QI 4 "const_mask_operand" "C")] UNSPEC_VEC_MSUM))] "TARGET_VXE" - "vmslg\t%v0,%v1,%v2,%v3" + "vmslg\t%v0,%v1,%v2,%v3,%4" [(set_attr "op_type" "VRR")]) (define_insn "vmslg" @@ -1201,7 +1201,7 @@ (match_operand:QI 4 "const_mask_operand" "C")] UNSPEC_VEC_MSUM))] "TARGET_VXE" - "vmslg\t%v0,%v1,%v2,%v3" + "vmslg\t%v0,%v1,%v2,%v3,%4" [(set_attr "op_type" "VRR")]) |