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-rw-r--r--gcc/ChangeLog65
-rw-r--r--gcc/DATESTAMP2
-rw-r--r--gcc/c-family/ChangeLog5
-rw-r--r--gcc/c-family/c-opts.cc10
-rw-r--r--gcc/config/riscv/autovec-opt.md17
-rw-r--r--gcc/config/riscv/riscv.cc5
-rw-r--r--gcc/config/riscv/vector-iterators.md2
-rw-r--r--gcc/cp/ChangeLog18
-rw-r--r--gcc/cp/module.cc26
-rw-r--r--gcc/cp/pt.cc10
-rw-r--r--gcc/fortran/ChangeLog11
-rw-r--r--gcc/fortran/resolve.cc8
-rw-r--r--gcc/po/ChangeLog4
-rw-r--r--gcc/po/zh_CN.po341
-rw-r--r--gcc/range-op-ptr.cc10
-rw-r--r--gcc/range-op.cc22
-rw-r--r--gcc/testsuite/ChangeLog84
-rw-r--r--gcc/testsuite/cobol.dg/group1/check_88.cob12
-rw-r--r--gcc/testsuite/cobol.dg/group2/ALLOCATE_Rule_8_OPTION_INITIALIZE_with_figconst.cob3
-rw-r--r--gcc/testsuite/cobol.dg/group2/ALLOCATE_Rule_8_OPTION_INITIALIZE_with_figconst.out3
-rw-r--r--gcc/testsuite/cobol.dg/group2/INSPECT_CONVERTING_TO_figurative_constants.cob12
-rw-r--r--gcc/testsuite/cobol.dg/group2/INSPECT_CONVERTING_TO_figurative_constants.out10
-rw-r--r--gcc/testsuite/cobol.dg/group2/INSPECT_ISO_Example_1.cob2
-rw-r--r--gcc/testsuite/cobol.dg/group2/INSPECT_ISO_Example_2.cob2
-rw-r--r--gcc/testsuite/cobol.dg/group2/INSPECT_ISO_Example_3.cob2
-rw-r--r--gcc/testsuite/cobol.dg/group2/INSPECT_ISO_Example_4.cob2
-rw-r--r--gcc/testsuite/cobol.dg/group2/INSPECT_ISO_Example_5-f.cob2
-rw-r--r--gcc/testsuite/cobol.dg/group2/INSPECT_ISO_Example_6.cob2
-rw-r--r--gcc/testsuite/cobol.dg/group2/INSPECT_ISO_Example_7.cob2
-rw-r--r--gcc/testsuite/cobol.dg/group2/Multiple_INDEXED_BY_variables_with_the_same_name.cob24
-rw-r--r--gcc/testsuite/cobol.dg/group2/Multiple_INDEXED_BY_variables_with_the_same_name.out3
-rw-r--r--gcc/testsuite/g++.dg/coroutines/co-await-syntax-09-convert.C2
-rw-r--r--gcc/testsuite/g++.dg/coroutines/co-await-syntax-10.C2
-rw-r--r--gcc/testsuite/g++.dg/coroutines/co-await-syntax-11.C2
-rw-r--r--gcc/testsuite/g++.dg/coroutines/co-await-void_type.C2
-rw-r--r--gcc/testsuite/g++.dg/coroutines/co-return-warning-1.C2
-rw-r--r--gcc/testsuite/g++.dg/coroutines/coroutines.exp50
-rw-r--r--gcc/testsuite/g++.dg/coroutines/ramp-return-a.C2
-rw-r--r--gcc/testsuite/g++.dg/coroutines/ramp-return-c.C2
-rw-r--r--gcc/testsuite/g++.dg/modules/modules.exp39
-rw-r--r--gcc/testsuite/g++.dg/template/unify13.C18
-rw-r--r--gcc/testsuite/gcc.dg/pr116546.c46
-rw-r--r--gcc/testsuite/gcc.dg/pr120277.c21
-rw-r--r--gcc/testsuite/gcc.target/riscv/pr120223.c4
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i16.c (renamed from gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-i16.c)4
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i32.c (renamed from gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-i32.c)4
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i64.c (renamed from gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-i64.c)4
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i8.c (renamed from gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-i8.c)4
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u16.c10
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u32.c10
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u64.c10
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u8.c10
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i16.c (renamed from gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-i32.c)4
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i32.c (renamed from gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-i64.c)4
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i64.c (renamed from gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-i8.c)4
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i8.c (renamed from gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-i16.c)4
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u16.c10
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u32.c10
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u64.c10
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u8.c10
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i16.c (renamed from gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-i32.c)4
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i32.c (renamed from gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-i64.c)4
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i64.c (renamed from gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-i8.c)4
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i8.c (renamed from gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-i16.c)4
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u16.c10
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u32.c10
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u64.c10
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u8.c10
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i16.c10
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i32.c (renamed from gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-4-i64.c)4
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i64.c (renamed from gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-4-i16.c)4
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i8.c (renamed from gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-4-i8.c)4
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u16.c10
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u32.c10
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u64.c (renamed from gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-4-i32.c)4
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u8.c10
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i16.c (renamed from gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-5-i16.c)4
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i32.c (renamed from gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-5-u16.c)4
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i64.c (renamed from gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-5-i32.c)4
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i8.c (renamed from gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-5-i8.c)4
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u16.c (renamed from gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-5-u32.c)4
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u32.c10
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u64.c (renamed from gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-5-i64.c)4
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u8.c10
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i16.c (renamed from gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-6-u64.c)4
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i32.c (renamed from gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-6-i32.c)4
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i64.c (renamed from gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-6-i8.c)4
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i8.c (renamed from gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-6-i16.c)4
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u16.c (renamed from gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-6-u16.c)4
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u32.c (renamed from gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-6-u32.c)4
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u64.c (renamed from gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-6-i64.c)4
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u8.c (renamed from gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-6-u8.c)4
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary.h50
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary_data.h408
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary_run.h2
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-u16.c8
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-u32.c8
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-u64.c8
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-u8.c8
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-u16.c8
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-u32.c8
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-u64.c8
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-u8.c8
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-u16.c8
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-u32.c8
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-u64.c8
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-u8.c8
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-4-u16.c8
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-4-u32.c8
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-4-u64.c8
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-4-u8.c8
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-5-u64.c8
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-5-u8.c8
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i16.c9
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i32.c9
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i64.c9
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i8.c9
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u16.c9
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u32.c9
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u64.c9
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u8.c9
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vsub-run-1-i16.c15
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vsub-run-1-i32.c15
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vsub-run-1-i64.c15
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vsub-run-1-i8.c15
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vsub-run-1-u16.c15
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vsub-run-1-u32.c15
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vsub-run-1-u64.c15
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vsub-run-1-u8.c15
-rw-r--r--gcc/testsuite/gfortran.dg/alloc_comp_auto_array_3.f904
-rw-r--r--gcc/testsuite/gfortran.dg/alloc_comp_class_3.f033
-rw-r--r--gcc/testsuite/gfortran.dg/alloc_comp_class_4.f035
-rw-r--r--gcc/testsuite/gfortran.dg/allocate_with_source_14.f032
-rw-r--r--gcc/testsuite/gfortran.dg/derived_constructor_comps_6.f902
-rw-r--r--gcc/testsuite/gfortran.dg/derived_result_5.f90123
-rw-r--r--gcc/testsuite/lib/g++-dg.exp130
-rw-r--r--gcc/tree-cfg.cc47
-rw-r--r--gcc/value-range.cc36
-rw-r--r--gcc/value-range.h2
139 files changed, 1674 insertions, 689 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 9539184..ea65ca2 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,68 @@
+2025-05-15 Andrew MacLeod <amacleod@redhat.com>
+
+ PR tree-optimization/116546
+ * range-op.cc (operator_bitwise_and::op1_range): Utilize bitmask
+ from the LHS to improve op1's bitmask.
+
+2025-05-15 Andrew MacLeod <amacleod@redhat.com>
+
+ PR tree-optimization/116546
+ * value-range.cc (irange::intersect_bitmask): Allow unknown
+ bitmasks to be processed.
+
+2025-05-15 Andrew MacLeod <amacleod@redhat.com>
+
+ PR tree-optimization/116546
+ * value-range.cc (irange_bitmask::irange_bitmask): Include
+ leading ones in the bitmask.
+
+2025-05-15 Andrew MacLeod <amacleod@redhat.com>
+
+ * value-range.cc (irange_bitmask::irange_bitmask): Rename from
+ get_bitmask_from_range and tweak.
+ (prange::set): Use new constructor.
+ (prange::intersect): Use new constructor.
+ (irange::get_bitmask): Likewise.
+ * value-range.h (irange_bitmask): New constructor prototype.
+
+2025-05-15 Andrew MacLeod <amacleod@redhat.com>
+
+ PR tree-optimization/120277
+ * range-op-ptr.cc (operator_cast::fold_range): Check if the cast
+ if UNDEFINED before setting bounds.
+
+2025-05-15 Jeff Law <jlaw@ventanamicro.com>
+
+ PR target/120223
+ * config/riscv/riscv.cc (synthesize_ior_xor): XTHEADBS does not have
+ single bit manipulations.
+
+2025-05-15 Alexander Monakov <amonakov@ispras.ru>
+
+ * tree-cfg.cc (verify_gimple_assign_unary): Accept only
+ COMPLEX_TYPE for CONJ_EXPR.
+
+2025-05-15 Andrew Pinski <quic_apinski@quicinc.com>
+
+ * fold-const.cc (tree_swap_operands_p): Put ADDR_EXPR last
+ instead of just is_gimple_invariant_address ones.
+ * match.pd (`a ptr+ b !=\== ADDR`, `ADDR !=/== ssa_name`):
+ Move the ADDR to the last operand. Update comment.
+
+2025-05-15 Richard Biener <rguenther@suse.de>
+
+ * tree-vectorizer.cc (vect_transform_loops): When diagnosing
+ a vectorized loop indicate whether we vectorized an epilogue,
+ whether we used masked vectors and what unroll factor was
+ used.
+
+2025-05-15 Richard Biener <rguenther@suse.de>
+
+ * config/i386/i386.cc (ix86_vector_costs::finish_cost):
+ Do not suggest a first epilogue mode for AVX512 sized
+ main loops with X86_TUNE_AVX512_TWO_EPILOGUES as that
+ interferes with using a masked epilogue.
+
2025-05-14 Richard Biener <rguenther@suse.de>
* tree-vectorizer.h (record_stmt_cost): Remove mixed
diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index 63e8d5b..e01bdfb 100644
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20250515
+20250516
diff --git a/gcc/c-family/ChangeLog b/gcc/c-family/ChangeLog
index 9ff3338..6b95bb6 100644
--- a/gcc/c-family/ChangeLog
+++ b/gcc/c-family/ChangeLog
@@ -1,3 +1,8 @@
+2025-05-15 Jason Merrill <jason@redhat.com>
+
+ * c-opts.cc (c_common_post_options): Set flag_coroutines.
+ (set_std_cxx20, set_std_cxx23, set_std_cxx26): Not here.
+
2025-05-03 Jason Merrill <jason@redhat.com>
* c-opts.cc (c_common_post_options): Let plain -Wabi warn
diff --git a/gcc/c-family/c-opts.cc b/gcc/c-family/c-opts.cc
index f1c276f..6975186 100644
--- a/gcc/c-family/c-opts.cc
+++ b/gcc/c-family/c-opts.cc
@@ -1215,6 +1215,10 @@ c_common_post_options (const char **pfilename)
if (cxx_dialect >= cxx20)
flag_concepts = 1;
+ /* Coroutines are also a C++20 feature. */
+ SET_OPTION_IF_UNSET (&global_options, &global_options_set,
+ flag_coroutines, cxx_dialect >= cxx20);
+
/* Enable lifetime extension of range based for temporaries for C++23. */
SET_OPTION_IF_UNSET (&global_options, &global_options_set,
flag_range_for_ext_temps, cxx_dialect >= cxx23);
@@ -2009,8 +2013,6 @@ set_std_cxx20 (int iso)
flag_isoc94 = 1;
flag_isoc99 = 1;
flag_isoc11 = 1;
- /* C++20 includes coroutines. */
- flag_coroutines = true;
cxx_dialect = cxx20;
lang_hooks.name = "GNU C++20";
}
@@ -2027,8 +2029,6 @@ set_std_cxx23 (int iso)
flag_isoc94 = 1;
flag_isoc99 = 1;
flag_isoc11 = 1;
- /* C++23 includes coroutines. */
- flag_coroutines = true;
cxx_dialect = cxx23;
lang_hooks.name = "GNU C++23";
}
@@ -2045,8 +2045,6 @@ set_std_cxx26 (int iso)
flag_isoc94 = 1;
flag_isoc99 = 1;
flag_isoc11 = 1;
- /* C++26 includes coroutines. */
- flag_coroutines = true;
cxx_dialect = cxx26;
lang_hooks.name = "GNU C++26";
}
diff --git a/gcc/config/riscv/autovec-opt.md b/gcc/config/riscv/autovec-opt.md
index 7cf7e8a..9c6bf06 100644
--- a/gcc/config/riscv/autovec-opt.md
+++ b/gcc/config/riscv/autovec-opt.md
@@ -1696,3 +1696,20 @@
riscv_vector::BINARY_OP, ops);
}
[(set_attr "type" "vialu")])
+
+(define_insn_and_split "*<optab>_vx_<mode>"
+ [(set (match_operand:V_VLSI 0 "register_operand")
+ (any_int_binop_no_shift_vx:V_VLSI
+ (match_operand:V_VLSI 2 "<binop_rhs2_predicate>")
+ (vec_duplicate:V_VLSI
+ (match_operand:<VEL> 1 "register_operand"))))]
+ "TARGET_VECTOR && can_create_pseudo_p ()"
+ "#"
+ "&& 1"
+ [(const_int 0)]
+ {
+ rtx ops[] = {operands[0], operands[2], operands[1]};
+ riscv_vector::emit_vlmax_insn (code_for_pred_scalar (<CODE>, <MODE>mode),
+ riscv_vector::BINARY_OP, ops);
+ }
+ [(set_attr "type" "vialu")])
diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index d28aee4..b1d44f7 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -3875,6 +3875,7 @@ riscv_rtx_costs (rtx x, machine_mode mode, int outer_code, int opno ATTRIBUTE_UN
*total = gr2vr_cost * COSTS_N_INSNS (1);
break;
case PLUS:
+ case MINUS:
{
rtx op_0 = XEXP (x, 0);
rtx op_1 = XEXP (x, 1);
@@ -14227,7 +14228,7 @@ synthesize_ior_xor (rtx_code code, rtx operands[3])
{
/* Trivial cases that don't need synthesis. */
if (SMALL_OPERAND (INTVAL (operands[2]))
- || ((TARGET_ZBS || TARGET_XTHEADBS || TARGET_ZBKB)
+ || ((TARGET_ZBS || TARGET_ZBKB)
&& single_bit_mask_operand (operands[2], word_mode)))
return false;
@@ -14264,7 +14265,7 @@ synthesize_ior_xor (rtx_code code, rtx operands[3])
/* If we're flipping all but a small number of bits we can pre-flip
the outliers, then flip all the bits, which would restore those
bits that were pre-flipped. */
- if ((TARGET_ZBS || TARGET_XTHEADBS || TARGET_ZBKB)
+ if ((TARGET_ZBS || TARGET_ZBKB)
&& budget < 0
&& code == XOR
&& popcount_hwi (~INTVAL (operands[2])) < original_budget)
diff --git a/gcc/config/riscv/vector-iterators.md b/gcc/config/riscv/vector-iterators.md
index eae3340..23cb940 100644
--- a/gcc/config/riscv/vector-iterators.md
+++ b/gcc/config/riscv/vector-iterators.md
@@ -4042,7 +4042,7 @@
])
(define_code_iterator any_int_binop_no_shift_vx [
- plus
+ plus minus
])
(define_code_iterator any_int_unop [neg not])
diff --git a/gcc/cp/ChangeLog b/gcc/cp/ChangeLog
index 340552f..b102f17 100644
--- a/gcc/cp/ChangeLog
+++ b/gcc/cp/ChangeLog
@@ -1,3 +1,21 @@
+2025-05-15 Patrick Palka <ppalka@redhat.com>
+
+ PR c++/120161
+ * pt.cc (unify) <case RECORD_TYPE>: When comparing specializations
+ of a non-primary template, still perform a type comparison.
+
+2025-05-15 Jason Merrill <jason@redhat.com>
+
+ * module.cc (trees_out::lang_decl_bools): Stream implicit_constexpr.
+ (trees_in::lang_decl_bools): Likewise.
+ (trees_in::is_matching_decl): Check it.
+
+2025-05-15 Jason Merrill <jason@redhat.com>
+
+ PR c++/99599
+ * pt.cc (conversion_may_instantiate_p): Make sure
+ classes are complete.
+
2025-05-14 Ville Voutilainen <ville.voutilainen@gmail.com>
* cp-gimplify.cc (cp_fold): Remove a remnant comment.
diff --git a/gcc/cp/module.cc b/gcc/cp/module.cc
index e778262..4f9c378 100644
--- a/gcc/cp/module.cc
+++ b/gcc/cp/module.cc
@@ -6024,7 +6024,7 @@ trees_out::lang_decl_bools (tree t, bits_out& bits)
WB (lang->u.fn.has_dependent_explicit_spec_p);
WB (lang->u.fn.immediate_fn_p);
WB (lang->u.fn.maybe_deleted);
- /* We do not stream lang->u.fn.implicit_constexpr. */
+ WB (lang->u.fn.implicit_constexpr);
WB (lang->u.fn.escalated_p);
WB (lang->u.fn.xobj_func);
goto lds_min;
@@ -6095,7 +6095,7 @@ trees_in::lang_decl_bools (tree t, bits_in& bits)
RB (lang->u.fn.has_dependent_explicit_spec_p);
RB (lang->u.fn.immediate_fn_p);
RB (lang->u.fn.maybe_deleted);
- /* We do not stream lang->u.fn.implicit_constexpr. */
+ RB (lang->u.fn.implicit_constexpr);
RB (lang->u.fn.escalated_p);
RB (lang->u.fn.xobj_func);
goto lds_min;
@@ -12193,13 +12193,23 @@ trees_in::is_matching_decl (tree existing, tree decl, bool is_typedef)
/* Similarly if EXISTING has undeduced constexpr, but DECL's
is already deduced. */
- if (DECL_MAYBE_DELETED (e_inner) && !DECL_MAYBE_DELETED (d_inner)
- && DECL_DECLARED_CONSTEXPR_P (d_inner))
- DECL_DECLARED_CONSTEXPR_P (e_inner) = true;
- else if (!DECL_MAYBE_DELETED (e_inner) && DECL_MAYBE_DELETED (d_inner))
- /* Nothing to do. */;
+ if (DECL_DECLARED_CONSTEXPR_P (e_inner)
+ == DECL_DECLARED_CONSTEXPR_P (d_inner))
+ /* Already matches. */;
+ else if (DECL_DECLARED_CONSTEXPR_P (d_inner)
+ && (DECL_MAYBE_DELETED (e_inner)
+ || decl_implicit_constexpr_p (d_inner)))
+ /* DECL was deduced, copy to EXISTING. */
+ {
+ DECL_DECLARED_CONSTEXPR_P (e_inner) = true;
+ if (decl_implicit_constexpr_p (d_inner))
+ DECL_LANG_SPECIFIC (e_inner)->u.fn.implicit_constexpr = true;
+ }
else if (DECL_DECLARED_CONSTEXPR_P (e_inner)
- != DECL_DECLARED_CONSTEXPR_P (d_inner))
+ && (DECL_MAYBE_DELETED (d_inner)
+ || decl_implicit_constexpr_p (e_inner)))
+ /* EXISTING was deduced, leave it alone. */;
+ else
{
mismatch_msg = G_("conflicting %<constexpr%> for imported "
"declaration %#qD");
diff --git a/gcc/cp/pt.cc b/gcc/cp/pt.cc
index 0d64a1c..1973d25 100644
--- a/gcc/cp/pt.cc
+++ b/gcc/cp/pt.cc
@@ -23529,13 +23529,13 @@ conversion_may_instantiate_p (tree to, tree from)
/* Converting to a non-aggregate class type will consider its
user-declared constructors, which might induce instantiation. */
- if (CLASS_TYPE_P (to)
+ if (CLASS_TYPE_P (complete_type (to))
&& type_has_converting_constructor (to))
return true;
/* Similarly, converting from a class type will consider its conversion
functions. */
- if (CLASS_TYPE_P (from)
+ if (CLASS_TYPE_P (complete_type (from))
&& TYPE_HAS_CONVERSION (from))
return true;
@@ -25785,10 +25785,10 @@ unify (tree tparms, tree targs, tree parm, tree arg, int strict,
INNERMOST_TEMPLATE_ARGS (CLASSTYPE_TI_ARGS (parm)),
INNERMOST_TEMPLATE_ARGS (CLASSTYPE_TI_ARGS (t)),
UNIFY_ALLOW_NONE, explain_p);
- else
- return unify_success (explain_p);
+ gcc_checking_assert (t == arg);
}
- else if (!same_type_ignoring_top_level_qualifiers_p (parm, arg))
+
+ if (!same_type_ignoring_top_level_qualifiers_p (parm, arg))
return unify_type_mismatch (explain_p, parm, arg);
return unify_success (explain_p);
diff --git a/gcc/fortran/ChangeLog b/gcc/fortran/ChangeLog
index 15b51e1..54fbac4 100644
--- a/gcc/fortran/ChangeLog
+++ b/gcc/fortran/ChangeLog
@@ -1,3 +1,14 @@
+2025-05-15 Harald Anlauf <anlauf@gmx.de>
+
+ PR fortran/85750
+ * resolve.cc (resolve_symbol): Reorder conditions when to apply
+ default-initializers.
+
+2025-05-15 Tobias Burnus <tburnus@baylibre.com>
+
+ * trans-openmp.cc (gfc_omp_deep_mapping_do): Handle SSA_NAME if
+ a def_stmt is available.
+
2025-05-14 Thomas Koenig <tkoenig@gcc.gnu.org>
PR fortran/120139
diff --git a/gcc/fortran/resolve.cc b/gcc/fortran/resolve.cc
index bf1aa70..d09aef0 100644
--- a/gcc/fortran/resolve.cc
+++ b/gcc/fortran/resolve.cc
@@ -18059,16 +18059,16 @@ skip_interfaces:
|| (a->dummy && !a->pointer && a->intent == INTENT_OUT
&& sym->ns->proc_name->attr.if_source != IFSRC_IFBODY))
apply_default_init (sym);
+ else if (a->function && !a->pointer && !a->allocatable && !a->use_assoc
+ && sym->result)
+ /* Default initialization for function results. */
+ apply_default_init (sym->result);
else if (a->function && sym->result && a->access != ACCESS_PRIVATE
&& (sym->ts.u.derived->attr.alloc_comp
|| sym->ts.u.derived->attr.pointer_comp))
/* Mark the result symbol to be referenced, when it has allocatable
components. */
sym->result->attr.referenced = 1;
- else if (a->function && !a->pointer && !a->allocatable && !a->use_assoc
- && sym->result)
- /* Default initialization for function results. */
- apply_default_init (sym->result);
}
if (sym->ts.type == BT_CLASS && sym->ns == gfc_current_ns
diff --git a/gcc/po/ChangeLog b/gcc/po/ChangeLog
index 809dc01..1e5e07a 100644
--- a/gcc/po/ChangeLog
+++ b/gcc/po/ChangeLog
@@ -1,3 +1,7 @@
+2025-05-15 Joseph Myers <josmyers@redhat.com>
+
+ * zh_CN.po: Update.
+
2025-05-14 Joseph Myers <josmyers@redhat.com>
* sv.po: Update.
diff --git a/gcc/po/zh_CN.po b/gcc/po/zh_CN.po
index a5073c1..3f9023f 100644
--- a/gcc/po/zh_CN.po
+++ b/gcc/po/zh_CN.po
@@ -4,7 +4,7 @@
# Meng Jie <zuxy.meng@gmail.com>, 2005-2014.
# Jeff Bai <jeffbai@aosc.xyz>, 2015.
# Mingye Wang (Arthur2e5) <arthur200126@gmail.com>, 2015, 2016.
-# Boyuan Yang <073plan@gmail.com>, 2019, 2023, 2024.
+# Boyuan Yang <073plan@gmail.com>, 2019, 2023-2025.
# Zixing Zhou <zixingzhou@foxmail.com>, 2023.
# Zhanhaoxiang Zhang <zzhx2006@outlook.com>, 2024.
#
@@ -33,11 +33,11 @@
#
msgid ""
msgstr ""
-"Project-Id-Version: gcc 14.2.0\n"
+"Project-Id-Version: gcc 15.1.0\n"
"Report-Msgid-Bugs-To: https://gcc.gnu.org/bugs/\n"
"POT-Creation-Date: 2025-04-23 19:27+0000\n"
-"PO-Revision-Date: 2025-01-09 15:04+0800\n"
-"Last-Translator: Zhanhaoxiang Zhang <zzhx2006@outlook.com>\n"
+"PO-Revision-Date: 2025-05-15 13:53-0400\n"
+"Last-Translator: Boyuan Yang <073plan@gmail.com>\n"
"Language-Team: Chinese (simplified) <i18n-zh@googlegroups.com>\n"
"Language: zh_CN\n"
"MIME-Version: 1.0\n"
@@ -45,7 +45,7 @@ msgstr ""
"Content-Transfer-Encoding: 8bit\n"
"Plural-Forms: nplurals=1; plural=0;\n"
"X-Bugs: Report translation errors to the Language-Team address.\n"
-"X-Generator: Poedit 3.5\n"
+"X-Generator: Poedit 3.6\n"
#: cif-code.def:39
msgid "function not considered for inlining"
@@ -317,10 +317,8 @@ msgid "-E or -x required when input is from standard input"
msgstr "当输入来自标准输入设备时,需要 -E 或 -x"
#: config/darwin.h:153
-#, fuzzy
-#| msgid " conflicting code gen style switches are used"
msgid "conflicting code generation switches"
-msgstr "使用了相互冲突的代码生成风格"
+msgstr "使用了相互冲突的代码生成开关"
#: config/darwin.h:158
msgid "-bundle_loader not allowed with -dynamiclib"
@@ -831,10 +829,9 @@ msgid "Issue debug information for compiler-generated auxiliary variables."
msgstr ""
#: fortran/lang.opt:486
-#, fuzzy, no-c-format
-#| msgid "Enable Plan 9 language extensions"
+#, no-c-format
msgid "Enable all DEC language extensions."
-msgstr "启用九号计划语言扩展"
+msgstr "启用所有 DEC 语言扩展。"
#: fortran/lang.opt:490
#, fuzzy, no-c-format
@@ -868,9 +865,9 @@ msgid "Enable legacy math intrinsics for compatibility."
msgstr ""
#: fortran/lang.opt:515
-#, fuzzy, no-c-format
+#, no-c-format
msgid "Enable support for DEC STRUCTURE/RECORD."
-msgstr "启用对巨型对象的支持"
+msgstr "启用对 DEC STRUCTURE/RECORD 的支持。"
#: fortran/lang.opt:519
#, no-c-format
@@ -1257,10 +1254,9 @@ msgid "Does nothing. Preserved for backward compatibility."
msgstr "不起作用。为向前兼容保留的选项。"
#: fortran/lang.opt:911
-#, fuzzy, no-c-format
-#| msgid "Statically link the GNU Fortran helper library (libgfortran)"
+#, no-c-format
msgid "Statically link the GNU Fortran helper library (libgfortran)."
-msgstr "静态链接 GNU Fortran 助手库(libgfortran)"
+msgstr "静态链接 GNU Fortran 助手库(libgfortran)。"
#: fortran/lang.opt:915
#, fuzzy, no-c-format
@@ -1296,7 +1292,7 @@ msgstr "遵循 ISO Fortran 2023 标准。"
#: fortran/lang.opt:939
#, no-c-format
msgid "Enable experimental Fortran 202y features."
-msgstr ""
+msgstr "启用实验性的 Fortuan 202y 特性。"
#: fortran/lang.opt:943
#, no-c-format
@@ -1670,7 +1666,7 @@ msgstr "当把函数转换为不兼容类型时给出警告"
#: c-family/c.opt:410
#, no-c-format
msgid "-Wbidi-chars=[none|unpaired|any|ucn] Warn about UTF-8 bidirectional control characters."
-msgstr ""
+msgstr "-Wbidi-chars=[none|unpaired|any|ucn] 对 UTF-8 双向控制字符给出警告。"
#: c-family/c.opt:433
#, no-c-format
@@ -1703,10 +1699,9 @@ msgid "Deprecated in favor of -Wc11-c23-compat."
msgstr "已弃用,请改用 -Wc11-c23-compat。"
#: c-family/c.opt:457
-#, fuzzy, no-c-format
-#| msgid "Warn about features not present in ISO C11, but present in ISO C23."
+#, no-c-format
msgid "Warn about features not present in ISO C23, but present in ISO C2Y."
-msgstr "对 ISO C11 中不存在但 ISO C23 中存在的特性给出警告。"
+msgstr "对 ISO C23 中不存在但 ISO C2Y 中存在的特性给出警告。"
#: c-family/c.opt:461
#, no-c-format
@@ -1869,10 +1864,9 @@ msgid "Warn for implicit type conversions that may change a value."
msgstr "当隐式类型转换可能改变值时给出警告"
#: c-family/c.opt:590
-#, fuzzy, no-c-format
-#| msgid "Warn for converting NULL from/to a non-pointer type"
+#, no-c-format
msgid "Warn for converting NULL from/to a non-pointer type."
-msgstr "将 NULL 转换为非指针类型时给出警告"
+msgstr "对 NULL 和非指针类型之间的转换给出警告。"
#: c-family/c.opt:598
#, fuzzy, no-c-format
@@ -1880,10 +1874,9 @@ msgid "Warn when performing class template argument deduction on a type with no
msgstr "%qE不是类型%qT的有效模板实参,因为对象%qD没有外部链接"
#: c-family/c.opt:603
-#, fuzzy, no-c-format
-#| msgid "Warn when all constructors and destructors are private"
+#, no-c-format
msgid "Warn when all constructors and destructors are private."
-msgstr "当所有构造函数和析构函数都是私有时给出警告"
+msgstr "当所有构造函数和析构函数都是私有时给出警告。"
#: c-family/c.opt:607
#, no-c-format
@@ -1893,7 +1886,7 @@ msgstr "对悬空的 else 给出警告。"
#: c-family/c.opt:611 c-family/c.opt:615
#, no-c-format
msgid "Warn for uses of pointers to auto variables whose lifetime has ended."
-msgstr ""
+msgstr "对使用了指向生命周期已结束的 auto 变量的指针给出警告。"
#: c-family/c.opt:619
#, no-c-format
@@ -1993,16 +1986,14 @@ msgid "Warn about implicit conversions from \"float\" to \"double\"."
msgstr "对从“float”到“double”的隐式转换给出警告。"
#: c-family/c.opt:702
-#, fuzzy, no-c-format
-#| msgid "Warn when a declaration does not specify a type"
+#, no-c-format
msgid "Warn when a declaration has duplicate const, volatile, restrict or _Atomic specifier."
-msgstr "当声明未指定类型时给出警告"
+msgstr "当声明中含有重复的 const, volatile, restrict 或 _Atomic 说明符时给出警告。"
#: c-family/c.opt:706
-#, fuzzy, no-c-format
-#| msgid "Warn about an empty body in an if or else statement"
+#, no-c-format
msgid "Warn about duplicated branches in if-else statements."
-msgstr "当 if 或 else 语句体为空时给出警告"
+msgstr "对 if-else 语句中重复的分支给出警告。"
#: c-family/c.opt:710
#, no-c-format
@@ -2263,10 +2254,9 @@ msgid "Warn when a function never produces a constant expression."
msgstr "数字常量表达式下溢时警告"
#: c-family/c.opt:930
-#, fuzzy, no-c-format
-#| msgid "Warn about invalid uses of the \"offsetof\" macro"
+#, no-c-format
msgid "Warn about invalid uses of the \"offsetof\" macro."
-msgstr "对“offsetof”宏无效的使用给出警告"
+msgstr "对“offsetof”宏无效的使用给出警告。"
#: c-family/c.opt:934
#, fuzzy, no-c-format
@@ -2432,7 +2422,7 @@ msgstr ""
#: c-family/c.opt:1083
#, no-c-format
msgid "Warn on namespace definition."
-msgstr ""
+msgstr "对命名空间的定义给出警告。"
#: c-family/c.opt:1087
#, fuzzy, no-c-format
@@ -2556,10 +2546,9 @@ msgid "Warn when fields in a struct with the packed attribute are misaligned."
msgstr ""
#: c-family/c.opt:1211
-#, fuzzy, no-c-format
-#| msgid "Warn about possibly missing parentheses"
+#, no-c-format
msgid "Warn about possibly missing parentheses."
-msgstr "可能缺少括号的情况下给出警告"
+msgstr "在可能缺少括号的情况下给出警告。"
#: c-family/c.opt:1219
#, no-c-format
@@ -2978,9 +2967,9 @@ msgid "Warn about useless casts."
msgstr "对无用的类型转换给出警告。"
#: c-family/c.opt:1599
-#, fuzzy, no-c-format
+#, no-c-format
msgid "Warn about using variadic macros."
-msgstr "当定义在主文件中的宏未被使用时给出警告"
+msgstr "在使用了变长参数宏时给出警告。"
#: c-family/c.opt:1603
#, no-c-format
@@ -3131,10 +3120,9 @@ msgid "Enable support for C++ concepts."
msgstr "启用对 C++ concepts 的支持。"
#: c-family/c.opt:1819
-#, fuzzy, no-c-format
-#| msgid "Removed in GCC 10. This switch has no effect."
+#, no-c-format
msgid "Removed in GCC 15. This switch has no effect."
-msgstr "已在 GCC 10 中移除。此开关不起作用。"
+msgstr "已在 GCC 15 中移除。此开关不起作用。"
#: c-family/c.opt:1823
#, no-c-format
@@ -3383,10 +3371,9 @@ msgid "Allow implicit conversions between vectors with differing numbers of subp
msgstr "允许具有不同元素数量和/或元素类型的向量间的转换。"
#: c-family/c.opt:2059
-#, fuzzy, no-c-format
-#| msgid "Enable C++ modules-ts (experimental)."
+#, no-c-format
msgid "Enable C++20 Modules (experimental)."
-msgstr "启用 C++ modules-ts(实验性)。"
+msgstr "启用 C++20 模块 实验性)。"
#: c-family/c.opt:2067
#, no-c-format
@@ -3900,10 +3887,9 @@ msgid "Conform to the ISO 2020 C++ standard (experimental and incomplete support
msgstr "遵循 ISO 2020 C++ 标准(试验性质的不完全支持)。"
#: c-family/c.opt:2589 c-family/c.opt:2593
-#, fuzzy, no-c-format
-#| msgid "Conform to the ISO 2020 C++ standard (experimental and incomplete support)."
+#, no-c-format
msgid "Conform to the ISO 2023 C++ standard (published in 2024; experimental and incomplete support)."
-msgstr "遵循 ISO 2020 C++ 标准(试验性质的不完全支持)。"
+msgstr "遵循 ISO 2023 C++ 标准(于2024年发布;试验性质的不完全支持)。"
#: c-family/c.opt:2597 c-family/c.opt:2601
#, no-c-format
@@ -3927,10 +3913,9 @@ msgid "Conform to the ISO 2017 C standard (published in 2018)."
msgstr "遵循 ISO 2017 C 标准(于2018年发布)。"
#: c-family/c.opt:2621 c-family/c.opt:2779
-#, fuzzy, no-c-format
-#| msgid "Conform to the ISO 2017 C standard (published in 2018)."
+#, no-c-format
msgid "Conform to the ISO 2023 C standard (published in 2024)."
-msgstr "遵循 ISO 2017 C 标准(于2018年发布)。"
+msgstr "遵循 ISO 2023 C 标准(于2014年发布)。"
#: c-family/c.opt:2625
#, no-c-format
@@ -3938,10 +3923,9 @@ msgid "Deprecated in favor of -std=c23."
msgstr "已弃用,请改用 -std=c23。"
#: c-family/c.opt:2629
-#, fuzzy, no-c-format
-#| msgid "Conform to the ISO 2020 C++ standard (experimental and incomplete support)."
+#, no-c-format
msgid "Conform to the ISO 202Y C standard draft (experimental and incomplete support)."
-msgstr "遵循 ISO 2020 C++ 标准(试验性质的不完全支持)。"
+msgstr "遵循 ISO 202Y C 标准草案(试验性质的不完全支持)。"
#: c-family/c.opt:2633 c-family/c.opt:2637 c-family/c.opt:2751
#, no-c-format
@@ -4136,10 +4120,9 @@ msgid "Enable Cobol parser debugging"
msgstr "启用后端调试."
#: cobol/lang.opt:102
-#, fuzzy, no-c-format
-#| msgid "Enable backend debugging."
+#, no-c-format
msgid "Enable Cobol yacc debugging"
-msgstr "启用后端调试."
+msgstr "启用 Cobol yacc 调试"
#: cobol/lang.opt:106
#, no-c-format
@@ -4182,9 +4165,9 @@ msgid "Select the runtime."
msgstr "选择运行时。"
#: ada/gcc-interface/lang.opt:93
-#, fuzzy, no-c-format
+#, no-c-format
msgid "Catch typos."
-msgstr "进入了 catch 块"
+msgstr "捕获打字错误。"
#: ada/gcc-interface/lang.opt:97
#, fuzzy, no-c-format
@@ -4236,10 +4219,9 @@ msgid "Generate JSON file."
msgstr "生成 JSON 文件。"
#: d/lang.opt:167
-#, fuzzy, no-c-format
-#| msgid "-MF <file>\tWrite dependency output to the given file"
+#, no-c-format
msgid "-Xf <file>\tWrite JSON output to the given <file>."
-msgstr "-MF <文件>\t将依赖项输出到给定文件"
+msgstr "-Xf <文件>\t将 JSON 输出到给定<文件>。"
#: d/lang.opt:171
#, no-c-format
@@ -4440,10 +4422,9 @@ msgid "Implement 'in' contracts of overridden methods to be a superset of parent
msgstr ""
#: d/lang.opt:408
-#, fuzzy, no-c-format
-#| msgid "Consider access to byte sized memory slow."
+#, no-c-format
msgid "Disable access to shared memory objects."
-msgstr "认为按字节访问内存速度较慢。"
+msgstr "禁用对共享内存对象的访问。"
#: d/lang.opt:412
#, no-c-format
@@ -9265,7 +9246,7 @@ msgstr "指定目标架构的名称"
#: config/nvptx/nvptx.opt:64
#, no-c-format
msgid "Alias:"
-msgstr ""
+msgstr "别名:"
#: config/nvptx/nvptx.opt:125
#, fuzzy, no-c-format
@@ -9274,9 +9255,9 @@ msgid "Known PTX ISA versions (for use with the -mptx= option):"
msgstr "已知 MIPS ISA 等级 (用于 -mips 选项):"
#: config/nvptx/nvptx.opt:156
-#, fuzzy, no-c-format
+#, no-c-format
msgid "Specify the PTX ISA version to use."
-msgstr "ELF 文件 ABI 版本无效"
+msgstr "指定要使用的 PTX ISA 版本。"
#: config/nvptx/nvptx.opt:160
#, no-c-format
@@ -12154,10 +12135,9 @@ msgid "Always align function entry, jump target and return address."
msgstr ""
#: config/nds32/nds32.opt:85
-#, fuzzy, no-c-format
-#| msgid "Align code and data to 32 bits"
+#, no-c-format
msgid "Align function entry to 4 byte."
-msgstr "将代码和数据对齐到 32 位边界上"
+msgstr "将函数入口对齐到 4 字节。"
#: config/nds32/nds32.opt:97
#, no-c-format
@@ -12206,9 +12186,9 @@ msgid "Generate string extension instructions."
msgstr "生成加载/存储乘法指令"
#: config/nds32/nds32.opt:139
-#, fuzzy, no-c-format
+#, no-c-format
msgid "Generate DSP extension instructions."
-msgstr "生成加载/存储乘法指令"
+msgstr "生成 DSP 扩展指令。"
#: config/nds32/nds32.opt:143
#, fuzzy, no-c-format
@@ -12355,10 +12335,9 @@ msgid "Known IQ2000 CPUs (for use with the -mcpu= option):"
msgstr "已知 IQ2000 处理器 (用于 -mcpu= 选项):"
#: config/iq2000/iq2000.opt:61 config/mips/mips.opt:142
-#, fuzzy, no-c-format
-#| msgid "Use ROM instead of RAM"
+#, no-c-format
msgid "Use ROM instead of RAM."
-msgstr "使用 ROM 而不是 RAM"
+msgstr "使用 ROM 而不是 RAM。"
#: config/iq2000/iq2000.opt:70
#, fuzzy, no-c-format
@@ -12373,15 +12352,14 @@ msgid "Put uninitialized constants in ROM (needs -membedded-data)."
msgstr "将未初始化的常量放在 ROM 中(需要 -membedded-data)"
#: config/csky/csky.opt:34
-#, fuzzy, no-c-format
+#, no-c-format
msgid "Specify the target architecture."
-msgstr "指定目标架构的名称"
+msgstr "指定目标架构的名称。"
#: config/csky/csky.opt:38
-#, fuzzy, no-c-format
-#| msgid "Specify the target CPU"
+#, no-c-format
msgid "Specify the target processor."
-msgstr "选择目标 CPU"
+msgstr "指定目标处理器。"
#: config/csky/csky.opt:90
#, fuzzy, no-c-format
@@ -12426,10 +12404,9 @@ msgid "Enable coprocessor instructions."
msgstr "启用 clip 指令"
#: config/csky/csky.opt:122
-#, fuzzy, no-c-format
-#| msgid "Enable average instructions"
+#, no-c-format
msgid "Enable cache prefetch instructions."
-msgstr "启用均值指令"
+msgstr "启用缓存预取指令。"
#: config/csky/csky.opt:126
#, fuzzy, no-c-format
@@ -12546,12 +12523,12 @@ msgstr "已知 C6X ISA (用于 -march= 选项):"
#: config/c6x/c6x.opt:30 config/mips/mips.opt:134
#, no-c-format
msgid "Use big-endian byte order."
-msgstr "令大端在前。"
+msgstr "使用大端字节序。"
#: config/c6x/c6x.opt:34 config/mips/mips.opt:138
#, no-c-format
msgid "Use little-endian byte order."
-msgstr "令小端在前。"
+msgstr "使用小端字节序。"
#: config/c6x/c6x.opt:42
#, fuzzy, no-c-format
@@ -12958,10 +12935,9 @@ msgid "Annotate assembler instructions with estimated addresses."
msgstr "使用估算的地址评注汇编指令"
#: config/sh/sh.opt:247
-#, fuzzy, no-c-format
-#| msgid "Generate code in little endian mode"
+#, no-c-format
msgid "Generate code in little endian mode."
-msgstr "生成小端在前的代码"
+msgstr "在小端序模式下生成代码。"
#: config/sh/sh.opt:251
#, fuzzy, no-c-format
@@ -13014,27 +12990,24 @@ msgid "Pretend a branch-around-a-move is a conditional move."
msgstr "将数据传输周围的跳转认为是条件转移。"
#: config/sh/sh.opt:295
-#, fuzzy, no-c-format
-#| msgid "Enable the use of the fsca instruction"
+#, no-c-format
msgid "Enable the use of the fsca instruction."
-msgstr "启用对 fsca 指令的使用"
+msgstr "启用对 fsca 指令的使用。"
#: config/sh/sh.opt:299
-#, fuzzy, no-c-format
-#| msgid "Enable the use of the fsrra instruction"
+#, no-c-format
msgid "Enable the use of the fsrra instruction."
-msgstr "启用 fsrra 指令的使用"
+msgstr "启用 fsrra 指令的使用。"
#: config/gcn/gcn-tables.opt:25
#, no-c-format
msgid "GCN GPU type to use:"
-msgstr ""
+msgstr "要使用的 GCN GPU 类型:"
#: config/gcn/gcn.opt:26 config/gcn/gcn.opt:30
-#, fuzzy, no-c-format
-#| msgid "Specify the name of the target CPU"
+#, no-c-format
msgid "Specify the name of the target GPU."
-msgstr "指定目标 CPU 的名称"
+msgstr "指定目标 CPU 的名称。"
#: config/gcn/gcn.opt:34
#, no-c-format
@@ -13093,10 +13066,9 @@ msgid "Assume small address space."
msgstr "假定小地址空间"
#: config/bpf/bpf.opt:28
-#, fuzzy, no-c-format
-#| msgid "Generate LP64 code"
+#, no-c-format
msgid "Generate xBPF."
-msgstr "生成 LP64 代码"
+msgstr "生成 xBPF。"
#: config/bpf/bpf.opt:34
#, fuzzy, no-c-format
@@ -13127,10 +13099,9 @@ msgid "Enable extra conditional-branch instructions j(s)lt and j(s)le."
msgstr "启用条件移动指令。"
#: config/bpf/bpf.opt:56
-#, fuzzy, no-c-format
-#| msgid "Enable 32-bit divide instructions"
+#, no-c-format
msgid "Enable 32-bit ALU instructions."
-msgstr "启用 32 位除法指令"
+msgstr "启用 32 位 ALU 指令。"
#: config/bpf/bpf.opt:60
#, fuzzy, no-c-format
@@ -13351,10 +13322,9 @@ msgid "FP exceptions are enabled."
msgstr "FP 异常已启用"
#: config/mips/mips.opt:223
-#, fuzzy, no-c-format
-#| msgid "Use 32-bit floating-point registers"
+#, no-c-format
msgid "Use 32-bit floating-point registers."
-msgstr "使用 32 位浮点寄存器"
+msgstr "使用 32 位浮点寄存器。"
#: config/mips/mips.opt:227
#, no-c-format
@@ -13456,22 +13426,19 @@ msgid "Use -G for object-local data."
msgstr "为对象局部数据使用 -G"
#: config/mips/mips.opt:305
-#, fuzzy, no-c-format
-#| msgid "Use indirect calls"
+#, no-c-format
msgid "Use indirect calls."
-msgstr "使用间接调用"
+msgstr "使用间接调用。"
#: config/mips/mips.opt:309
-#, fuzzy, no-c-format
-#| msgid "Use a 32-bit long type"
+#, no-c-format
msgid "Use a 32-bit long type."
-msgstr "使用 32 位 long 类型"
+msgstr "使用 32 位 long 类型。"
#: config/mips/mips.opt:313
-#, fuzzy, no-c-format
-#| msgid "Use a 64-bit long type"
+#, no-c-format
msgid "Use a 64-bit long type."
-msgstr "使用 64 位 long 类型"
+msgstr "使用 64 位 long 类型。"
#: config/mips/mips.opt:317
#, fuzzy, no-c-format
@@ -13486,9 +13453,9 @@ msgid "Don't optimize block moves."
msgstr "不优化块移动"
#: config/mips/mips.opt:325
-#, fuzzy, no-c-format
+#, no-c-format
msgid "Use microMIPS instructions."
-msgstr "使用浮点双精度指令"
+msgstr "使用 microMIPS 指令。"
#: config/mips/mips.opt:329
#, fuzzy, no-c-format
@@ -13497,10 +13464,9 @@ msgid "Use MIPS MSA Extension instructions."
msgstr "使用 MIPS-DSP 指令"
#: config/mips/mips.opt:333
-#, fuzzy, no-c-format
-#| msgid "Allow the use of MT instructions"
+#, no-c-format
msgid "Allow the use of MT instructions."
-msgstr "允许使用 MT 指令"
+msgstr "允许使用 MT 指令。"
#: config/mips/mips.opt:337
#, fuzzy, no-c-format
@@ -13509,10 +13475,9 @@ msgid "Prevent the use of all floating-point operations."
msgstr "不允许使用任何浮点操作"
#: config/mips/mips.opt:341
-#, fuzzy, no-c-format
-#| msgid "Use MCU instructions"
+#, no-c-format
msgid "Use MCU instructions."
-msgstr "使用 MCU 指令"
+msgstr "使用 MCU 指令。"
#: config/mips/mips.opt:345
#, fuzzy, no-c-format
@@ -30236,14 +30201,14 @@ msgid "if this code is reached, the program will abort"
msgstr "如果执行到这段代码,程序将中止"
#: godump.cc:1434
-#, fuzzy, gcc-internal-format
+#, gcc-internal-format
msgid "could not close Go dump file: %m"
-msgstr "无法打开用零填充的指令转储文件%qs:%s"
+msgstr "无法关闭 Go 转储文件:%m"
#: godump.cc:1446
-#, fuzzy, gcc-internal-format
+#, gcc-internal-format
msgid "could not open Go dump file %qs: %m"
-msgstr "无法打开最终指令转储文件%qs:%s"
+msgstr "无法打开 Go 转储文件 %qs:%m"
#: graphite.cc:529
#, fuzzy, gcc-internal-format
@@ -30399,9 +30364,9 @@ msgid "array types have different bounds"
msgstr "?: 的操作数类型不一致,分别为%qT和%qT"
#: ipa-devirt.cc:1139
-#, fuzzy, gcc-internal-format
+#, gcc-internal-format
msgid "return value type mismatch"
-msgstr "<返回值>"
+msgstr "返回值类型不匹配"
#: ipa-devirt.cc:1154
#, gcc-internal-format
@@ -30610,10 +30575,9 @@ msgid "name %qs is defined to different value in another translation unit"
msgstr "%qE未声明(不在函数内)"
#: ipa-devirt.cc:4325
-#, fuzzy, gcc-internal-format
-#| msgid "missing definition"
+#, gcc-internal-format
msgid "mismatching definition"
-msgstr "定义缺失"
+msgstr "不匹配的定义"
#: ipa-fnsummary.cc:4845
#, fuzzy, gcc-internal-format
@@ -30867,13 +30831,12 @@ msgstr "需要 %<,%> 或 %<)%>"
#: lazy-diagnostic-path.cc:179
#, gcc-internal-format
msgid "this warning should be skipped"
-msgstr ""
+msgstr "该警告信息应当被跳过"
#: lazy-diagnostic-path.cc:194
-#, fuzzy, gcc-internal-format
-#| msgid "this is the insn:"
+#, gcc-internal-format
msgid "this is a test"
-msgstr "这是指令:"
+msgstr "这是一个测试"
#: lra-assigns.cc:1694
#, fuzzy, gcc-internal-format, gfc-internal-format
@@ -31002,7 +30965,7 @@ msgstr ""
#: lto-compress.cc:165
#, gcc-internal-format
msgid "original size unknown"
-msgstr ""
+msgstr "原始大小未知"
#: lto-compress.cc:171
#, fuzzy, gcc-internal-format, gfc-internal-format
@@ -31145,19 +31108,19 @@ msgid "problem with building target image for %s"
msgstr "组建目标平台:%s\n"
#: lto-wrapper.cc:1083
-#, fuzzy, gcc-internal-format
+#, gcc-internal-format
msgid "reading input file"
-msgstr "读取输入历史文件…\n"
+msgstr "正在读取输入文件"
#: lto-wrapper.cc:1088
-#, fuzzy, gcc-internal-format
+#, gcc-internal-format
msgid "writing output file"
-msgstr "写入到输出文件 '%s' 时出错\n"
+msgstr "正在写入输出文件"
#: lto-wrapper.cc:1127
#, gcc-internal-format
msgid "installation error, cannot find %<crtoffloadtable%s.o%>"
-msgstr ""
+msgstr "安装错误,无法找到 %<crtoffloadtable%s.o%>"
#: lto-wrapper.cc:1380
#, fuzzy
@@ -31178,10 +31141,9 @@ msgid "environment variable %<COLLECT_GCC_OPTIONS%> must be set"
msgstr "环境变量 COLLECT_GCC_OPTIONS 必须被设置"
#: lto-wrapper.cc:1575
-#, fuzzy, gcc-internal-format, gfc-internal-format
-#| msgid "missing argument to %qs"
+#, gcc-internal-format, gfc-internal-format
msgid "missing directory: %s"
-msgstr "%qs缺少参数"
+msgstr "缺失目录:%s"
#: lto-wrapper.cc:1768 lto-wrapper.cc:1828 c-family/c-pch.cc:215
#: c-family/c-pch.cc:250 c-family/c-pch.cc:288 c-family/c-pch.cc:366
@@ -31217,10 +31179,9 @@ msgid "using ltrans cache without file locking support, do not use in parallel"
msgstr ""
#: lto-wrapper.cc:2315 config/gcn/mkoffload.cc:954
-#, fuzzy, gcc-internal-format
-#| msgid "atexit failed"
+#, gcc-internal-format
msgid "%<atexit%> failed"
-msgstr "atexit 失败"
+msgstr "%<atexit%> 失败"
#: multiple_target.cc:72
#, fuzzy, gcc-internal-format
@@ -31744,9 +31705,9 @@ msgid "location of OpenACC %<kernels%>"
msgstr ""
#: omp-oacc-kernels-decompose.cc:1295
-#, fuzzy, gcc-internal-format
+#, gcc-internal-format
msgid "%qs not yet supported"
-msgstr "%P%F:不支持 -shared\n"
+msgstr "%qs 尚未被支持"
#: omp-oacc-neuter-broadcast.cc:1764
#, gcc-internal-format
@@ -32525,14 +32486,9 @@ msgid "fail to initialize plugin %s"
msgstr "无法初始化插件 %s"
#: plugin.cc:708
-#, fuzzy, gcc-internal-format, gfc-internal-format
-#| msgid ""
-#| "cannot load plugin %s\n"
-#| "%s"
+#, gcc-internal-format, gfc-internal-format
msgid "cannot load plugin %s: %s"
-msgstr ""
-"无法加载插件 %s\n"
-"%s"
+msgstr "无法加载插件 %s:%s"
#: plugin.cc:718
#, fuzzy, gcc-internal-format, gfc-internal-format
@@ -32555,10 +32511,9 @@ msgstr ""
"%3$s"
#: plugin.cc:737
-#, fuzzy, gcc-internal-format, gfc-internal-format
-#| msgid "fail to initialize plugin %s"
+#, gcc-internal-format, gfc-internal-format
msgid "failed to initialize plugin %s"
-msgstr "无法初始化插件 %s"
+msgstr "初始化插件 %s 失败"
#: plugin.cc:1049
#, fuzzy, gcc-internal-format
@@ -32831,9 +32786,9 @@ msgid "register of %qD used for multiple global register variables"
msgstr "嵌套函数中使用了全局寄存器变量%qD"
#: reginfo.cc:760 config/rs6000/rs6000-logue.cc:5577
-#, fuzzy, gcc-internal-format
+#, gcc-internal-format
msgid "conflicts with %qD"
-msgstr "%qD与已用的函数冲突"
+msgstr "与 %qD 冲突"
#: reginfo.cc:765
#, gcc-internal-format
@@ -33125,9 +33080,9 @@ msgid "variable symbol is not variable"
msgstr "%L处的符号不是一个 DUMMY 变量"
#: symtab.cc:1130
-#, fuzzy, gcc-internal-format
+#, gcc-internal-format
msgid "node has unknown type"
-msgstr "未知类型的输入行"
+msgstr "节点类型未知"
#: symtab.cc:1135
#, fuzzy, gcc-internal-format, gfc-internal-format
@@ -45675,10 +45630,9 @@ msgid "mips16 function profiling"
msgstr "mips16 函数取样"
#: config/mmix/mmix.cc:318
-#, fuzzy, gcc-internal-format
-#| msgid "-f%s not supported: ignored"
+#, gcc-internal-format
msgid "%<-f%s%> not supported: ignored"
-msgstr "-f%s 不受支持:已忽略"
+msgstr "%<-f%s%> 不受支持:已忽略"
#: config/mmix/mmix.cc:783
#, gcc-internal-format
@@ -45818,7 +45772,7 @@ msgstr ""
#: config/msp430/msp430-devices.cc:488
#, gcc-internal-format
msgid "could not locate MCU data file %<devices.csv%>"
-msgstr ""
+msgstr "无法定位 MCU 数据文件 %<devices.csv%>"
#: config/msp430/msp430.cc:181
#, gcc-internal-format
@@ -45861,10 +45815,9 @@ msgid "unrecognized MCU name %qs, assuming that it just supports the MSP430X ISA
msgstr ""
#: config/msp430/msp430.cc:250
-#, fuzzy, gcc-internal-format
-#| msgid "unrecognized register name %qs"
+#, gcc-internal-format
msgid "Unrecognized MCU name %qs."
-msgstr "不可识别的寄存名%qs"
+msgstr "无法识别的 MCU 名称 %qs。"
#: config/msp430/msp430.cc:255
#, fuzzy, gcc-internal-format
@@ -46152,9 +46105,9 @@ msgid "%<-mabi=2fp+%> option only support when FPU available, must be enable %<-
msgstr ""
#: config/nvptx/mkoffload.cc:94
-#, fuzzy, gcc-internal-format
+#, gcc-internal-format
msgid "deleting file %s: %m"
-msgstr "删除临时 exp 文件 %s"
+msgstr "正在删除文件 %s: %m"
#: config/nvptx/mkoffload.cc:119
#, gcc-internal-format
@@ -46203,9 +46156,9 @@ msgid "cannot open '%s'"
msgstr "无法打开“%s”"
#: config/nvptx/mkoffload.cc:860
-#, fuzzy, gcc-internal-format
+#, gcc-internal-format
msgid "cannot open intermediate ptx file"
-msgstr "无法打开输入文件“%s”"
+msgstr "无法打开中间的 ptx 文件"
#: config/nvptx/nvptx.cc:206
#, fuzzy, gcc-internal-format
@@ -46355,15 +46308,14 @@ msgid "%<CTABLE_ENTRY%> index %wd is not valid"
msgstr ""
#: config/pru/pru-pragma.cc:63
-#, fuzzy, gcc-internal-format
-#| msgid "redefinition of %q#T"
+#, gcc-internal-format
msgid "redefinition of %<CTABLE_ENTRY %wd%>"
-msgstr "%q#T重定义"
+msgstr "%<CTABLE_ENTRY %wd%> 的重定义"
#: config/pru/pru-pragma.cc:67
#, gcc-internal-format
msgid "%<CTABLE_ENTRY%> base address is not a multiple of 256"
-msgstr ""
+msgstr "%<CTABLE_ENTRY%> 基地址不是 256 的倍数"
#: config/pru/pru-pragma.cc:75
#, fuzzy, gcc-internal-format
@@ -46754,10 +46706,9 @@ msgid "rv32e requires ilp32e ABI"
msgstr "rv32e 需要 ilp32e ABI"
#: config/riscv/riscv.cc:10723
-#, fuzzy, gcc-internal-format
-#| msgid "rv32e requires ilp32e ABI"
+#, gcc-internal-format
msgid "rv64e requires lp64e ABI"
-msgstr "rv32e 需要 ilp32e ABI"
+msgstr "rv64e 需要 lp64e ABI"
#: config/riscv/riscv.cc:10728
#, fuzzy, gcc-internal-format
@@ -47252,10 +47203,9 @@ msgstr "%qs必须与%qs一起使用"
#: config/rs6000/rs6000.cc:4222 config/rs6000/rs6000.cc:4231
#: config/rs6000/rs6000.cc:4369 config/rs6000/rs6000.cc:4382
#: config/rs6000/rs6000.cc:4404
-#, fuzzy, gcc-internal-format
-#| msgid "%qT referred to as %qs"
+#, gcc-internal-format
msgid "%qs requires %qs"
-msgstr "%qT作为%qs被引用"
+msgstr "%qs 需要 %qs"
#: config/rs6000/rs6000.cc:4118
#, fuzzy, gcc-internal-format
@@ -47517,10 +47467,9 @@ msgid "%qF requires z15 or higher"
msgstr "%qF 需要 z15 或更高"
#: config/s390/s390-c.cc:965
-#, fuzzy, gcc-internal-format
-#| msgid "%qF requires z14 or higher"
+#, gcc-internal-format
msgid "%qF requires z17 or higher"
-msgstr "%qF 需要 z14 或更高"
+msgstr "%qF 需要 z17 或更高"
#: config/s390/s390-c.cc:979
#, gcc-internal-format
@@ -80823,9 +80772,9 @@ msgid "Extension: Unary operator following arithmetic operator (use parentheses)
msgstr "扩展:%C处单目运算符出现在算术运算符之后"
#: fortran/matchexp.cc:666
-#, fuzzy, gcc-internal-format
+#, gcc-internal-format
msgid "match_level_4(): Bad operator"
-msgstr "错误的运算符"
+msgstr "match_level_4():错误的运算符"
#: fortran/misc.cc:116
#, gcc-internal-format
diff --git a/gcc/range-op-ptr.cc b/gcc/range-op-ptr.cc
index 36e9dfc..6aadc9c 100644
--- a/gcc/range-op-ptr.cc
+++ b/gcc/range-op-ptr.cc
@@ -602,8 +602,14 @@ operator_cast::fold_range (prange &r, tree type,
int_range<2> tmp = inner;
tree pointer_uint_type = make_unsigned_type (TYPE_PRECISION (type));
range_cast (tmp, pointer_uint_type);
- r.set (type, tmp.lower_bound (), tmp.upper_bound ());
- r.update_bitmask (tmp.get_bitmask ());
+ // Casts may cause ranges to become UNDEFINED based on bitmasks.
+ if (tmp.undefined_p ())
+ r.set_varying (type);
+ else
+ {
+ r.set (type, tmp.lower_bound (), tmp.upper_bound ());
+ r.update_bitmask (tmp.get_bitmask ());
+ }
return true;
}
diff --git a/gcc/range-op.cc b/gcc/range-op.cc
index 06d357f..e2b9c82 100644
--- a/gcc/range-op.cc
+++ b/gcc/range-op.cc
@@ -3716,14 +3716,34 @@ operator_bitwise_and::op1_range (irange &r, tree type,
return true;
}
+ if (!op2.singleton_p (mask))
+ return true;
+
// For 0 = op1 & MASK, op1 is ~MASK.
- if (lhs.zero_p () && op2.singleton_p ())
+ if (lhs.zero_p ())
{
wide_int nz = wi::bit_not (op2.get_nonzero_bits ());
int_range<2> tmp (type);
tmp.set_nonzero_bits (nz);
r.intersect (tmp);
}
+
+ irange_bitmask lhs_bm = lhs.get_bitmask ();
+ // given [5,7] mask 0x3 value 0x4 = N & [7, 7] mask 0x0 value 0x7
+ // Nothing is known about the bits not specified in the mask value (op2),
+ // Start with the mask, 1's will occur where values were masked.
+ wide_int op1_mask = ~mask;
+ // Any bits that are unknown on the LHS are also unknown in op1,
+ // so union the current mask with the LHS mask.
+ op1_mask |= lhs_bm.mask ();
+ // The resulting zeros correspond to known bits in the LHS mask, and
+ // the LHS value should tell us what they are. Mask off any
+ // extraneous values thats are not convered by the mask.
+ wide_int op1_value = lhs_bm.value () & ~op1_mask;
+ irange_bitmask op1_bm (op1_value, op1_mask);
+ // INtersect this mask with anything already known about the value.
+ op1_bm.intersect (r.get_bitmask ());
+ r.update_bitmask (op1_bm);
return true;
}
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 69f9b6e..9e65029 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,87 @@
+2025-05-15 Jason Merrill <jason@redhat.com>
+
+ * g++.dg/coroutines/co-await-syntax-09-convert.C: Add -fcoroutines.
+ * g++.dg/coroutines/co-await-syntax-10.C
+ * g++.dg/coroutines/co-await-syntax-11.C
+ * g++.dg/coroutines/co-await-void_type.C
+ * g++.dg/coroutines/co-return-warning-1.C
+ * g++.dg/coroutines/ramp-return-a.C
+ * g++.dg/coroutines/ramp-return-c.C: Likewise.
+ * g++.dg/coroutines/coroutines.exp: Removed.
+ * lib/g++-dg.exp: Start at C++20 for coroutines/
+
+2025-05-15 Harald Anlauf <anlauf@gmx.de>
+
+ PR fortran/85750
+ * gfortran.dg/alloc_comp_auto_array_3.f90: Adjust scan counts.
+ * gfortran.dg/alloc_comp_class_3.f03: Remove bogus warnings.
+ * gfortran.dg/alloc_comp_class_4.f03: Likewise.
+ * gfortran.dg/allocate_with_source_14.f03: Adjust scan count.
+ * gfortran.dg/derived_constructor_comps_6.f90: Likewise.
+ * gfortran.dg/derived_result_5.f90: New test.
+
+2025-05-15 Robert Dubner <rdubner@symas.com>
+
+ PR cobol/120251
+ * cobol.dg/group1/check_88.cob: One final regex "." instead of "ß"
+
+2025-05-15 Andrew MacLeod <amacleod@redhat.com>
+
+ PR tree-optimization/116546
+ * gcc.dg/pr116546.c: New.
+
+2025-05-15 Andrew MacLeod <amacleod@redhat.com>
+
+ PR tree-optimization/120277
+ * gcc.dg/pr120277.c: New.
+
+2025-05-15 Robert Dubner <rdubner@symas.com>
+
+ PR cobol/120251
+ * cobol.dg/group1/check_88.cob: Ignore characters above 0x80.
+ * cobol.dg/group2/ALLOCATE_Rule_8_OPTION_INITIALIZE_with_figconst.cob:
+ Output HIGH-VALUE as hex, rather than as characters.
+ * cobol.dg/group2/ALLOCATE_Rule_8_OPTION_INITIALIZE_with_figconst.out:
+ Likewise.
+ * cobol.dg/group2/INSPECT_CONVERTING_TO_figurative_constants.cob: Typo.
+ * cobol.dg/group2/INSPECT_CONVERTING_TO_figurative_constants.out: Likewise.
+ * cobol.dg/group2/INSPECT_ISO_Example_1.cob: Likewise.
+ * cobol.dg/group2/INSPECT_ISO_Example_2.cob: Likewise.
+ * cobol.dg/group2/INSPECT_ISO_Example_3.cob: Likewise.
+ * cobol.dg/group2/INSPECT_ISO_Example_4.cob: Likewise.
+ * cobol.dg/group2/INSPECT_ISO_Example_5-f.cob: Likewise.
+ * cobol.dg/group2/INSPECT_ISO_Example_6.cob: Likewise.
+ * cobol.dg/group2/INSPECT_ISO_Example_7.cob: Likewise.
+ * cobol.dg/group2/Multiple_INDEXED_BY_variables_with_the_same_name.cob: New test.
+ * cobol.dg/group2/Multiple_INDEXED_BY_variables_with_the_same_name.out: New test.
+
+2025-05-15 Jeff Law <jlaw@ventanamicro.com>
+
+ PR target/120223
+ * gcc.target/riscv/pr120223.c: New test.
+
+2025-05-15 Patrick Palka <ppalka@redhat.com>
+
+ PR c++/120161
+ * g++.dg/template/unify13.C: New test.
+
+2025-05-15 Jason Merrill <jason@redhat.com>
+
+ * lib/g++-dg.exp (g++-std-flags): Factor out of g++-dg-runtest.
+ * g++.dg/modules/modules.exp: Use it instead of a copy.
+
+2025-05-15 Richard Biener <rguenther@suse.de>
+
+ * gcc.target/i386/pr110310.c: Adjust.
+
+2025-05-15 Richard Biener <rguenther@suse.de>
+
+ * gcc.target/i386/vect-epilogues-1.c: New testcase.
+ * gcc.target/i386/vect-epilogues-2.c: Likewise.
+ * gcc.target/i386/vect-epilogues-3.c: Likewise.
+ * gcc.target/i386/vect-epilogues-4.c: Likewise.
+ * gcc.target/i386/vect-epilogues-5.c: Likewise.
+
2025-05-14 Simon Martin <simon@nasilyan.com>
PR c++/120126
diff --git a/gcc/testsuite/cobol.dg/group1/check_88.cob b/gcc/testsuite/cobol.dg/group1/check_88.cob
index 4a7723e..f1d0685 100644
--- a/gcc/testsuite/cobol.dg/group1/check_88.cob
+++ b/gcc/testsuite/cobol.dg/group1/check_88.cob
@@ -3,25 +3,25 @@
*> { dg-output {\-> <\-(\n|\r\n|\r)} }
*> { dg-output {\->"""<\-(\n|\r\n|\r)} }
*> { dg-output {\->000<\-(\n|\r\n|\r)} }
-*> { dg-output {\->ÿÿÿ<\-(\n|\r\n|\r)} }
+*> { dg-output {\->.*<\-(\n|\r\n|\r)} }
*> { dg-output { (\n|\r\n|\r)} }
*> { dg-output {\-><\-(\n|\r\n|\r)} }
*> { dg-output {\-> <\-(\n|\r\n|\r)} }
*> { dg-output {\->""""<\-(\n|\r\n|\r)} }
*> { dg-output {\->0000<\-(\n|\r\n|\r)} }
-*> { dg-output {\->ÿÿÿÿ<\-(\n|\r\n|\r)} }
+*> { dg-output {\->.*<\-(\n|\r\n|\r)} }
*> { dg-output { (\n|\r\n|\r)} }
*> { dg-output {There should be no garbage after character 32(\n|\r\n|\r)} }
*> { dg-output {\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\*\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-\-(\n|\r\n|\r)} }
-*> { dg-output {üüüüüüüüüüüüüüüüüüü Bundesstraße (\n|\r\n|\r)} }
-*> { dg-output {üüüüüüüüüüüüüüüüüüü Bundesstraße (\n|\r\n|\r)} }
+*> { dg-output {.* Bundesstra.e (\n|\r\n|\r)} }
+*> { dg-output {.* Bundesstra.e (\n|\r\n|\r)} }
*> { dg-output { (\n|\r\n|\r)} }
*> { dg-output {There should be no spaces before the final quote(\n|\r\n|\r)} }
-*> { dg-output {"üüüüüüüüüüüüüüüüüüü Bundesstraße"(\n|\r\n|\r)} }
+*> { dg-output {".* Bundesstra.e"(\n|\r\n|\r)} }
*> { dg-output { (\n|\r\n|\r)} }
*> { dg-output { IsLow ""(\n|\r\n|\r)} }
*> { dg-output { IsZero "000"(\n|\r\n|\r)} }
-*> { dg-output { IsHi "ÿÿÿ"(\n|\r\n|\r)} }
+*> { dg-output { IsHi ".*"(\n|\r\n|\r)} }
*> { dg-output { IsBob "bob"(\n|\r\n|\r)} }
*> { dg-output { IsQuote """""(\n|\r\n|\r)} }
*> { dg-output { IsSpace " "(\n|\r\n|\r)} }
diff --git a/gcc/testsuite/cobol.dg/group2/ALLOCATE_Rule_8_OPTION_INITIALIZE_with_figconst.cob b/gcc/testsuite/cobol.dg/group2/ALLOCATE_Rule_8_OPTION_INITIALIZE_with_figconst.cob
index 6fab992..a5ef3a8 100644
--- a/gcc/testsuite/cobol.dg/group2/ALLOCATE_Rule_8_OPTION_INITIALIZE_with_figconst.cob
+++ b/gcc/testsuite/cobol.dg/group2/ALLOCATE_Rule_8_OPTION_INITIALIZE_with_figconst.cob
@@ -81,12 +81,13 @@
02 based-x pic x(24) value "I am I, Don Quixote".
02 based-9 pic 999 value 123.
02 based-p pointer value NULL.
+ 01 pval redefines based-var pointer.
01 allocated-pointer pointer.
procedure division.
display "allocate characters (ISO 2023 Rule 8: OPT_INIT if specified, otherwise defaultbyte, otherwise zero)"
allocate 35 characters returning allocated-pointer
set address of based-var to allocated-pointer
- call "reporter" using based-var
+ display pval
free allocated-pointer
goback.
end program prog-high.
diff --git a/gcc/testsuite/cobol.dg/group2/ALLOCATE_Rule_8_OPTION_INITIALIZE_with_figconst.out b/gcc/testsuite/cobol.dg/group2/ALLOCATE_Rule_8_OPTION_INITIALIZE_with_figconst.out
index c141fdf..ea05e96 100644
--- a/gcc/testsuite/cobol.dg/group2/ALLOCATE_Rule_8_OPTION_INITIALIZE_with_figconst.out
+++ b/gcc/testsuite/cobol.dg/group2/ALLOCATE_Rule_8_OPTION_INITIALIZE_with_figconst.out
@@ -12,6 +12,5 @@ allocate characters (ISO 2023 Rule 8: OPT_INIT if specified, otherwise defaultb
" " " " 0x2020202020202020
initialize high-value
allocate characters (ISO 2023 Rule 8: OPT_INIT if specified, otherwise defaultbyte, otherwise zero)
- (1) as allocated
- "ÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿ" "¿¿¿" 0xffffffffffffffff
+0xffffffffffffffff
diff --git a/gcc/testsuite/cobol.dg/group2/INSPECT_CONVERTING_TO_figurative_constants.cob b/gcc/testsuite/cobol.dg/group2/INSPECT_CONVERTING_TO_figurative_constants.cob
index 2983cce..91440f5 100644
--- a/gcc/testsuite/cobol.dg/group2/INSPECT_CONVERTING_TO_figurative_constants.cob
+++ b/gcc/testsuite/cobol.dg/group2/INSPECT_CONVERTING_TO_figurative_constants.cob
@@ -1,27 +1,27 @@
*> { dg-do run }
*> { dg-output-file "group2/INSPECT_CONVERTING_TO_figurative_constants.out" }
-
identification division.
program-id. clouseau.
data division.
working-storage section.
01 item pic x(12).
+ 01 pitem redefines item pointer.
procedure division.
move all "abcd" to item
inspect item converting "abcd" to low-values
- display "low-values " space """" item """"
+ display "low-values " space """" pitem """"
move all "abcd" to item
inspect item converting "abcd" to spaces
- display "spaces " space """" item """"
+ display "spaces " space """" pitem """"
move all "abcd" to item
inspect item converting "abcd" to zeros
- display "zeros " space """" item """"
+ display "zeros " space """" pitem """"
move all "abcd" to item
inspect item converting "abcd" to quotes
- display "quotes " space """" item """"
+ display "quotes " space """" pitem """"
move all "abcd" to item
inspect item converting "abcd" to high-values
- display "high-values" space """" item """"
+ display "high-values" space """" pitem """"
goback.
end program clouseau.
diff --git a/gcc/testsuite/cobol.dg/group2/INSPECT_CONVERTING_TO_figurative_constants.out b/gcc/testsuite/cobol.dg/group2/INSPECT_CONVERTING_TO_figurative_constants.out
index 7de6e48..23ce49b 100644
--- a/gcc/testsuite/cobol.dg/group2/INSPECT_CONVERTING_TO_figurative_constants.out
+++ b/gcc/testsuite/cobol.dg/group2/INSPECT_CONVERTING_TO_figurative_constants.out
@@ -1,6 +1,6 @@
-low-values ""
-spaces " "
-zeros "000000000000"
-quotes """"""""""""""
-high-values "ÿÿÿÿÿÿÿÿÿÿÿÿ"
+low-values "0x0000000000000000"
+spaces "0x2020202020202020"
+zeros "0x3030303030303030"
+quotes "0x2222222222222222"
+high-values "0xffffffffffffffff"
diff --git a/gcc/testsuite/cobol.dg/group2/INSPECT_ISO_Example_1.cob b/gcc/testsuite/cobol.dg/group2/INSPECT_ISO_Example_1.cob
index 1bbdea4..2f306f1 100644
--- a/gcc/testsuite/cobol.dg/group2/INSPECT_ISO_Example_1.cob
+++ b/gcc/testsuite/cobol.dg/group2/INSPECT_ISO_Example_1.cob
@@ -25,7 +25,7 @@
Move ' EFABDBCGABEFGG 0301010005TUXYXVWRXYZZPZ' to row(1).
Move ' BABABC 0200000101SXYXYZ' to row(3).
Move ' BBBC 0001000200SSVW' to row(5).
-`
+
compute rowlim = 2*rows - 1
Display ' INPUT C0 C1 C2 C3 C4 OUTPUT'
diff --git a/gcc/testsuite/cobol.dg/group2/INSPECT_ISO_Example_2.cob b/gcc/testsuite/cobol.dg/group2/INSPECT_ISO_Example_2.cob
index a464101..0e4297d 100644
--- a/gcc/testsuite/cobol.dg/group2/INSPECT_ISO_Example_2.cob
+++ b/gcc/testsuite/cobol.dg/group2/INSPECT_ISO_Example_2.cob
@@ -25,7 +25,7 @@
*> the observed outputs
Move ' BBB 0300ZZZ' to row(1).
Move ' ABA 0300ZZZ' to row(3).
-`
+
compute rowlim = 2*rows - 1
Display ' INPUT C0 C1 OUTPUT'
diff --git a/gcc/testsuite/cobol.dg/group2/INSPECT_ISO_Example_3.cob b/gcc/testsuite/cobol.dg/group2/INSPECT_ISO_Example_3.cob
index 7111e9c..0b6c00c 100644
--- a/gcc/testsuite/cobol.dg/group2/INSPECT_ISO_Example_3.cob
+++ b/gcc/testsuite/cobol.dg/group2/INSPECT_ISO_Example_3.cob
@@ -19,7 +19,7 @@
Move ' ADDDDA 000005AZZZZZ' to row(5).
Move ' CDDDDC 000000CDDDDC' to row(7).
Move ' BDBBBDB 000300BDWWWDB' to row(9).
-`
+
Display ' INPUT C0 C1 C2 OUTPUT'
Display ' -------------------- -- -- -- --------------------'
Perform Example-3 with test after
diff --git a/gcc/testsuite/cobol.dg/group2/INSPECT_ISO_Example_4.cob b/gcc/testsuite/cobol.dg/group2/INSPECT_ISO_Example_4.cob
index 192e1a8..03a0b07 100644
--- a/gcc/testsuite/cobol.dg/group2/INSPECT_ISO_Example_4.cob
+++ b/gcc/testsuite/cobol.dg/group2/INSPECT_ISO_Example_4.cob
@@ -24,7 +24,7 @@
*> Even-numbered rows are modified by the INSPECT statements and contain
*> the observed outputs
Move ' ABABABABC 01ABABXYABC' to row(1).
-`
+
compute rowlim = 2*rows - 1
Display ' INPUT C0 C1 OUTPUT'
diff --git a/gcc/testsuite/cobol.dg/group2/INSPECT_ISO_Example_5-f.cob b/gcc/testsuite/cobol.dg/group2/INSPECT_ISO_Example_5-f.cob
index 0923720..5ef97e1 100644
--- a/gcc/testsuite/cobol.dg/group2/INSPECT_ISO_Example_5-f.cob
+++ b/gcc/testsuite/cobol.dg/group2/INSPECT_ISO_Example_5-f.cob
@@ -30,7 +30,7 @@
Move ' ABABBCAB 000106ABABBCXY' to row(1).
Move ' ABDBABC 000001AVDBABC' to row(3).
Move ' BCABCABD 010000BCABCAVD' to row(5).
-`
+
compute rowlim = 2*rows - 1
Display ' INPUT C0 C1 C2 OUTPUT'
diff --git a/gcc/testsuite/cobol.dg/group2/INSPECT_ISO_Example_6.cob b/gcc/testsuite/cobol.dg/group2/INSPECT_ISO_Example_6.cob
index 75917a2..40cecfc 100644
--- a/gcc/testsuite/cobol.dg/group2/INSPECT_ISO_Example_6.cob
+++ b/gcc/testsuite/cobol.dg/group2/INSPECT_ISO_Example_6.cob
@@ -22,7 +22,7 @@
*> Even-numbered rows are modified by the INSPECT statements and contain
*> the observed outputs
Move ' AC"AEBDFBCD#AB"D AC"XEYXFYZX#AB"D' to row(1).
-`
+
compute rowlim = 2*rows - 1
Display ' INPUT OUTPUT'
diff --git a/gcc/testsuite/cobol.dg/group2/INSPECT_ISO_Example_7.cob b/gcc/testsuite/cobol.dg/group2/INSPECT_ISO_Example_7.cob
index ca2ae71..abf9eb9 100644
--- a/gcc/testsuite/cobol.dg/group2/INSPECT_ISO_Example_7.cob
+++ b/gcc/testsuite/cobol.dg/group2/INSPECT_ISO_Example_7.cob
@@ -27,7 +27,7 @@
Move ' 415-245-1212 415-245-1212' to row(1).
Move ' 415-CH5-1212 415-??5-1212' to row(3).
Move ' 20%Numeric 20%???????' to row(5).
-`
+
compute rowlim = 2*rows - 1
Display ' INPUT OUTPUT'
diff --git a/gcc/testsuite/cobol.dg/group2/Multiple_INDEXED_BY_variables_with_the_same_name.cob b/gcc/testsuite/cobol.dg/group2/Multiple_INDEXED_BY_variables_with_the_same_name.cob
new file mode 100644
index 0000000..4bcc06c
--- /dev/null
+++ b/gcc/testsuite/cobol.dg/group2/Multiple_INDEXED_BY_variables_with_the_same_name.cob
@@ -0,0 +1,24 @@
+ *> { dg-do run }
+ *> { dg-output-file "group2/Multiple_INDEXED_BY_variables_with_the_same_name.out" }
+ IDENTIFICATION DIVISION.
+ PROGRAM-ID. prog.
+ DATA DIVISION.
+ WORKING-STORAGE SECTION.
+ 01 GROUP-1-TABLE.
+ 05 TABLE-LEVEL-1 VALUE "ABCDEFGHIJKLMNO".
+ 06 TABLE-ITEM PICTURE X OCCURS 15 TIMES INDEXED BY IND.
+ 88 EQUALS-M VALUE "M".
+ 01 GROUP-2-TABLE.
+ 05 TABLE-LEVEL-1 VALUE "abcdefghijklmno".
+ 06 TABLE-ITEM PICTURE X OCCURS 15 TIMES INDEXED BY IND.
+ 88 EQUALS-M VALUE "M".
+ PROCEDURE DIVISION.
+ set IND OF GROUP-1-TABLE to 2
+ set IND OF GROUP-2-TABLE to 4
+ display "The output should be ""Db"""
+ display "The output is " """"
+ TABLE-ITEM of GROUP-1-TABLE(IND OF GROUP-2-TABLE)
+ TABLE-ITEM of GROUP-2-TABLE(IND OF GROUP-1-TABLE)
+ """"
+ goback.
+
diff --git a/gcc/testsuite/cobol.dg/group2/Multiple_INDEXED_BY_variables_with_the_same_name.out b/gcc/testsuite/cobol.dg/group2/Multiple_INDEXED_BY_variables_with_the_same_name.out
new file mode 100644
index 0000000..c4d70c9
--- /dev/null
+++ b/gcc/testsuite/cobol.dg/group2/Multiple_INDEXED_BY_variables_with_the_same_name.out
@@ -0,0 +1,3 @@
+The output should be "Db"
+The output is "Db"
+
diff --git a/gcc/testsuite/g++.dg/coroutines/co-await-syntax-09-convert.C b/gcc/testsuite/g++.dg/coroutines/co-await-syntax-09-convert.C
index dde0bab..deb3be1 100644
--- a/gcc/testsuite/g++.dg/coroutines/co-await-syntax-09-convert.C
+++ b/gcc/testsuite/g++.dg/coroutines/co-await-syntax-09-convert.C
@@ -1,4 +1,4 @@
-// { dg-additional-options "-std=c++17 -w" }
+// { dg-additional-options "-std=c++17 -fcoroutines -w" }
#include "coro.h"
diff --git a/gcc/testsuite/g++.dg/coroutines/co-await-syntax-10.C b/gcc/testsuite/g++.dg/coroutines/co-await-syntax-10.C
index 8304344..dfa24a8 100644
--- a/gcc/testsuite/g++.dg/coroutines/co-await-syntax-10.C
+++ b/gcc/testsuite/g++.dg/coroutines/co-await-syntax-10.C
@@ -1,4 +1,4 @@
-// { dg-additional-options "-std=c++17 -w" }
+// { dg-additional-options "-std=c++17 -fcoroutines -w" }
#include "coro.h"
diff --git a/gcc/testsuite/g++.dg/coroutines/co-await-syntax-11.C b/gcc/testsuite/g++.dg/coroutines/co-await-syntax-11.C
index 69810ab..acee888 100644
--- a/gcc/testsuite/g++.dg/coroutines/co-await-syntax-11.C
+++ b/gcc/testsuite/g++.dg/coroutines/co-await-syntax-11.C
@@ -1,4 +1,4 @@
-// { dg-additional-options "-std=c++17 -w" }
+// { dg-additional-options "-std=c++17 -fcoroutines -w" }
#include <utility>
#include <type_traits>
diff --git a/gcc/testsuite/g++.dg/coroutines/co-await-void_type.C b/gcc/testsuite/g++.dg/coroutines/co-await-void_type.C
index 370068f..f35faaf 100644
--- a/gcc/testsuite/g++.dg/coroutines/co-await-void_type.C
+++ b/gcc/testsuite/g++.dg/coroutines/co-await-void_type.C
@@ -1,4 +1,4 @@
-// { dg-additional-options "-std=c++17 -fsyntax-only -w" }
+// { dg-additional-options "-std=c++17 -fsyntax-only -fcoroutines -w" }
#include <coroutine>
diff --git a/gcc/testsuite/g++.dg/coroutines/co-return-warning-1.C b/gcc/testsuite/g++.dg/coroutines/co-return-warning-1.C
index b2aaba1..ef3948c 100644
--- a/gcc/testsuite/g++.dg/coroutines/co-return-warning-1.C
+++ b/gcc/testsuite/g++.dg/coroutines/co-return-warning-1.C
@@ -1,4 +1,4 @@
-// { dg-additional-options "-std=c++17 -w" }
+// { dg-additional-options "-std=c++17 -fcoroutines -w" }
#include <coroutine>
diff --git a/gcc/testsuite/g++.dg/coroutines/coroutines.exp b/gcc/testsuite/g++.dg/coroutines/coroutines.exp
deleted file mode 100644
index 395e3f7..0000000
--- a/gcc/testsuite/g++.dg/coroutines/coroutines.exp
+++ /dev/null
@@ -1,50 +0,0 @@
-# Copyright (C) 2018-2025 Free Software Foundation, Inc.
-
-# Contributed by Iain Sandoe <iain@sandoe.co.uk> under contract to Facebook.
-
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 3 of the License, or
-# (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with GCC; see the file COPYING3. If not see
-# <http://www.gnu.org/licenses/>.
-
-# Test C++ coroutines, requires c++17; doesn't, at present, seem much
-# point in repeating these for other versions.
-
-# Load support procs.
-load_lib g++-dg.exp
-
-# If a testcase doesn't have special options, use these.
-global DEFAULT_CXXFLAGS
-if ![info exists DEFAULT_CXXFLAGS] then {
- set DEFAULT_CXXFLAGS " -pedantic-errors -Wno-long-long"
-}
-
-set DEFAULT_COROFLAGS $DEFAULT_CXXFLAGS
-lappend DEFAULT_COROFLAGS "-std=c++20"
-
-dg-init
-
-# Run the tests.
-# g++-dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/*.C]] \
-# "" $DEFAULT_COROFLAGS
-
-foreach test [lsort [find $srcdir/$subdir {*.[CH]}]] {
- if [runtest_file_p $runtests $test] {
- set nshort [file tail [file dirname $test]]/[file tail $test]
- verbose "Testing $nshort $DEFAULT_COROFLAGS" 1
- dg-test $test "" $DEFAULT_COROFLAGS
- set testcase [string range $test [string length "$srcdir/"] end]
- }
-}
-
-# done.
-dg-finish
diff --git a/gcc/testsuite/g++.dg/coroutines/ramp-return-a.C b/gcc/testsuite/g++.dg/coroutines/ramp-return-a.C
index fcea6f9..543f92f 100644
--- a/gcc/testsuite/g++.dg/coroutines/ramp-return-a.C
+++ b/gcc/testsuite/g++.dg/coroutines/ramp-return-a.C
@@ -1,4 +1,4 @@
-// { dg-additional-options "-std=c++14" }
+// { dg-additional-options "-std=c++14 -fcoroutines" }
// { dg-skip-if "requires hosted libstdc++ for vector in ramp-return.h" { ! hostedlib } }
#include "ramp-return.h"
diff --git a/gcc/testsuite/g++.dg/coroutines/ramp-return-c.C b/gcc/testsuite/g++.dg/coroutines/ramp-return-c.C
index 0992924..d5ea3f9 100644
--- a/gcc/testsuite/g++.dg/coroutines/ramp-return-c.C
+++ b/gcc/testsuite/g++.dg/coroutines/ramp-return-c.C
@@ -1,4 +1,4 @@
-// { dg-additional-options "-std=c++17" }
+// { dg-additional-options "-std=c++17 -fcoroutines" }
// { dg-skip-if "requires hosted libstdc++ for vector in ramp-return.h" { ! hostedlib } }
#define DELETE_COPY_CTOR 1
#include "ramp-return.h"
diff --git a/gcc/testsuite/g++.dg/modules/modules.exp b/gcc/testsuite/g++.dg/modules/modules.exp
index 81d0beb..73b5de1 100644
--- a/gcc/testsuite/g++.dg/modules/modules.exp
+++ b/gcc/testsuite/g++.dg/modules/modules.exp
@@ -36,7 +36,6 @@ if ![info exists DEFAULT_CXXFLAGS] then {
set DEFAULT_CXXFLAGS " -pedantic-errors -Wno-long-long"
}
set DEFAULT_MODFLAGS $DEFAULT_CXXFLAGS
-set MOD_STD_LIST { 17 2a 2b }
dg-init
@@ -261,44 +260,16 @@ proc srcdir {} {
return $testdir
}
-# Return set of std options to iterate over, taken from g++-dg.exp & compat.exp
+# Return set of std options to iterate over.
proc module-init { src } {
- set tmp [dg-get-options $src]
- set option_list {}
- set have_std 0
- set std_prefix "-std=c++"
+ set option_list [g++-std-flags $src]
global extra_tool_flags
set extra_tool_flags {}
- global MOD_STD_LIST
-
- foreach op $tmp {
- switch [lindex $op 0] {
- "dg-options" {
- set std_prefix "-std=gnu++"
- if { [string match "*-std=*" [lindex $op 2]] } {
- set have_std 1
- }
- eval lappend extra_tool_flags [lindex $op 2]
- }
- "dg-additional-options" {
- if { [string match "*-std=*" [lindex $op 2]] } {
- set have_std 1
- }
- eval lappend extra_tool_flags [lindex $op 2]
- }
- }
- }
- if { $have_std } {
- lappend option_list ""
- } elseif { [string match "*xtreme*" $src] } {
+ if { [llength $option_list]
+ && [string match "*xtreme*" $src] } {
# Only run the xtreme tests once.
- set x [lindex $MOD_STD_LIST end]
- lappend option_list "${std_prefix}$x"
- } else {
- foreach x $MOD_STD_LIST {
- lappend option_list "${std_prefix}$x"
- }
+ set option_list [lrange [lsort $option_list] end end]
}
return $option_list
diff --git a/gcc/testsuite/g++.dg/template/unify13.C b/gcc/testsuite/g++.dg/template/unify13.C
new file mode 100644
index 0000000..ec7ca9d
--- /dev/null
+++ b/gcc/testsuite/g++.dg/template/unify13.C
@@ -0,0 +1,18 @@
+// PR c++/120161
+
+template<class T, class U>
+struct mp_list { };
+
+template<class T>
+struct Wrap { struct type { }; };
+
+struct A : mp_list<Wrap<int>::type, void>
+ , mp_list<Wrap<long>::type, void> { };
+
+template<class U>
+void f(mp_list<Wrap<int>::type, U>*);
+
+int main() {
+ A a;
+ f(&a);
+}
diff --git a/gcc/testsuite/gcc.dg/pr116546.c b/gcc/testsuite/gcc.dg/pr116546.c
new file mode 100644
index 0000000..b82dc27
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/pr116546.c
@@ -0,0 +1,46 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -fdump-tree-evrp" } */
+
+extern long foo (void);
+extern long bar (void);
+
+long
+test1 (long n)
+{
+ n &= 7;
+ if (n == 4) {
+ if (n & 4)
+ return foo ();
+ else
+ return bar ();
+ }
+ return 0;
+}
+
+long
+test2 (long n)
+{
+ n &= 7;
+ if (n > 4) {
+ if (n & 4)
+ return foo ();
+ else
+ return bar ();
+ }
+ return 0;
+}
+
+long
+test3 (long n)
+{
+ n &= 7;
+ if (n >= 4) {
+ if (n & 4)
+ return foo ();
+ else
+ return bar ();
+ }
+ return 0;
+}
+
+/* { dg-final { scan-tree-dump-not "bar" "evrp" } } */
diff --git a/gcc/testsuite/gcc.dg/pr120277.c b/gcc/testsuite/gcc.dg/pr120277.c
new file mode 100644
index 0000000..f291e92
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/pr120277.c
@@ -0,0 +1,21 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+int a, b;
+int c(int d, long e) {
+ switch (d) {
+ case 129:
+ a = 1;
+ case 128:
+ break;
+ default:
+ return 1;
+ }
+ *(int *)e = 0;
+}
+void f(int d, long e) { c(d, e); }
+void g() {
+ int h = b * sizeof(int);
+ f(h + 7, h);
+}
+void main() {}
diff --git a/gcc/testsuite/gcc.target/riscv/pr120223.c b/gcc/testsuite/gcc.target/riscv/pr120223.c
new file mode 100644
index 0000000..fae21b6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/pr120223.c
@@ -0,0 +1,4 @@
+/* { dg-do compile } */
+/* { dg-options "-mcpu=thead-c906" } */
+long foo(long x) { return x ^ 0x80000000; }
+
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i16.c
index 6de21a8..c6b25f1 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i16.c
@@ -3,6 +3,8 @@
#include "vx_binary.h"
-DEF_VX_BINARY_CASE_0(int16_t, +)
+DEF_VX_BINARY_CASE_0(int16_t, +, add)
+DEF_VX_BINARY_CASE_0(int16_t, -, sub)
/* { dg-final { scan-assembler-times {vadd.vx} 1 } } */
+/* { dg-final { scan-assembler-times {vsub.vx} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-i32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i32.c
index f46be7a..cb4ccfa 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i32.c
@@ -3,6 +3,8 @@
#include "vx_binary.h"
-DEF_VX_BINARY_CASE_0(int32_t, +)
+DEF_VX_BINARY_CASE_0(int32_t, +, add)
+DEF_VX_BINARY_CASE_0(int32_t, -, sub)
/* { dg-final { scan-assembler-times {vadd.vx} 1 } } */
+/* { dg-final { scan-assembler-times {vsub.vx} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-i64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i64.c
index 2b57b28..bf24984 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-i64.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i64.c
@@ -3,6 +3,8 @@
#include "vx_binary.h"
-DEF_VX_BINARY_CASE_0(int64_t, +)
+DEF_VX_BINARY_CASE_0(int64_t, +, add)
+DEF_VX_BINARY_CASE_0(int64_t, -, sub)
/* { dg-final { scan-assembler-times {vadd.vx} 1 } } */
+/* { dg-final { scan-assembler-times {vsub.vx} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i8.c
index e139284..e830c75 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i8.c
@@ -3,6 +3,8 @@
#include "vx_binary.h"
-DEF_VX_BINARY_CASE_0(int8_t, +)
+DEF_VX_BINARY_CASE_0(int8_t, +, add)
+DEF_VX_BINARY_CASE_0(int8_t, -, sub)
/* { dg-final { scan-assembler-times {vadd.vx} 1 } } */
+/* { dg-final { scan-assembler-times {vsub.vx} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u16.c
new file mode 100644
index 0000000..f08305e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u16.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d --param=gpr2vr-cost=0" } */
+
+#include "vx_binary.h"
+
+DEF_VX_BINARY_CASE_0(uint16_t, +, add)
+DEF_VX_BINARY_CASE_0(uint16_t, -, sub)
+
+/* { dg-final { scan-assembler-times {vadd.vx} 1 } } */
+/* { dg-final { scan-assembler-times {vsub.vx} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u32.c
new file mode 100644
index 0000000..1a7ae1f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u32.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d --param=gpr2vr-cost=0" } */
+
+#include "vx_binary.h"
+
+DEF_VX_BINARY_CASE_0(uint32_t, +, add)
+DEF_VX_BINARY_CASE_0(uint32_t, -, sub)
+
+/* { dg-final { scan-assembler-times {vadd.vx} 1 } } */
+/* { dg-final { scan-assembler-times {vsub.vx} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u64.c
new file mode 100644
index 0000000..d478caf
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u64.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d --param=gpr2vr-cost=0" } */
+
+#include "vx_binary.h"
+
+DEF_VX_BINARY_CASE_0(uint64_t, +, add)
+DEF_VX_BINARY_CASE_0(uint64_t, -, sub)
+
+/* { dg-final { scan-assembler-times {vadd.vx} 1 } } */
+/* { dg-final { scan-assembler-times {vsub.vx} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u8.c
new file mode 100644
index 0000000..aa3f5b7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u8.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d --param=gpr2vr-cost=0" } */
+
+#include "vx_binary.h"
+
+DEF_VX_BINARY_CASE_0(uint8_t, +, add)
+DEF_VX_BINARY_CASE_0(uint8_t, -, sub)
+
+/* { dg-final { scan-assembler-times {vadd.vx} 1 } } */
+/* { dg-final { scan-assembler-times {vsub.vx} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-i32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i16.c
index af3a40d..49e9957 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i16.c
@@ -3,6 +3,8 @@
#include "vx_binary.h"
-DEF_VX_BINARY_CASE_0(int32_t, +)
+DEF_VX_BINARY_CASE_0(int16_t, +, add)
+DEF_VX_BINARY_CASE_0(int16_t, -, sub)
/* { dg-final { scan-assembler-not {vadd.vx} } } */
+/* { dg-final { scan-assembler-not {vsub.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-i64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i32.c
index 5f7c51c..869f9fd 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-i64.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i32.c
@@ -3,6 +3,8 @@
#include "vx_binary.h"
-DEF_VX_BINARY_CASE_0(int64_t, +)
+DEF_VX_BINARY_CASE_0(int32_t, +, add)
+DEF_VX_BINARY_CASE_0(int32_t, -, sub)
/* { dg-final { scan-assembler-not {vadd.vx} } } */
+/* { dg-final { scan-assembler-not {vsub.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i64.c
index 420cf0e..6ba7143 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i64.c
@@ -3,6 +3,8 @@
#include "vx_binary.h"
-DEF_VX_BINARY_CASE_0(int8_t, +)
+DEF_VX_BINARY_CASE_0(int64_t, +, add)
+DEF_VX_BINARY_CASE_0(int64_t, -, sub)
/* { dg-final { scan-assembler-not {vadd.vx} } } */
+/* { dg-final { scan-assembler-not {vsub.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i8.c
index b40d0b8..128a279 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i8.c
@@ -3,6 +3,8 @@
#include "vx_binary.h"
-DEF_VX_BINARY_CASE_0(int16_t, +)
+DEF_VX_BINARY_CASE_0(int8_t, +, add)
+DEF_VX_BINARY_CASE_0(int8_t, -, sub)
/* { dg-final { scan-assembler-not {vadd.vx} } } */
+/* { dg-final { scan-assembler-not {vsub.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u16.c
new file mode 100644
index 0000000..a2a35cc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u16.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d --param=gpr2vr-cost=1" } */
+
+#include "vx_binary.h"
+
+DEF_VX_BINARY_CASE_0(uint16_t, +, add)
+DEF_VX_BINARY_CASE_0(uint16_t, -, sub)
+
+/* { dg-final { scan-assembler-not {vadd.vx} } } */
+/* { dg-final { scan-assembler-not {vsub.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u32.c
new file mode 100644
index 0000000..bd89bfa
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u32.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d --param=gpr2vr-cost=1" } */
+
+#include "vx_binary.h"
+
+DEF_VX_BINARY_CASE_0(uint32_t, +, add)
+DEF_VX_BINARY_CASE_0(uint32_t, -, sub)
+
+/* { dg-final { scan-assembler-not {vadd.vx} } } */
+/* { dg-final { scan-assembler-not {vsub.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u64.c
new file mode 100644
index 0000000..134efe8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u64.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d --param=gpr2vr-cost=1" } */
+
+#include "vx_binary.h"
+
+DEF_VX_BINARY_CASE_0(uint64_t, +, add)
+DEF_VX_BINARY_CASE_0(uint64_t, -, sub)
+
+/* { dg-final { scan-assembler-not {vadd.vx} } } */
+/* { dg-final { scan-assembler-not {vsub.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u8.c
new file mode 100644
index 0000000..b1c7c5d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u8.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d --param=gpr2vr-cost=1" } */
+
+#include "vx_binary.h"
+
+DEF_VX_BINARY_CASE_0(uint8_t, +, add)
+DEF_VX_BINARY_CASE_0(uint8_t, -, sub)
+
+/* { dg-final { scan-assembler-not {vadd.vx} } } */
+/* { dg-final { scan-assembler-not {vsub.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-i32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i16.c
index 1b47a59..aa21e10 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i16.c
@@ -3,6 +3,8 @@
#include "vx_binary.h"
-DEF_VX_BINARY_CASE_0(int32_t, +)
+DEF_VX_BINARY_CASE_0(int16_t, +, add)
+DEF_VX_BINARY_CASE_0(int16_t, -, sub)
/* { dg-final { scan-assembler-not {vadd.vx} } } */
+/* { dg-final { scan-assembler-not {vsub.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-i64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i32.c
index 92ab1e8..7c37469 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-i64.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i32.c
@@ -3,6 +3,8 @@
#include "vx_binary.h"
-DEF_VX_BINARY_CASE_0(int64_t, +)
+DEF_VX_BINARY_CASE_0(int32_t, +, add)
+DEF_VX_BINARY_CASE_0(int32_t, -, sub)
/* { dg-final { scan-assembler-not {vadd.vx} } } */
+/* { dg-final { scan-assembler-not {vsub.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i64.c
index 444707e..3efb0d7 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i64.c
@@ -3,6 +3,8 @@
#include "vx_binary.h"
-DEF_VX_BINARY_CASE_0(int8_t, +)
+DEF_VX_BINARY_CASE_0(int64_t, +, add)
+DEF_VX_BINARY_CASE_0(int64_t, -, sub)
/* { dg-final { scan-assembler-not {vadd.vx} } } */
+/* { dg-final { scan-assembler-not {vsub.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i8.c
index f766907..d823ed9 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i8.c
@@ -3,6 +3,8 @@
#include "vx_binary.h"
-DEF_VX_BINARY_CASE_0(int16_t, +)
+DEF_VX_BINARY_CASE_0(int8_t, +, add)
+DEF_VX_BINARY_CASE_0(int8_t, -, sub)
/* { dg-final { scan-assembler-not {vadd.vx} } } */
+/* { dg-final { scan-assembler-not {vsub.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u16.c
new file mode 100644
index 0000000..1ab09c8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u16.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d --param=gpr2vr-cost=15" } */
+
+#include "vx_binary.h"
+
+DEF_VX_BINARY_CASE_0(uint16_t, +, add)
+DEF_VX_BINARY_CASE_0(uint16_t, -, sub)
+
+/* { dg-final { scan-assembler-not {vadd.vx} } } */
+/* { dg-final { scan-assembler-not {vsub.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u32.c
new file mode 100644
index 0000000..9247db7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u32.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d --param=gpr2vr-cost=15" } */
+
+#include "vx_binary.h"
+
+DEF_VX_BINARY_CASE_0(uint32_t, +, add)
+DEF_VX_BINARY_CASE_0(uint32_t, -, sub)
+
+/* { dg-final { scan-assembler-not {vadd.vx} } } */
+/* { dg-final { scan-assembler-not {vsub.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u64.c
new file mode 100644
index 0000000..139996b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u64.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d --param=gpr2vr-cost=15" } */
+
+#include "vx_binary.h"
+
+DEF_VX_BINARY_CASE_0(uint64_t, +, add)
+DEF_VX_BINARY_CASE_0(uint64_t, -, sub)
+
+/* { dg-final { scan-assembler-not {vadd.vx} } } */
+/* { dg-final { scan-assembler-not {vsub.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u8.c
new file mode 100644
index 0000000..d439dc3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u8.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d --param=gpr2vr-cost=15" } */
+
+#include "vx_binary.h"
+
+DEF_VX_BINARY_CASE_0(uint8_t, +, add)
+DEF_VX_BINARY_CASE_0(uint8_t, -, sub)
+
+/* { dg-final { scan-assembler-not {vadd.vx} } } */
+/* { dg-final { scan-assembler-not {vsub.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i16.c
new file mode 100644
index 0000000..0ae0566
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i16.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv_zvl128b -mabi=lp64d --param=gpr2vr-cost=0" } */
+
+#include "vx_binary.h"
+
+DEF_VX_BINARY_CASE_1(int16_t, +, add, VX_BINARY_BODY_X16)
+DEF_VX_BINARY_CASE_1(int16_t, -, sub, VX_BINARY_BODY_X16)
+
+/* { dg-final { scan-assembler {vadd.vx} } } */
+/* { dg-final { scan-assembler {vsub.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-4-i64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i32.c
index 8ad6098..86085d1 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-4-i64.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i32.c
@@ -3,6 +3,8 @@
#include "vx_binary.h"
-DEF_VX_BINARY_CASE_1(int64_t, +, VX_BINARY_BODY)
+DEF_VX_BINARY_CASE_1(int32_t, +, add, VX_BINARY_BODY_X4)
+DEF_VX_BINARY_CASE_1(int32_t, -, sub, VX_BINARY_BODY_X4)
/* { dg-final { scan-assembler {vadd.vx} } } */
+/* { dg-final { scan-assembler {vsub.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-4-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i64.c
index 9a26601..9d89db3 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-4-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i64.c
@@ -3,6 +3,8 @@
#include "vx_binary.h"
-DEF_VX_BINARY_CASE_1(int16_t, +, VX_BINARY_BODY_X16)
+DEF_VX_BINARY_CASE_1(int64_t, +, add, VX_BINARY_BODY)
+DEF_VX_BINARY_CASE_1(int64_t, -, sub, VX_BINARY_BODY)
/* { dg-final { scan-assembler {vadd.vx} } } */
+/* { dg-final { scan-assembler {vsub.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-4-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i8.c
index 193e020..40b02db 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-4-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i8.c
@@ -3,6 +3,8 @@
#include "vx_binary.h"
-DEF_VX_BINARY_CASE_1(int8_t, +, VX_BINARY_BODY_X16)
+DEF_VX_BINARY_CASE_1(int8_t, +, add, VX_BINARY_BODY_X16)
+DEF_VX_BINARY_CASE_1(int8_t, -, sub, VX_BINARY_BODY_X16)
/* { dg-final { scan-assembler {vadd.vx} } } */
+/* { dg-final { scan-assembler {vsub.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u16.c
new file mode 100644
index 0000000..ca20106
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u16.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv_zvl128b -mabi=lp64d --param=gpr2vr-cost=0" } */
+
+#include "vx_binary.h"
+
+DEF_VX_BINARY_CASE_1(uint16_t, +, add, VX_BINARY_BODY_X16)
+DEF_VX_BINARY_CASE_1(uint16_t, -, sub, VX_BINARY_BODY_X16)
+
+/* { dg-final { scan-assembler {vadd.vx} } } */
+/* { dg-final { scan-assembler {vsub.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u32.c
new file mode 100644
index 0000000..6e2456c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u32.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv_zvl128b -mabi=lp64d --param=gpr2vr-cost=0" } */
+
+#include "vx_binary.h"
+
+DEF_VX_BINARY_CASE_1(uint32_t, +, add, VX_BINARY_BODY_X4)
+DEF_VX_BINARY_CASE_1(uint32_t, -, sub, VX_BINARY_BODY_X4)
+
+/* { dg-final { scan-assembler {vadd.vx} } } */
+/* { dg-final { scan-assembler {vsub.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-4-i32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u64.c
index 55b51fc..6e835d2 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-4-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u64.c
@@ -3,6 +3,8 @@
#include "vx_binary.h"
-DEF_VX_BINARY_CASE_1(int32_t, +, VX_BINARY_BODY_X4)
+DEF_VX_BINARY_CASE_1(uint64_t, +, add, VX_BINARY_BODY)
+DEF_VX_BINARY_CASE_1(uint64_t, -, sub, VX_BINARY_BODY)
/* { dg-final { scan-assembler {vadd.vx} } } */
+/* { dg-final { scan-assembler {vsub.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u8.c
new file mode 100644
index 0000000..fc6aa47
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u8.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv_zvl128b -mabi=lp64d --param=gpr2vr-cost=0" } */
+
+#include "vx_binary.h"
+
+DEF_VX_BINARY_CASE_1(uint8_t, +, add, VX_BINARY_BODY_X16)
+DEF_VX_BINARY_CASE_1(uint8_t, -, sub, VX_BINARY_BODY_X16)
+
+/* { dg-final { scan-assembler {vadd.vx} } } */
+/* { dg-final { scan-assembler {vsub.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-5-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i16.c
index e5ec888..05742671 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-5-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i16.c
@@ -3,6 +3,8 @@
#include "vx_binary.h"
-DEF_VX_BINARY_CASE_1(int16_t, +, VX_BINARY_BODY_X8)
+DEF_VX_BINARY_CASE_1(int16_t, +, add, VX_BINARY_BODY_X8)
+DEF_VX_BINARY_CASE_1(int16_t, -, sub, VX_BINARY_BODY_X8)
/* { dg-final { scan-assembler-not {vadd.vx} } } */
+/* { dg-final { scan-assembler {vsub.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-5-u16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i32.c
index 3d1ba7f..f990e34 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-5-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i32.c
@@ -3,6 +3,8 @@
#include "vx_binary.h"
-DEF_VX_BINARY_CASE_1(uint16_t, +, VX_BINARY_BODY_X8)
+DEF_VX_BINARY_CASE_1(int32_t, +, add, VX_BINARY_BODY_X4)
+DEF_VX_BINARY_CASE_1(int32_t, -, sub, VX_BINARY_BODY_X4)
/* { dg-final { scan-assembler {vadd.vx} } } */
+/* { dg-final { scan-assembler {vsub.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-5-i32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i64.c
index ed6c22d..3b189e3 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-5-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i64.c
@@ -3,6 +3,8 @@
#include "vx_binary.h"
-DEF_VX_BINARY_CASE_1(int32_t, +, VX_BINARY_BODY_X4)
+DEF_VX_BINARY_CASE_1(int64_t, +, add, VX_BINARY_BODY)
+DEF_VX_BINARY_CASE_1(int64_t, -, sub, VX_BINARY_BODY)
/* { dg-final { scan-assembler {vadd.vx} } } */
+/* { dg-final { scan-assembler {vsub.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-5-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i8.c
index d61f9df..3590b88 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-5-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i8.c
@@ -3,6 +3,8 @@
#include "vx_binary.h"
-DEF_VX_BINARY_CASE_1(int8_t, +, VX_BINARY_BODY_X16)
+DEF_VX_BINARY_CASE_1(int8_t, +, add, VX_BINARY_BODY_X16)
+DEF_VX_BINARY_CASE_1(int8_t, -, sub, VX_BINARY_BODY_X16)
/* { dg-final { scan-assembler-not {vadd.vx} } } */
+/* { dg-final { scan-assembler {vsub.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-5-u32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u16.c
index 2e9862b..994c7f2 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-5-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u16.c
@@ -3,6 +3,8 @@
#include "vx_binary.h"
-DEF_VX_BINARY_CASE_1(uint32_t, +, VX_BINARY_BODY_X4)
+DEF_VX_BINARY_CASE_1(uint16_t, +, add, VX_BINARY_BODY_X8)
+DEF_VX_BINARY_CASE_1(uint16_t, -, sub, VX_BINARY_BODY_X8)
/* { dg-final { scan-assembler {vadd.vx} } } */
+/* { dg-final { scan-assembler {vsub.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u32.c
new file mode 100644
index 0000000..2aceab5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u32.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv_zvl128b -mabi=lp64d --param=gpr2vr-cost=1" } */
+
+#include "vx_binary.h"
+
+DEF_VX_BINARY_CASE_1(uint32_t, +, add, VX_BINARY_BODY_X4)
+DEF_VX_BINARY_CASE_1(uint32_t, -, sub, VX_BINARY_BODY_X4)
+
+/* { dg-final { scan-assembler {vadd.vx} } } */
+/* { dg-final { scan-assembler {vsub.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-5-i64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u64.c
index ef44012..1414d85 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-5-i64.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u64.c
@@ -3,6 +3,8 @@
#include "vx_binary.h"
-DEF_VX_BINARY_CASE_1(int64_t, +, VX_BINARY_BODY)
+DEF_VX_BINARY_CASE_1(uint64_t, +, add, VX_BINARY_BODY)
+DEF_VX_BINARY_CASE_1(uint64_t, -, sub, VX_BINARY_BODY)
/* { dg-final { scan-assembler {vadd.vx} } } */
+/* { dg-final { scan-assembler {vsub.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u8.c
new file mode 100644
index 0000000..299f2da
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u8.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv_zvl128b -mabi=lp64d --param=gpr2vr-cost=1" } */
+
+#include "vx_binary.h"
+
+DEF_VX_BINARY_CASE_1(uint8_t, +, add, VX_BINARY_BODY_X16)
+DEF_VX_BINARY_CASE_1(uint8_t, -, sub, VX_BINARY_BODY_X16)
+
+/* { dg-final { scan-assembler {vadd.vx} } } */
+/* { dg-final { scan-assembler {vsub.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-6-u64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i16.c
index 8094a2c..0e5ad32 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-6-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i16.c
@@ -3,6 +3,8 @@
#include "vx_binary.h"
-DEF_VX_BINARY_CASE_1(uint64_t, +, VX_BINARY_BODY)
+DEF_VX_BINARY_CASE_1(int16_t, +, add, VX_BINARY_BODY_X8)
+DEF_VX_BINARY_CASE_1(int16_t, -, sub, VX_BINARY_BODY_X8)
/* { dg-final { scan-assembler-not {vadd.vx} } } */
+/* { dg-final { scan-assembler {vsub.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-6-i32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i32.c
index 99f6614..b46b74a 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-6-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i32.c
@@ -3,6 +3,8 @@
#include "vx_binary.h"
-DEF_VX_BINARY_CASE_1(int32_t, +, VX_BINARY_BODY_X4)
+DEF_VX_BINARY_CASE_1(int32_t, +, add, VX_BINARY_BODY_X4)
+DEF_VX_BINARY_CASE_1(int32_t, -, sub, VX_BINARY_BODY_X4)
/* { dg-final { scan-assembler {vadd.vx} } } */
+/* { dg-final { scan-assembler {vsub.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-6-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i64.c
index 7ead9d0..13e64d7 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-6-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i64.c
@@ -3,6 +3,8 @@
#include "vx_binary.h"
-DEF_VX_BINARY_CASE_1(int8_t, +, VX_BINARY_BODY_X16)
+DEF_VX_BINARY_CASE_1(int64_t, +, add, VX_BINARY_BODY)
+DEF_VX_BINARY_CASE_1(int64_t, -, sub, VX_BINARY_BODY)
/* { dg-final { scan-assembler-not {vadd.vx} } } */
+/* { dg-final { scan-assembler-not {vsub.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-6-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i8.c
index d80f0c0..1f58daa 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-6-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i8.c
@@ -3,6 +3,8 @@
#include "vx_binary.h"
-DEF_VX_BINARY_CASE_1(int16_t, +, VX_BINARY_BODY_X8)
+DEF_VX_BINARY_CASE_1(int8_t, +, add, VX_BINARY_BODY_X16)
+DEF_VX_BINARY_CASE_1(int8_t, -, sub, VX_BINARY_BODY_X16)
/* { dg-final { scan-assembler-not {vadd.vx} } } */
+/* { dg-final { scan-assembler {vsub.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-6-u16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u16.c
index 79b754b..2249cb2 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-6-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u16.c
@@ -4,6 +4,8 @@
#include "vx_binary.h"
-DEF_VX_BINARY_CASE_1(uint16_t, +, VX_BINARY_BODY_X8)
+DEF_VX_BINARY_CASE_1(uint16_t, +, add, VX_BINARY_BODY_X8)
+DEF_VX_BINARY_CASE_1(uint16_t, -, sub, VX_BINARY_BODY_X8)
/* { dg-final { scan-assembler {vadd.vx} } } */
+/* { dg-final { scan-assembler {vsub.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-6-u32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u32.c
index 2f70dcd..d768fc7 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-6-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u32.c
@@ -3,6 +3,8 @@
#include "vx_binary.h"
-DEF_VX_BINARY_CASE_1(uint32_t, +, VX_BINARY_BODY_X4)
+DEF_VX_BINARY_CASE_1(uint32_t, +, add, VX_BINARY_BODY_X4)
+DEF_VX_BINARY_CASE_1(uint32_t, -, sub, VX_BINARY_BODY_X4)
/* { dg-final { scan-assembler {vadd.vx} } } */
+/* { dg-final { scan-assembler {vsub.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-6-i64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u64.c
index ab06c51..b622640 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-6-i64.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u64.c
@@ -3,6 +3,8 @@
#include "vx_binary.h"
-DEF_VX_BINARY_CASE_1(int64_t, +, VX_BINARY_BODY)
+DEF_VX_BINARY_CASE_1(uint64_t, +, add, VX_BINARY_BODY)
+DEF_VX_BINARY_CASE_1(uint64_t, -, sub, VX_BINARY_BODY)
/* { dg-final { scan-assembler-not {vadd.vx} } } */
+/* { dg-final { scan-assembler-not {vsub.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-6-u8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u8.c
index 56d040b..6b3e6d6 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-6-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u8.c
@@ -3,6 +3,8 @@
#include "vx_binary.h"
-DEF_VX_BINARY_CASE_1(uint8_t, +, VX_BINARY_BODY_X16)
+DEF_VX_BINARY_CASE_1(uint8_t, +, add, VX_BINARY_BODY_X16)
+DEF_VX_BINARY_CASE_1(uint8_t, -, sub, VX_BINARY_BODY_X16)
/* { dg-final { scan-assembler {vadd.vx} } } */
+/* { dg-final { scan-assembler {vsub.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary.h
index db802bd..f462109 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary.h
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary.h
@@ -3,16 +3,20 @@
#include <stdint.h>
-#define DEF_VX_BINARY_CASE_0(T, OP) \
-void \
-test_vx_binary_case_0 (T * restrict out, T * restrict in, T x, unsigned n) \
-{ \
- for (unsigned i = 0; i < n; i++) \
- out[i] = in[i] OP x; \
+#define DEF_VX_BINARY_CASE_0(T, OP, NAME) \
+void \
+test_vx_binary_##NAME##_##T##_case_0 (T * restrict out, T * restrict in, \
+ T x, unsigned n) \
+{ \
+ for (unsigned i = 0; i < n; i++) \
+ out[i] = in[i] OP x; \
}
-#define DEF_VX_BINARY_CASE_0_WRAP(T, OP) DEF_VX_BINARY_CASE_0(T, OP)
-#define RUN_VX_BINARY_CASE_0(out, in, x, n) test_vx_binary_case_0(out, in, x, n)
-#define RUN_VX_BINARY_CASE_0_WRAP(out, in, x, n) RUN_VX_BINARY_CASE_0(out, in, x, n)
+#define DEF_VX_BINARY_CASE_0_WRAP(T, OP, NAME) \
+ DEF_VX_BINARY_CASE_0(T, OP, NAME)
+#define RUN_VX_BINARY_CASE_0(T, NAME, out, in, x, n) \
+ test_vx_binary_##NAME##_##T##_case_0(out, in, x, n)
+#define RUN_VX_BINARY_CASE_0_WRAP(T, NAME, out, in, x, n) \
+ RUN_VX_BINARY_CASE_0(T, NAME, out, in, x, n)
#define VX_BINARY_BODY(op) \
out[k + 0] = in[k + 0] op tmp; \
@@ -43,19 +47,21 @@ test_vx_binary_case_0 (T * restrict out, T * restrict in, T x, unsigned n) \
VX_BINARY_BODY_X64(op) \
VX_BINARY_BODY_X64(op)
-#define DEF_VX_BINARY_CASE_1(T, OP, BODY) \
-void \
-test_vx_binary_case_1 (T * restrict out, T * restrict in, T x, unsigned n) \
-{ \
- unsigned k = 0; \
- T tmp = x + 3; \
- \
- while (k < n) \
- { \
- tmp = tmp ^ 0x3f; \
- BODY(OP) \
- } \
+#define DEF_VX_BINARY_CASE_1(T, OP, NAME, BODY) \
+void \
+test_vx_binary_##NAME##_##T##_case_1 (T * restrict out, T * restrict in, \
+ T x, unsigned n) \
+{ \
+ unsigned k = 0; \
+ T tmp = x + 3; \
+ \
+ while (k < n) \
+ { \
+ tmp = tmp ^ 0x3f; \
+ BODY(OP) \
+ } \
}
-#define DEF_VX_BINARY_CASE_1_WRAP(T, OP, BODY) DEF_VX_BINARY_CASE_1(T, OP, BODY)
+#define DEF_VX_BINARY_CASE_1_WRAP(T, OP, NAME, BODY) \
+ DEF_VX_BINARY_CASE_1(T, OP, NAME, BODY)
#endif
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary_data.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary_data.h
index 11a32cb..7e68db9 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary_data.h
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary_data.h
@@ -6,7 +6,7 @@
#define TEST_BINARY_DATA(T, NAME) test_##T##_##NAME##_data
#define TEST_BINARY_DATA_WRAP(T, NAME) TEST_BINARY_DATA(T, NAME)
-int8_t TEST_BINARY_DATA(int8_t, vadd)[][3][N] =
+int8_t TEST_BINARY_DATA(int8_t, add)[][3][N] =
{
{
{ 1 },
@@ -55,7 +55,7 @@ int8_t TEST_BINARY_DATA(int8_t, vadd)[][3][N] =
},
};
-int16_t TEST_BINARY_DATA(int16_t, vadd)[][3][N] =
+int16_t TEST_BINARY_DATA(int16_t, add)[][3][N] =
{
{
{ 1 },
@@ -104,7 +104,7 @@ int16_t TEST_BINARY_DATA(int16_t, vadd)[][3][N] =
},
};
-int32_t TEST_BINARY_DATA(int32_t, vadd)[][3][N] =
+int32_t TEST_BINARY_DATA(int32_t, add)[][3][N] =
{
{
{ 1 },
@@ -153,7 +153,7 @@ int32_t TEST_BINARY_DATA(int32_t, vadd)[][3][N] =
},
};
-int64_t TEST_BINARY_DATA(int64_t, vadd)[][3][N] =
+int64_t TEST_BINARY_DATA(int64_t, add)[][3][N] =
{
{
{ 1 },
@@ -202,7 +202,7 @@ int64_t TEST_BINARY_DATA(int64_t, vadd)[][3][N] =
},
};
-uint8_t TEST_BINARY_DATA(uint8_t, vadd)[][3][N] =
+uint8_t TEST_BINARY_DATA(uint8_t, add)[][3][N] =
{
{
{ 1 },
@@ -251,7 +251,7 @@ uint8_t TEST_BINARY_DATA(uint8_t, vadd)[][3][N] =
},
};
-uint16_t TEST_BINARY_DATA(uint16_t, vadd)[][3][N] =
+uint16_t TEST_BINARY_DATA(uint16_t, add)[][3][N] =
{
{
{ 1 },
@@ -300,7 +300,7 @@ uint16_t TEST_BINARY_DATA(uint16_t, vadd)[][3][N] =
},
};
-uint32_t TEST_BINARY_DATA(uint32_t, vadd)[][3][N] =
+uint32_t TEST_BINARY_DATA(uint32_t, add)[][3][N] =
{
{
{ 1 },
@@ -349,7 +349,7 @@ uint32_t TEST_BINARY_DATA(uint32_t, vadd)[][3][N] =
},
};
-uint64_t TEST_BINARY_DATA(uint64_t, vadd)[][3][N] =
+uint64_t TEST_BINARY_DATA(uint64_t, add)[][3][N] =
{
{
{ 1 },
@@ -398,4 +398,396 @@ uint64_t TEST_BINARY_DATA(uint64_t, vadd)[][3][N] =
},
};
+int8_t TEST_BINARY_DATA(int8_t, sub)[][3][N] =
+{
+ {
+ { 1 },
+ {
+ 1, 1, 1, 1,
+ 2, 2, 2, 2,
+ 0, 0, 0, 0,
+ -1, -1, -1, -1,
+ },
+ {
+ 0, 0, 0, 0,
+ 1, 1, 1, 1,
+ -1, -1, -1, -1,
+ -2, -2, -2, -2,
+ },
+ },
+ {
+ { 127 },
+ {
+ 127, 127, 127, 127,
+ 126, 126, 126, 126,
+ -1, -1, -1, -1,
+ 125, 125, 125, 125,
+ },
+ {
+ 0, 0, 0, 0,
+ -1, -1, -1, -1,
+ -128, -128, -128, -128,
+ -2, -2, -2, -2,
+ },
+ },
+ {
+ { -128 },
+ {
+ -128, -128, -128, -128,
+ -127, -127, -127, -127,
+ -1, -1, -1, -1,
+ -126, -126, -126, -126,
+ },
+ {
+ 0, 0, 0, 0,
+ 1, 1, 1, 1,
+ 127, 127, 127, 127,
+ 2, 2, 2, 2,
+ },
+ },
+};
+
+int16_t TEST_BINARY_DATA(int16_t, sub)[][3][N] =
+{
+ {
+ { 1 },
+ {
+ 1, 1, 1, 1,
+ 2, 2, 2, 2,
+ 0, 0, 0, 0,
+ -1, -1, -1, -1,
+ },
+ {
+ 0, 0, 0, 0,
+ 1, 1, 1, 1,
+ -1, -1, -1, -1,
+ -2, -2, -2, -2,
+ },
+ },
+ {
+ { 32767 },
+ {
+ 32767, 32767, 32767, 32767,
+ 32766, 32766, 32766, 32766,
+ -1, -1, -1, -1,
+ 32765, 32765, 32765, 32765,
+ },
+ {
+ 0, 0, 0, 0,
+ -1, -1, -1, -1,
+ -32768, -32768, -32768, -32768,
+ -2, -2, -2, -2,
+ },
+ },
+ {
+ { -32768 },
+ {
+ -32768, -32768, -32768, -32768,
+ -32767, -32767, -32767, -32767,
+ -1, -1, -1, -1,
+ -32766, -32766, -32766, -32766,
+ },
+ {
+ 0, 0, 0, 0,
+ 1, 1, 1, 1,
+ 32767, 32767, 32767, 32767,
+ 2, 2, 2, 2,
+ },
+ },
+};
+
+int32_t TEST_BINARY_DATA(int32_t, sub)[][3][N] =
+{
+ {
+ { 1 },
+ {
+ 1, 1, 1, 1,
+ 2, 2, 2, 2,
+ 0, 0, 0, 0,
+ -1, -1, -1, -1,
+ },
+ {
+ 0, 0, 0, 0,
+ 1, 1, 1, 1,
+ -1, -1, -1, -1,
+ -2, -2, -2, -2,
+ },
+ },
+ {
+ { 2147483647 },
+ {
+ 2147483647, 2147483647, 2147483647, 2147483647,
+ 2147483646, 2147483646, 2147483646, 2147483646,
+ -1, -1, -1, -1,
+ 2147483645, 2147483645, 2147483645, 2147483645,
+ },
+ {
+ 0, 0, 0, 0,
+ -1, -1, -1, -1,
+ -2147483648, -2147483648, -2147483648, -2147483648,
+ -2, -2, -2, -2,
+ },
+ },
+ {
+ { -2147483648 },
+ {
+ -2147483648, -2147483648, -2147483648, -2147483648,
+ -2147483647, -2147483647, -2147483647, -2147483647,
+ -1, -1, -1, -1,
+ -2147483646, -2147483646, -2147483646, -2147483646,
+ },
+ {
+ 0, 0, 0, 0,
+ 1, 1, 1, 1,
+ 2147483647, 2147483647, 2147483647, 2147483647,
+ 2, 2, 2, 2,
+ },
+ },
+};
+
+int64_t TEST_BINARY_DATA(int64_t, sub)[][3][N] =
+{
+ {
+ { 1 },
+ {
+ 1, 1, 1, 1,
+ 2, 2, 2, 2,
+ 0, 0, 0, 0,
+ -1, -1, -1, -1,
+ },
+ {
+ 0, 0, 0, 0,
+ 1, 1, 1, 1,
+ -1, -1, -1, -1,
+ -2, -2, -2, -2,
+ },
+ },
+ {
+ { 9223372036854775807ll },
+ {
+ 9223372036854775807ll, 9223372036854775807ll, 9223372036854775807ll, 9223372036854775807ll,
+ 9223372036854775806ll, 9223372036854775806ll, 9223372036854775806ll, 9223372036854775806ll,
+ -1, -1, -1, -1,
+ 9223372036854775805ll, 9223372036854775805ll, 9223372036854775805ll, 9223372036854775805ll,
+ },
+ {
+ 0, 0, 0, 0,
+ -1, -1, -1, -1,
+ -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull,
+ -2, -2, -2, -2,
+ },
+ },
+ {
+ { -9223372036854775808ull },
+ {
+ -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull,
+ -9223372036854775807ll, -9223372036854775807ll, -9223372036854775807ll, -9223372036854775807ll,
+ -1, -1, -1, -1,
+ -9223372036854775806ll, -9223372036854775806ll, -9223372036854775806ll, -9223372036854775806ll,
+ },
+ {
+ 0, 0, 0, 0,
+ 1, 1, 1, 1,
+ 9223372036854775807ll, 9223372036854775807ll, 9223372036854775807ll, 9223372036854775807ll,
+ 2, 2, 2, 2,
+ },
+ },
+};
+
+uint8_t TEST_BINARY_DATA(uint8_t, sub)[][3][N] =
+{
+ {
+ { 1 },
+ {
+ 1, 1, 1, 1,
+ 2, 2, 2, 2,
+ 12, 12, 12, 12,
+ 10, 10, 10, 10,
+ },
+ {
+ 0, 0, 0, 0,
+ 1, 1, 1, 1,
+ 11, 11, 11, 11,
+ 9, 9, 9, 9,
+ },
+ },
+ {
+ { 127 },
+ {
+ 127, 127, 127, 127,
+ 128, 128, 128, 128,
+ 254, 254, 254, 254,
+ 255, 255, 255, 255,
+ },
+ {
+ 0, 0, 0, 0,
+ 1, 1, 1, 1,
+ 127, 127, 127, 127,
+ 128, 128, 128, 128,
+ },
+ },
+ {
+ { 253 },
+ {
+ 253, 253, 253, 253,
+ 254, 254, 254, 254,
+ 255, 255, 255, 255,
+ 252, 252, 252, 252,
+ },
+ {
+ 0, 0, 0, 0,
+ 1, 1, 1, 1,
+ 2, 2, 2, 2,
+ 255, 255, 255, 255,
+ },
+ },
+};
+
+uint16_t TEST_BINARY_DATA(uint16_t, sub)[][3][N] =
+{
+ {
+ { 1 },
+ {
+ 1, 1, 1, 1,
+ 2, 2, 2, 2,
+ 12, 12, 12, 12,
+ 10, 10, 10, 10,
+ },
+ {
+ 0, 0, 0, 0,
+ 1, 1, 1, 1,
+ 11, 11, 11, 11,
+ 9, 9, 9, 9,
+ },
+ },
+ {
+ { 32767 },
+ {
+ 32767, 32767, 32767, 32767,
+ 32768, 32768, 32768, 32768,
+ 65534, 65534, 65534, 65534,
+ 65535, 65535, 65535, 65535,
+ },
+ {
+ 0, 0, 0, 0,
+ 1, 1, 1, 1,
+ 32767, 32767, 32767, 32767,
+ 32768, 32768, 32768, 32768,
+ },
+ },
+ {
+ { 65533 },
+ {
+ 65533, 65533, 65533, 65533,
+ 65534, 65534, 65534, 65534,
+ 65535, 65535, 65535, 65535,
+ 65532, 65532, 65532, 65532,
+ },
+ {
+ 0, 0, 0, 0,
+ 1, 1, 1, 1,
+ 2, 2, 2, 2,
+ 65535, 65535, 65535, 65535,
+ },
+ },
+};
+
+uint32_t TEST_BINARY_DATA(uint32_t, sub)[][3][N] =
+{
+ {
+ { 1 },
+ {
+ 1, 1, 1, 1,
+ 2, 2, 2, 2,
+ 12, 12, 12, 12,
+ 10, 10, 10, 10,
+ },
+ {
+ 0, 0, 0, 0,
+ 1, 1, 1, 1,
+ 11, 11, 11, 11,
+ 9, 9, 9, 9,
+ },
+ },
+ {
+ { 2147483647 },
+ {
+ 2147483647, 2147483647, 2147483647, 2147483647,
+ 2147483648, 2147483648, 2147483648, 2147483648,
+ 4294967294, 4294967294, 4294967294, 4294967294,
+ 4294967295, 4294967295, 4294967295, 4294967295,
+ },
+ {
+ 0, 0, 0, 0,
+ 1, 1, 1, 1,
+ 2147483647, 2147483647, 2147483647, 2147483647,
+ 2147483648, 2147483648, 2147483648, 2147483648,
+ },
+ },
+ {
+ { 4294967293 },
+ {
+ 4294967293, 4294967293, 4294967293, 4294967293,
+ 4294967294, 4294967294, 4294967294, 4294967294,
+ 4294967295, 4294967295, 4294967295, 4294967295,
+ 4294967292, 4294967292, 4294967292, 4294967292,
+ },
+ {
+ 0, 0, 0, 0,
+ 1, 1, 1, 1,
+ 2, 2, 2, 2,
+ 4294967295, 4294967295, 4294967295, 4294967295,
+ },
+ },
+};
+
+uint64_t TEST_BINARY_DATA(uint64_t, sub)[][3][N] =
+{
+ {
+ { 1 },
+ {
+ 1, 1, 1, 1,
+ 2, 2, 2, 2,
+ 12, 12, 12, 12,
+ 10, 10, 10, 10,
+ },
+ {
+ 0, 0, 0, 0,
+ 1, 1, 1, 1,
+ 11, 11, 11, 11,
+ 9, 9, 9, 9,
+ },
+ },
+ {
+ { 9223372036854775807ull },
+ {
+ 9223372036854775807ull, 9223372036854775807ull, 9223372036854775807ull, 9223372036854775807ull,
+ 9223372036854775808ull, 9223372036854775808ull, 9223372036854775808ull, 9223372036854775808ull,
+ 18446744073709551614ull, 18446744073709551614ull, 18446744073709551614ull, 18446744073709551614ull,
+ 18446744073709551615ull, 18446744073709551615ull, 18446744073709551615ull, 18446744073709551615ull,
+ },
+ {
+ 0, 0, 0, 0,
+ 1, 1, 1, 1,
+ 9223372036854775807ull, 9223372036854775807ull, 9223372036854775807ull, 9223372036854775807ull,
+ 9223372036854775808ull, 9223372036854775808ull, 9223372036854775808ull, 9223372036854775808ull,
+ },
+ },
+ {
+ { 18446744073709551613ull },
+ {
+ 18446744073709551613ull, 18446744073709551613ull, 18446744073709551613ull, 18446744073709551613ull,
+ 18446744073709551614ull, 18446744073709551614ull, 18446744073709551614ull, 18446744073709551614ull,
+ 18446744073709551615ull, 18446744073709551615ull, 18446744073709551615ull, 18446744073709551615ull,
+ 18446744073709551612ull, 18446744073709551612ull, 18446744073709551612ull, 18446744073709551612ull,
+ },
+ {
+ 0, 0, 0, 0,
+ 1, 1, 1, 1,
+ 2, 2, 2, 2,
+ 18446744073709551615ull, 18446744073709551615ull, 18446744073709551615ull, 18446744073709551615ull,
+ },
+ },
+};
+
#endif
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary_run.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary_run.h
index bb35184..3c00dbb 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary_run.h
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary_run.h
@@ -13,7 +13,7 @@ main ()
T *in = TEST_DATA[i][1];
T *expect = TEST_DATA[i][2];
- TEST_RUN (out, in, x, N);
+ TEST_RUN (T, NAME, out, in, x, N);
for (k = 0; k < N; k++)
if (out[k] != expect[k])
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-u16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-u16.c
deleted file mode 100644
index 0266d44..0000000
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-u16.c
+++ /dev/null
@@ -1,8 +0,0 @@
-/* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d --param=gpr2vr-cost=0" } */
-
-#include "vx_binary.h"
-
-DEF_VX_BINARY_CASE_0(uint16_t, +)
-
-/* { dg-final { scan-assembler-times {vadd.vx} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-u32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-u32.c
deleted file mode 100644
index c541733..0000000
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-u32.c
+++ /dev/null
@@ -1,8 +0,0 @@
-/* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d --param=gpr2vr-cost=0" } */
-
-#include "vx_binary.h"
-
-DEF_VX_BINARY_CASE_0(uint32_t, +)
-
-/* { dg-final { scan-assembler-times {vadd.vx} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-u64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-u64.c
deleted file mode 100644
index e9e2162..0000000
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-u64.c
+++ /dev/null
@@ -1,8 +0,0 @@
-/* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d --param=gpr2vr-cost=0" } */
-
-#include "vx_binary.h"
-
-DEF_VX_BINARY_CASE_0(uint64_t, +)
-
-/* { dg-final { scan-assembler-times {vadd.vx} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-u8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-u8.c
deleted file mode 100644
index da71fff..0000000
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-u8.c
+++ /dev/null
@@ -1,8 +0,0 @@
-/* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d --param=gpr2vr-cost=0" } */
-
-#include "vx_binary.h"
-
-DEF_VX_BINARY_CASE_0(uint8_t, +)
-
-/* { dg-final { scan-assembler-times {vadd.vx} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-u16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-u16.c
deleted file mode 100644
index 7741d06..0000000
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-u16.c
+++ /dev/null
@@ -1,8 +0,0 @@
-/* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d --param=gpr2vr-cost=1" } */
-
-#include "vx_binary.h"
-
-DEF_VX_BINARY_CASE_0(uint16_t, +)
-
-/* { dg-final { scan-assembler-not {vadd.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-u32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-u32.c
deleted file mode 100644
index 10ff20e..0000000
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-u32.c
+++ /dev/null
@@ -1,8 +0,0 @@
-/* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d --param=gpr2vr-cost=1" } */
-
-#include "vx_binary.h"
-
-DEF_VX_BINARY_CASE_0(uint32_t, +)
-
-/* { dg-final { scan-assembler-not {vadd.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-u64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-u64.c
deleted file mode 100644
index fa5ab40..0000000
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-u64.c
+++ /dev/null
@@ -1,8 +0,0 @@
-/* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d --param=gpr2vr-cost=1" } */
-
-#include "vx_binary.h"
-
-DEF_VX_BINARY_CASE_0(uint64_t, +)
-
-/* { dg-final { scan-assembler-not {vadd.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-u8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-u8.c
deleted file mode 100644
index 0374e1f..0000000
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-u8.c
+++ /dev/null
@@ -1,8 +0,0 @@
-/* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d --param=gpr2vr-cost=1" } */
-
-#include "vx_binary.h"
-
-DEF_VX_BINARY_CASE_0(uint8_t, +)
-
-/* { dg-final { scan-assembler-not {vadd.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-u16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-u16.c
deleted file mode 100644
index e3fc112..0000000
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-u16.c
+++ /dev/null
@@ -1,8 +0,0 @@
-/* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d --param=gpr2vr-cost=15" } */
-
-#include "vx_binary.h"
-
-DEF_VX_BINARY_CASE_0(uint16_t, +)
-
-/* { dg-final { scan-assembler-not {vadd.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-u32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-u32.c
deleted file mode 100644
index f76971b..0000000
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-u32.c
+++ /dev/null
@@ -1,8 +0,0 @@
-/* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d --param=gpr2vr-cost=15" } */
-
-#include "vx_binary.h"
-
-DEF_VX_BINARY_CASE_0(uint32_t, +)
-
-/* { dg-final { scan-assembler-not {vadd.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-u64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-u64.c
deleted file mode 100644
index 09a4b42..0000000
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-u64.c
+++ /dev/null
@@ -1,8 +0,0 @@
-/* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d --param=gpr2vr-cost=15" } */
-
-#include "vx_binary.h"
-
-DEF_VX_BINARY_CASE_0(uint64_t, +)
-
-/* { dg-final { scan-assembler-not {vadd.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-u8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-u8.c
deleted file mode 100644
index 5a0679f..0000000
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-u8.c
+++ /dev/null
@@ -1,8 +0,0 @@
-/* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d --param=gpr2vr-cost=15" } */
-
-#include "vx_binary.h"
-
-DEF_VX_BINARY_CASE_0(uint8_t, +)
-
-/* { dg-final { scan-assembler-not {vadd.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-4-u16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-4-u16.c
deleted file mode 100644
index a093fca..0000000
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-4-u16.c
+++ /dev/null
@@ -1,8 +0,0 @@
-/* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvl128b -mabi=lp64d --param=gpr2vr-cost=0" } */
-
-#include "vx_binary.h"
-
-DEF_VX_BINARY_CASE_1(uint16_t, +, VX_BINARY_BODY_X16)
-
-/* { dg-final { scan-assembler {vadd.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-4-u32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-4-u32.c
deleted file mode 100644
index 9f5843b..0000000
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-4-u32.c
+++ /dev/null
@@ -1,8 +0,0 @@
-/* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvl128b -mabi=lp64d --param=gpr2vr-cost=0" } */
-
-#include "vx_binary.h"
-
-DEF_VX_BINARY_CASE_1(uint32_t, +, VX_BINARY_BODY_X4)
-
-/* { dg-final { scan-assembler {vadd.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-4-u64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-4-u64.c
deleted file mode 100644
index 0f00688..0000000
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-4-u64.c
+++ /dev/null
@@ -1,8 +0,0 @@
-/* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvl128b -mabi=lp64d --param=gpr2vr-cost=0" } */
-
-#include "vx_binary.h"
-
-DEF_VX_BINARY_CASE_1(uint64_t, +, VX_BINARY_BODY)
-
-/* { dg-final { scan-assembler {vadd.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-4-u8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-4-u8.c
deleted file mode 100644
index 47707e8..0000000
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-4-u8.c
+++ /dev/null
@@ -1,8 +0,0 @@
-/* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvl128b -mabi=lp64d --param=gpr2vr-cost=0" } */
-
-#include "vx_binary.h"
-
-DEF_VX_BINARY_CASE_1(uint8_t, +, VX_BINARY_BODY_X16)
-
-/* { dg-final { scan-assembler {vadd.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-5-u64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-5-u64.c
deleted file mode 100644
index 72e6786..0000000
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-5-u64.c
+++ /dev/null
@@ -1,8 +0,0 @@
-/* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvl128b -mabi=lp64d --param=gpr2vr-cost=1" } */
-
-#include "vx_binary.h"
-
-DEF_VX_BINARY_CASE_1(uint64_t, +, VX_BINARY_BODY)
-
-/* { dg-final { scan-assembler {vadd.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-5-u8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-5-u8.c
deleted file mode 100644
index e935be1..0000000
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-5-u8.c
+++ /dev/null
@@ -1,8 +0,0 @@
-/* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvl128b -mabi=lp64d --param=gpr2vr-cost=1" } */
-
-#include "vx_binary.h"
-
-DEF_VX_BINARY_CASE_1(uint8_t, +, VX_BINARY_BODY_X16)
-
-/* { dg-final { scan-assembler {vadd.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i16.c
index 306ad76..ac7bd2e 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i16.c
@@ -4,11 +4,12 @@
#include "vx_binary.h"
#include "vx_binary_data.h"
-#define T int16_t
+#define T int16_t
+#define NAME add
-DEF_VX_BINARY_CASE_0_WRAP(T, +)
+DEF_VX_BINARY_CASE_0_WRAP(T, +, NAME)
-#define TEST_DATA TEST_BINARY_DATA_WRAP(T, vadd)
-#define TEST_RUN(out, in, x, n) RUN_VX_BINARY_CASE_0_WRAP(out, in, x, n)
+#define TEST_DATA TEST_BINARY_DATA_WRAP(T, NAME)
+#define TEST_RUN(T, NAME, out, in, x, n) RUN_VX_BINARY_CASE_0_WRAP(T, NAME, out, in, x, n)
#include "vx_binary_run.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i32.c
index 6ccdf7a..1e8b78f 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i32.c
@@ -4,11 +4,12 @@
#include "vx_binary.h"
#include "vx_binary_data.h"
-#define T int32_t
+#define T int32_t
+#define NAME add
-DEF_VX_BINARY_CASE_0_WRAP(T, +)
+DEF_VX_BINARY_CASE_0_WRAP(T, +, NAME)
-#define TEST_DATA TEST_BINARY_DATA_WRAP(T, vadd)
-#define TEST_RUN(out, in, x, n) RUN_VX_BINARY_CASE_0_WRAP(out, in, x, n)
+#define TEST_DATA TEST_BINARY_DATA_WRAP(T, NAME)
+#define TEST_RUN(T, NAME, out, in, x, n) RUN_VX_BINARY_CASE_0_WRAP(T, NAME, out, in, x, n)
#include "vx_binary_run.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i64.c
index 9484aa8..e2e352e 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i64.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i64.c
@@ -4,11 +4,12 @@
#include "vx_binary.h"
#include "vx_binary_data.h"
-#define T int64_t
+#define T int64_t
+#define NAME add
-DEF_VX_BINARY_CASE_0_WRAP(T, +)
+DEF_VX_BINARY_CASE_0_WRAP(T, +, NAME)
-#define TEST_DATA TEST_BINARY_DATA_WRAP(T, vadd)
-#define TEST_RUN(out, in, x, n) RUN_VX_BINARY_CASE_0_WRAP(out, in, x, n)
+#define TEST_DATA TEST_BINARY_DATA_WRAP(T, NAME)
+#define TEST_RUN(T, NAME, out, in, x, n) RUN_VX_BINARY_CASE_0_WRAP(T, NAME, out, in, x, n)
#include "vx_binary_run.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i8.c
index aeb330e..8a197e5 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i8.c
@@ -4,11 +4,12 @@
#include "vx_binary.h"
#include "vx_binary_data.h"
-#define T int8_t
+#define T int8_t
+#define NAME add
-DEF_VX_BINARY_CASE_0_WRAP(T, +)
+DEF_VX_BINARY_CASE_0_WRAP(T, +, NAME)
-#define TEST_DATA TEST_BINARY_DATA_WRAP(T, vadd)
-#define TEST_RUN(out, in, x, n) RUN_VX_BINARY_CASE_0_WRAP(out, in, x, n)
+#define TEST_DATA TEST_BINARY_DATA_WRAP(T, NAME)
+#define TEST_RUN(T, NAME, out, in, x, n) RUN_VX_BINARY_CASE_0_WRAP(T, NAME, out, in, x, n)
#include "vx_binary_run.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u16.c
index dafaa29..b616f39 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u16.c
@@ -4,11 +4,12 @@
#include "vx_binary.h"
#include "vx_binary_data.h"
-#define T uint16_t
+#define T uint16_t
+#define NAME add
-DEF_VX_BINARY_CASE_0_WRAP(T, +)
+DEF_VX_BINARY_CASE_0_WRAP(T, +, NAME)
-#define TEST_DATA TEST_BINARY_DATA_WRAP(T, vadd)
-#define TEST_RUN(out, in, x, n) RUN_VX_BINARY_CASE_0_WRAP(out, in, x, n)
+#define TEST_DATA TEST_BINARY_DATA_WRAP(T, NAME)
+#define TEST_RUN(T, NAME, out, in, x, n) RUN_VX_BINARY_CASE_0_WRAP(T, NAME, out, in, x, n)
#include "vx_binary_run.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u32.c
index 6b285c8..bf0449c 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u32.c
@@ -4,11 +4,12 @@
#include "vx_binary.h"
#include "vx_binary_data.h"
-#define T uint32_t
+#define T uint32_t
+#define NAME add
-DEF_VX_BINARY_CASE_0_WRAP(T, +)
+DEF_VX_BINARY_CASE_0_WRAP(T, +, NAME)
-#define TEST_DATA TEST_BINARY_DATA_WRAP(T, vadd)
-#define TEST_RUN(out, in, x, n) RUN_VX_BINARY_CASE_0_WRAP(out, in, x, n)
+#define TEST_DATA TEST_BINARY_DATA_WRAP(T, NAME)
+#define TEST_RUN(T, NAME, out, in, x, n) RUN_VX_BINARY_CASE_0_WRAP(T, NAME, out, in, x, n)
#include "vx_binary_run.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u64.c
index eeee4e1..2611892 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u64.c
@@ -4,11 +4,12 @@
#include "vx_binary.h"
#include "vx_binary_data.h"
-#define T uint64_t
+#define T uint64_t
+#define NAME add
-DEF_VX_BINARY_CASE_0_WRAP(T, +)
+DEF_VX_BINARY_CASE_0_WRAP(T, +, NAME)
-#define TEST_DATA TEST_BINARY_DATA_WRAP(T, vadd)
-#define TEST_RUN(out, in, x, n) RUN_VX_BINARY_CASE_0_WRAP(out, in, x, n)
+#define TEST_DATA TEST_BINARY_DATA_WRAP(T, NAME)
+#define TEST_RUN(T, NAME, out, in, x, n) RUN_VX_BINARY_CASE_0_WRAP(T, NAME, out, in, x, n)
#include "vx_binary_run.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u8.c
index 22d7a0e..60cfe7b 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u8.c
@@ -4,11 +4,12 @@
#include "vx_binary.h"
#include "vx_binary_data.h"
-#define T uint8_t
+#define T uint8_t
+#define NAME add
-DEF_VX_BINARY_CASE_0_WRAP(T, +)
+DEF_VX_BINARY_CASE_0_WRAP(T, +, NAME)
-#define TEST_DATA TEST_BINARY_DATA_WRAP(T, vadd)
-#define TEST_RUN(out, in, x, n) RUN_VX_BINARY_CASE_0_WRAP(out, in, x, n)
+#define TEST_DATA TEST_BINARY_DATA_WRAP(T, NAME)
+#define TEST_RUN(T, NAME, out, in, x, n) RUN_VX_BINARY_CASE_0_WRAP(T, NAME, out, in, x, n)
#include "vx_binary_run.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vsub-run-1-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vsub-run-1-i16.c
new file mode 100644
index 0000000..e28f954
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vsub-run-1-i16.c
@@ -0,0 +1,15 @@
+/* { dg-do run { target { riscv_v } } } */
+/* { dg-additional-options "-std=c99 --param=gpr2vr-cost=0" } */
+
+#include "vx_binary.h"
+#include "vx_binary_data.h"
+
+#define T int16_t
+#define NAME sub
+
+DEF_VX_BINARY_CASE_0_WRAP(T, -, NAME)
+
+#define TEST_DATA TEST_BINARY_DATA_WRAP(T, NAME)
+#define TEST_RUN(T, NAME, out, in, x, n) RUN_VX_BINARY_CASE_0_WRAP(T, NAME, out, in, x, n)
+
+#include "vx_binary_run.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vsub-run-1-i32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vsub-run-1-i32.c
new file mode 100644
index 0000000..032ecad
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vsub-run-1-i32.c
@@ -0,0 +1,15 @@
+/* { dg-do run { target { riscv_v } } } */
+/* { dg-additional-options "-std=c99 --param=gpr2vr-cost=0" } */
+
+#include "vx_binary.h"
+#include "vx_binary_data.h"
+
+#define T int32_t
+#define NAME sub
+
+DEF_VX_BINARY_CASE_0_WRAP(T, -, NAME)
+
+#define TEST_DATA TEST_BINARY_DATA_WRAP(T, NAME)
+#define TEST_RUN(T, NAME, out, in, x, n) RUN_VX_BINARY_CASE_0_WRAP(T, NAME, out, in, x, n)
+
+#include "vx_binary_run.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vsub-run-1-i64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vsub-run-1-i64.c
new file mode 100644
index 0000000..19bbe2d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vsub-run-1-i64.c
@@ -0,0 +1,15 @@
+/* { dg-do run { target { riscv_v } } } */
+/* { dg-additional-options "-std=c99 --param=gpr2vr-cost=0" } */
+
+#include "vx_binary.h"
+#include "vx_binary_data.h"
+
+#define T int64_t
+#define NAME sub
+
+DEF_VX_BINARY_CASE_0_WRAP(T, -, NAME)
+
+#define TEST_DATA TEST_BINARY_DATA_WRAP(T, NAME)
+#define TEST_RUN(T, NAME, out, in, x, n) RUN_VX_BINARY_CASE_0_WRAP(T, NAME, out, in, x, n)
+
+#include "vx_binary_run.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vsub-run-1-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vsub-run-1-i8.c
new file mode 100644
index 0000000..7063a9c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vsub-run-1-i8.c
@@ -0,0 +1,15 @@
+/* { dg-do run { target { riscv_v } } } */
+/* { dg-additional-options "-std=c99 --param=gpr2vr-cost=0" } */
+
+#include "vx_binary.h"
+#include "vx_binary_data.h"
+
+#define T int8_t
+#define NAME sub
+
+DEF_VX_BINARY_CASE_0_WRAP(T, -, NAME)
+
+#define TEST_DATA TEST_BINARY_DATA_WRAP(T, NAME)
+#define TEST_RUN(T, NAME, out, in, x, n) RUN_VX_BINARY_CASE_0_WRAP(T, NAME, out, in, x, n)
+
+#include "vx_binary_run.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vsub-run-1-u16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vsub-run-1-u16.c
new file mode 100644
index 0000000..42a1508
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vsub-run-1-u16.c
@@ -0,0 +1,15 @@
+/* { dg-do run { target { riscv_v } } } */
+/* { dg-additional-options "-std=c99 --param=gpr2vr-cost=0" } */
+
+#include "vx_binary.h"
+#include "vx_binary_data.h"
+
+#define T uint16_t
+#define NAME sub
+
+DEF_VX_BINARY_CASE_0_WRAP(T, -, NAME)
+
+#define TEST_DATA TEST_BINARY_DATA_WRAP(T, NAME)
+#define TEST_RUN(T, NAME, out, in, x, n) RUN_VX_BINARY_CASE_0_WRAP(T, NAME, out, in, x, n)
+
+#include "vx_binary_run.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vsub-run-1-u32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vsub-run-1-u32.c
new file mode 100644
index 0000000..2df5b14
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vsub-run-1-u32.c
@@ -0,0 +1,15 @@
+/* { dg-do run { target { riscv_v } } } */
+/* { dg-additional-options "-std=c99 --param=gpr2vr-cost=0" } */
+
+#include "vx_binary.h"
+#include "vx_binary_data.h"
+
+#define T uint32_t
+#define NAME sub
+
+DEF_VX_BINARY_CASE_0_WRAP(T, -, NAME)
+
+#define TEST_DATA TEST_BINARY_DATA_WRAP(T, NAME)
+#define TEST_RUN(T, NAME, out, in, x, n) RUN_VX_BINARY_CASE_0_WRAP(T, NAME, out, in, x, n)
+
+#include "vx_binary_run.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vsub-run-1-u64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vsub-run-1-u64.c
new file mode 100644
index 0000000..c4f7e54
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vsub-run-1-u64.c
@@ -0,0 +1,15 @@
+/* { dg-do run { target { riscv_v } } } */
+/* { dg-additional-options "-std=c99 --param=gpr2vr-cost=0" } */
+
+#include "vx_binary.h"
+#include "vx_binary_data.h"
+
+#define T uint64_t
+#define NAME sub
+
+DEF_VX_BINARY_CASE_0_WRAP(T, -, NAME)
+
+#define TEST_DATA TEST_BINARY_DATA_WRAP(T, NAME)
+#define TEST_RUN(T, NAME, out, in, x, n) RUN_VX_BINARY_CASE_0_WRAP(T, NAME, out, in, x, n)
+
+#include "vx_binary_run.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vsub-run-1-u8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vsub-run-1-u8.c
new file mode 100644
index 0000000..869380a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vsub-run-1-u8.c
@@ -0,0 +1,15 @@
+/* { dg-do run { target { riscv_v } } } */
+/* { dg-additional-options "-std=c99 --param=gpr2vr-cost=0" } */
+
+#include "vx_binary.h"
+#include "vx_binary_data.h"
+
+#define T uint8_t
+#define NAME sub
+
+DEF_VX_BINARY_CASE_0_WRAP(T, -, NAME)
+
+#define TEST_DATA TEST_BINARY_DATA_WRAP(T, NAME)
+#define TEST_RUN(T, NAME, out, in, x, n) RUN_VX_BINARY_CASE_0_WRAP(T, NAME, out, in, x, n)
+
+#include "vx_binary_run.h"
diff --git a/gcc/testsuite/gfortran.dg/alloc_comp_auto_array_3.f90 b/gcc/testsuite/gfortran.dg/alloc_comp_auto_array_3.f90
index 2af089e..d0751f3 100644
--- a/gcc/testsuite/gfortran.dg/alloc_comp_auto_array_3.f90
+++ b/gcc/testsuite/gfortran.dg/alloc_comp_auto_array_3.f90
@@ -25,6 +25,6 @@ contains
allocate (array(1)%bigarr)
end function
end
-! { dg-final { scan-tree-dump-times "builtin_malloc" 3 "original" } }
+! { dg-final { scan-tree-dump-times "builtin_malloc" 4 "original" } }
! { dg-final { scan-tree-dump-times "builtin_free" 3 "original" } }
-! { dg-final { scan-tree-dump-times "while \\(1\\)" 4 "original" } }
+! { dg-final { scan-tree-dump-times "while \\(1\\)" 5 "original" } }
diff --git a/gcc/testsuite/gfortran.dg/alloc_comp_class_3.f03 b/gcc/testsuite/gfortran.dg/alloc_comp_class_3.f03
index 0753e33..8202d78 100644
--- a/gcc/testsuite/gfortran.dg/alloc_comp_class_3.f03
+++ b/gcc/testsuite/gfortran.dg/alloc_comp_class_3.f03
@@ -45,11 +45,10 @@ contains
type(c), value :: d
end subroutine
- type(c) function c_init() ! { dg-warning "not set" }
+ type(c) function c_init()
end function
subroutine sub(d)
type(u), value :: d
end subroutine
end program test_pr58586
-
diff --git a/gcc/testsuite/gfortran.dg/alloc_comp_class_4.f03 b/gcc/testsuite/gfortran.dg/alloc_comp_class_4.f03
index 4a55d73..9ff38e3 100644
--- a/gcc/testsuite/gfortran.dg/alloc_comp_class_4.f03
+++ b/gcc/testsuite/gfortran.dg/alloc_comp_class_4.f03
@@ -51,14 +51,14 @@ contains
type(t), value :: d
end subroutine
- type(c) function c_init() ! { dg-warning "not set" }
+ type(c) function c_init()
end function
class(c) function c_init2() ! { dg-warning "not set" }
allocatable :: c_init2
end function
- type(c) function d_init(this) ! { dg-warning "not set" }
+ type(c) function d_init(this)
class(d) :: this
end function
@@ -102,4 +102,3 @@ program test_pr58586
call add_c(oe%init())
deallocate(oe)
end program
-
diff --git a/gcc/testsuite/gfortran.dg/allocate_with_source_14.f03 b/gcc/testsuite/gfortran.dg/allocate_with_source_14.f03
index fd2db74..36c1245 100644
--- a/gcc/testsuite/gfortran.dg/allocate_with_source_14.f03
+++ b/gcc/testsuite/gfortran.dg/allocate_with_source_14.f03
@@ -210,5 +210,5 @@ program main
call v%free()
deallocate(av)
end program
-! { dg-final { scan-tree-dump-times "__builtin_malloc" 22 "original" } }
+! { dg-final { scan-tree-dump-times "__builtin_malloc" 23 "original" } }
! { dg-final { scan-tree-dump-times "__builtin_free" 29 "original" } }
diff --git a/gcc/testsuite/gfortran.dg/derived_constructor_comps_6.f90 b/gcc/testsuite/gfortran.dg/derived_constructor_comps_6.f90
index bdfa47b..406e031 100644
--- a/gcc/testsuite/gfortran.dg/derived_constructor_comps_6.f90
+++ b/gcc/testsuite/gfortran.dg/derived_constructor_comps_6.f90
@@ -129,5 +129,5 @@ contains
prt_spec = name
end function new_prt_spec3
end program main
-! { dg-final { scan-tree-dump-times "__builtin_malloc" 15 "original" } }
+! { dg-final { scan-tree-dump-times "__builtin_malloc" 16 "original" } }
! { dg-final { scan-tree-dump-times "__builtin_free" 33 "original" } }
diff --git a/gcc/testsuite/gfortran.dg/derived_result_5.f90 b/gcc/testsuite/gfortran.dg/derived_result_5.f90
new file mode 100644
index 0000000..1ba4d19
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/derived_result_5.f90
@@ -0,0 +1,123 @@
+! { dg-do run }
+! { dg-additional-options "-O2 -Wreturn-type" }
+!
+! PR fortran/85750 - default-initialization and functions returning derived type
+
+module bar
+ implicit none
+ type ilist
+ integer :: count = 42
+ integer, pointer :: ptr(:) => null()
+ end type ilist
+
+ type jlist
+ real, allocatable :: a(:)
+ integer :: count = 23
+ end type jlist
+
+contains
+
+ function make_list(i)
+ integer, intent(in) :: i
+ type(ilist), dimension(2) :: make_list
+ make_list(i)%count = i
+ end function make_list
+
+ function make_list_res(i) result(list)
+ integer, intent(in) :: i
+ type(ilist), dimension(2) :: list
+ list(i)%count = i
+ end function make_list_res
+
+ function make_jlist(i)
+ integer, intent(in) :: i
+ type(jlist), dimension(2) :: make_jlist
+ make_jlist(i)%count = i
+ end function make_jlist
+
+ function make_jlist_res(i) result(list)
+ integer, intent(in) :: i
+ type(jlist), dimension(2) :: list
+ list(i)%count = i
+ end function make_jlist_res
+
+ function empty_ilist()
+ type(ilist), dimension(2) :: empty_ilist
+ end function
+
+ function empty_jlist()
+ type(jlist), dimension(2) :: empty_jlist
+ end function
+
+ function empty_ilist_res() result (res)
+ type(ilist), dimension(2) :: res
+ end function
+
+ function empty_jlist_res() result (res)
+ type(jlist), dimension(2) :: res
+ end function
+
+end module bar
+
+program foo
+ use bar
+ implicit none
+ type(ilist) :: mylist(2) = ilist(count=-2)
+ type(jlist), allocatable :: yourlist(:)
+
+ mylist = ilist(count=-1)
+ if (any (mylist%count /= [-1,-1])) stop 1
+ mylist = empty_ilist()
+ if (any (mylist%count /= [42,42])) stop 2
+ mylist = ilist(count=-1)
+ mylist = empty_ilist_res()
+ if (any (mylist%count /= [42,42])) stop 3
+
+ allocate(yourlist(1:2))
+ if (any (yourlist%count /= [23,23])) stop 4
+ yourlist = jlist(count=-1)
+ if (any (yourlist%count /= [-1,-1])) stop 5
+ yourlist = empty_jlist()
+ if (any (yourlist%count /= [23,23])) stop 6
+ yourlist = jlist(count=-1)
+ yourlist = empty_jlist_res()
+ if (any (yourlist%count /= [23,23])) stop 7
+
+ mylist = make_list(1)
+ if (any (mylist%count /= [1,42])) stop 11
+ mylist = make_list(2)
+ if (any (mylist%count /= [42,2])) stop 12
+ mylist = (make_list(1))
+ if (any (mylist%count /= [1,42])) stop 13
+ mylist = [make_list(2)]
+ if (any (mylist%count /= [42,2])) stop 14
+
+ mylist = make_list_res(1)
+ if (any (mylist%count /= [1,42])) stop 21
+ mylist = make_list_res(2)
+ if (any (mylist%count /= [42,2])) stop 22
+ mylist = (make_list_res(1))
+ if (any (mylist%count /= [1,42])) stop 23
+ mylist = [make_list_res(2)]
+ if (any (mylist%count /= [42,2])) stop 24
+
+ yourlist = make_jlist(1)
+ if (any (yourlist%count /= [1,23])) stop 31
+ yourlist = make_jlist(2)
+ if (any (yourlist%count /= [23,2])) stop 32
+ yourlist = (make_jlist(1))
+ if (any (yourlist%count /= [1,23])) stop 33
+ yourlist = [make_jlist(2)]
+ if (any (yourlist%count /= [23,2])) stop 34
+
+ yourlist = make_jlist_res(1)
+ if (any (yourlist%count /= [1,23])) stop 41
+ yourlist = make_jlist_res(2)
+ if (any (yourlist%count /= [23,2])) stop 42
+ yourlist = (make_jlist_res(1))
+ if (any (yourlist%count /= [1,23])) stop 43
+ yourlist = [make_jlist_res(2)]
+ if (any (yourlist%count /= [23,2])) stop 44
+
+ deallocate (yourlist)
+end program foo
diff --git a/gcc/testsuite/lib/g++-dg.exp b/gcc/testsuite/lib/g++-dg.exp
index 26bda65..042a917 100644
--- a/gcc/testsuite/lib/g++-dg.exp
+++ b/gcc/testsuite/lib/g++-dg.exp
@@ -27,6 +27,79 @@ proc g++-dg-prune { system text } {
return [gcc-dg-prune $system $text]
}
+# Return a list of -std flags to use for TEST.
+proc g++-std-flags { test } {
+ # If the testcase specifies a standard, use that one.
+ # If not, run it under several standards, allowing GNU extensions
+ # if there's a dg-options line.
+ if ![search_for $test "-std=*++"] {
+ if [search_for $test "dg-options"] {
+ set std_prefix "-std=gnu++"
+ } else {
+ set std_prefix "-std=c++"
+ }
+
+ set low 0
+ # Some directories expect certain minimums.
+ if { [string match "*/coroutines/*" $test] } { set low 20 }
+ if { [string match "*/modules/*" $test] } { set low 17 }
+
+ # See g++.exp for the initial value of this list.
+ global gpp_std_list
+ if { [llength $gpp_std_list] > 0 } {
+ set std_list {}
+ foreach ver $gpp_std_list {
+ set cmpver $ver
+ if { $ver == 98 } { set cmpver 03 }
+ if { $ver ni $std_list
+ && $cmpver >= $low } {
+ lappend std_list $ver
+ }
+ }
+ } else {
+ # If the test mentions specific C++ versions, test those.
+ set lines [get_matching_lines $test {\{ dg* c++[0-9][0-9]}]
+ set std_list {}
+ foreach line $lines {
+ regexp {c\+\+([0-9][0-9])} $line -> ver
+ lappend std_list $ver
+
+ if { $ver == 98 } {
+ # Leave low alone.
+ } elseif { [regexp {dg-do|dg-require-effective-target} $line] } {
+ set low $ver
+ }
+ }
+ #verbose "low: $low" 1
+
+ set std_list [lsort -unique $std_list]
+
+ # If fewer than 3 specific versions are mentioned, add more.
+ # The order of this list is significant: first $cxx_default,
+ # then the oldest and newest, then others in rough order of
+ # importance based on test coverage and usage.
+ foreach ver { 17 98 26 11 20 14 23 } {
+ set cmpver $ver
+ if { $ver == 98 } { set cmpver 03 }
+ if { [llength $std_list] < 3
+ && $ver ni $std_list
+ && $cmpver >= $low } {
+ lappend std_list $ver
+ }
+ }
+ verbose "std_list: $std_list" 1
+ }
+ set option_list { }
+ foreach x $std_list {
+ if { $x eq "impcx" } then { set x "26 -fimplicit-constexpr" }
+ lappend option_list "${std_prefix}$x"
+ }
+ } else {
+ set option_list { "" }
+ }
+ return $option_list
+}
+
# Modified dg-runtest that runs tests in multiple standard modes,
# unless they specifically specify one standard.
proc g++-dg-runtest { testcases flags default-extra-flags } {
@@ -38,62 +111,7 @@ proc g++-dg-runtest { testcases flags default-extra-flags } {
continue
}
- # If the testcase specifies a standard, use that one.
- # If not, run it under several standards, allowing GNU extensions
- # if there's a dg-options line.
- if ![search_for $test "-std=*++"] {
- if [search_for $test "dg-options"] {
- set std_prefix "-std=gnu++"
- } else {
- set std_prefix "-std=c++"
- }
-
- # See g++.exp for the initial value of this list.
- global gpp_std_list
- if { [llength $gpp_std_list] > 0 } {
- set std_list $gpp_std_list
- } else {
- # If the test mentions specific C++ versions, test those.
- set lines [get_matching_lines $test {\{ dg* c++[0-9][0-9]}]
- set std_list {}
- set low 0
- foreach line $lines {
- regexp {c\+\+([0-9][0-9])} $line -> ver
- lappend std_list $ver
-
- if { $ver == 98 } {
- # Leave low alone.
- } elseif { [regexp {dg-do|dg-require-effective-target} $line] } {
- set low $ver
- }
- }
- #verbose "low: $low" 1
-
- set std_list [lsort -unique $std_list]
-
- # If fewer than 3 specific versions are mentioned, add more.
- # The order of this list is significant: first $cxx_default,
- # then the oldest and newest, then others in rough order of
- # importance based on test coverage and usage.
- foreach ver { 17 98 26 11 20 14 23 } {
- set cmpver $ver
- if { $ver == 98 } { set cmpver 03 }
- if { [llength $std_list] < 3
- && $ver ni $std_list
- && $cmpver > $low } {
- lappend std_list $ver
- }
- }
- verbose "std_list: $std_list" 1
- }
- set option_list { }
- foreach x $std_list {
- if { $x eq "impcx" } then { set x "26 -fimplicit-constexpr" }
- lappend option_list "${std_prefix}$x"
- }
- } else {
- set option_list { "" }
- }
+ set option_list [g++-std-flags $test]
set nshort [file tail [file dirname $test]]/[file tail $test]
diff --git a/gcc/tree-cfg.cc b/gcc/tree-cfg.cc
index 928459a..b342b14 100644
--- a/gcc/tree-cfg.cc
+++ b/gcc/tree-cfg.cc
@@ -3867,32 +3867,6 @@ verify_gimple_assign_unary (gassign *stmt)
return false;
- case NEGATE_EXPR:
- case ABS_EXPR:
- case BIT_NOT_EXPR:
- case CONJ_EXPR:
- /* Disallow pointer and offset types for many of the unary gimple. */
- if (POINTER_TYPE_P (lhs_type)
- || TREE_CODE (lhs_type) == OFFSET_TYPE)
- {
- error ("invalid types for %qs", code_name);
- debug_generic_expr (lhs_type);
- debug_generic_expr (rhs1_type);
- return true;
- }
- break;
-
- case PAREN_EXPR:
- /* Disallow non arthmetic types on PAREN_EXPR. */
- if (AGGREGATE_TYPE_P (lhs_type))
- {
- error ("invalid types for %qs", code_name);
- debug_generic_expr (lhs_type);
- debug_generic_expr (rhs1_type);
- return true;
- }
- break;
-
case ABSU_EXPR:
if (!ANY_INTEGRAL_TYPE_P (lhs_type)
|| !TYPE_UNSIGNED (lhs_type)
@@ -3918,6 +3892,27 @@ verify_gimple_assign_unary (gassign *stmt)
}
return false;
+ case CONJ_EXPR:
+ if (TREE_CODE (lhs_type) != COMPLEX_TYPE)
+ {
+diagnose_unary_lhs:
+ error ("invalid type for %qs", code_name);
+ debug_generic_expr (lhs_type);
+ return true;
+ }
+ break;
+
+ case NEGATE_EXPR:
+ case ABS_EXPR:
+ case BIT_NOT_EXPR:
+ if (POINTER_TYPE_P (lhs_type) || TREE_CODE (lhs_type) == OFFSET_TYPE)
+ goto diagnose_unary_lhs;
+ /* FALLTHRU */
+ case PAREN_EXPR:
+ if (AGGREGATE_TYPE_P (lhs_type))
+ goto diagnose_unary_lhs;
+ break;
+
default:
gcc_unreachable ();
}
diff --git a/gcc/value-range.cc b/gcc/value-range.cc
index d2c14e7..ed3760f 100644
--- a/gcc/value-range.cc
+++ b/gcc/value-range.cc
@@ -31,25 +31,28 @@ along with GCC; see the file COPYING3. If not see
#include "fold-const.h"
#include "gimple-range.h"
-// Return the bitmask inherent in a range.
+// Return the bitmask inherent in a range : TYPE [MIN, MAX].
+// This use to be get_bitmask_from_range ().
-static irange_bitmask
-get_bitmask_from_range (tree type,
- const wide_int &min, const wide_int &max)
+irange_bitmask::irange_bitmask (tree type,
+ const wide_int &min, const wide_int &max)
{
unsigned prec = TYPE_PRECISION (type);
-
// All the bits of a singleton are known.
if (min == max)
{
- wide_int mask = wi::zero (prec);
- wide_int value = min;
- return irange_bitmask (value, mask);
+ m_mask = wi::zero (prec);
+ m_value = min;
+ }
+ else
+ {
+ wide_int xorv = min ^ max;
+ // Mask will have leading zeros for all leading bits that are
+ // common, both zeros and ones.
+ m_mask = wi::mask (prec - wi::clz (xorv), false, prec);
+ // Now set value to those bits which are known, and zero the rest.
+ m_value = ~m_mask & min;
}
-
- wide_int xorv = min ^ max;
- xorv = wi::mask (prec - wi::clz (xorv), false, prec);
- return irange_bitmask (wi::zero (prec), min | xorv);
}
void
@@ -469,7 +472,7 @@ prange::set (tree type, const wide_int &min, const wide_int &max,
}
m_kind = VR_RANGE;
- m_bitmask = get_bitmask_from_range (type, min, max);
+ m_bitmask = irange_bitmask (type, min, max);
if (flag_checking)
verify_range ();
}
@@ -583,7 +586,7 @@ prange::intersect (const vrange &v)
}
// Intersect all bitmasks: the old one, the new one, and the other operand's.
- irange_bitmask new_bitmask = get_bitmask_from_range (m_type, m_min, m_max);
+ irange_bitmask new_bitmask (m_type, m_min, m_max);
m_bitmask.intersect (new_bitmask);
m_bitmask.intersect (r.m_bitmask);
if (varying_compatible_p ())
@@ -2396,8 +2399,7 @@ irange::get_bitmask () const
// in the mask.
//
// See also the note in irange_bitmask::intersect.
- irange_bitmask bm
- = get_bitmask_from_range (type (), lower_bound (), upper_bound ());
+ irange_bitmask bm (type (), lower_bound (), upper_bound ());
if (!m_bitmask.unknown_p ())
bm.intersect (m_bitmask);
return bm;
@@ -2432,7 +2434,7 @@ irange::intersect_bitmask (const irange &r)
{
gcc_checking_assert (!undefined_p () && !r.undefined_p ());
- if (r.m_bitmask.unknown_p () || m_bitmask == r.m_bitmask)
+ if (m_bitmask == r.m_bitmask)
return false;
irange_bitmask bm = get_bitmask ();
diff --git a/gcc/value-range.h b/gcc/value-range.h
index f694298..74cdf29 100644
--- a/gcc/value-range.h
+++ b/gcc/value-range.h
@@ -136,6 +136,8 @@ public:
irange_bitmask () { /* uninitialized */ }
irange_bitmask (unsigned prec) { set_unknown (prec); }
irange_bitmask (const wide_int &value, const wide_int &mask);
+ irange_bitmask (tree type, const wide_int &min, const wide_int &max);
+
wide_int value () const { return m_value; }
wide_int mask () const { return m_mask; }
void set_unknown (unsigned prec);