diff options
Diffstat (limited to 'gcc')
90 files changed, 2153 insertions, 148 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 94cb5ae..3d625ce 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,228 @@ +2025-07-03 Juergen Christ <jchrist@linux.ibm.com> + + * config/s390/s390.cc (expand_perm_with_merge): Add size change cases. + (expand_perm_with_pack): New function. + (vectorize_vec_perm_const_1): Wire up new function. + +2025-07-03 Co-authored-by: Daniel Barboza <dbarboza@ventanamicro.com> + Co-authored-by: Shreya Munnangi <smunnangi1@ventanamicro.com> + + PR target/118886 + * config/riscv/riscv.cc (riscv_macro_fusion_pair_p): Check + for fusion being disabled earlier. If PREV is already fused, + then it can't be fused again. Be more selective about fusing + when the destination registers do not match. Don't fuse into + loads that aren't scalar integer modes. Revamp store pair + commit support. + +2025-07-03 Karl Meakin <karl.meakin@arm.com> + + * config/aarch64/aarch64.md (aarch64_cbz<optab><mode>1): Move + above rules for CBB<cond>/CBH<cond>/CB<cond>. + (*aarch64_tbz<optab><mode>1): Likewise. + +2025-07-03 Karl Meakin <karl.meakin@arm.com> + + * config/aarch64/aarch64-protos.h (aarch64_cb_rhs): New function. + * config/aarch64/aarch64.cc (aarch64_cb_rhs): Likewise. + * config/aarch64/aarch64.md (cbranch<mode>4): Rename to ... + (cbranch<GPI:mode>4): ...here, and emit CMPBR if possible. + (cbranch<SHORT:mode>4): New expand rule. + (aarch64_cb<INT_CMP:code><GPI:mode>): New insn rule. + (aarch64_cb<INT_CMP:code><SHORT:mode>): Likewise. + * config/aarch64/constraints.md (Uc0): New constraint. + (Uc1): Likewise. + (Uc2): Likewise. + * config/aarch64/iterators.md (cmpbr_suffix): New mode attr. + (INT_CMP): New code iterator. + (cmpbr_imm_constraint): New code attr. + +2025-07-03 Karl Meakin <karl.meakin@arm.com> + + * config/aarch64/aarch64-option-extensions.def (cmpbr): New + option. + * config/aarch64/aarch64.h (TARGET_CMPBR): New macro. + * doc/invoke.texi (cmpbr): New option. + +2025-07-03 Karl Meakin <karl.meakin@arm.com> + + * config/aarch64/aarch64.md (far_branch): Replace 0/1 with + no/yes. + (aarch64_bcond): Handle rename. + (aarch64_cbz<optab><mode>1): Likewise. + (*aarch64_tbz<optab><mode>1): Likewise. + (@aarch64_tbz<optab><ALLI:mode><GPI:mode>): Likewise. + +2025-07-03 Karl Meakin <karl.meakin@arm.com> + + * config/aarch64/aarch64.md (BRANCH_LEN_P_1MiB): New constant. + (BRANCH_LEN_N_1MiB): Likewise. + (BRANCH_LEN_P_32KiB): Likewise. + (BRANCH_LEN_N_32KiB): Likewise. + +2025-07-03 Karl Meakin <karl.meakin@arm.com> + + * config/aarch64/aarch64.md (condjump): Rename to ... + (aarch64_bcond): ...here. + (*compare_condjump<GPI:mode>): Rename to ... + (*aarch64_bcond_wide_imm<GPI:mode>): ...here. + (aarch64_cb<optab><mode>): Rename to ... + (aarch64_cbz<optab><mode>1): ...here. + (*cb<optab><mode>1): Rename to ... + (*aarch64_tbz<optab><mode>1): ...here. + (@aarch64_tb<optab><ALLI:mode><GPI:mode>): Rename to ... + (@aarch64_tbz<optab><ALLI:mode><GPI:mode>): ...here. + (restore_stack_nonlocal): Handle rename. + (stack_protect_combined_test): Likewise. + * config/aarch64/aarch64-simd.md (cbranch<mode>4): Likewise. + * config/aarch64/aarch64-sme.md (aarch64_restore_za): Likewise. + * config/aarch64/aarch64.cc (aarch64_gen_test_and_branch): Likewise. + +2025-07-03 Karl Meakin <karl.meakin@arm.com> + + * config/aarch64/aarch64.md (cbranch<mode>4): Reformat. + (cbranchcc4): Likewise. + (condjump): Likewise. + (*compare_condjump<GPI:mode>): Likewise. + (aarch64_cb<optab><mode>1): Likewise. + (*cb<optab><mode>1): Likewise. + (tbranch_<code><mode>3): Likewise. + (@aarch64_tb<optab><ALLI:mode><GPI:mode>): Likewise. + +2025-07-03 Karl Meakin <karl.meakin@arm.com> + + * config/aarch64/aarch64.md (condjump): Move. + (*compare_condjump<GPI:mode>): Likewise. + (aarch64_cb<optab><mode>1): Likewise. + (*cb<optab><mode>1): Likewise. + (tbranch_<code><mode>3): Likewise. + (@aarch64_tb<optab><ALLI:mode><GPI:mode>): Likewise. + +2025-07-03 Siddhesh Poyarekar <siddhesh@gotplt.org> + + PR tree-optimization/120780 + * tree-object-size.cc (inner_at_offset, + get_wholesize_for_memref): New functions. + (addr_object_size): Call get_wholesize_for_memref. + +2025-07-03 H.J. Lu <hjl.tools@gmail.com> + + PR target/120936 + * config/i386/i386.cc (x86_print_call_or_nop): Add a label + argument and use it to print label. + (x86_function_profiler): Emit label only when __mcount_loc + section is used. + +2025-07-03 Jan Hubicka <hubicka@ucw.cz> + + * auto-profile.cc (get_combined_location): Handle negative + offsets; output better diagnostics. + (get_relative_location_for_locus): Reutrn -1 for unknown location. + (function_instance::get_cgraph_node): New member function. + (match_with_target): New function. + (dump_stmt): New function. + (function_instance::lookup_count): New function. + (mark_expr_locations): New function. + (function_instance::match): New function. + (autofdo_source_profile::offline_external_functions): Do + not repeat renaming; manage two worklists and do matching. + (autofdo_source_profile::offline_unrealized_inlines): Simplify. + (afdo_set_bb_count): do not look for lost discriminators. + (auto_profile): Do not ICE when profile reading failed. + * common.opt (Wauto-profile): New warning flag + * doc/invoke.texi (-Wauto-profile): Document. + +2025-07-03 Jan Hubicka <hubicka@ucw.cz> + + * ipa-fnsummary.cc (analyze_function_body): For loop + heuristics use header count instead of preheader count. + +2025-07-03 Jan Hubicka <hubicka@ucw.cz> + + * ipa-cp.cc (update_profiling_info): Watch for division by zero. + +2025-07-03 Alex Coplan <alex.coplan@arm.com> + + * config/aarch64/aarch64-sve.md + (vec_load_lanes<mode><vsingle>): Expand else operand in + subvector mode, as per optab documentation. + (vec_mask_load_lanes<mode><vsingle>): Add missing mode for + operand 3. + * config/aarch64/predicates.md (aarch64_maskload_else_operand): + Remove const_int. + +2025-07-03 Alex Coplan <alex.coplan@arm.com> + + * doc/md.texi (Standard Names): Clarify mode of else operand for + vec_mask_load_lanesmn optab. + +2025-07-03 Jan Hubicka <hubicka@ucw.cz> + + * ipa-cp.cc (cs_interesting_for_ipcp_p): Handle + correctly GLOBAL0 afdo counts. + (ipcp_cloning_candidate_p): Do not rule out nodes + !node->optimize_for_size_p (). + (good_cloning_opportunity_p): Handle afdo counts + as non-zero. + +2025-07-03 Jan Hubicka <hubicka@ucw.cz> + + * ipa-cp.cc (hint_time_bonus): Return sreal and avoid + conversions to integer. + (good_cloning_opportunity_p): Avoid sreal to integer + conversions + (perform_estimation_of_a_value): Update. + +2025-07-03 Jan Hubicka <hubicka@ucw.cz> + + * auto-profile.cc (afdo_hot_bb_threshod): New global + variable. + (maybe_hot_afdo_count_p): New function. + (autofdo_source_profile::read): Do not set up dump file; + set afdo_hot_bb_threshod. + (afdo_annotate_cfg): Handle partial training. + (afdo_callsite_hot_enough_for_early_inline): + Use maybe_hot_afdo_count_p. + (auto_profile_offline::execute): Read autofdo file. + * auto-profile.h (maybe_hot_afdo_count_p): Declare. + (afdo_hot_bb_threshold): Declare. + * coverage.cc (read_counts_file): Also set gcov_profile_info. + (coverage_init): Do not read autofdo file. + * opts.cc (enable_fdo_optimizations): Add autofdo parameter; + do not set flag_branch_probabilities and flag_profile_values + with it. + (common_handle_option): Update. + * passes.cc (finish_optimization_passes): Do not end branch + prob here. + (pass_manager::dump_profile_report): Also mark change after + autofdo pass. + * profile.cc: Include auto-profile.h + (gcov_profile_info): New global variable. + (struct afdo_fdo_record): New struture. + (compute_branch_probabilities): Record afdo profile. + (end_branch_prob): Dump afdo/fdo profile comparsion. + * profile.h (gcov_profile_info): Declarre. + * tree-profile.cc (tree_profiling): Call end_branch_prob + (pass_ipa_tree_profile::gate): Also enable with autoFDO + +2025-07-03 Richard Biener <rguenther@suse.de> + + PR tree-optimization/118669 + * tree-vect-stmts.cc (vectorizable_load): Emit loads + with proper (element) alignment. + (vectorizable_store): Likewise. + +2025-07-03 H.J. Lu <hjl.tools@gmail.com> + + PR target/120908 + * config/i386/i386.cc (legitimize_tls_address): Pass RDI to + gen_tls_local_dynamic_64. + * config/i386/i386.md (*tls_global_dynamic_64_largepic): Add + RDI clobber and use it to generate LEA. + (*tls_local_dynamic_64_<mode>): Likewise. + (*tls_local_dynamic_base_64_largepic): Likewise. + (@tls_local_dynamic_64_<mode>): Add a clobber. + 2025-07-02 H.J. Lu <hjl.tools@gmail.com> PR target/120908 diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP index 6952979..f38cdfd 100644 --- a/gcc/DATESTAMP +++ b/gcc/DATESTAMP @@ -1 +1 @@ -20250703 +20250704 diff --git a/gcc/ada/ChangeLog b/gcc/ada/ChangeLog index 8aaa006..e8cb92b 100644 --- a/gcc/ada/ChangeLog +++ b/gcc/ada/ChangeLog @@ -1,3 +1,298 @@ +2025-07-03 Eric Botcazou <ebotcazou@adacore.com> + + * gcc-interface/Makefile.in (gnatlib-sjlj): Delete. + (gnatlib-zcx): Do not modify Frontend_Exceptions constant. + * libgnat/system-linux-loongarch.ads (Frontend_Exceptions): Delete. + +2025-07-03 Eric Botcazou <ebotcazou@adacore.com> + + * gcc-interface/decl.cc (type_contains_only_integral_data): Do not + return false only because the type contains pointer data. + +2025-07-03 Eric Botcazou <ebotcazou@adacore.com> + + * gcc-interface/decl.cc (gnat_to_gnu_entity): Use default messages + for errors reported for Object_Size clauses. + (validate_size): Give an error for stand-alone objects of composite + types if the specified size is not a multiple of the alignment. + +2025-07-03 Eric Botcazou <ebotcazou@adacore.com> + + * gcc-interface/trans.cc (addressable_p): Add COMPG third parameter. + <COMPONENT_REF>: Do not return true out of alignment considerations + for non-strict-alignment targets if COMPG is set. + (Call_to_gnu): Pass true as COMPG in the call to the addressable_p + predicate if the called subprogram is an initialization procedure. + +2025-07-03 Eric Botcazou <ebotcazou@adacore.com> + + * gcc-interface/trans.cc (gnat_to_gnu) <N_Allocator>: Allocate the + bounds alongside the data if the Is_Constr_Array_Subt_With_Bounds + flag is set on the designated type. + <N_Free_Statement>: Take into account the allocated bounds if the + Is_Constr_Array_Subt_With_Bounds flag is set on the designated type. + +2025-07-03 Eric Botcazou <ebotcazou@adacore.com> + + * gcc-interface/decl.cc (gnat_to_gnu_component_type): Validate the + Component_Size like the size of a type only if the component type + is actually packed. + +2025-07-03 Piotr Trojanek <trojanek@adacore.com> + + * sem_elab.adb (Check_Overriding_Primitive): Find early call region + of the subprogram body declaration, not of the subprogram body stub. + +2025-07-03 Bob Duff <duff@adacore.com> + + * gen_il-gen-gen_nodes.adb (N_Unchecked_Type_Conversion): + Remove useless Nmake_Assert. + * tbuild.adb (Unchecked_Convert_To): + Narrow the bitfield-related conditions. + +2025-07-03 Ronan Desplanques <desplanques@adacore.com> + + * exp_util.adb (Insert_Actions): Fix check. + +2025-07-03 Ronan Desplanques <desplanques@adacore.com> + + * exp_ch6.adb (Expand_Ctrl_Function_Call): Precisify comment. + +2025-07-03 Eric Botcazou <ebotcazou@adacore.com> + + * exp_ch6.adb (Expand_Ctrl_Function_Call): Do not bail out for the + declarations of return objects. + +2025-07-03 Daniel King <dmking@adacore.com> + + * Makefile.rtl (LIBGNAT_TARGET_PAIRS): New unit s-tsgsba__cheri.adb for morello-freebsd. + * libgnarl/s-tassta.adb (Get_Stack_Base): New function. + * libgnarl/s-tsgsba__cheri.adb: New file for CHERI targets. + * libgnarl/s-tsgsba.adb: New default file for non-CHERI targets. + * libgnat/s-stausa.adb (Fill_Stack, Compute_Result): Port to CHERI. + * libgnat/s-stausa.ads (Initialize_Analyzer, Stack_Analyzer): Port to CHERI. + +2025-07-03 Piotr Trojanek <trojanek@adacore.com> + + * sem_ch3.adb (Check_Return_Subtype_Indication): Use Original_Node. + +2025-07-03 Piotr Trojanek <trojanek@adacore.com> + + * sem_ch3.adb (Check_Return_Subtype_Indication): Use type from + explicit subtype indication, when possible. + +2025-07-03 Piotr Trojanek <trojanek@adacore.com> + + * sem_ch3.adb (Check_Return_Subtype_Indication): Adjust error message + to match the RM wording. + +2025-07-03 Piotr Trojanek <trojanek@adacore.com> + + * sem_ch3.adb (Check_Return_Subtype_Indication): Use the nominal + subtype of a return object; literally implement the RM rule about + elementary types; check for static subtype compatibility both when + the subtype is given as a subtype mark and a subtype indication. + +2025-07-03 Eric Botcazou <ebotcazou@adacore.com> + + * repinfo.adb (First_Comp_Or_Discr.Is_Placed_Before): Return True + only if the components are in the same component list. + +2025-07-03 Denis Mazzucato <mazzucato@adacore.com> + + * sem_disp.adb (Check_Dispatching_call): Fix uninitialized Subp_Entity. + * sem_util.adb (Update_Controlling_Argument): No need to replace controlling argument + in case of functions. + +2025-07-03 Eric Botcazou <ebotcazou@adacore.com> + + * errid.ads: Adjust header to renaming and fix copyright line. + * errid.adb: Adjust header to renaming and add blank line. + * erroutc-pretty_emitter.ads: Adjust header to renaming. + * erroutc-pretty_emitter.adb: Likewise. + * erroutc-sarif_emitter.ads: Likewise. + * erroutc-sarif_emitter.adb: Likewise. + * errsw.ads: Adjust header to renaming and add blank line. + * errsw.adb: Likewise. + * json_utils.ads: Likewise. + * json_utils.adb: Adjust header to renaming. + +2025-07-03 Piotr Trojanek <trojanek@adacore.com> + + * errid.ads (Diagnostic_Entries): Now a constant. + +2025-07-03 Piotr Trojanek <trojanek@adacore.com> + + * errid.ads (Diagnostic_Entries): Remove nested aggregate. + * errsw.adb (Switches): Likewise. + +2025-07-03 Ronan Desplanques <desplanques@adacore.com> + + * exp_ch7.adb (Make_Deep_Record_Body): Fix case of absent Initialize + primitive. + +2025-07-03 Piotr Trojanek <trojanek@adacore.com> + + * exp_ch3.adb (Count_Default_Sized_Task_Stacks): Refine subtypes of + parameters; same for callsites. + +2025-07-03 Eric Botcazou <ebotcazou@adacore.com> + + * exp_imgv.adb (Expand_Value_Attribute): Do not call Set_Etype on N + after rewriting it by means of OK_Convert_To. + +2025-07-03 Ronan Desplanques <desplanques@adacore.com> + + * exp_aggr.adb (Generate_Finalization_Actions): Stop assuming that + initialize primitive exists. + +2025-07-03 Ronan Desplanques <desplanques@adacore.com> + + * exp_ch7.adb (Build_Record_Deep_Procs): Fix typo in comment. + +2025-07-03 Gary Dismukes <dismukes@adacore.com> + + * sem_ch12.adb (Install_Spec): Remove "not Is_Generic_Instance (Par)" + in test for setting Instance_Parent_Unit. Revise comment to no longer + say "noninstance", plus remove "???". + (Remove_Parent): Restructure if_statement to allow for both "elsif" + parts to be executed (by changing them to be separate if_statements + within an "else" part). + +2025-07-03 Ronan Desplanques <desplanques@adacore.com> + + * exp_ch3.adb (Predefined_Primitive_Bodies): Fix comment. + +2025-07-03 Piotr Trojanek <trojanek@adacore.com> + + * exp_tss.adb (TSS): Refactor IF condition to make code smaller. + * lib.adb (Increment_Serial_Number, Synchronize_Serial_Number): + Use type of renamed object when creating renaming. + * lib.ads (Unit_Record): Refine subtype of dependency number. + +2025-07-03 Eric Botcazou <ebotcazou@adacore.com> + + * libgnat/s-valuef.adb: Document the prerequisites more precisely. + * libgnat/a-tifiio.adb (OK_Get_32): Adjust to the prerequisites. + (OK_Get_64): Likewise. + * libgnat/a-tifiio__128.adb (OK_Get_32): Likewise. + (OK_Get_64): Likewise. + (OK_Get_128): Likewise. + * libgnat/a-wtfiio.adb (OK_Get_32): Likewise. + (OK_Get_64): Likewise. + * libgnat/a-wtfiio__128.adb (OK_Get_32): Likewise. + (OK_Get_64): Likewise. + (OK_Get_128): Likewise. + * libgnat/a-ztfiio.adb (OK_Get_32): Likewise. + (OK_Get_64): Likewise. + * libgnat/a-ztfiio__128.adb (OK_Get_32): Likewise. + (OK_Get_64): Likewise. + (OK_Get_128): Likewise. + * exp_imgv.adb (Expand_Value_Attribute): Adjust the conditions under + which the RE_Value_Fixed{32,64,128} routines are called for ordinary + fixed-point types. + +2025-07-03 Ronan Desplanques <desplanques@adacore.com> + + * exp_ch3.adb (Make_Predefined_Primitive_Specs): Fix comment. + +2025-07-03 Ronan Desplanques <desplanques@adacore.com> + + * exp_ch7.adb (Insert_Actions_In_Scope_Around): Fix condition. + +2025-07-03 Bob Duff <duff@adacore.com> + + * checks.adb: Remove unnecessary "return;" statements. + * eval_fat.adb: Likewise. + * exp_aggr.adb: Likewise. + * exp_attr.adb: Likewise. + * exp_ch3.adb: Likewise. + * exp_ch4.adb: Likewise. + * exp_ch5.adb: Likewise. + * exp_ch6.adb: Likewise. + * exp_unst.adb: Likewise. + * krunch.adb: Likewise. + * layout.adb: Likewise. + * libgnat/s-excdeb.adb: Likewise. + * libgnat/s-trasym__dwarf.adb: Likewise. + * par-endh.adb: Likewise. + * par-tchk.adb: Likewise. + * sem.adb: Likewise. + * sem_attr.adb: Likewise. + * sem_ch6.adb: Likewise. + * sem_elim.adb: Likewise. + * sem_eval.adb: Likewise. + * sfn_scan.adb: Likewise. + +2025-07-03 Bob Duff <duff@adacore.com> + + * doc/gnat_rm/implementation_defined_characteristics.rst: + Change Ignore to Disable. + * sem_ch13.ads (Analyze_Aspect_Specifications): + Minor: Remove incorrect comment; there is no need to check + Has_Aspects (N) at the call site. + * gnat_rm.texi: Regenerate. + * gnat_ugn.texi: Regenerate. + +2025-07-03 Bob Duff <duff@adacore.com> + + * types.ads (Empty_Or_Error): Remove. + * atree.adb: Remove reference to Empty_Or_Error. + * par-endh.adb: Likewise. + * sem_ch12.adb: Likewise. + * sem_ch3.adb: Likewise. + * sem_util.adb: Likewise. + * treepr.adb: Likewise. + +2025-07-03 Viljar Indus <indus@adacore.com> + + * sem_ch10.adb(Analyze_With_Clause): Call Semantics instead + of Analyze to bring Current_Sem_Unit up to date. + +2025-07-03 Piotr Trojanek <trojanek@adacore.com> + + * lib-xref-spark_specific.adb + (Enclosing_Subprogram_Or_Library_Package): Traverse subunits and body + stubs. + +2025-07-03 Tonu Naks <naks@adacore.com> + + * libgnat/i-cstrin.ads (Value): add documentation + +2025-07-03 Aleksandra Pasek <pasek@adacore.com> + + * libgnat/a-strsup.adb (Super_Delete): Fix index check. + * libgnat/a-stwisu.adb (Super_Delete): Likewise. + * libgnat/a-stzsup.adb (Super_Delete): Likewise. + +2025-07-03 Eric Botcazou <ebotcazou@adacore.com> + + * exp_ch4.adb (Handle_Changed_Representation): Alphabetize local + variables. Set the No_Finalize_Actions flag on the assignment. + +2025-07-03 Joffrey Huguet <huguet@adacore.com> + + * aspects.ads: Define an identifier for Potentially_Invalid. + * doc/gnat_rm/implementation_defined_aspects.rst: Add section for Potentially_Invalid. + * sem_attr.adb (Analyze_Attribute_Old_Result): Attribute Old is allowed to occur in a + Potentially_Invalid aspect. + * sem_ch13.adb (Analyze_Aspect_Specifications): Handle Potentially_Invalid. + * sem_util.adb (Has_Potentially_Invalid): Returns True iff an entity is subject to the + Potentially_Invalid aspect. + * sem_util.ads (Has_Potentially_Invalid): Idem. + * snames.ads-tmpl: New name for Potentially_Invalid. + * gnat_rm.texi: Regenerate. + +2025-07-03 Piotr Trojanek <trojanek@adacore.com> + + * sem_ch10.adb (Analyze_Compilation_Unit): Ignored ghost unit need no + elaboration checks. + +2025-07-03 Eric Botcazou <ebotcazou@adacore.com> + + * libgnat/s-valued.adb (Integer_to_Decimal): Use truncation for the + scaled divide operation performed for bases other than 10. + 2025-07-01 Eric Botcazou <ebotcazou@adacore.com> PR ada/120705 diff --git a/gcc/ada/doc/gnat_rm/implementation_defined_pragmas.rst b/gcc/ada/doc/gnat_rm/implementation_defined_pragmas.rst index 02013f1..3986298 100644 --- a/gcc/ada/doc/gnat_rm/implementation_defined_pragmas.rst +++ b/gcc/ada/doc/gnat_rm/implementation_defined_pragmas.rst @@ -5914,13 +5914,33 @@ Syntax: pragma Short_Circuit_And_Or; -This configuration pragma causes any occurrence of the AND operator applied to -operands of type Standard.Boolean to be short-circuited (i.e. the AND operator -is treated as if it were AND THEN). Or is similarly treated as OR ELSE. This -may be useful in the context of certification protocols requiring the use of -short-circuited logical operators. If this configuration pragma occurs locally -within the file being compiled, it applies only to the file being compiled. +This configuration pragma causes the predefined AND and OR operators of +type Standard.Boolean to have short-circuit semantics. That is, they +behave like AND THEN and OR ELSE; the right-hand side is not evaluated +if the left-hand side determines the result. This may be useful in the +context of certification protocols requiring the use of short-circuited +logical operators. + There is no requirement that all units in a partition use this option. +However, mixing of short-circuit and non-short-circuit semantics can be +confusing. Therefore, the recommended use is to put the pragma in a +configuration file that applies to the whole program. Alternatively, if +you have a legacy library that should not use this pragma, you can put +it in a separate library project that does not use the pragma. +In any case, fine-grained mixing of the different semantics is not +recommended. If pragma ``Short_Circuit_And_Or`` is specified, then it +is illegal to rename the predefined Boolean AND and OR, or to pass +them to generic formal functions; this corresponds to the fact that +AND THEN and OR ELSE cannot be renamed nor passed as generic formal +functions. + +Note that this pragma has no effect on other logical operators -- +predefined operators of modular types, array-of-boolean types and types +derived from Standard.Boolean, nor user-defined operators. + +See also the pragma ``Unevaluated_Use_Of_Old`` and the restriction +``No_Direct_Boolean_Operators``, which may be useful in conjunction +with ``Short_Circuit_And_Or``. Pragma Short_Descriptors ======================== diff --git a/gcc/ada/exp_ch7.adb b/gcc/ada/exp_ch7.adb index e4daf4b..009bee4 100644 --- a/gcc/ada/exp_ch7.adb +++ b/gcc/ada/exp_ch7.adb @@ -7906,12 +7906,16 @@ package body Exp_Ch7 is if Is_Untagged_Derivation (Typ) then if Is_Protected_Type (Typ) then Utyp := Corresponding_Record_Type (Root_Type (Base_Type (Typ))); - else - Utyp := Underlying_Type (Root_Type (Base_Type (Typ))); - if Is_Protected_Type (Utyp) then - Utyp := Corresponding_Record_Type (Utyp); - end if; + else + declare + Root : constant Entity_Id := + Underlying_Type (Root_Type (Base_Type (Typ))); + begin + if Is_Protected_Type (Root) then + Utyp := Corresponding_Record_Type (Root); + end if; + end; end if; Ref := Unchecked_Convert_To (Utyp, Ref); diff --git a/gcc/ada/exp_util.adb b/gcc/ada/exp_util.adb index 4f98779..2172ce7 100644 --- a/gcc/ada/exp_util.adb +++ b/gcc/ada/exp_util.adb @@ -6190,11 +6190,17 @@ package body Exp_Util is Utyp := Corresponding_Record_Type (Root_Type (Btyp)); else - Utyp := Underlying_Type (Root_Type (Btyp)); - - if Is_Protected_Type (Utyp) then - Utyp := Corresponding_Record_Type (Utyp); - end if; + declare + Root : constant Entity_Id := Underlying_Type (Root_Type (Btyp)); + begin + if Is_Protected_Type (Root) then + Utyp := Corresponding_Record_Type (Root); + else + while No (TSS (Utyp, TSS_Finalize_Address)) loop + Utyp := Underlying_Type (Base_Type (Etype (Utyp))); + end loop; + end if; + end; end if; end if; diff --git a/gcc/ada/freeze.adb b/gcc/ada/freeze.adb index be2115a..3755d9e 100644 --- a/gcc/ada/freeze.adb +++ b/gcc/ada/freeze.adb @@ -765,6 +765,9 @@ package body Freeze is -- in fact constrained by non-static discriminant values. Could be made -- more precise ??? + function Value_Known (Exp : Node_Id) return Boolean; + -- Return True if the value of expression Exp is known at compile time + -------------------- -- Set_Small_Size -- -------------------- @@ -880,13 +883,13 @@ package body Freeze is High := Type_High_Bound (Etype (Index)); end if; - if not Compile_Time_Known_Value (Low) - or else not Compile_Time_Known_Value (High) - or else Etype (Index) = Any_Type - then + if Etype (Index) = Any_Type then return False; - else + elsif Compile_Time_Known_Value (Low) + and then Compile_Time_Known_Value (High) + then + Dim := Expr_Value (High) - Expr_Value (Low) + 1; if Dim > Uint_0 then @@ -894,6 +897,12 @@ package body Freeze is else Size := Uint_0; end if; + + elsif Value_Known (Low) and then Value_Known (High) then + Size := Uint_0; + + else + return False; end if; Next_Index (Index); @@ -1160,6 +1169,70 @@ package body Freeze is return True; end Static_Discriminated_Components; + ----------------- + -- Value_Known -- + ----------------- + + function Value_Known (Exp : Node_Id) return Boolean is + begin + -- This is the immediate case + + if Compile_Time_Known_Value (Exp) then + return True; + end if; + + -- The value may be known only to the back end, the typical example + -- being the alignment or the various sizes of composite types; in + -- the latter case, we may mutually recurse with Size_Known. + + case Nkind (Exp) is + when N_Attribute_Reference => + declare + P : constant Node_Id := Prefix (Exp); + + begin + if not Is_Entity_Name (P) + or else not Is_Type (Entity (P)) + then + return False; + end if; + + case Get_Attribute_Id (Attribute_Name (Exp)) is + when Attribute_Alignment => + return True; + + when Attribute_Component_Size => + return Size_Known (Component_Type (Entity (P))); + + when Attribute_Object_Size + | Attribute_Size + | Attribute_Value_Size + => + return Size_Known (Entity (P)); + + when others => + return False; + end case; + end; + + when N_Binary_Op => + return Value_Known (Left_Opnd (Exp)) + and then Value_Known (Right_Opnd (Exp)); + + when N_Qualified_Expression + | N_Type_Conversion + | N_Unchecked_Type_Conversion + => + return Value_Known (Expression (Exp)); + + when N_Unary_Op => + return Value_Known (Right_Opnd (Exp)); + + when others => + return False; + end case; + end Value_Known; + -- Start of processing for Check_Compile_Time_Size begin diff --git a/gcc/ada/gcc-interface/Make-lang.in b/gcc/ada/gcc-interface/Make-lang.in index 1c93816..bbbd697 100644 --- a/gcc/ada/gcc-interface/Make-lang.in +++ b/gcc/ada/gcc-interface/Make-lang.in @@ -1096,7 +1096,7 @@ check-ada-subtargets: check-acats-subtargets check-gnat-subtargets # No ada-specific selftests selftest-ada: -ACATSDIR = $(TESTSUITEDIR)/ada/acats-2 +ACATSDIR = $(TESTSUITEDIR)/ada/acats-4 ACATSCMD = run_acats.sh check_acats_numbers0:=1 2 3 4 5 6 7 8 9 diff --git a/gcc/ada/gcc-interface/decl.cc b/gcc/ada/gcc-interface/decl.cc index 903ec84..86cbf5b 100644 --- a/gcc/ada/gcc-interface/decl.cc +++ b/gcc/ada/gcc-interface/decl.cc @@ -6421,6 +6421,33 @@ gnat_to_gnu_subprog_type (Entity_Id gnat_subprog, bool definition, since structures are incomplete for the back-end. */ else if (Convention (gnat_subprog) != Convention_Stubbed) { + /* If we have two entries that may be returned in integer registers, + the larger has power-of-2 size and the smaller is integer, then + extend the smaller to this power-of-2 size to get a return type + with power-of-2 size and no holes, again to speed up accesses. */ + if (list_length (gnu_cico_field_list) == 2 + && gnu_cico_only_integral_type) + { + tree typ1 = TREE_TYPE (gnu_cico_field_list); + tree typ2 = TREE_TYPE (DECL_CHAIN (gnu_cico_field_list)); + if (TREE_CODE (typ1) == INTEGER_TYPE + && integer_pow2p (TYPE_SIZE (typ2)) + && compare_tree_int (TYPE_SIZE (typ2), + MAX_FIXED_MODE_SIZE) <= 0 + && tree_int_cst_lt (TYPE_SIZE (typ1), TYPE_SIZE (typ2))) + TREE_TYPE (gnu_cico_field_list) + = gnat_type_for_size (TREE_INT_CST_LOW (TYPE_SIZE (typ2)), + TYPE_UNSIGNED (typ1)); + else if (TREE_CODE (typ2) == INTEGER_TYPE + && integer_pow2p (TYPE_SIZE (typ1)) + && compare_tree_int (TYPE_SIZE (typ1), + MAX_FIXED_MODE_SIZE) <= 0 + && tree_int_cst_lt (TYPE_SIZE (typ2), TYPE_SIZE (typ1))) + TREE_TYPE (DECL_CHAIN (gnu_cico_field_list)) + = gnat_type_for_size (TREE_INT_CST_LOW (TYPE_SIZE (typ1)), + TYPE_UNSIGNED (typ2)); + } + finish_record_type (gnu_cico_return_type, nreverse (gnu_cico_field_list), 0, false); diff --git a/gcc/ada/gcc-interface/trans.cc b/gcc/ada/gcc-interface/trans.cc index e02804b..a7254fe 100644 --- a/gcc/ada/gcc-interface/trans.cc +++ b/gcc/ada/gcc-interface/trans.cc @@ -4049,7 +4049,7 @@ Subprogram_Body_to_gnu (Node_Id gnat_node) tree gnu_decl; /* Skip any entries that have been already filled in; they must - correspond to In Out parameters. */ + correspond to In Out parameters or previous Out parameters. */ while (gnu_cico_entry && TREE_VALUE (gnu_cico_entry)) gnu_cico_entry = TREE_CHAIN (gnu_cico_entry); @@ -4059,11 +4059,22 @@ Subprogram_Body_to_gnu (Node_Id gnat_node) if (DECL_BY_REF_P (gnu_decl)) gnu_decl = build_unary_op (INDIRECT_REF, NULL_TREE, gnu_decl); - /* Do any needed references for padded types. */ - TREE_VALUE (gnu_cico_entry) - = convert (TREE_TYPE (TREE_PURPOSE (gnu_cico_entry)), gnu_decl); + TREE_VALUE (gnu_cico_entry) = gnu_decl; } + + /* Finally, ensure type consistency between TREE_PURPOSE and TREE_VALUE + so that the assignment of the latter to the former can be done. */ + tree gnu_cico_entry = gnu_cico_list; + while (gnu_cico_entry) + { + if (!VOID_TYPE_P (TREE_VALUE (gnu_cico_entry))) + TREE_VALUE (gnu_cico_entry) + = convert (TREE_TYPE (TREE_PURPOSE (gnu_cico_entry)), + TREE_VALUE (gnu_cico_entry)); + gnu_cico_entry = TREE_CHAIN (gnu_cico_entry); + } } + else vec_safe_push (gnu_return_label_stack, NULL_TREE); @@ -4161,9 +4172,13 @@ Subprogram_Body_to_gnu (Node_Id gnat_node) } } - /* Otherwise, if this is a procedure or a function which does not return - by invisible reference, we can do a direct block-copy out. */ - else + /* Otherwise, if this is a procedure or a function that does not return + by invisible reference, we can do a direct block-copy out, but we do + not need to do it for a null initialization procedure when the _Init + parameter is not passed in since we would copy uninitialized bits. */ + else if (!(Is_Null_Init_Proc (gnat_subprog) + && list_length (gnu_cico_list) == 1 + && TREE_CODE (TREE_VALUE (gnu_cico_list)) == VAR_DECL)) { tree gnu_retval; diff --git a/gcc/ada/gcc-interface/utils.cc b/gcc/ada/gcc-interface/utils.cc index 23737c3..7324bee 100644 --- a/gcc/ada/gcc-interface/utils.cc +++ b/gcc/ada/gcc-interface/utils.cc @@ -1225,7 +1225,6 @@ make_packable_type (tree type, bool in_record, unsigned int max_align) Note that we rely on the pointer equality created here for TYPE_NAME to look through conversions in various places. */ TYPE_NAME (new_type) = TYPE_NAME (type); - TYPE_PACKED (new_type) = 1; TYPE_JUSTIFIED_MODULAR_P (new_type) = TYPE_JUSTIFIED_MODULAR_P (type); TYPE_CONTAINS_TEMPLATE_P (new_type) = TYPE_CONTAINS_TEMPLATE_P (type); TYPE_REVERSE_STORAGE_ORDER (new_type) = TYPE_REVERSE_STORAGE_ORDER (type); @@ -1240,6 +1239,8 @@ make_packable_type (tree type, bool in_record, unsigned int max_align) new_size = ceil_pow2 (size); new_align = MIN (new_size, BIGGEST_ALIGNMENT); SET_TYPE_ALIGN (new_type, new_align); + /* build_aligned_type needs to be able to adjust back the alignment. */ + TYPE_PACKED (new_type) = 0; } else { @@ -1261,6 +1262,7 @@ make_packable_type (tree type, bool in_record, unsigned int max_align) if (max_align > 0 && new_align > max_align) new_align = max_align; SET_TYPE_ALIGN (new_type, MIN (align, new_align)); + TYPE_PACKED (new_type) = 1; } TYPE_USER_ALIGN (new_type) = 1; diff --git a/gcc/ada/gnat_rm.texi b/gcc/ada/gnat_rm.texi index 79fb225..b0a14b0 100644 --- a/gcc/ada/gnat_rm.texi +++ b/gcc/ada/gnat_rm.texi @@ -19,7 +19,7 @@ @copying @quotation -GNAT Reference Manual , Jun 27, 2025 +GNAT Reference Manual , Jul 03, 2025 AdaCore @@ -7548,13 +7548,33 @@ Syntax: pragma Short_Circuit_And_Or; @end example -This configuration pragma causes any occurrence of the AND operator applied to -operands of type Standard.Boolean to be short-circuited (i.e. the AND operator -is treated as if it were AND THEN). Or is similarly treated as OR ELSE. This -may be useful in the context of certification protocols requiring the use of -short-circuited logical operators. If this configuration pragma occurs locally -within the file being compiled, it applies only to the file being compiled. +This configuration pragma causes the predefined AND and OR operators of +type Standard.Boolean to have short-circuit semantics. That is, they +behave like AND THEN and OR ELSE; the right-hand side is not evaluated +if the left-hand side determines the result. This may be useful in the +context of certification protocols requiring the use of short-circuited +logical operators. + There is no requirement that all units in a partition use this option. +However, mixing of short-circuit and non-short-circuit semantics can be +confusing. Therefore, the recommended use is to put the pragma in a +configuration file that applies to the whole program. Alternatively, if +you have a legacy library that should not use this pragma, you can put +it in a separate library project that does not use the pragma. +In any case, fine-grained mixing of the different semantics is not +recommended. If pragma @code{Short_Circuit_And_Or} is specified, then it +is illegal to rename the predefined Boolean AND and OR, or to pass +them to generic formal functions; this corresponds to the fact that +AND THEN and OR ELSE cannot be renamed nor passed as generic formal +functions. + +Note that this pragma has no effect on other logical operators – +predefined operators of modular types, array-of-boolean types and types +derived from Standard.Boolean, nor user-defined operators. + +See also the pragma @code{Unevaluated_Use_Of_Old} and the restriction +@code{No_Direct_Boolean_Operators}, which may be useful in conjunction +with @code{Short_Circuit_And_Or}. @node Pragma Short_Descriptors,Pragma Side_Effects,Pragma Short_Circuit_And_Or,Implementation Defined Pragmas @anchor{gnat_rm/implementation_defined_pragmas pragma-short-descriptors}@anchor{ed} diff --git a/gcc/ada/mutably_tagged.adb b/gcc/ada/mutably_tagged.adb index 153d168..b04ba92 100644 --- a/gcc/ada/mutably_tagged.adb +++ b/gcc/ada/mutably_tagged.adb @@ -40,6 +40,7 @@ with Sinfo.Nodes; use Sinfo.Nodes; with Sinfo.Utils; use Sinfo.Utils; with Stringt; use Stringt; with Tbuild; use Tbuild; +with Uintp; use Uintp; package body Mutably_Tagged is @@ -205,21 +206,41 @@ package body Mutably_Tagged is Mut_Tag_Typ : Entity_Id) return Node_Id is Loc : constant Source_Ptr := Sloc (New_Typ); + + CW_Size : constant Uint := RM_Size (Mut_Tag_Typ); + + function To_Mixed_Case (S : String) return String; + -- convert string to mixed case + + ------------------- + -- To_Mixed_Case -- + ------------------- + + function To_Mixed_Case (S : String) return String is + Buf : Bounded_String; + begin + Append (Buf, S); + Set_Casing (Buf, Mixed_Case); + return +Buf; + end To_Mixed_Case; + + -- Start of processing for Make_CW_Size_Compile_Check + begin - -- Generate a string literal for New_Typ's name which is needed for - -- printing within the Compile_Time_Error. + -- Build a Compile_Time_Error pragma in order to defer the + -- (compile-time) size check until after the back end has + -- determined sizes. + -- + -- It would be nice if we could somehow include the value of + -- New_Type'Size in the error message, but it is not clear how to + -- accomplish that with the current FE/BE interfaces. + + -- Get New_Typ's name (in mixed case) into the name buffer; + -- this is used immediately afterwards in the Make_Pragma call. Get_Decoded_Name_String (Chars (New_Typ)); Set_Casing (Mixed_Case); - -- Build a pragma Compile_Time_Error to force the backend to - -- preform appropriate sizing checks. - - -- Generate: - -- pragma Compile_Time_Error - -- (New_Typ'Size < Mut_Tag_Typ'Size, - -- "class size for by-reference type ""New_Typ"" too small") - return Make_Pragma (Loc, Chars => Name_Compile_Time_Error, @@ -233,19 +254,18 @@ package body Mutably_Tagged is Prefix => New_Occurrence_Of (New_Typ, Loc)), Right_Opnd => - Make_Integer_Literal (Loc, - RM_Size (Mut_Tag_Typ))))), + Make_Integer_Literal (Loc, CW_Size)))), Make_Pragma_Argument_Association (Loc, Expression => - - -- Is it possible to print the size of New_Typ via - -- Validate_Compile_Time_Warning_Or_Error after the back-end - -- has run to generate the error message manually ??? - Make_String_Literal (Loc, - "class size for by-reference type """ - & To_String (String_From_Name_Buffer) - & """ too small")))); + To_String (String_From_Name_Buffer) + & "'Size exceeds " + & To_Mixed_Case ( + To_String (Fully_Qualified_Name_String + (Find_Specific_Type (Mut_Tag_Typ), + Append_NUL => False))) + & "'Size'Class limit of " + & UI_Image (CW_Size))))); end Make_CW_Size_Compile_Check; ------------------------------------ diff --git a/gcc/ada/sem_aux.ads b/gcc/ada/sem_aux.ads index 5a63002..aad5d32 100644 --- a/gcc/ada/sem_aux.ads +++ b/gcc/ada/sem_aux.ads @@ -105,7 +105,7 @@ package Sem_Aux is -- this is equivalent to First_Entity. The exception arises for tagged -- types, where the tag itself is prepended to the front of the entity -- chain, so the First_Discriminant function steps past the tag if it is - -- present. When called on a private type with unknown discriminants, the + -- present. When called on a private type with unknown discriminants, the -- function always returns Empty. -- WARNING: There is a matching C declaration of this subprogram in fe.h diff --git a/gcc/ada/sem_ch13.adb b/gcc/ada/sem_ch13.adb index 1e88ef4..99acbf8 100644 --- a/gcc/ada/sem_ch13.adb +++ b/gcc/ada/sem_ch13.adb @@ -4634,6 +4634,7 @@ package body Sem_Ch13 is when Aspect_Designated_Storage_Model => if not All_Extensions_Allowed then + Error_Msg_Name_1 := Nam; Error_Msg_GNAT_Extension ("aspect %", Loc); goto Continue; @@ -8861,6 +8862,43 @@ package body Sem_Ch13 is Num_Repped_Components : Nat := 0; Num_Unrepped_Components : Nat := 0; + function Unchecked_Union_Pragma_Pending return Boolean; + -- Return True in the corner case of an Unchecked_Union pragma + -- occuring after the record representation clause (which + -- means that Is_Unchecked_Union will return False for Rectype, + -- even though it would return True if called later after the + -- pragma is analyzed). + + ------------------------------------ + -- Unchecked_Union_Pragma_Pending -- + ------------------------------------ + + function Unchecked_Union_Pragma_Pending return Boolean is + Decl_List_Element : Node_Id := N; + Pragma_Arg : Node_Id; + begin + while Present (Decl_List_Element) loop + if Nkind (Decl_List_Element) = N_Pragma + and then Get_Pragma_Id (Decl_List_Element) = + Pragma_Unchecked_Union + and then not Is_Empty_List (Pragma_Argument_Associations + (Decl_List_Element)) + then + Pragma_Arg := Get_Pragma_Arg + (First (Pragma_Argument_Associations + (Decl_List_Element))); + if Nkind (Pragma_Arg) = N_Identifier + and then Chars (Pragma_Arg) = Chars (Rectype) + then + return True; + end if; + end if; + + Next (Decl_List_Element); + end loop; + return False; + end Unchecked_Union_Pragma_Pending; + begin -- First count number of repped and unrepped components @@ -8899,8 +8937,10 @@ package body Sem_Ch13 is -- Ignore discriminant in unchecked union, since it is -- not there, and cannot have a component clause. - and then (not Is_Unchecked_Union (Rectype) - or else Ekind (Comp) /= E_Discriminant) + and then (Ekind (Comp) /= E_Discriminant + or else not (Is_Unchecked_Union (Rectype) + or else + Unchecked_Union_Pragma_Pending)) then Error_Msg_Sloc := Sloc (Comp); Error_Msg_NE @@ -11406,24 +11446,16 @@ package body Sem_Ch13 is ---------------------------------- procedure Check_Aspect_At_Freeze_Point (ASN : Node_Id) is - Ident : constant Node_Id := Identifier (ASN); - -- Identifier (use Entity field to save expression) - Expr : constant Node_Id := Expression (ASN); - -- For cases where using Entity (Identifier) doesn't work - A_Id : constant Aspect_Id := Get_Aspect_Id (Chars (Ident)); + A_Id : constant Aspect_Id := Get_Aspect_Id (Chars (Identifier (ASN))); T : Entity_Id := Empty; -- Type required for preanalyze call begin - -- On entry to this procedure, Entity (Ident) contains a copy of the - -- original expression from the aspect, saved for this purpose. - - -- On exit from this procedure Entity (Ident) is unchanged, still - -- containing that copy, but Expression (Ident) is a preanalyzed copy - -- of the expression, preanalyzed just after the freeze point. + -- On exit from this procedure, Expression (ASN) is a copy of the + -- original expression, preanalyzed just after the freeze point. -- Make a copy of the expression to be preanalyzed diff --git a/gcc/ada/sem_ch8.adb b/gcc/ada/sem_ch8.adb index db892d0..54066b4 100644 --- a/gcc/ada/sem_ch8.adb +++ b/gcc/ada/sem_ch8.adb @@ -4270,6 +4270,40 @@ package body Sem_Ch8 is Local_Restrict.Check_Actual_Subprogram_For_Instance (Actual_Subp_Name => Nam, Formal_Subp => Formal_Spec); end if; + + -- If pragma Short_Circuit_And_Or is specified, then we give an error + -- for renaming an operator that is made short circuit. + -- For example, this is illegal: + -- + -- function My_And (X, Y: Boolean) return Boolean renames "and"; + -- + -- if "and" denotes the usual predefined Boolean operator. Otherwise, + -- the semantics are confusing (sometimes short circuit, and sometimes + -- not, for calls to My_And). If we ever relax this rule, we will need + -- to clean up that run-time semantics. + + if Short_Circuit_And_Or + and then Chars (Old_S) in Name_Op_And | Name_Op_Or + and then In_Extended_Main_Source_Unit (N) + and then Etype (Old_S) = Standard_Boolean + and then Is_Intrinsic_Subprogram (Old_S) + then + if Comes_From_Source (N) then + Error_Msg_N + ("pragma Short_Circuit_And_Or disallows renaming of " & + "operator", N); + + -- Same error in case of an instantiation with My_And => "and" + + elsif Present (Corresponding_Formal_Spec (N)) then + Error_Msg_N + ("pragma Short_Circuit_And_Or disallows passing of " & + "operator as a generic actual", N); + + else + raise Program_Error; + end if; + end if; end Analyze_Subprogram_Renaming; ------------------------- diff --git a/gcc/ada/sem_res.adb b/gcc/ada/sem_res.adb index 96e8da6..e44994a 100644 --- a/gcc/ada/sem_res.adb +++ b/gcc/ada/sem_res.adb @@ -12463,16 +12463,6 @@ package body Sem_Res is Orig_N := Original_Node (Expression (Orig_N)); Orig_T := Target_Typ; - -- If the node is part of a larger expression, the Target_Type - -- may not be the original type of the node if the context is a - -- condition. Recover original type to see if conversion is needed. - - if Is_Boolean_Type (Orig_T) - and then Nkind (Parent (N)) in N_Op - then - Orig_T := Etype (Parent (N)); - end if; - -- If we have an entity name, then give the warning if the entity -- is the right type, or if it is a loop parameter covered by the -- original type (that's needed because loop parameters have an @@ -12548,6 +12538,16 @@ package body Sem_Res is then null; + -- Do not warn if original source-level conversion was + -- between two different types. + + elsif Nkind (Original_Node (N)) = N_Type_Conversion + and then + Base_Type (Etype (Subtype_Mark (Original_Node (N)))) + /= Base_Type (Etype (Expression (Original_Node (N)))) + then + null; + -- Here we give the redundant conversion warning. If it is an -- entity, give the name of the entity in the message. If not, -- just mention the expression. diff --git a/gcc/c-family/c-common.cc b/gcc/c-family/c-common.cc index 9d69298..362dc50 100644 --- a/gcc/c-family/c-common.cc +++ b/gcc/c-family/c-common.cc @@ -3438,20 +3438,41 @@ pointer_int_sum (location_t loc, enum tree_code resultcode, an overflow error if the constant is negative but INTOP is not. */ && (TYPE_OVERFLOW_UNDEFINED (TREE_TYPE (intop)) || (TYPE_PRECISION (TREE_TYPE (intop)) - == TYPE_PRECISION (TREE_TYPE (ptrop))))) - { - enum tree_code subcode = resultcode; - tree int_type = TREE_TYPE (intop); - if (TREE_CODE (intop) == MINUS_EXPR) - subcode = (subcode == PLUS_EXPR ? MINUS_EXPR : PLUS_EXPR); - /* Convert both subexpression types to the type of intop, - because weird cases involving pointer arithmetic - can result in a sum or difference with different type args. */ - ptrop = build_binary_op (EXPR_LOCATION (TREE_OPERAND (intop, 1)), - subcode, ptrop, - convert (int_type, TREE_OPERAND (intop, 1)), - true); - intop = convert (int_type, TREE_OPERAND (intop, 0)); + == TYPE_PRECISION (TREE_TYPE (ptrop)))) + && TYPE_PRECISION (TREE_TYPE (intop)) <= TYPE_PRECISION (sizetype)) + { + tree intop0 = TREE_OPERAND (intop, 0); + tree intop1 = TREE_OPERAND (intop, 1); + if (TYPE_PRECISION (TREE_TYPE (intop)) != TYPE_PRECISION (sizetype) + || TYPE_UNSIGNED (TREE_TYPE (intop)) != TYPE_UNSIGNED (sizetype)) + { + tree optype = c_common_type_for_size (TYPE_PRECISION (sizetype), + TYPE_UNSIGNED (sizetype)); + intop0 = convert (optype, intop0); + intop1 = convert (optype, intop1); + } + tree t = fold_build2_loc (loc, MULT_EXPR, TREE_TYPE (intop0), intop0, + convert (TREE_TYPE (intop0), size_exp)); + intop0 = convert (sizetype, t); + if (TREE_OVERFLOW_P (intop0) && !TREE_OVERFLOW (t)) + intop0 = wide_int_to_tree (TREE_TYPE (intop0), wi::to_wide (intop0)); + t = fold_build2_loc (loc, MULT_EXPR, TREE_TYPE (intop1), intop1, + convert (TREE_TYPE (intop1), size_exp)); + intop1 = convert (sizetype, t); + if (TREE_OVERFLOW_P (intop1) && !TREE_OVERFLOW (t)) + intop1 = wide_int_to_tree (TREE_TYPE (intop1), wi::to_wide (intop1)); + intop = build_binary_op (EXPR_LOCATION (intop), TREE_CODE (intop), + intop0, intop1, true); + + /* Create the sum or difference. */ + if (resultcode == MINUS_EXPR) + intop = fold_build1_loc (loc, NEGATE_EXPR, sizetype, intop); + + ret = fold_build_pointer_plus_loc (loc, ptrop, intop); + + fold_undefer_and_ignore_overflow_warnings (); + + return ret; } /* Convert the integer argument to a type the same size as sizetype diff --git a/gcc/common.opt b/gcc/common.opt index 8163e03..3d65656 100644 --- a/gcc/common.opt +++ b/gcc/common.opt @@ -547,7 +547,7 @@ Warn if an array is accessed out of bounds. Wauto-profile Common Var(warn_auto_profile) Warning -Warn about problems with auto-profile data +Warn about problems with auto-profile data. Wuse-after-free Common Var(warn_use_after_free) Warning diff --git a/gcc/common.opt.urls b/gcc/common.opt.urls index c705089..a507168 100644 --- a/gcc/common.opt.urls +++ b/gcc/common.opt.urls @@ -64,6 +64,9 @@ UrlSuffix(gcc/Warning-Options.html#index-Warray-bounds) Warray-bounds= UrlSuffix(gcc/Warning-Options.html#index-Warray-bounds) +Wauto-profile +UrlSuffix(gcc/Warning-Options.html#index-Wauto-profile) + Wuse-after-free UrlSuffix(gcc/Warning-Options.html#index-Wno-use-after-free) diff --git a/gcc/config/loongarch/loongarch.md b/gcc/config/loongarch/loongarch.md index f7005de..32ef980 100644 --- a/gcc/config/loongarch/loongarch.md +++ b/gcc/config/loongarch/loongarch.md @@ -4573,9 +4573,10 @@ "&& true" [(set (match_dup 3) (match_dup 2)) (set (match_dup 0) - (unspec:SI [(match_dup 3) (subreg:SI (match_dup 1) 0)] CRC))] + (unspec:SI [(match_dup 3) (match_dup 1)] CRC))] { operands[3] = gen_reg_rtx (<MODE>mode); + operands[1] = lowpart_subreg (SImode, operands[1], DImode); }) ;; With normal or medium code models, if the only use of a pc-relative diff --git a/gcc/config/riscv/riscv-v.cc b/gcc/config/riscv/riscv-v.cc index ce1633c..a5ab8dd 100644 --- a/gcc/config/riscv/riscv-v.cc +++ b/gcc/config/riscv/riscv-v.cc @@ -5544,6 +5544,7 @@ expand_vx_binary_vec_dup_vec (rtx op_0, rtx op_1, rtx op_2, case SMIN: case UMIN: case US_PLUS: + case SS_PLUS: icode = code_for_pred_scalar (code, mode); break; case MINUS: @@ -5584,6 +5585,7 @@ expand_vx_binary_vec_vec_dup (rtx op_0, rtx op_1, rtx op_2, case UMIN: case US_PLUS: case US_MINUS: + case SS_PLUS: icode = code_for_pred_scalar (code, mode); break; default: diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc index 8fa1082..ecdb61e 100644 --- a/gcc/config/riscv/riscv.cc +++ b/gcc/config/riscv/riscv.cc @@ -3997,6 +3997,7 @@ riscv_rtx_costs (rtx x, machine_mode mode, int outer_code, int opno ATTRIBUTE_UN case UMOD: case US_PLUS: case US_MINUS: + case SS_PLUS: *total = get_vector_binary_rtx_cost (op, scalar2vr_cost); break; default: @@ -10253,11 +10254,15 @@ riscv_macro_fusion_pair_p (rtx_insn *prev, rtx_insn *curr) && CONST_INT_P (XEXP (SET_SRC (prev_set), 1)) && CONST_INT_P (XEXP (SET_SRC (curr_set), 1)) && INTVAL (XEXP (SET_SRC (prev_set), 1)) == 32 - && (( INTVAL (XEXP (SET_SRC (curr_set), 1)) == 32 - && riscv_fusion_enabled_p(RISCV_FUSE_ZEXTW) ) - || ( INTVAL (XEXP (SET_SRC (curr_set), 1)) < 32 - && riscv_fusion_enabled_p(RISCV_FUSE_ZEXTWS)))) - return true; + && ((INTVAL (XEXP (SET_SRC (curr_set), 1)) == 32 + && riscv_fusion_enabled_p (RISCV_FUSE_ZEXTW) ) + || (INTVAL (XEXP (SET_SRC (curr_set), 1)) < 32 + && riscv_fusion_enabled_p (RISCV_FUSE_ZEXTWS)))) + { + if (dump_file) + fprintf (dump_file, "RISCV_FUSE_ZEXTWS\n"); + return true; + } } if (simple_sets_p && riscv_fusion_enabled_p (RISCV_FUSE_ZEXTH) @@ -10278,7 +10283,11 @@ riscv_macro_fusion_pair_p (rtx_insn *prev, rtx_insn *curr) && CONST_INT_P (XEXP (SET_SRC (curr_set), 1)) && INTVAL (XEXP (SET_SRC (prev_set), 1)) == 48 && INTVAL (XEXP (SET_SRC (curr_set), 1)) == 48) - return true; + { + if (dump_file) + fprintf (dump_file,"RISCV_FUSE_ZEXTH\n"); + return true; + } } if (simple_sets_p && riscv_fusion_enabled_p (RISCV_FUSE_LDINDEXED) @@ -10297,7 +10306,11 @@ riscv_macro_fusion_pair_p (rtx_insn *prev, rtx_insn *curr) && GET_CODE (SET_SRC (prev_set)) == PLUS && REG_P (XEXP (SET_SRC (prev_set), 0)) && REG_P (XEXP (SET_SRC (prev_set), 1))) - return true; + { + if (dump_file) + fprintf (dump_file, "RISCV_FUSE_LDINDEXED\n"); + return true; + } /* We are trying to match the following: prev (add) == (set (reg:DI rD) @@ -10313,7 +10326,11 @@ riscv_macro_fusion_pair_p (rtx_insn *prev, rtx_insn *curr) && GET_CODE (SET_SRC (prev_set)) == PLUS && REG_P (XEXP (SET_SRC (prev_set), 0)) && REG_P (XEXP (SET_SRC (prev_set), 1))) - return true; + { + if (dump_file) + fprintf (dump_file, "RISCV_FUSE_LDINDEXED\n"); + return true; + } } if (simple_sets_p && riscv_fusion_enabled_p (RISCV_FUSE_LDPREINCREMENT) @@ -10332,7 +10349,11 @@ riscv_macro_fusion_pair_p (rtx_insn *prev, rtx_insn *curr) && GET_CODE (SET_SRC (prev_set)) == PLUS && REG_P (XEXP (SET_SRC (prev_set), 0)) && CONST_INT_P (XEXP (SET_SRC (prev_set), 1))) - return true; + { + if (dump_file) + fprintf (dump_file, "RISCV_FUSE_LDPREINCREMENT\n"); + return true; + } } if (simple_sets_p && riscv_fusion_enabled_p (RISCV_FUSE_LUI_ADDI) @@ -10350,7 +10371,11 @@ riscv_macro_fusion_pair_p (rtx_insn *prev, rtx_insn *curr) && (GET_CODE (SET_SRC (prev_set)) == HIGH || (CONST_INT_P (SET_SRC (prev_set)) && LUI_OPERAND (INTVAL (SET_SRC (prev_set)))))) - return true; + { + if (dump_file) + fprintf (dump_file, "RISCV_FUSE_LUI_ADDI\n"); + return true; + } } if (simple_sets_p && riscv_fusion_enabled_p (RISCV_FUSE_AUIPC_ADDI) @@ -10372,7 +10397,11 @@ riscv_macro_fusion_pair_p (rtx_insn *prev, rtx_insn *curr) && CONST_INT_P (XEXP (SET_SRC (curr_set), 1)) && SMALL_OPERAND (INTVAL (XEXP (SET_SRC (curr_set), 1)))))) - return true; + { + if (dump_file) + fprintf (dump_file, "RISCV_FUSE_AUIPC_ADDI\n"); + return true; + } } if (simple_sets_p && riscv_fusion_enabled_p (RISCV_FUSE_LUI_LD) @@ -10392,14 +10421,22 @@ riscv_macro_fusion_pair_p (rtx_insn *prev, rtx_insn *curr) && SCALAR_INT_MODE_P (GET_MODE (SET_DEST (curr_set))) && GET_CODE (XEXP (SET_SRC (curr_set), 0)) == PLUS && REGNO (XEXP (XEXP (SET_SRC (curr_set), 0), 0)) == prev_dest_regno) - return true; + { + if (dump_file) + fprintf (dump_file, "RISCV_FUSE_LUI_LD\n"); + return true; + } if (GET_CODE (SET_SRC (prev_set)) == HIGH && MEM_P (SET_SRC (curr_set)) && SCALAR_INT_MODE_P (GET_MODE (SET_DEST (curr_set))) && GET_CODE (XEXP (SET_SRC (curr_set), 0)) == LO_SUM && REGNO (XEXP (XEXP (SET_SRC (curr_set), 0), 0)) == prev_dest_regno) - return true; + { + if (dump_file) + fprintf (dump_file, "RISCV_FUSE_LUI_LD\n"); + return true; + } if (GET_CODE (SET_SRC (prev_set)) == HIGH && (GET_CODE (SET_SRC (curr_set)) == SIGN_EXTEND @@ -10409,7 +10446,11 @@ riscv_macro_fusion_pair_p (rtx_insn *prev, rtx_insn *curr) && (GET_CODE (XEXP (XEXP (SET_SRC (curr_set), 0), 0)) == LO_SUM && (REGNO (XEXP (XEXP (XEXP (SET_SRC (curr_set), 0), 0), 0)) == prev_dest_regno))) - return true; + { + if (dump_file) + fprintf (dump_file, "RISCV_FUSE_LUI_LD\n"); + return true; + } } if (simple_sets_p && riscv_fusion_enabled_p (RISCV_FUSE_AUIPC_LD) @@ -10425,7 +10466,11 @@ riscv_macro_fusion_pair_p (rtx_insn *prev, rtx_insn *curr) && MEM_P (SET_SRC (curr_set)) && SCALAR_INT_MODE_P (GET_MODE (SET_DEST (curr_set))) && GET_CODE (XEXP (SET_SRC (curr_set), 0)) == PLUS) - return true; + { + if (dump_file) + fprintf (dump_file, "RISCV_FUSE_AUIPC_LD\n"); + return true; + } } if (simple_sets_p && riscv_fusion_enabled_p (RISCV_FUSE_ALIGNED_STD)) @@ -10473,7 +10518,11 @@ riscv_macro_fusion_pair_p (rtx_insn *prev, rtx_insn *curr) lower offset. */ if ((INTVAL (offset_prev) % 16) == 0 && (INTVAL (offset_prev) + 8 == INTVAL (offset_curr))) - return true; + { + if (dump_file) + fprintf (dump_file, "RISCV_FUSE_ALIGNED_STD\n"); + return true; + } } } } diff --git a/gcc/config/riscv/vector-iterators.md b/gcc/config/riscv/vector-iterators.md index 7825444..fd0959c 100644 --- a/gcc/config/riscv/vector-iterators.md +++ b/gcc/config/riscv/vector-iterators.md @@ -4042,11 +4042,11 @@ ]) (define_code_iterator any_int_binop_no_shift_v_vdup [ - plus minus and ior xor mult div udiv mod umod smax umax smin umin us_plus us_minus + plus minus and ior xor mult div udiv mod umod smax umax smin umin us_plus us_minus ss_plus ]) (define_code_iterator any_int_binop_no_shift_vdup_v [ - plus minus and ior xor mult smax umax smin umin us_plus + plus minus and ior xor mult smax umax smin umin us_plus ss_plus ]) (define_code_iterator any_int_unop [neg not]) diff --git a/gcc/cp/ChangeLog b/gcc/cp/ChangeLog index ff7582d..b1b173c 100644 --- a/gcc/cp/ChangeLog +++ b/gcc/cp/ChangeLog @@ -1,3 +1,28 @@ +2025-07-03 Jason Merrill <jason@redhat.com> + + PR c++/120716 + * lambda.cc (finish_lambda_function): Pass cur_stmt_list to + prune_lambda_captures. + +2025-07-03 Jason Merrill <jason@redhat.com> + + PR c++/120748 + * lambda.cc (lambda_expr_this_capture): Don't return a FIELD_DECL. + * parser.cc (cp_parser_primary_expression): Ignore THIS_FORBIDDEN + if cp_unevaluated_operand. + +2025-07-03 Jakub Jelinek <jakub@redhat.com> + + PR c++/120940 + * typeck.cc (cp_build_array_ref): Fix a pasto. + +2025-07-03 Jason Merrill <jason@redhat.com> + + PR c++/120684 + PR c++/118856 + * constexpr.cc (cxx_eval_constant_expression) [TARGET_EXPR]: Clear + the value first if is_complex. + 2025-07-01 Jakub Jelinek <jakub@redhat.com> PR c++/120471 diff --git a/gcc/cp/lambda.cc b/gcc/cp/lambda.cc index 2a9061a..182cffa 100644 --- a/gcc/cp/lambda.cc +++ b/gcc/cp/lambda.cc @@ -823,6 +823,14 @@ lambda_expr_this_capture (tree lambda, int add_capture_p) if (cp_unevaluated_operand) add_capture_p = false; + /* If we captured 'this' but don't have a capture proxy yet, look up the + captured 'this' again. */ + if (this_capture && TREE_CODE (this_capture) == FIELD_DECL) + { + gcc_assert (!add_capture_p); + this_capture = NULL_TREE; + } + /* Try to default capture 'this' if we can. */ if (!this_capture) { @@ -940,6 +948,9 @@ lambda_expr_this_capture (tree lambda, int add_capture_p) result = rvalue (result); } + gcc_checking_assert (!result || result == error_mark_node + || TYPE_PTR_P (TREE_TYPE (result))); + return result; } @@ -1939,7 +1950,7 @@ finish_lambda_function (tree body) { finish_function_body (body); - prune_lambda_captures (body); + prune_lambda_captures (cur_stmt_list); /* Finish the function and generate code for it if necessary. */ tree fn = finish_function (/*inline_p=*/true); diff --git a/gcc/cp/parser.cc b/gcc/cp/parser.cc index b1626ac..cac74e3 100644 --- a/gcc/cp/parser.cc +++ b/gcc/cp/parser.cc @@ -6307,7 +6307,10 @@ cp_parser_primary_expression (cp_parser *parser, /* Recognize the `this' keyword. */ case RID_THIS: cp_lexer_consume_token (parser->lexer); - if (parser->local_variables_forbidden_p & THIS_FORBIDDEN) + if ((parser->local_variables_forbidden_p & THIS_FORBIDDEN) + /* It's OK to refer to 'this' in an unevaluated operand in a + lambda default argument (lambda-targ16.C). */ + && !cp_unevaluated_operand) { error_at (token->location, "%<this%> may not be used in this context"); @@ -36661,7 +36664,7 @@ static void cp_parser_abort_tentative_parse (cp_parser* parser) { gcc_assert (parser->context->status != CP_PARSER_STATUS_KIND_COMMITTED - || errorcount > 0); + || seen_error ()); cp_parser_simulate_error (parser); /* Now, pretend that we want to see if the construct was successfully parsed. */ diff --git a/gcc/cp/typeck.cc b/gcc/cp/typeck.cc index 447fe81..0bf5ae4 100644 --- a/gcc/cp/typeck.cc +++ b/gcc/cp/typeck.cc @@ -4004,7 +4004,7 @@ cp_build_array_ref (location_t loc, tree array, tree idx, tree op0, op1, op2; op0 = TREE_OPERAND (array, 0); op1 = TREE_OPERAND (array, 1); - op2 = TREE_OPERAND (array, 1); + op2 = TREE_OPERAND (array, 2); if (TREE_SIDE_EFFECTS (idx) || !tree_invariant_p (idx)) { /* If idx could possibly have some SAVE_EXPRs, turning diff --git a/gcc/fold-const.cc b/gcc/fold-const.cc index 4749257..8867540 100644 --- a/gcc/fold-const.cc +++ b/gcc/fold-const.cc @@ -15224,7 +15224,7 @@ bool tree_expr_nonnegative_warnv_p (tree t, bool *strict_overflow_p, int depth) { enum tree_code code; - if (t == error_mark_node) + if (error_operand_p (t)) return false; code = TREE_CODE (t); diff --git a/gcc/fortran/ChangeLog b/gcc/fortran/ChangeLog index 0ea9c39..d0537d4 100644 --- a/gcc/fortran/ChangeLog +++ b/gcc/fortran/ChangeLog @@ -1,3 +1,9 @@ +2025-07-03 Andre Vehreschild <vehre@gcc.gnu.org> + + PR fortran/120843 + * resolve.cc (resolve_operator): Remove conformability check, + because it is not in the standard. + 2025-07-01 Harald Anlauf <anlauf@gmx.de> * coarray.cc (check_add_new_component): Treat pure and elemental diff --git a/gcc/fortran/io.cc b/gcc/fortran/io.cc index 7466d8f..4d28c2c 100644 --- a/gcc/fortran/io.cc +++ b/gcc/fortran/io.cc @@ -29,7 +29,7 @@ along with GCC; see the file COPYING3. If not see gfc_st_label format_asterisk = {0, NULL, NULL, -1, ST_LABEL_FORMAT, ST_LABEL_FORMAT, NULL, - 0, {NULL, NULL}, NULL, 0}; + 0, {NULL, {NULL}}, NULL, 0}; typedef struct { diff --git a/gcc/match.pd b/gcc/match.pd index f4416d9..10c2b97 100644 --- a/gcc/match.pd +++ b/gcc/match.pd @@ -3500,7 +3500,18 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT) wide_int c2 = wi::to_wide (@2); wide_int sum = wi::add (c1, c2); } - (if (wi::eq_p (sum, wi::max_value (precision, SIGNED))))))) + (if (wi::eq_p (sum, wi::max_value (precision, SIGNED)))))) + +(match (signed_integer_sat_add @0 @1) + /* T SUM = (T)((UT)X + (UT)IMM) + SAT_S_ADD = (X ^ SUM) < 0 && (X ^ IMM) >= 0 ? (-(T)(X < 0) ^ MAX) : SUM */ + (cond^ (ge (bit_ior:c (bit_xor:c @0 INTEGER_CST@1) + (bit_not (bit_xor:c @0 (nop_convert@2 (plus (nop_convert @0) + INTEGER_CST@3))))) + integer_zerop) + (signed_integer_sat_val @0) + @2) + (if (wi::eq_p (wi::to_wide (@1), wi::to_wide (@3)))))) /* Saturation sub for signed integer. */ (if (INTEGRAL_TYPE_P (type) && !TYPE_UNSIGNED (type)) diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index ab15e88..c70aee2 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,88 @@ +2025-07-03 Jason Merrill <jason@redhat.com> + + PR c++/120716 + * g++.dg/cpp0x/lambda/lambda-constexpr3.C: New test. + * g++.dg/cpp0x/lambda/lambda-constexpr3a.C: New test. + +2025-07-03 Jason Merrill <jason@redhat.com> + + PR c++/120748 + * g++.dg/cpp2a/lambda-targ16.C: New test. + * g++.dg/cpp0x/this1.C: Adjust diagnostics. + +2025-07-03 Jakub Jelinek <jakub@redhat.com> + + PR c++/120940 + * g++.dg/parse/pr120940.C: New test. + * g++.dg/warn/Wduplicated-branches9.C: New test. + +2025-07-03 Juergen Christ <jchrist@linux.ibm.com> + + * gcc.target/s390/vector/vec-perm-merge-1.c: New test. + * gcc.target/s390/vector/vec-perm-pack-1.c: New test. + +2025-07-03 Thomas Schwinge <tschwinge@baylibre.com> + + * c-c++-common/gomp/omp_get_num_devices_initial_device.c: Fix. + * gfortran.dg/gomp/omp_get_num_devices_initial_device.f90: Likewise. + +2025-07-03 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE> + + * gcc.dg/ipa/pr120295.c (glob): Rename to glob_. + +2025-07-03 Karl Meakin <karl.meakin@arm.com> + + * gcc.target/aarch64/cmpbr.c: Update tests. + +2025-07-03 Karl Meakin <karl.meakin@arm.com> + + * gcc.target/aarch64/cmpbr.c: + +2025-07-03 Karl Meakin <karl.meakin@arm.com> + + * lib/target-supports.exp: Add `cmpbr` to the list of extensions. + * gcc.target/aarch64/cmpbr.c: New test. + +2025-07-03 Siddhesh Poyarekar <siddhesh@gotplt.org> + + PR tree-optimization/120780 + * gcc.dg/builtin-dynamic-object-size-pr120780.c: New test case. + +2025-07-03 H.J. Lu <hjl.tools@gmail.com> + + PR target/120936 + * gcc.target/i386/pr120936-1.c: New test + * gcc.target/i386/pr120936-2.c: Likewise. + * gcc.target/i386/pr120936-3.c: Likewise. + * gcc.target/i386/pr120936-4.c: Likewise. + * gcc.target/i386/pr120936-5.c: Likewise. + * gcc.target/i386/pr120936-6.c: Likewise. + * gcc.target/i386/pr120936-7.c: Likewise. + * gcc.target/i386/pr120936-8.c: Likewise. + * gcc.target/i386/pr120936-9.c: Likewise. + * gcc.target/i386/pr120936-10.c: Likewise. + * gcc.target/i386/pr120936-11.c: Likewise. + * gcc.target/i386/pr120936-12.c: Likewise. + * gcc.target/i386/pr93492-3.c: Updated. + * gcc.target/i386/pr93492-5.c: Likewise. + +2025-07-03 Andre Vehreschild <vehre@gcc.gnu.org> + + PR fortran/120843 + * gfortran.dg/coarray/coindexed_6.f90: Enhance test to have + coarray components covered. + +2025-07-03 H.J. Lu <hjl.tools@gmail.com> + + PR target/120908 + * gcc.target/i386/pr120908.c: New test. + +2025-07-03 Jason Merrill <jason@redhat.com> + + PR c++/120684 + PR c++/118856 + * g++.dg/cpp23/range-for10.C: New test. + 2025-07-02 Dimitar Dimitrov <dimitar@dinux.eu> * gcc.target/riscv/mcpu-xt-c908.c: Disable for E ABI variants. diff --git a/gcc/testsuite/g++.dg/cpp0x/lambda/lambda-constexpr3.C b/gcc/testsuite/g++.dg/cpp0x/lambda/lambda-constexpr3.C new file mode 100644 index 0000000..6525213 --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp0x/lambda/lambda-constexpr3.C @@ -0,0 +1,13 @@ +// PR c++/120716 +// { dg-do compile { target c++11 } } + +struct A { int *r; }; + +void +foo () +{ + static int i; + constexpr A a = { &i }; + static_assert (a.r == &i, ""); + [&] { static_assert (a.r != nullptr, ""); } (); +} diff --git a/gcc/testsuite/g++.dg/cpp0x/lambda/lambda-constexpr3a.C b/gcc/testsuite/g++.dg/cpp0x/lambda/lambda-constexpr3a.C new file mode 100644 index 0000000..398e079 --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp0x/lambda/lambda-constexpr3a.C @@ -0,0 +1,12 @@ +// PR c++/120716 +// { dg-do compile { target c++11 } } + +struct A { int *const &r; }; + +void +foo (int x) +{ + constexpr A a = { &x }; // { dg-error "constant" } + static_assert (a.r == &x, ""); // { dg-error "non-constant" } + [&] { static_assert (a.r != nullptr, ""); } (); // { dg-error "non-constant" } +} diff --git a/gcc/testsuite/g++.dg/cpp0x/this1.C b/gcc/testsuite/g++.dg/cpp0x/this1.C index 486e045..e70cd1a 100644 --- a/gcc/testsuite/g++.dg/cpp0x/this1.C +++ b/gcc/testsuite/g++.dg/cpp0x/this1.C @@ -8,10 +8,10 @@ struct S1 { void m3 () noexcept(noexcept(this->a)) { } void m4 () noexcept(noexcept(this)) { } - static auto m5 () -> decltype(this->a) { return 0; } // { dg-error ".this. may not be used in this context" } - static auto m6 () -> decltype(this) { return 0; } // { dg-error ".this. may not be used in this context" } - static void m7 () noexcept(noexcept(this->a)) { } // { dg-error ".this. may not be used in this context" } - static void m8 () noexcept(noexcept(this)) { } // { dg-error ".this. may not be used in this context" } + static auto m5 () -> decltype(this->a) { return 0; } // { dg-error ".this." } + static auto m6 () -> decltype(this) { return 0; } // { dg-error ".this." } + static void m7 () noexcept(noexcept(this->a)) { } // { dg-error ".this." } + static void m8 () noexcept(noexcept(this)) { } // { dg-error ".this." } }; template <typename T> @@ -41,6 +41,6 @@ test () } struct S5 { - friend auto bar() -> decltype(this); // { dg-error ".this. may not be used in this context" } + friend auto bar() -> decltype(this); // { dg-error ".this." } auto bar2() -> decltype(this); }; diff --git a/gcc/testsuite/g++.dg/cpp2a/lambda-targ16.C b/gcc/testsuite/g++.dg/cpp2a/lambda-targ16.C new file mode 100644 index 0000000..11f2337 --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp2a/lambda-targ16.C @@ -0,0 +1,29 @@ +// PR c++/120748 +// From Clang cxx20-lambda-decltype-this.cpp. +// { dg-do compile { target c++20 } } + +namespace PR45881 { +struct A { + void f(); +}; +int id(A*); +void A::f() { + auto z = [*this](auto z2, decltype(z2(this)) z3){}; + z(id,3); +} + +struct B { + void f(); +}; +void B::f() { + auto z = []<typename TT, typename TTT=decltype(TT()(this))>(){return 0;}; + z.template operator()<int(*)(B*)>(); +} +struct C { + void f(); +}; +void C::f() { + auto z = []<typename TT, decltype(TT()(this)) n>(){return 0;}; + z.template operator()<int(*)(C*), 8>(); +} +} // namespace PR45881 diff --git a/gcc/testsuite/g++.dg/parse/pr120940.C b/gcc/testsuite/g++.dg/parse/pr120940.C new file mode 100644 index 0000000..5da36b2 --- /dev/null +++ b/gcc/testsuite/g++.dg/parse/pr120940.C @@ -0,0 +1,18 @@ +// PR c++/120940 +// { dg-do run } + +int a[8] = { 1, 2, 3, 4, 5, 6, 7, 8 }; +int b[8] = { 9, 10, 11, 12, 13, 14, 15, 16 }; + +__attribute__((noipa)) int +foo (int x, int y) +{ + return (x ? a : b)[y]; +} + +int +main () +{ + if (foo (1, 4) != 5 || foo (0, 6) != 15) + __builtin_abort (); +} diff --git a/gcc/testsuite/g++.dg/template/permissive-error3.C b/gcc/testsuite/g++.dg/template/permissive-error3.C new file mode 100644 index 0000000..988b7fa --- /dev/null +++ b/gcc/testsuite/g++.dg/template/permissive-error3.C @@ -0,0 +1,12 @@ +// PR c++/120575 +// { dg-additional-options -Wno-template-body } + +template< int > +struct T {}; + +template< int > +struct S { + + operator typename T< oops >::anything () {}; + +}; diff --git a/gcc/testsuite/g++.dg/warn/Wduplicated-branches9.C b/gcc/testsuite/g++.dg/warn/Wduplicated-branches9.C new file mode 100644 index 0000000..f9fafcd --- /dev/null +++ b/gcc/testsuite/g++.dg/warn/Wduplicated-branches9.C @@ -0,0 +1,11 @@ +// PR c++/120940 +// { dg-do compile } +// { dg-options "-Wduplicated-branches" } + +static char a[16][8], b[16][8]; + +char * +foo (int x, int y) +{ + return (x ? a : b)[y]; +} diff --git a/gcc/testsuite/gcc.c-torture/compile/pr120807.c b/gcc/testsuite/gcc.c-torture/compile/pr120807.c new file mode 100644 index 0000000..9b37e60 --- /dev/null +++ b/gcc/testsuite/gcc.c-torture/compile/pr120807.c @@ -0,0 +1,20 @@ +typedef __UINT8_TYPE__ uint8_t; +typedef __UINT32_TYPE__ uint32_t; + +typedef struct +{ + uint32_t dword[2]; + uint8_t byte[8]; +} reg64_t; +reg64_t TestF20F_opgd, TestF20F_oped; + +void +TestF20F () +{ + TestF20F_opgd.dword[0] ^= TestF20F_oped.byte[0]; + for (int i = 0; i < 8; i++) + if (TestF20F_opgd.dword[0] & 1) + TestF20F_opgd.dword[0] = TestF20F_opgd.dword[0] >> 1 ^ (uint32_t)2197175160UL; + else + TestF20F_opgd.dword[0] = TestF20F_opgd.dword[0] >> 1; +} diff --git a/gcc/testsuite/gcc.dg/pr118948-1.c b/gcc/testsuite/gcc.dg/pr118948-1.c new file mode 100644 index 0000000..2a46cf1 --- /dev/null +++ b/gcc/testsuite/gcc.dg/pr118948-1.c @@ -0,0 +1,12 @@ +/* { dg-do compile } */ +/* { dg-options "" } */ + +/* PR c/118948 */ + +/* Used to ICE in tree_expr_nonnegative_p after an error. */ + +void f(void) { + int i; /* { dg-note "previous" } */ + for (i = 0; i < 2; i++) ; + float i; /* { dg-error "conflicting types for" } */ +} diff --git a/gcc/testsuite/gcc.dg/torture/pr120944.c b/gcc/testsuite/gcc.dg/torture/pr120944.c new file mode 100644 index 0000000..92f3c77 --- /dev/null +++ b/gcc/testsuite/gcc.dg/torture/pr120944.c @@ -0,0 +1,34 @@ +/* { dg-skip-if "" { *-*-* } { "-flto" } { "" } } */ +/* { dg-additional-options "-fdump-tree-optimized" } */ + +#include <stdlib.h> + +typedef union { + int u32; + struct + { + int A:1; + int B:2; + int C:3; + }; +} u_t; + +typedef union { + volatile int u[3]; + volatile struct { + u_t a; + int b; + int c; + }; +} DATA; + +void foo (volatile DATA *d) +{ + d->a.u32 = ~0; + u_t u = d->a; + int v = u.A; + if (v) + abort(); +} + +/* { dg-final { scan-tree-dump-times "if \\\(" 1 "optimized" } } */ diff --git a/gcc/testsuite/gcc.dg/ubsan/pr120837.c b/gcc/testsuite/gcc.dg/ubsan/pr120837.c new file mode 100644 index 0000000..97c85c7 --- /dev/null +++ b/gcc/testsuite/gcc.dg/ubsan/pr120837.c @@ -0,0 +1,32 @@ +/* PR c/120837 */ +/* { dg-do run } */ +/* { dg-options "-O1 -fsanitize=undefined -fno-sanitize-recover=undefined" } */ + +[[gnu::noipa]] void +bar (void **x, void **y) +{ + x[0] = 0; + x[1] = 0; + x[2] = 0; + y[0] = 0; + y[1] = 0; + y[2] = 0; + y[3] = 0; + y[4] = 0; +} + +[[gnu::noipa]] void * +foo (int x, int y) +{ + void *a[3]; + void *b[5]; + bar (a, b); + return (x > y ? b : a)[y - 1]; +} + +int +main () +{ + if (foo (2, 1) != 0) + __builtin_abort (); +} diff --git a/gcc/testsuite/gcc.dg/vect/vect-pr120927-2.c b/gcc/testsuite/gcc.dg/vect/vect-pr120927-2.c new file mode 100644 index 0000000..e38cebe --- /dev/null +++ b/gcc/testsuite/gcc.dg/vect/vect-pr120927-2.c @@ -0,0 +1,24 @@ +/* { dg-additional-options "--param vect-partial-vector-usage=1" } */ +/* { dg-additional-options "-mavx512bw -mavx512vl" { target avx512f_runtime } } */ + +#include "tree-vect.h" + +static const double __attribute__((aligned(__BIGGEST_ALIGNMENT__))) a[] = { 1., 2., 3., 4., 5. }; + +void __attribute__((noipa)) +foo (double *b, double *bp, double c, int n) +{ + for (int i = 0; i < n; ++i) + b[i] = bp[i] = a[i] * c; +} + +int main() +{ + double b[6], bp[6]; + b[5] = bp[5] = 13.; + check_vect (); + foo (b, bp, 3., 5); + if (b[5] != 13. || bp[5] != 13.) + abort (); + return 0; +} diff --git a/gcc/testsuite/gcc.dg/vect/vect-pr120927.c b/gcc/testsuite/gcc.dg/vect/vect-pr120927.c new file mode 100644 index 0000000..793593f --- /dev/null +++ b/gcc/testsuite/gcc.dg/vect/vect-pr120927.c @@ -0,0 +1,24 @@ +/* { dg-additional-options "--param vect-partial-vector-usage=1" } */ +/* { dg-additional-options "-mavx512bw -mavx512vl" { target avx512f_runtime } } */ + +#include "tree-vect.h" + +static const double a[] = { 1., 2., 3., 4., 5. }; + +void __attribute__((noipa)) +foo (double *b, double *bp, double c, int n) +{ + for (int i = 0; i < n; ++i) + b[i] = bp[i] = a[i] * c; +} + +int main() +{ + double b[6], bp[6]; + b[5] = bp[5] = 13.; + check_vect (); + foo (b, bp, 3., 5); + if (b[5] != 13. || bp[5] != 13.) + abort (); + return 0; +} diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i16.c index c86d77c..25652ec 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i16.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i16.c @@ -18,3 +18,4 @@ TEST_BINARY_VX_SIGNED_0(T) /* { dg-final { scan-assembler-times {vrem.vx} 1 } } */ /* { dg-final { scan-assembler-times {vmax.vx} 2 } } */ /* { dg-final { scan-assembler-times {vmin.vx} 2 } } */ +/* { dg-final { scan-assembler-times {vsadd.vx} 1 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i32.c index f6524cb..cbf4e28 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i32.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i32.c @@ -18,3 +18,4 @@ TEST_BINARY_VX_SIGNED_0(T) /* { dg-final { scan-assembler-times {vrem.vx} 1 } } */ /* { dg-final { scan-assembler-times {vmax.vx} 2 } } */ /* { dg-final { scan-assembler-times {vmin.vx} 2 } } */ +/* { dg-final { scan-assembler-times {vsadd.vx} 1 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i64.c index f1e8627..e5519e6 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i64.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i64.c @@ -18,3 +18,4 @@ TEST_BINARY_VX_SIGNED_0(T) /* { dg-final { scan-assembler-times {vrem.vx} 1 } } */ /* { dg-final { scan-assembler-times {vmax.vx} 2 } } */ /* { dg-final { scan-assembler-times {vmin.vx} 2 } } */ +/* { dg-final { scan-assembler-times {vsadd.vx} 1 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i8.c index 9b0cbd2..beaf174 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i8.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i8.c @@ -18,3 +18,4 @@ TEST_BINARY_VX_SIGNED_0(T) /* { dg-final { scan-assembler-times {vrem.vx} 1 } } */ /* { dg-final { scan-assembler-times {vmax.vx} 2 } } */ /* { dg-final { scan-assembler-times {vmin.vx} 2 } } */ +/* { dg-final { scan-assembler-times {vsadd.vx} 1 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i16.c index fb1154c..23c0ec9 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i16.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i16.c @@ -18,3 +18,4 @@ TEST_BINARY_VX_SIGNED_0(T) /* { dg-final { scan-assembler-not {vrem.vx} } } */ /* { dg-final { scan-assembler-not {vmax.vx} } } */ /* { dg-final { scan-assembler-not {vmin.vx} } } */ +/* { dg-final { scan-assembler-not {vsadd.vx} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i32.c index d4baa4b..e5fc38e 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i32.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i32.c @@ -18,3 +18,4 @@ TEST_BINARY_VX_SIGNED_0(T) /* { dg-final { scan-assembler-not {vrem.vx} } } */ /* { dg-final { scan-assembler-not {vmax.vx} } } */ /* { dg-final { scan-assembler-not {vmin.vx} } } */ +/* { dg-final { scan-assembler-not {vsadd.vx} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i64.c index 18c1a78..7701fc9 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i64.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i64.c @@ -18,3 +18,4 @@ TEST_BINARY_VX_SIGNED_0(T) /* { dg-final { scan-assembler-not {vrem.vx} } } */ /* { dg-final { scan-assembler-not {vmax.vx} } } */ /* { dg-final { scan-assembler-not {vmin.vx} } } */ +/* { dg-final { scan-assembler-not {vsadd.vx} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i8.c index 5ce3c88..4b84204 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i8.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i8.c @@ -18,3 +18,4 @@ TEST_BINARY_VX_SIGNED_0(T) /* { dg-final { scan-assembler-not {vrem.vx} } } */ /* { dg-final { scan-assembler-not {vmax.vx} } } */ /* { dg-final { scan-assembler-not {vmin.vx} } } */ +/* { dg-final { scan-assembler-not {vsadd.vx} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i16.c index 2965924..09058a8 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i16.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i16.c @@ -18,3 +18,4 @@ TEST_BINARY_VX_SIGNED_0(T) /* { dg-final { scan-assembler-not {vrem.vx} } } */ /* { dg-final { scan-assembler-not {vmax.vx} } } */ /* { dg-final { scan-assembler-not {vmin.vx} } } */ +/* { dg-final { scan-assembler-not {vsadd.vx} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i32.c index e7815e9..fa0ef42 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i32.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i32.c @@ -18,3 +18,4 @@ TEST_BINARY_VX_SIGNED_0(T) /* { dg-final { scan-assembler-not {vrem.vx} } } */ /* { dg-final { scan-assembler-not {vmax.vx} } } */ /* { dg-final { scan-assembler-not {vmin.vx} } } */ +/* { dg-final { scan-assembler-not {vsadd.vx} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i64.c index 063a7a1..7d8358a 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i64.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i64.c @@ -18,3 +18,4 @@ TEST_BINARY_VX_SIGNED_0(T) /* { dg-final { scan-assembler-not {vrem.vx} } } */ /* { dg-final { scan-assembler-not {vmax.vx} } } */ /* { dg-final { scan-assembler-not {vmin.vx} } } */ +/* { dg-final { scan-assembler-not {vsadd.vx} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i8.c index 0efb60c..4657932 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i8.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i8.c @@ -18,3 +18,4 @@ TEST_BINARY_VX_SIGNED_0(T) /* { dg-final { scan-assembler-not {vrem.vx} } } */ /* { dg-final { scan-assembler-not {vmax.vx} } } */ /* { dg-final { scan-assembler-not {vmin.vx} } } */ +/* { dg-final { scan-assembler-not {vsadd.vx} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i16.c index 199f8a7..92f1b7b 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i16.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i16.c @@ -18,6 +18,7 @@ DEF_VX_BINARY_CASE_3_WRAP(T, MAX_FUNC_0_WARP(T), max, VX_BINARY_FUNC_BODY_X8) DEF_VX_BINARY_CASE_3_WRAP(T, MAX_FUNC_1_WARP(T), max, VX_BINARY_FUNC_BODY_X8) DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_0_WARP(T), min, VX_BINARY_FUNC_BODY_X8) DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_1_WARP(T), min, VX_BINARY_FUNC_BODY_X8) +DEF_VX_BINARY_CASE_3_WRAP(T, SAT_S_ADD_FUNC_WRAP(T), sat_add, VX_BINARY_FUNC_BODY_X8) /* { dg-final { scan-assembler {vadd.vx} } } */ /* { dg-final { scan-assembler {vsub.vx} } } */ @@ -30,3 +31,4 @@ DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_1_WARP(T), min, VX_BINARY_FUNC_BODY_X8) /* { dg-final { scan-assembler {vrem.vx} } } */ /* { dg-final { scan-assembler {vmax.vx} } } */ /* { dg-final { scan-assembler {vmin.vx} } } */ +/* { dg-final { scan-assembler {vsadd.vx} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i32.c index 392f4fe..31594ce 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i32.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i32.c @@ -18,6 +18,7 @@ DEF_VX_BINARY_CASE_3_WRAP(T, MAX_FUNC_0_WARP(T), max, VX_BINARY_FUNC_BODY_X4) DEF_VX_BINARY_CASE_3_WRAP(T, MAX_FUNC_1_WARP(T), max, VX_BINARY_FUNC_BODY_X4) DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_0_WARP(T), min, VX_BINARY_FUNC_BODY_X4) DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_1_WARP(T), min, VX_BINARY_FUNC_BODY_X4) +DEF_VX_BINARY_CASE_3_WRAP(T, SAT_S_ADD_FUNC_WRAP(T), sat_add, VX_BINARY_FUNC_BODY_X4) /* { dg-final { scan-assembler {vadd.vx} } } */ /* { dg-final { scan-assembler {vsub.vx} } } */ @@ -30,3 +31,4 @@ DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_1_WARP(T), min, VX_BINARY_FUNC_BODY_X4) /* { dg-final { scan-assembler {vrem.vx} } } */ /* { dg-final { scan-assembler {vmax.vx} } } */ /* { dg-final { scan-assembler {vmin.vx} } } */ +/* { dg-final { scan-assembler {vsadd.vx} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i64.c index d22c387..02e03ec 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i64.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i64.c @@ -18,6 +18,7 @@ DEF_VX_BINARY_CASE_3_WRAP(T, MAX_FUNC_0_WARP(T), max, VX_BINARY_FUNC_BODY) DEF_VX_BINARY_CASE_3_WRAP(T, MAX_FUNC_1_WARP(T), max, VX_BINARY_FUNC_BODY) DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_0_WARP(T), min, VX_BINARY_FUNC_BODY) DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_1_WARP(T), min, VX_BINARY_FUNC_BODY) +DEF_VX_BINARY_CASE_3_WRAP(T, SAT_S_ADD_FUNC_WRAP(T), sat_add, VX_BINARY_FUNC_BODY) /* { dg-final { scan-assembler {vadd.vx} } } */ /* { dg-final { scan-assembler {vsub.vx} } } */ @@ -30,3 +31,4 @@ DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_1_WARP(T), min, VX_BINARY_FUNC_BODY) /* { dg-final { scan-assembler {vrem.vx} } } */ /* { dg-final { scan-assembler {vmax.vx} } } */ /* { dg-final { scan-assembler {vmin.vx} } } */ +/* { dg-final { scan-assembler-not {vsadd.vx} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i8.c index 9a832a2..2c296ad 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i8.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i8.c @@ -18,6 +18,7 @@ DEF_VX_BINARY_CASE_3_WRAP(T, MAX_FUNC_0_WARP(T), max, VX_BINARY_FUNC_BODY_X8) DEF_VX_BINARY_CASE_3_WRAP(T, MAX_FUNC_1_WARP(T), max, VX_BINARY_FUNC_BODY_X8) DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_0_WARP(T), min, VX_BINARY_FUNC_BODY_X8) DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_1_WARP(T), min, VX_BINARY_FUNC_BODY_X8) +DEF_VX_BINARY_CASE_3_WRAP(T, SAT_S_ADD_FUNC_WRAP(T), sat_add, VX_BINARY_FUNC_BODY_X8) /* { dg-final { scan-assembler {vadd.vx} } } */ /* { dg-final { scan-assembler {vsub.vx} } } */ @@ -30,3 +31,4 @@ DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_1_WARP(T), min, VX_BINARY_FUNC_BODY_X8) /* { dg-final { scan-assembler {vrem.vx} } } */ /* { dg-final { scan-assembler {vmax.vx} } } */ /* { dg-final { scan-assembler {vmin.vx} } } */ +/* { dg-final { scan-assembler {vsadd.vx} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i16.c index f15fec5..3ea8f0f 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i16.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i16.c @@ -18,6 +18,7 @@ DEF_VX_BINARY_CASE_3_WRAP(T, MAX_FUNC_0_WARP(T), max, VX_BINARY_FUNC_BODY_X8) DEF_VX_BINARY_CASE_3_WRAP(T, MAX_FUNC_1_WARP(T), max, VX_BINARY_FUNC_BODY_X8) DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_0_WARP(T), min, VX_BINARY_FUNC_BODY_X8) DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_1_WARP(T), min, VX_BINARY_FUNC_BODY_X8) +DEF_VX_BINARY_CASE_3_WRAP(T, SAT_S_ADD_FUNC_WRAP(T), sat_add, VX_BINARY_FUNC_BODY_X8) /* { dg-final { scan-assembler-not {vadd.vx} } } */ /* { dg-final { scan-assembler {vsub.vx} } } */ @@ -30,3 +31,4 @@ DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_1_WARP(T), min, VX_BINARY_FUNC_BODY_X8) /* { dg-final { scan-assembler {vrem.vx} } } */ /* { dg-final { scan-assembler {vmax.vx} } } */ /* { dg-final { scan-assembler {vmin.vx} } } */ +/* { dg-final { scan-assembler {vsadd.vx} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i32.c index 8d21c47..cb742aa 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i32.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i32.c @@ -18,6 +18,7 @@ DEF_VX_BINARY_CASE_3_WRAP(T, MAX_FUNC_0_WARP(T), max, VX_BINARY_FUNC_BODY_X4) DEF_VX_BINARY_CASE_3_WRAP(T, MAX_FUNC_1_WARP(T), max, VX_BINARY_FUNC_BODY_X4) DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_0_WARP(T), min, VX_BINARY_FUNC_BODY_X4) DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_1_WARP(T), min, VX_BINARY_FUNC_BODY_X4) +DEF_VX_BINARY_CASE_3_WRAP(T, SAT_S_ADD_FUNC_WRAP(T), sat_add, VX_BINARY_FUNC_BODY_X4) /* { dg-final { scan-assembler {vadd.vx} } } */ /* { dg-final { scan-assembler {vsub.vx} } } */ @@ -30,3 +31,4 @@ DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_1_WARP(T), min, VX_BINARY_FUNC_BODY_X4) /* { dg-final { scan-assembler {vrem.vx} } } */ /* { dg-final { scan-assembler {vmax.vx} } } */ /* { dg-final { scan-assembler {vmin.vx} } } */ +/* { dg-final { scan-assembler-not {vsadd.vx} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i64.c index 0660000..1580073 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i64.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i64.c @@ -18,6 +18,7 @@ DEF_VX_BINARY_CASE_3_WRAP(T, MAX_FUNC_0_WARP(T), max, VX_BINARY_FUNC_BODY) DEF_VX_BINARY_CASE_3_WRAP(T, MAX_FUNC_1_WARP(T), max, VX_BINARY_FUNC_BODY) DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_0_WARP(T), min, VX_BINARY_FUNC_BODY) DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_1_WARP(T), min, VX_BINARY_FUNC_BODY) +DEF_VX_BINARY_CASE_3_WRAP(T, SAT_S_ADD_FUNC_WRAP(T), sat_add, VX_BINARY_FUNC_BODY) /* { dg-final { scan-assembler {vadd.vx} } } */ /* { dg-final { scan-assembler {vsub.vx} } } */ @@ -30,3 +31,4 @@ DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_1_WARP(T), min, VX_BINARY_FUNC_BODY) /* { dg-final { scan-assembler {vrem.vx} } } */ /* { dg-final { scan-assembler {vmax.vx} } } */ /* { dg-final { scan-assembler {vmin.vx} } } */ +/* { dg-final { scan-assembler-not {vsadd.vx} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i8.c index ce33461..16b2e6a 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i8.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i8.c @@ -18,6 +18,7 @@ DEF_VX_BINARY_CASE_3_WRAP(T, MAX_FUNC_0_WARP(T), max, VX_BINARY_FUNC_BODY_X8) DEF_VX_BINARY_CASE_3_WRAP(T, MAX_FUNC_1_WARP(T), max, VX_BINARY_FUNC_BODY_X8) DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_0_WARP(T), min, VX_BINARY_FUNC_BODY_X8) DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_1_WARP(T), min, VX_BINARY_FUNC_BODY_X8) +DEF_VX_BINARY_CASE_3_WRAP(T, SAT_S_ADD_FUNC_WRAP(T), sat_add, VX_BINARY_FUNC_BODY_X8) /* { dg-final { scan-assembler-not {vadd.vx} } } */ /* { dg-final { scan-assembler {vsub.vx} } } */ @@ -30,3 +31,4 @@ DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_1_WARP(T), min, VX_BINARY_FUNC_BODY_X8) /* { dg-final { scan-assembler {vrem.vx} } } */ /* { dg-final { scan-assembler {vmax.vx} } } */ /* { dg-final { scan-assembler {vmin.vx} } } */ +/* { dg-final { scan-assembler {vsadd.vx} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i16.c index 3c9afdd..60e2029 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i16.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i16.c @@ -18,6 +18,7 @@ DEF_VX_BINARY_CASE_3_WRAP(T, MAX_FUNC_0_WARP(T), max, VX_BINARY_FUNC_BODY_X8) DEF_VX_BINARY_CASE_3_WRAP(T, MAX_FUNC_1_WARP(T), max, VX_BINARY_FUNC_BODY_X8) DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_0_WARP(T), min, VX_BINARY_FUNC_BODY_X8) DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_1_WARP(T), min, VX_BINARY_FUNC_BODY_X8) +DEF_VX_BINARY_CASE_3_WRAP(T, SAT_S_ADD_FUNC_WRAP(T), sat_add, VX_BINARY_FUNC_BODY_X8) /* { dg-final { scan-assembler-not {vadd.vx} } } */ /* { dg-final { scan-assembler {vsub.vx} } } */ @@ -30,3 +31,4 @@ DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_1_WARP(T), min, VX_BINARY_FUNC_BODY_X8) /* { dg-final { scan-assembler {vrem.vx} } } */ /* { dg-final { scan-assembler {vmax.vx} } } */ /* { dg-final { scan-assembler {vmin.vx} } } */ +/* { dg-final { scan-assembler {vsadd.vx} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i32.c index b80a6b3..073d83d3 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i32.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i32.c @@ -18,6 +18,7 @@ DEF_VX_BINARY_CASE_3_WRAP(T, MAX_FUNC_0_WARP(T), max, VX_BINARY_FUNC_BODY_X4) DEF_VX_BINARY_CASE_3_WRAP(T, MAX_FUNC_1_WARP(T), max, VX_BINARY_FUNC_BODY_X4) DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_0_WARP(T), min, VX_BINARY_FUNC_BODY_X4) DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_1_WARP(T), min, VX_BINARY_FUNC_BODY_X4) +DEF_VX_BINARY_CASE_3_WRAP(T, SAT_S_ADD_FUNC_WRAP(T), sat_add, VX_BINARY_FUNC_BODY_X4) /* { dg-final { scan-assembler {vadd.vx} } } */ /* { dg-final { scan-assembler {vsub.vx} } } */ @@ -30,3 +31,4 @@ DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_1_WARP(T), min, VX_BINARY_FUNC_BODY_X4) /* { dg-final { scan-assembler {vrem.vx} } } */ /* { dg-final { scan-assembler {vmax.vx} } } */ /* { dg-final { scan-assembler {vmin.vx} } } */ +/* { dg-final { scan-assembler-not {vsadd.vx} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i64.c index 15bfe60..9a718c6 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i64.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i64.c @@ -18,6 +18,7 @@ DEF_VX_BINARY_CASE_3_WRAP(T, MAX_FUNC_0_WARP(T), max, VX_BINARY_FUNC_BODY) DEF_VX_BINARY_CASE_3_WRAP(T, MAX_FUNC_1_WARP(T), max, VX_BINARY_FUNC_BODY) DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_0_WARP(T), min, VX_BINARY_FUNC_BODY) DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_1_WARP(T), min, VX_BINARY_FUNC_BODY) +DEF_VX_BINARY_CASE_3_WRAP(T, SAT_S_ADD_FUNC_WRAP(T), sat_add, VX_BINARY_FUNC_BODY) /* { dg-final { scan-assembler-not {vadd.vx} } } */ /* { dg-final { scan-assembler-not {vsub.vx} } } */ @@ -30,3 +31,4 @@ DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_1_WARP(T), min, VX_BINARY_FUNC_BODY) /* { dg-final { scan-assembler-not {vrem.vx} } } */ /* { dg-final { scan-assembler-not {vmax.vx} } } */ /* { dg-final { scan-assembler-not {vmin.vx} } } */ +/* { dg-final { scan-assembler-not {vsadd.vx} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i8.c index 4d529fe..02ad831 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i8.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i8.c @@ -18,6 +18,7 @@ DEF_VX_BINARY_CASE_3_WRAP(T, MAX_FUNC_0_WARP(T), max, VX_BINARY_FUNC_BODY_X8) DEF_VX_BINARY_CASE_3_WRAP(T, MAX_FUNC_1_WARP(T), max, VX_BINARY_FUNC_BODY_X8) DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_0_WARP(T), min, VX_BINARY_FUNC_BODY_X8) DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_1_WARP(T), min, VX_BINARY_FUNC_BODY_X8) +DEF_VX_BINARY_CASE_3_WRAP(T, SAT_S_ADD_FUNC_WRAP(T), sat_add, VX_BINARY_FUNC_BODY_X8) /* { dg-final { scan-assembler-not {vadd.vx} } } */ /* { dg-final { scan-assembler {vsub.vx} } } */ @@ -30,3 +31,4 @@ DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_1_WARP(T), min, VX_BINARY_FUNC_BODY_X8) /* { dg-final { scan-assembler {vrem.vx} } } */ /* { dg-final { scan-assembler {vmax.vx} } } */ /* { dg-final { scan-assembler {vmin.vx} } } */ +/* { dg-final { scan-assembler {vsadd.vx} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary.h index f12d1d1..944a863 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary.h +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary.h @@ -294,26 +294,47 @@ DEF_SAT_U_SUB(uint16_t) DEF_SAT_U_SUB(uint32_t) DEF_SAT_U_SUB(uint64_t) +#define DEF_SAT_S_ADD(T, UT, MIN, MAX) \ +T \ +test_##T##_sat_add (T x, T y) \ +{ \ + T sum = (UT)x + (UT)y; \ + return (x ^ y) < 0 \ + ? sum \ + : (sum ^ x) >= 0 \ + ? sum \ + : x < 0 ? MIN : MAX; \ +} + +DEF_SAT_S_ADD(int8_t, uint8_t, INT8_MIN, INT8_MAX) +DEF_SAT_S_ADD(int16_t, uint16_t, INT16_MIN, INT16_MAX) +DEF_SAT_S_ADD(int32_t, uint32_t, INT32_MIN, INT32_MAX) +DEF_SAT_S_ADD(int64_t, uint64_t, INT64_MIN, INT64_MAX) + #define SAT_U_ADD_FUNC(T) test_##T##_sat_add #define SAT_U_ADD_FUNC_WRAP(T) SAT_U_ADD_FUNC(T) #define SAT_U_SUB_FUNC(T) test_##T##_sat_sub #define SAT_U_SUB_FUNC_WRAP(T) SAT_U_SUB_FUNC(T) -#define TEST_BINARY_VX_SIGNED_0(T) \ - DEF_VX_BINARY_CASE_0_WRAP(T, +, add) \ - DEF_VX_BINARY_CASE_0_WRAP(T, -, sub) \ - DEF_VX_BINARY_REVERSE_CASE_0_WRAP(T, -, rsub) \ - DEF_VX_BINARY_CASE_0_WRAP(T, &, and) \ - DEF_VX_BINARY_CASE_0_WRAP(T, |, or) \ - DEF_VX_BINARY_CASE_0_WRAP(T, ^, xor) \ - DEF_VX_BINARY_CASE_0_WRAP(T, *, mul) \ - DEF_VX_BINARY_CASE_0_WRAP(T, /, div) \ - DEF_VX_BINARY_CASE_0_WRAP(T, %, rem) \ - DEF_VX_BINARY_CASE_2_WRAP(T, MAX_FUNC_0_WARP(T), max) \ - DEF_VX_BINARY_CASE_2_WRAP(T, MAX_FUNC_1_WARP(T), max) \ - DEF_VX_BINARY_CASE_2_WRAP(T, MIN_FUNC_0_WARP(T), min) \ - DEF_VX_BINARY_CASE_2_WRAP(T, MIN_FUNC_1_WARP(T), min) +#define SAT_S_ADD_FUNC(T) test_##T##_sat_add +#define SAT_S_ADD_FUNC_WRAP(T) SAT_S_ADD_FUNC(T) + +#define TEST_BINARY_VX_SIGNED_0(T) \ + DEF_VX_BINARY_CASE_0_WRAP(T, +, add) \ + DEF_VX_BINARY_CASE_0_WRAP(T, -, sub) \ + DEF_VX_BINARY_REVERSE_CASE_0_WRAP(T, -, rsub) \ + DEF_VX_BINARY_CASE_0_WRAP(T, &, and) \ + DEF_VX_BINARY_CASE_0_WRAP(T, |, or) \ + DEF_VX_BINARY_CASE_0_WRAP(T, ^, xor) \ + DEF_VX_BINARY_CASE_0_WRAP(T, *, mul) \ + DEF_VX_BINARY_CASE_0_WRAP(T, /, div) \ + DEF_VX_BINARY_CASE_0_WRAP(T, %, rem) \ + DEF_VX_BINARY_CASE_2_WRAP(T, MAX_FUNC_0_WARP(T), max) \ + DEF_VX_BINARY_CASE_2_WRAP(T, MAX_FUNC_1_WARP(T), max) \ + DEF_VX_BINARY_CASE_2_WRAP(T, MIN_FUNC_0_WARP(T), min) \ + DEF_VX_BINARY_CASE_2_WRAP(T, MIN_FUNC_1_WARP(T), min) \ + DEF_VX_BINARY_CASE_2_WRAP(T, SAT_S_ADD_FUNC(T), sat_add) \ #define TEST_BINARY_VX_UNSIGNED_0(T) \ DEF_VX_BINARY_CASE_0_WRAP(T, +, add) \ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary_data.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary_data.h index f475e36..9020eaf 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary_data.h +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary_data.h @@ -4514,4 +4514,200 @@ uint64_t TEST_BINARY_DATA(uint64_t, sat_sub)[][3][N] = }, }; +int8_t TEST_BINARY_DATA(int8_t, sat_add)[][3][N] = +{ + { + { 0 }, + { + 2, 2, 2, 2, + 1, 1, 1, 1, + 0, 0, 0, 0, + 4, 4, 4, 4, + }, + { + 2, 2, 2, 2, + 1, 1, 1, 1, + 0, 0, 0, 0, + 4, 4, 4, 4, + }, + }, + { + { 127 }, + { + 127, 127, 127, 127, + -128, -128, -128, -128, + -127, -127, -127, -127, + 1, 1, 1, 1, + }, + { + 127, 127, 127, 127, + -1, -1, -1, -1, + 0, 0, 0, 0, + 127, 127, 127, 127, + }, + }, + { + { -128 }, + { + 127, 127, 127, 127, + -1, -1, -1, -1, + -128, -128, -128, -128, + 1, 1, 1, 1, + }, + { + -1, -1, -1, -1, + -128, -128, -128, -128, + -128, -128, -128, -128, + -127, -127, -127, -127, + }, + }, +}; + +int16_t TEST_BINARY_DATA(int16_t, sat_add)[][3][N] = +{ + { + { 0 }, + { + 2, 2, 2, 2, + 1, 1, 1, 1, + 0, 0, 0, 0, + 4, 4, 4, 4, + }, + { + 2, 2, 2, 2, + 1, 1, 1, 1, + 0, 0, 0, 0, + 4, 4, 4, 4, + }, + }, + { + { 32767 }, + { + 32767, 32767, 32767, 32767, + -32768, -32768, -32768, -32768, + -32767, -32767, -32767, -32767, + 1, 1, 1, 1, + }, + { + 32767, 32767, 32767, 32767, + -1, -1, -1, -1, + 0, 0, 0, 0, + 32767, 32767, 32767, 32767, + }, + }, + { + { -32768 }, + { + 32767, 32767, 32767, 32767, + -1, -1, -1, -1, + -32768, -32768, -32768, -32768, + 1, 1, 1, 1, + }, + { + -1, -1, -1, -1, + -32768, -32768, -32768, -32768, + -32768, -32768, -32768, -32768, + -32767, -32767, -32767, -32767, + }, + }, +}; + +int32_t TEST_BINARY_DATA(int32_t, sat_add)[][3][N] = +{ + { + { 0 }, + { + 2, 2, 2, 2, + 1, 1, 1, 1, + 0, 0, 0, 0, + 4, 4, 4, 4, + }, + { + 2, 2, 2, 2, + 1, 1, 1, 1, + 0, 0, 0, 0, + 4, 4, 4, 4, + }, + }, + { + { 2147483647 }, + { + 2147483647, 2147483647, 2147483647, 2147483647, + -2147483648, -2147483648, -2147483648, -2147483648, + -2147483647, -2147483647, -2147483647, -2147483647, + 1, 1, 1, 1, + }, + { + 2147483647, 2147483647, 2147483647, 2147483647, + -1, -1, -1, -1, + 0, 0, 0, 0, + 2147483647, 2147483647, 2147483647, 2147483647, + }, + }, + { + { -2147483648 }, + { + 2147483647, 2147483647, 2147483647, 2147483647, + -1, -1, -1, -1, + -2147483648, -2147483648, -2147483648, -2147483648, + 1, 1, 1, 1, + }, + { + -1, -1, -1, -1, + -2147483648, -2147483648, -2147483648, -2147483648, + -2147483648, -2147483648, -2147483648, -2147483648, + -2147483647, -2147483647, -2147483647, -2147483647, + }, + }, +}; + +int64_t TEST_BINARY_DATA(int64_t, sat_add)[][3][N] = +{ + { + { 0 }, + { + 2, 2, 2, 2, + 1, 1, 1, 1, + 0, 0, 0, 0, + 4, 4, 4, 4, + }, + { + 2, 2, 2, 2, + 1, 1, 1, 1, + 0, 0, 0, 0, + 4, 4, 4, 4, + }, + }, + { + { 9223372036854775807ull }, + { + 9223372036854775807ull, 9223372036854775807ull, 9223372036854775807ull, 9223372036854775807ull, + -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull, + -9223372036854775807ull, -9223372036854775807ull, -9223372036854775807ull, -9223372036854775807ull, + 1, 1, 1, 1, + }, + { + 9223372036854775807ull, 9223372036854775807ull, 9223372036854775807ull, 9223372036854775807ull, + -1, -1, -1, -1, + 0, 0, 0, 0, + 9223372036854775807ull, 9223372036854775807ull, 9223372036854775807ull, 9223372036854775807ull, + }, + }, + { + { -9223372036854775808ull }, + { + 9223372036854775807ull, 9223372036854775807ull, 9223372036854775807ull, 9223372036854775807ull, + -1, -1, -1, -1, + -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull, + 1, 1, 1, 1, + }, + { + -1, -1, -1, -1, + -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull, + -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull, + -9223372036854775807ull, -9223372036854775807ull, -9223372036854775807ull, -9223372036854775807ull, + }, + }, +}; + #endif diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vsadd-run-1-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vsadd-run-1-i16.c new file mode 100644 index 0000000..1f0fd46 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vsadd-run-1-i16.c @@ -0,0 +1,17 @@ +/* { dg-do run { target { riscv_v } } } */ +/* { dg-additional-options "-std=c99 --param=gpr2vr-cost=0" } */ + +#include "vx_binary.h" +#include "vx_binary_data.h" + +#define T int16_t +#define NAME sat_add +#define FUNC SAT_S_ADD_FUNC_WRAP(T) +#define TEST_DATA TEST_BINARY_DATA_WRAP(T, NAME) + +DEF_VX_BINARY_CASE_2_WRAP(T, FUNC, NAME) + +#define TEST_RUN(T, NAME, out, in, x, n) \ + RUN_VX_BINARY_CASE_2_WRAP(T, NAME, FUNC, out, in, x, n) + +#include "vx_binary_run.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vsadd-run-1-i32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vsadd-run-1-i32.c new file mode 100644 index 0000000..4a8df0c --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vsadd-run-1-i32.c @@ -0,0 +1,17 @@ +/* { dg-do run { target { riscv_v } } } */ +/* { dg-additional-options "-std=c99 --param=gpr2vr-cost=0" } */ + +#include "vx_binary.h" +#include "vx_binary_data.h" + +#define T int32_t +#define NAME sat_add +#define FUNC SAT_S_ADD_FUNC_WRAP(T) +#define TEST_DATA TEST_BINARY_DATA_WRAP(T, NAME) + +DEF_VX_BINARY_CASE_2_WRAP(T, FUNC, NAME) + +#define TEST_RUN(T, NAME, out, in, x, n) \ + RUN_VX_BINARY_CASE_2_WRAP(T, NAME, FUNC, out, in, x, n) + +#include "vx_binary_run.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vsadd-run-1-i64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vsadd-run-1-i64.c new file mode 100644 index 0000000..534cd25 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vsadd-run-1-i64.c @@ -0,0 +1,17 @@ +/* { dg-do run { target { riscv_v } } } */ +/* { dg-additional-options "-std=c99 --param=gpr2vr-cost=0" } */ + +#include "vx_binary.h" +#include "vx_binary_data.h" + +#define T int64_t +#define NAME sat_add +#define FUNC SAT_S_ADD_FUNC_WRAP(T) +#define TEST_DATA TEST_BINARY_DATA_WRAP(T, NAME) + +DEF_VX_BINARY_CASE_2_WRAP(T, FUNC, NAME) + +#define TEST_RUN(T, NAME, out, in, x, n) \ + RUN_VX_BINARY_CASE_2_WRAP(T, NAME, FUNC, out, in, x, n) + +#include "vx_binary_run.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vsadd-run-1-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vsadd-run-1-i8.c new file mode 100644 index 0000000..de2a9b6 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vsadd-run-1-i8.c @@ -0,0 +1,17 @@ +/* { dg-do run { target { riscv_v } } } */ +/* { dg-additional-options "-std=c99 --param=gpr2vr-cost=0" } */ + +#include "vx_binary.h" +#include "vx_binary_data.h" + +#define T int8_t +#define NAME sat_add +#define FUNC SAT_S_ADD_FUNC_WRAP(T) +#define TEST_DATA TEST_BINARY_DATA_WRAP(T, NAME) + +DEF_VX_BINARY_CASE_2_WRAP(T, FUNC, NAME) + +#define TEST_RUN(T, NAME, out, in, x, n) \ + RUN_VX_BINARY_CASE_2_WRAP(T, NAME, FUNC, out, in, x, n) + +#include "vx_binary_run.h" diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h b/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h index 6e97cae..84f013f 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h @@ -227,6 +227,18 @@ sat_s_add_imm_##T##_fmt_1##_##INDEX (T x) \ #define RUN_SAT_S_ADD_IMM_FMT_1(INDEX, T, x, expect) \ if (sat_s_add_imm##_##T##_fmt_1##_##INDEX(x) != expect) __builtin_abort () +#define DEF_SAT_S_ADD_IMM_FMT_2(INDEX, T, UT, IMM, MIN, MAX) \ +T __attribute__((noinline)) \ +sat_s_add_imm_##T##_fmt_2##_##INDEX (T x) \ +{ \ + T sum = (T)((UT)x + (UT)IMM); \ + return ((x ^ sum) < 0 && (x ^ IMM) >= 0) ? \ + (-(T)(x < 0) ^ MAX) : sum; \ +} + +#define RUN_SAT_S_ADD_IMM_FMT_2(INDEX, T, x, expect) \ + if (sat_s_add_imm##_##T##_fmt_2##_##INDEX(x) != expect) __builtin_abort () + /******************************************************************************/ /* Saturation Sub (Unsigned and Signed) */ /******************************************************************************/ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i16.c new file mode 100644 index 0000000..14c5d51 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i16.c @@ -0,0 +1,57 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ + +#include "sat_arith.h" + +/* +** sat_s_add_imm_int16_t_fmt_2_0: +** addi\s+[atx][0-9]+,\s*a0,\s*-7 +** xori\s+[atx][0-9]+,\s*a0,\s*-7 +** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ +** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15 +** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15 +** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 +** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ +** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 +** srai\s+a0,\s*a0,\s*63 +** li\s+[atx][0-9]+,\s*32768 +** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 +** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 +** neg\s+a0,\s*[atx][0-9]+ +** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 +** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 +** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ +** or\s+a0,\s*a0,\s*[atx][0-9]+ +** slliw\s+a0,\s*a0,\s*16 +** sraiw\s+a0,\s*a0,\s*16 +** ret +*/ +DEF_SAT_S_ADD_IMM_FMT_2(0, int16_t, uint16_t, -7, INT16_MIN, INT16_MAX) + +/* +** sat_s_add_imm_int16_t_fmt_2_1: +** addi\s+[atx][0-9]+,\s*a0,\s*-1 +** not\s+[atx][0-9]+,\s*a0 +** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ +** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15 +** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15 +** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 +** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ +** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 +** srai\s+a0,\s*a0,\s*63 +** li\s+[atx][0-9]+,\s*32768 +** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 +** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 +** neg\s+a0,\s*[atx][0-9]+ +** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 +** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 +** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ +** or\s+a0,\s*a0,\s*[atx][0-9]+ +** slliw\s+a0,\s*a0,\s*16 +** sraiw\s+a0,\s*a0,\s*16 +** ret +*/ +DEF_SAT_S_ADD_IMM_FMT_2(1, int16_t, uint16_t, -1, INT16_MIN, INT16_MAX) + +/* { dg-final { scan-tree-dump-times ".SAT_ADD " 2 "optimized" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i32.c new file mode 100644 index 0000000..ecd757d --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i32.c @@ -0,0 +1,54 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ + +#include "sat_arith.h" + +/* +** sat_s_add_imm_int32_t_fmt_2_0: +** addi\s+[atx][0-9]+,\s*a0,\s*10 +** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ +** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31 +** srli\s+[atx][0-9]+,\s*a0,\s*31 +** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 +** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ +** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 +** srai\s+a0,\s*a0,\s*63 +** li\s+[atx][0-9]+,\s*-2147483648 +** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 +** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 +** neg\s+a0,\s*[atx][0-9]+ +** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 +** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 +** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ +** or\s+a0,a0,\s*[atx][0-9]+ +** sext.w\s+a0,\s*a0 +** ret +*/ +DEF_SAT_S_ADD_IMM_FMT_2(0, int32_t, uint32_t, 10, INT32_MIN, INT32_MAX) + +/* +** sat_s_add_imm_int32_t_fmt_2_1: +** addi\s+[atx][0-9]+,\s*a0,\s*-1 +** not\s+[atx][0-9]+,\s*a0 +** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ +** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31 +** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31 +** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 +** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ +** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 +** srai\s+a0,\s*a0,\s*63 +** li\s+[atx][0-9]+,\s*-2147483648 +** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 +** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 +** neg\s+a0,\s*[atx][0-9]+ +** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 +** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 +** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ +** or\s+a0,\s*a0,\s*[atx][0-9]+ +** sext.w\s+a0,\s*a0 +** ret +*/ +DEF_SAT_S_ADD_IMM_FMT_2(1, int32_t, uint32_t, -1, INT32_MIN, INT32_MAX) + +/* { dg-final { scan-tree-dump-times ".SAT_ADD " 2 "optimized" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i64.c new file mode 100644 index 0000000..07d798f --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i64.c @@ -0,0 +1,48 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ + +#include "sat_arith.h" + +/* +** sat_s_add_imm_int64_t_fmt_2_0: +** addi\s+[atx][0-9]+,\s*a0,\s*10 +** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ +** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 +** srli\s+[atx][0-9]+,\s*a0,\s*63 +** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 +** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ +** srai\s+[atx][0-9]+,\s*a0,\s*63 +** li\s+[atx][0-9]+,\s*-1 +** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 +** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ +** neg\s+[atx][0-9]+,\s*[atx][0-9]+ +** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ +** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 +** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ +** or\s+a0,\s*a0,\s*[atx][0-9]+ +** ret +*/ +DEF_SAT_S_ADD_IMM_FMT_2(0, int64_t, uint64_t, 10, INT64_MIN, INT64_MAX) + +/* +** sat_s_add_imm_int64_t_fmt_2_1: +** addi\s+[atx][0-9]+,\s*a0,\s*-1 +** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ +** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 +** slti\s+[atx][0-9]+,\s*a0,\s*0 +** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ +** srai\s+[atx][0-9]+,\s*a0,\s*63 +** li\s+[atx][0-9]+,\s*-1 +** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 +** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ +** neg\s+[atx][0-9]+,\s*[atx][0-9]+ +** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ +** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 +** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ +** or\s+a0,\s*a0,\s*[atx][0-9]+ +** ret +*/ +DEF_SAT_S_ADD_IMM_FMT_2(1, int64_t, uint64_t, -1, INT64_MIN, INT64_MAX) + +/* { dg-final { scan-tree-dump-times ".SAT_ADD " 2 "optimized" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i8.c new file mode 100644 index 0000000..2734211 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i8.c @@ -0,0 +1,49 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ + +#include "sat_arith.h" + +/* +** sat_s_add_imm_int8_t_fmt_2_0: +** addi\s+[atx][0-9]+,\s*a0,\s*9 +** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ +** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*7 +** srli\s+[atx][0-9]+,\s*a0,\s*7 +** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 +** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ +** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 +** srai\s+a0,\s*a0,\s*63 +** xori\s+[atx][0-9]+,\s*a0,\s*127 +** neg\s+a0,\s*[atx][0-9]+ +** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 +** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 +** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ +** or\s+a0,\s*a0,\s*[atx][0-9]+ +** slliw\s+a0,\s*a0,\s*24 +** sraiw\s+a0,\s*a0,\s*24 +** ret +*/ +DEF_SAT_S_ADD_IMM_FMT_2(0, int8_t, uint8_t, 9, INT8_MIN, INT8_MAX) + +/* +** sat_s_add_imm_int8_t_fmt_2_1: +** addi\s+[atx][0-9]+,\s*a0,\s*-1 +** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ +** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*7 +** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 +** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ +** srai\s+a0,\s*a0,\s*63 +** xori\s+[atx][0-9]+,\s*a0,\s*127 +** neg\s+a0,\s*a4 +** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 +** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 +** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ +** or\s+a0,\s*a0,\s*[atx][0-9]+ +** slliw\s+a0,\s*a0,\s*24 +** sraiw\s+a0,\s*a0,\s*24 +** ret +*/ +DEF_SAT_S_ADD_IMM_FMT_2(1, int8_t, uint8_t, -1, INT8_MIN, INT8_MAX) + +/* { dg-final { scan-tree-dump-times ".SAT_ADD " 2 "optimized" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-run-2-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-run-2-i16.c new file mode 100644 index 0000000..4f24624 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-run-2-i16.c @@ -0,0 +1,48 @@ +/* { dg-do run } */ +/* { dg-additional-options "-std=c99" } */ + +#include "sat_arith.h" + +DEF_SAT_S_ADD_IMM_FMT_2(0, int16_t, uint16_t, -32768, INT16_MIN, INT16_MAX) +DEF_SAT_S_ADD_IMM_FMT_2(1, int16_t, uint16_t, 32767, INT16_MIN, INT16_MAX) +DEF_SAT_S_ADD_IMM_FMT_2(2, int16_t, uint16_t, 100, INT16_MIN, INT16_MAX) +DEF_SAT_S_ADD_IMM_FMT_2(3, int16_t, uint16_t, -100, INT16_MIN, INT16_MAX) +DEF_SAT_S_ADD_IMM_FMT_2(4, int16_t, uint16_t, -1, INT16_MIN, INT16_MAX) + +#define T int16_t +#define RUN(INDEX,T, x, expect) RUN_SAT_S_ADD_IMM_FMT_2(INDEX, T, x, expect) + +T d[][2] = { + /* arg_0, expect */ + { -1, -32768, }, + { 2, -32766, }, + { 1, 32767, }, + { -10, 32757, }, + { 32669, 32767, }, + { -32768, -32668, }, + { -32768, -32768, }, + { 0, -100, }, + { -32768, -32768, }, + { 0, -1, }, +}; + +int +main () +{ + RUN (0, T, d[0][0], d[0][1]); + RUN (0, T, d[1][0], d[1][1]); + + RUN (1, T, d[2][0], d[2][1]); + RUN (1, T, d[3][0], d[3][1]); + + RUN (2, T, d[4][0], d[4][1]); + RUN (2, T, d[5][0], d[5][1]); + + RUN (3, T, d[6][0], d[6][1]); + RUN (3, T, d[7][0], d[7][1]); + + RUN (4, T, d[8][0], d[8][1]); + RUN (4, T, d[9][0], d[9][1]); + + return 0; +} diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-run-2-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-run-2-i32.c new file mode 100644 index 0000000..8d9ddeb --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-run-2-i32.c @@ -0,0 +1,48 @@ +/* { dg-do run } */ +/* { dg-additional-options "-std=c99" } */ + +#include "sat_arith.h" + +DEF_SAT_S_ADD_IMM_FMT_2(0, int32_t, uint32_t, -2147483648, INT32_MIN, INT32_MAX) +DEF_SAT_S_ADD_IMM_FMT_2(1, int32_t, uint32_t, 2147483647, INT32_MIN, INT32_MAX) +DEF_SAT_S_ADD_IMM_FMT_2(2, int32_t, uint32_t, 100, INT32_MIN, INT32_MAX) +DEF_SAT_S_ADD_IMM_FMT_2(3, int32_t, uint32_t, -100, INT32_MIN, INT32_MAX) +DEF_SAT_S_ADD_IMM_FMT_2(4, int32_t, uint32_t, -1, INT32_MIN, INT32_MAX) + +#define T int32_t +#define RUN(INDEX,T, x, expect) RUN_SAT_S_ADD_IMM_FMT_2(INDEX, T, x, expect) + +T d[][2] = { + /* arg_0, expect */ + { -1, -2147483648, }, + { 2, -2147483646, }, + { 1, 2147483647, }, + { -10, 2147483637, }, + { 300, 400, }, + { -300, -200, }, + { 100, 0, }, + { 0, -100, }, + { 100, 99, }, + { 0, -1, }, +}; + +int +main () +{ + RUN (0, T, d[0][0], d[0][1]); + RUN (0, T, d[1][0], d[1][1]); + + RUN (1, T, d[2][0], d[2][1]); + RUN (1, T, d[3][0], d[3][1]); + + RUN (2, T, d[4][0], d[4][1]); + RUN (2, T, d[5][0], d[5][1]); + + RUN (3, T, d[6][0], d[6][1]); + RUN (3, T, d[7][0], d[7][1]); + + RUN (4, T, d[8][0], d[8][1]); + RUN (4, T, d[9][0], d[9][1]); + + return 0; +} diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-run-2-i64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-run-2-i64.c new file mode 100644 index 0000000..4523f9a --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-run-2-i64.c @@ -0,0 +1,48 @@ +/* { dg-do run } */ +/* { dg-additional-options "-std=c99" } */ + +#include "sat_arith.h" + +DEF_SAT_S_ADD_IMM_FMT_2(0, int64_t, uint64_t, (-9223372036854775807ll - 1), INT64_MIN, INT64_MAX) +DEF_SAT_S_ADD_IMM_FMT_2(1, int64_t, uint64_t, 9223372036854775807ll, INT64_MIN, INT64_MAX) +DEF_SAT_S_ADD_IMM_FMT_2(2, int64_t, uint64_t, 100, INT64_MIN, INT64_MAX) +DEF_SAT_S_ADD_IMM_FMT_2(3, int64_t, uint64_t, -100, INT64_MIN, INT64_MAX) +DEF_SAT_S_ADD_IMM_FMT_2(4, int64_t, uint64_t, -1, INT64_MIN, INT64_MAX) + +#define T int64_t +#define RUN(INDEX,T, x, expect) RUN_SAT_S_ADD_IMM_FMT_2(INDEX, T, x, expect) + +T d[][2] = { + /* arg_0, expect */ + { -1, (-9223372036854775807ll - 1), }, + { 2, -9223372036854775806ll, }, + { 1, 9223372036854775807ll, }, + { -7, 9223372036854775800ll, }, + { 0, 100, }, + { -1, 99, }, + { 0, -100, }, + { 100, 0, }, + { 0, -1, }, + { 100, 99, }, +}; + +int +main () +{ + RUN (0, T, d[0][0], d[0][1]); + RUN (0, T, d[1][0], d[1][1]); + + RUN (1, T, d[2][0], d[2][1]); + RUN (1, T, d[3][0], d[3][1]); + + RUN (2, T, d[4][0], d[4][1]); + RUN (2, T, d[5][0], d[5][1]); + + RUN (3, T, d[6][0], d[6][1]); + RUN (3, T, d[7][0], d[7][1]); + + RUN (4, T, d[8][0], d[8][1]); + RUN (4, T, d[9][0], d[9][1]); + + return 0; +} diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-run-2-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-run-2-i8.c new file mode 100644 index 0000000..96445ae --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-run-2-i8.c @@ -0,0 +1,49 @@ +/* { dg-do run } */ +/* { dg-additional-options "-std=c99" } */ + +#include "sat_arith.h" + +DEF_SAT_S_ADD_IMM_FMT_2(0, int8_t, uint8_t, -128, INT8_MIN, INT8_MAX) +DEF_SAT_S_ADD_IMM_FMT_2(1, int8_t, uint8_t, 127, INT8_MIN, INT8_MAX) +DEF_SAT_S_ADD_IMM_FMT_2(2, int8_t, uint8_t, 6, INT8_MIN, INT8_MAX) +DEF_SAT_S_ADD_IMM_FMT_2(3, int8_t, uint8_t, -6, INT8_MIN, INT8_MAX) +DEF_SAT_S_ADD_IMM_FMT_2(4, int8_t, uint8_t, -1, INT8_MIN, INT8_MAX) + +#define T int8_t +#define RUN(INDEX,T, x, expect) RUN_SAT_S_ADD_IMM_FMT_2(INDEX, T, x, expect) + +T d[][2] = { + /* arg_0, expect */ + { -1, -128, }, + { 2, -126, }, + { 1, 127, }, + { -10, 117, }, + { 122, 127, }, + { -10, -4, }, + { -128, -128, }, + { 127, 121, }, + { -128, -128, }, + { 1, 0, }, +}; + +int +main () +{ + RUN (0, T, d[0][0], d[0][1]); + RUN (0, T, d[1][0], d[1][1]); + + RUN (1, T, d[2][0], d[2][1]); + RUN (1, T, d[3][0], d[3][1]); + + RUN (2, T, d[4][0], d[4][1]); + RUN (2, T, d[5][0], d[5][1]); + + RUN (3, T, d[6][0], d[6][1]); + RUN (3, T, d[7][0], d[7][1]); + + RUN (4, T, d[8][0], d[8][1]); + RUN (4, T, d[9][0], d[9][1]); + + return 0; +} + diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm_type_check-2-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm_type_check-2-i16.c new file mode 100644 index 0000000..a73a77f --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm_type_check-2-i16.c @@ -0,0 +1,9 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ + +#include "sat_arith.h" + +DEF_SAT_S_ADD_IMM_FMT_2(0, int16_t, uint16_t, -32769, INT16_MIN, INT16_MAX) +DEF_SAT_S_ADD_IMM_FMT_2(1, int16_t, uint16_t, 32768, INT16_MIN, INT16_MAX) + +/* { dg-final { scan-tree-dump-not ".SAT_ADD " "optimized" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm_type_check-2-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm_type_check-2-i32.c new file mode 100644 index 0000000..9dae425 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm_type_check-2-i32.c @@ -0,0 +1,9 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ + +#include "sat_arith.h" + +DEF_SAT_S_ADD_IMM_FMT_1(0, int32_t, uint32_t, -2147483649, INT32_MIN, INT32_MAX) +DEF_SAT_S_ADD_IMM_FMT_1(1, int32_t, uint32_t, 2147483648, INT32_MIN, INT32_MAX) + +/* { dg-final { scan-tree-dump-not ".SAT_ADD " "optimized" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm_type_check-2-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm_type_check-2-i8.c new file mode 100644 index 0000000..a9cd4b9 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm_type_check-2-i8.c @@ -0,0 +1,9 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ + +#include "sat_arith.h" + +DEF_SAT_S_ADD_IMM_FMT_2(0, int8_t, uint8_t, -129, INT8_MIN, INT8_MAX) +DEF_SAT_S_ADD_IMM_FMT_2(1, int8_t, uint8_t, 128, INT8_MIN, INT8_MAX) + +/* { dg-final { scan-tree-dump-not ".SAT_ADD " "optimized" } } */ diff --git a/gcc/tree-ssa-sccvn.cc b/gcc/tree-ssa-sccvn.cc index 9cdbf3d..45fb79c 100644 --- a/gcc/tree-ssa-sccvn.cc +++ b/gcc/tree-ssa-sccvn.cc @@ -2809,7 +2809,8 @@ vn_reference_lookup_3 (ao_ref *ref, tree vuse, void *data_, we find a VN result with exactly the same value as the possible clobber. In this case we can ignore the clobber and return the found value. */ - if (is_gimple_reg_type (TREE_TYPE (lhs)) + if (!gimple_has_volatile_ops (def_stmt) + && is_gimple_reg_type (TREE_TYPE (lhs)) && types_compatible_p (TREE_TYPE (lhs), vr->type) && (ref->ref || data->orig_ref.ref) && !data->mask @@ -3093,7 +3094,8 @@ vn_reference_lookup_3 (ao_ref *ref, tree vuse, void *data_, else if (is_gimple_reg_type (vr->type) && gimple_assign_single_p (def_stmt) && gimple_assign_rhs_code (def_stmt) == CONSTRUCTOR - && CONSTRUCTOR_NELTS (gimple_assign_rhs1 (def_stmt)) == 0) + && CONSTRUCTOR_NELTS (gimple_assign_rhs1 (def_stmt)) == 0 + && !TREE_THIS_VOLATILE (gimple_assign_lhs (def_stmt))) { tree base2; poly_int64 offset2, size2, maxsize2; @@ -3149,6 +3151,7 @@ vn_reference_lookup_3 (ao_ref *ref, tree vuse, void *data_, && !reverse_storage_order_for_component_p (vr->operands) && !contains_storage_order_barrier_p (vr->operands) && gimple_assign_single_p (def_stmt) + && !TREE_THIS_VOLATILE (gimple_assign_lhs (def_stmt)) && CHAR_BIT == 8 && BITS_PER_UNIT == 8 && BYTES_BIG_ENDIAN == WORDS_BIG_ENDIAN @@ -3307,6 +3310,7 @@ vn_reference_lookup_3 (ao_ref *ref, tree vuse, void *data_, && !reverse_storage_order_for_component_p (vr->operands) && !contains_storage_order_barrier_p (vr->operands) && gimple_assign_single_p (def_stmt) + && !TREE_THIS_VOLATILE (gimple_assign_lhs (def_stmt)) && TREE_CODE (gimple_assign_rhs1 (def_stmt)) == SSA_NAME) { tree lhs = gimple_assign_lhs (def_stmt); @@ -3518,6 +3522,7 @@ vn_reference_lookup_3 (ao_ref *ref, tree vuse, void *data_, the copy kills ref. */ else if (data->vn_walk_kind == VN_WALKREWRITE && gimple_assign_single_p (def_stmt) + && !gimple_has_volatile_ops (def_stmt) && (DECL_P (gimple_assign_rhs1 (def_stmt)) || TREE_CODE (gimple_assign_rhs1 (def_stmt)) == MEM_REF || handled_component_p (gimple_assign_rhs1 (def_stmt)))) diff --git a/gcc/tree-vect-data-refs.cc b/gcc/tree-vect-data-refs.cc index ee040eb..c84cd29 100644 --- a/gcc/tree-vect-data-refs.cc +++ b/gcc/tree-vect-data-refs.cc @@ -1501,10 +1501,17 @@ vect_compute_data_ref_alignment (vec_info *vinfo, dr_vec_info *dr_info, /* We can only use base and misalignment information relative to an innermost loop if the misalignment stays the same throughout the execution of the loop. As above, this is the case if the stride of - the dataref evenly divides by the alignment. */ - poly_uint64 vf = LOOP_VINFO_VECT_FACTOR (loop_vinfo); - step_preserves_misalignment_p - = multiple_p (drb->step_alignment * vf, vect_align_c); + the dataref evenly divides by the alignment. Make sure to check + previous epilogues and the main loop. */ + step_preserves_misalignment_p = true; + auto lvinfo = loop_vinfo; + while (lvinfo) + { + poly_uint64 vf = LOOP_VINFO_VECT_FACTOR (lvinfo); + step_preserves_misalignment_p + &= multiple_p (drb->step_alignment * vf, vect_align_c); + lvinfo = LOOP_VINFO_ORIG_LOOP_INFO (lvinfo); + } if (!step_preserves_misalignment_p && dump_enabled_p ()) dump_printf_loc (MSG_MISSED_OPTIMIZATION, vect_location, @@ -1571,6 +1578,7 @@ vect_compute_data_ref_alignment (vec_info *vinfo, dr_vec_info *dr_info, unsigned int max_alignment; tree base = get_base_for_alignment (drb->base_address, &max_alignment); if (max_alignment < vect_align_c + || (loop_vinfo && LOOP_VINFO_EPILOGUE_P (loop_vinfo)) || !vect_can_force_dr_alignment_p (base, vect_align_c * BITS_PER_UNIT)) { |