diff options
Diffstat (limited to 'gcc/testsuite')
-rw-r--r-- | gcc/testsuite/gcc.target/aarch64/rev16_2.c | 39 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/aarch64/shift_and_operator-1.c | 22 |
2 files changed, 61 insertions, 0 deletions
diff --git a/gcc/testsuite/gcc.target/aarch64/rev16_2.c b/gcc/testsuite/gcc.target/aarch64/rev16_2.c new file mode 100644 index 0000000..621eb5d --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/rev16_2.c @@ -0,0 +1,39 @@ +/* { dg-options "-O2" } */ +/* { dg-do compile } */ + +extern void abort (void); + +typedef unsigned int __u32; + +__u32 +__rev16_32_alt (__u32 x) +{ + return (((__u32)(x) & (__u32)0xff00ff00UL) >> 8) + | (((__u32)(x) & (__u32)0x00ff00ffUL) << 8); +} + +__u32 +__rev16_32 (__u32 x) +{ + return (((__u32)(x) & (__u32)0x00ff00ffUL) << 8) + | (((__u32)(x) & (__u32)0xff00ff00UL) >> 8); +} + +typedef unsigned long long __u64; + +__u64 +__rev16_64_alt (__u64 x) +{ + return (((__u64)(x) & (__u64)0xff00ff00ff00ff00UL) >> 8) + | (((__u64)(x) & (__u64)0x00ff00ff00ff00ffUL) << 8); +} + +__u64 +__rev16_64 (__u64 x) +{ + return (((__u64)(x) & (__u64)0x00ff00ff00ff00ffUL) << 8) + | (((__u64)(x) & (__u64)0xff00ff00ff00ff00UL) >> 8); +} + +/* { dg-final { scan-assembler-times "rev16\\tx\[0-9\]+" 2 } } */ +/* { dg-final { scan-assembler-times "rev16\\tw\[0-9\]+" 2 } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/shift_and_operator-1.c b/gcc/testsuite/gcc.target/aarch64/shift_and_operator-1.c new file mode 100644 index 0000000..49152c5 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/shift_and_operator-1.c @@ -0,0 +1,22 @@ +/* { dg-options "-O2" } */ +/* { dg-do compile } */ + +unsigned f(unsigned x, unsigned b) +{ + return ((x & 0xff00ff00U) >> 8) | b; +} + +unsigned f0(unsigned x, unsigned b) +{ + return ((x & 0xff00ff00U) >> 8) ^ b; +} +unsigned f1(unsigned x, unsigned b) +{ + return ((x & 0xff00ff00U) >> 8) + b; +} + +/* { dg-final { scan-assembler-times "lsr\\tw\[0-9\]+" 0 } } */ +/* { dg-final { scan-assembler-times "lsr 8" 3 } } */ +/* { dg-final { scan-assembler-times "eor\\tw\[0-9\]+" 1 } } */ +/* { dg-final { scan-assembler-times "add\\tw\[0-9\]+" 1 } } */ +/* { dg-final { scan-assembler-times "orr\\tw\[0-9\]+" 1 } } */ |