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-rw-r--r--gcc/testsuite/ChangeLog10
-rw-r--r--gcc/testsuite/gcc.target/arm/cmse/mainline/hard-sp/cmse-13.c32
-rw-r--r--gcc/testsuite/gcc.target/arm/cmse/mainline/hard-sp/cmse-7.c32
-rw-r--r--gcc/testsuite/gcc.target/arm/cmse/mainline/hard-sp/cmse-8.c32
-rw-r--r--gcc/testsuite/gcc.target/arm/cmse/mainline/hard/cmse-13.c24
-rw-r--r--gcc/testsuite/gcc.target/arm/cmse/mainline/hard/cmse-7.c16
-rw-r--r--gcc/testsuite/gcc.target/arm/cmse/mainline/hard/cmse-8.c16
7 files changed, 86 insertions, 76 deletions
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 04d1b2c..d557f4a 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,13 @@
+2017-11-22 Thomas Preud'homme <thomas.preudhomme@arm.com>
+
+ * gcc.target/arm/cmse/mainline/hard-sp/cmse-13.c: Adapt expectations
+ to vmov instructions now generated.
+ * gcc.target/arm/cmse/mainline/hard-sp/cmse-7.c: Likewise.
+ * gcc.target/arm/cmse/mainline/hard-sp/cmse-8.c: Likewise.
+ * gcc.target/arm/cmse/mainline/hard/cmse-13.c: Likewise.
+ * gcc.target/arm/cmse/mainline/hard/cmse-7.c: Likewise.
+ * gcc.target/arm/cmse/mainline/hard/cmse-8.c: Likewise.
+
2017-11-22 Tamar Christina <tamar.christina@arm.com>
* gcc.target/arm/simd/vdot-compile.c: New.
diff --git a/gcc/testsuite/gcc.target/arm/cmse/mainline/hard-sp/cmse-13.c b/gcc/testsuite/gcc.target/arm/cmse/mainline/hard-sp/cmse-13.c
index 4548da8..70a0258 100644
--- a/gcc/testsuite/gcc.target/arm/cmse/mainline/hard-sp/cmse-13.c
+++ b/gcc/testsuite/gcc.target/arm/cmse/mainline/hard-sp/cmse-13.c
@@ -12,22 +12,22 @@
/* { dg-final { scan-assembler "mov\tr1, r4" } } */
/* { dg-final { scan-assembler "mov\tr2, r4" } } */
/* { dg-final { scan-assembler "mov\tr3, r4" } } */
-/* { dg-final { scan-assembler-not "vldr\.32\ts0, .L" } } */
-/* { dg-final { scan-assembler "vldr\.32\ts1, .L" } } */
-/* { dg-final { scan-assembler-not "vldr\.32\ts2, .L" } } */
-/* { dg-final { scan-assembler-not "vldr\.32\ts3, .L" } } */
-/* { dg-final { scan-assembler "vldr\.32\ts4, .L" } } */
-/* { dg-final { scan-assembler "vldr\.32\ts5, .L" } } */
-/* { dg-final { scan-assembler "vldr\.32\ts6, .L" } } */
-/* { dg-final { scan-assembler "vldr\.32\ts7, .L" } } */
-/* { dg-final { scan-assembler "vldr\.32\ts8, .L" } } */
-/* { dg-final { scan-assembler "vldr\.32\ts9, .L" } } */
-/* { dg-final { scan-assembler "vldr\.32\ts10, .L" } } */
-/* { dg-final { scan-assembler "vldr\.32\ts11, .L" } } */
-/* { dg-final { scan-assembler "vldr\.32\ts12, .L" } } */
-/* { dg-final { scan-assembler "vldr\.32\ts13, .L" } } */
-/* { dg-final { scan-assembler "vldr\.32\ts14, .L" } } */
-/* { dg-final { scan-assembler "vldr\.32\ts15, .L" } } */
+/* { dg-final { scan-assembler-not "vmov\.f32\ts0, #1\.0" } } */
+/* { dg-final { scan-assembler "vmov\.f32\ts1, #1\.0" } } */
+/* { dg-final { scan-assembler-not "vmov\.f32\ts2, #1\.0" } } */
+/* { dg-final { scan-assembler-not "vmov\.f32\ts3, #1\.0" } } */
+/* { dg-final { scan-assembler "vmov\.f32\ts4, #1\.0" } } */
+/* { dg-final { scan-assembler "vmov\.f32\ts5, #1\.0" } } */
+/* { dg-final { scan-assembler "vmov\.f32\ts6, #1\.0" } } */
+/* { dg-final { scan-assembler "vmov\.f32\ts7, #1\.0" } } */
+/* { dg-final { scan-assembler "vmov\.f32\ts8, #1\.0" } } */
+/* { dg-final { scan-assembler "vmov\.f32\ts9, #1\.0" } } */
+/* { dg-final { scan-assembler "vmov\.f32\ts10, #1\.0" } } */
+/* { dg-final { scan-assembler "vmov\.f32\ts11, #1\.0" } } */
+/* { dg-final { scan-assembler "vmov\.f32\ts12, #1\.0" } } */
+/* { dg-final { scan-assembler "vmov\.f32\ts13, #1\.0" } } */
+/* { dg-final { scan-assembler "vmov\.f32\ts14, #1\.0" } } */
+/* { dg-final { scan-assembler "vmov\.f32\ts15, #1\.0" } } */
/* Now we check that we use the correct intrinsic to call. */
/* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */
diff --git a/gcc/testsuite/gcc.target/arm/cmse/mainline/hard-sp/cmse-7.c b/gcc/testsuite/gcc.target/arm/cmse/mainline/hard-sp/cmse-7.c
index bc7c15c..2c9dfcf 100644
--- a/gcc/testsuite/gcc.target/arm/cmse/mainline/hard-sp/cmse-7.c
+++ b/gcc/testsuite/gcc.target/arm/cmse/mainline/hard-sp/cmse-7.c
@@ -12,22 +12,22 @@
/* { dg-final { scan-assembler "mov\tr1, r4" } } */
/* { dg-final { scan-assembler "mov\tr2, r4" } } */
/* { dg-final { scan-assembler "mov\tr3, r4" } } */
-/* { dg-final { scan-assembler "vldr\.32\ts0, .L" } } */
-/* { dg-final { scan-assembler "vldr\.32\ts1, .L" } } */
-/* { dg-final { scan-assembler "vldr\.32\ts2, .L" } } */
-/* { dg-final { scan-assembler "vldr\.32\ts3, .L" } } */
-/* { dg-final { scan-assembler "vldr\.32\ts4, .L" } } */
-/* { dg-final { scan-assembler "vldr\.32\ts5, .L" } } */
-/* { dg-final { scan-assembler "vldr\.32\ts6, .L" } } */
-/* { dg-final { scan-assembler "vldr\.32\ts7, .L" } } */
-/* { dg-final { scan-assembler "vldr\.32\ts8, .L" } } */
-/* { dg-final { scan-assembler "vldr\.32\ts9, .L" } } */
-/* { dg-final { scan-assembler "vldr\.32\ts10, .L" } } */
-/* { dg-final { scan-assembler "vldr\.32\ts11, .L" } } */
-/* { dg-final { scan-assembler "vldr\.32\ts12, .L" } } */
-/* { dg-final { scan-assembler "vldr\.32\ts13, .L" } } */
-/* { dg-final { scan-assembler "vldr\.32\ts14, .L" } } */
-/* { dg-final { scan-assembler "vldr\.32\ts15, .L" } } */
+/* { dg-final { scan-assembler "vmov\.f32\ts0, #1\.0" } } */
+/* { dg-final { scan-assembler "vmov\.f32\ts1, #1\.0" } } */
+/* { dg-final { scan-assembler "vmov\.f32\ts2, #1\.0" } } */
+/* { dg-final { scan-assembler "vmov\.f32\ts3, #1\.0" } } */
+/* { dg-final { scan-assembler "vmov\.f32\ts4, #1\.0" } } */
+/* { dg-final { scan-assembler "vmov\.f32\ts5, #1\.0" } } */
+/* { dg-final { scan-assembler "vmov\.f32\ts6, #1\.0" } } */
+/* { dg-final { scan-assembler "vmov\.f32\ts7, #1\.0" } } */
+/* { dg-final { scan-assembler "vmov\.f32\ts8, #1\.0" } } */
+/* { dg-final { scan-assembler "vmov\.f32\ts9, #1\.0" } } */
+/* { dg-final { scan-assembler "vmov\.f32\ts10, #1\.0" } } */
+/* { dg-final { scan-assembler "vmov\.f32\ts11, #1\.0" } } */
+/* { dg-final { scan-assembler "vmov\.f32\ts12, #1\.0" } } */
+/* { dg-final { scan-assembler "vmov\.f32\ts13, #1\.0" } } */
+/* { dg-final { scan-assembler "vmov\.f32\ts14, #1\.0" } } */
+/* { dg-final { scan-assembler "vmov\.f32\ts15, #1\.0" } } */
/* Now we check that we use the correct intrinsic to call. */
/* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */
diff --git a/gcc/testsuite/gcc.target/arm/cmse/mainline/hard-sp/cmse-8.c b/gcc/testsuite/gcc.target/arm/cmse/mainline/hard-sp/cmse-8.c
index 1dd62c9..b46585e 100644
--- a/gcc/testsuite/gcc.target/arm/cmse/mainline/hard-sp/cmse-8.c
+++ b/gcc/testsuite/gcc.target/arm/cmse/mainline/hard-sp/cmse-8.c
@@ -12,22 +12,22 @@
/* { dg-final { scan-assembler "mov\tr1, r4" } } */
/* { dg-final { scan-assembler "mov\tr2, r4" } } */
/* { dg-final { scan-assembler "mov\tr3, r4" } } */
-/* { dg-final { scan-assembler-not "vldr\.32\ts0, .L" } } */
-/* { dg-final { scan-assembler-not "vldr\.32\ts1, .L" } } */
-/* { dg-final { scan-assembler "vldr\.32\ts2, .L" } } */
-/* { dg-final { scan-assembler "vldr\.32\ts3, .L" } } */
-/* { dg-final { scan-assembler "vldr\.32\ts4, .L" } } */
-/* { dg-final { scan-assembler "vldr\.32\ts5, .L" } } */
-/* { dg-final { scan-assembler "vldr\.32\ts6, .L" } } */
-/* { dg-final { scan-assembler "vldr\.32\ts7, .L" } } */
-/* { dg-final { scan-assembler "vldr\.32\ts8, .L" } } */
-/* { dg-final { scan-assembler "vldr\.32\ts9, .L" } } */
-/* { dg-final { scan-assembler "vldr\.32\ts10, .L" } } */
-/* { dg-final { scan-assembler "vldr\.32\ts11, .L" } } */
-/* { dg-final { scan-assembler "vldr\.32\ts12, .L" } } */
-/* { dg-final { scan-assembler "vldr\.32\ts13, .L" } } */
-/* { dg-final { scan-assembler "vldr\.32\ts14, .L" } } */
-/* { dg-final { scan-assembler "vldr\.32\ts15, .L" } } */
+/* { dg-final { scan-assembler-not "vmov\.f32\ts0, #1\.0" } } */
+/* { dg-final { scan-assembler-not "vmov\.f32\ts1, #1\.0" } } */
+/* { dg-final { scan-assembler "vmov\.f32\ts2, #1\.0" } } */
+/* { dg-final { scan-assembler "vmov\.f32\ts3, #1\.0" } } */
+/* { dg-final { scan-assembler "vmov\.f32\ts4, #1\.0" } } */
+/* { dg-final { scan-assembler "vmov\.f32\ts5, #1\.0" } } */
+/* { dg-final { scan-assembler "vmov\.f32\ts6, #1\.0" } } */
+/* { dg-final { scan-assembler "vmov\.f32\ts7, #1\.0" } } */
+/* { dg-final { scan-assembler "vmov\.f32\ts8, #1\.0" } } */
+/* { dg-final { scan-assembler "vmov\.f32\ts9, #1\.0" } } */
+/* { dg-final { scan-assembler "vmov\.f32\ts10, #1\.0" } } */
+/* { dg-final { scan-assembler "vmov\.f32\ts11, #1\.0" } } */
+/* { dg-final { scan-assembler "vmov\.f32\ts12, #1\.0" } } */
+/* { dg-final { scan-assembler "vmov\.f32\ts13, #1\.0" } } */
+/* { dg-final { scan-assembler "vmov\.f32\ts14, #1\.0" } } */
+/* { dg-final { scan-assembler "vmov\.f32\ts15, #1\.0" } } */
/* Now we check that we use the correct intrinsic to call. */
/* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */
diff --git a/gcc/testsuite/gcc.target/arm/cmse/mainline/hard/cmse-13.c b/gcc/testsuite/gcc.target/arm/cmse/mainline/hard/cmse-13.c
index ee984a9..576013a 100644
--- a/gcc/testsuite/gcc.target/arm/cmse/mainline/hard/cmse-13.c
+++ b/gcc/testsuite/gcc.target/arm/cmse/mainline/hard/cmse-13.c
@@ -12,18 +12,18 @@
/* { dg-final { scan-assembler "mov\tr1, r4" } } */
/* { dg-final { scan-assembler "mov\tr2, r4" } } */
/* { dg-final { scan-assembler "mov\tr3, r4" } } */
-/* { dg-final { scan-assembler "vldr\.32\ts1, .L" } } */
-/* { dg-final { scan-assembler-not "vldr\.64\td0, .L" } } */
-/* { dg-final { scan-assembler-not "vldr\.32\ts0, .L" } } */
-/* { dg-final { scan-assembler-not "vldr\.64\td1, .L" } } */
-/* { dg-final { scan-assembler-not "vldr\.32\ts2, .L" } } */
-/* { dg-final { scan-assembler-not "vldr\.32\ts3, .L" } } */
-/* { dg-final { scan-assembler "vldr\.64\td2, .L" } } */
-/* { dg-final { scan-assembler "vldr\.64\td3, .L" } } */
-/* { dg-final { scan-assembler "vldr\.64\td4, .L" } } */
-/* { dg-final { scan-assembler "vldr\.64\td5, .L" } } */
-/* { dg-final { scan-assembler "vldr\.64\td6, .L" } } */
-/* { dg-final { scan-assembler "vldr\.64\td7, .L" } } */
+/* { dg-final { scan-assembler "vmov\.f32\ts1, #1\.0" } } */
+/* { dg-final { scan-assembler-not "vmov\.f32\ts0, #1\.0" } } */
+/* { dg-final { scan-assembler-not "vmov\.f64\td0, #1\.0" } } */
+/* { dg-final { scan-assembler-not "vmov\.f64\td1, #1\.0" } } */
+/* { dg-final { scan-assembler-not "vmov\.f32\ts2, #1\.0" } } */
+/* { dg-final { scan-assembler-not "vmov\.f32\ts3, #1\.0" } } */
+/* { dg-final { scan-assembler "vmov\.f64\td2, #1\.0" } } */
+/* { dg-final { scan-assembler "vmov\.f64\td3, #1\.0" } } */
+/* { dg-final { scan-assembler "vmov\.f64\td4, #1\.0" } } */
+/* { dg-final { scan-assembler "vmov\.f64\td5, #1\.0" } } */
+/* { dg-final { scan-assembler "vmov\.f64\td6, #1\.0" } } */
+/* { dg-final { scan-assembler "vmov\.f64\td7, #1\.0" } } */
/* Now we check that we use the correct intrinsic to call. */
/* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */
diff --git a/gcc/testsuite/gcc.target/arm/cmse/mainline/hard/cmse-7.c b/gcc/testsuite/gcc.target/arm/cmse/mainline/hard/cmse-7.c
index ce4b18d..3e502a2 100644
--- a/gcc/testsuite/gcc.target/arm/cmse/mainline/hard/cmse-7.c
+++ b/gcc/testsuite/gcc.target/arm/cmse/mainline/hard/cmse-7.c
@@ -12,14 +12,14 @@
/* { dg-final { scan-assembler "mov\tr1, r4" } } */
/* { dg-final { scan-assembler "mov\tr2, r4" } } */
/* { dg-final { scan-assembler "mov\tr3, r4" } } */
-/* { dg-final { scan-assembler "vldr\.64\td0, .L" } } */
-/* { dg-final { scan-assembler "vldr\.64\td1, .L" } } */
-/* { dg-final { scan-assembler "vldr\.64\td2, .L" } } */
-/* { dg-final { scan-assembler "vldr\.64\td3, .L" } } */
-/* { dg-final { scan-assembler "vldr\.64\td4, .L" } } */
-/* { dg-final { scan-assembler "vldr\.64\td5, .L" } } */
-/* { dg-final { scan-assembler "vldr\.64\td6, .L" } } */
-/* { dg-final { scan-assembler "vldr\.64\td7, .L" } } */
+/* { dg-final { scan-assembler "vmov\.f64\td0, #1\.0" } } */
+/* { dg-final { scan-assembler "vmov\.f64\td1, #1\.0" } } */
+/* { dg-final { scan-assembler "vmov\.f64\td2, #1\.0" } } */
+/* { dg-final { scan-assembler "vmov\.f64\td3, #1\.0" } } */
+/* { dg-final { scan-assembler "vmov\.f64\td4, #1\.0" } } */
+/* { dg-final { scan-assembler "vmov\.f64\td5, #1\.0" } } */
+/* { dg-final { scan-assembler "vmov\.f64\td6, #1\.0" } } */
+/* { dg-final { scan-assembler "vmov\.f64\td7, #1\.0" } } */
/* Now we check that we use the correct intrinsic to call. */
/* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */
diff --git a/gcc/testsuite/gcc.target/arm/cmse/mainline/hard/cmse-8.c b/gcc/testsuite/gcc.target/arm/cmse/mainline/hard/cmse-8.c
index 5368d92..5ed3e7a3 100644
--- a/gcc/testsuite/gcc.target/arm/cmse/mainline/hard/cmse-8.c
+++ b/gcc/testsuite/gcc.target/arm/cmse/mainline/hard/cmse-8.c
@@ -12,14 +12,14 @@
/* { dg-final { scan-assembler "mov\tr1, r4" } } */
/* { dg-final { scan-assembler "mov\tr2, r4" } } */
/* { dg-final { scan-assembler "mov\tr3, r4" } } */
-/* { dg-final { scan-assembler-not "vldr\.64\td0, .L" } } */
-/* { dg-final { scan-assembler "vldr\.64\td1, .L" } } */
-/* { dg-final { scan-assembler "vldr\.64\td2, .L" } } */
-/* { dg-final { scan-assembler "vldr\.64\td3, .L" } } */
-/* { dg-final { scan-assembler "vldr\.64\td4, .L" } } */
-/* { dg-final { scan-assembler "vldr\.64\td5, .L" } } */
-/* { dg-final { scan-assembler "vldr\.64\td6, .L" } } */
-/* { dg-final { scan-assembler "vldr\.64\td7, .L" } } */
+/* { dg-final { scan-assembler-not "vmov\.f64\td0, #1\.0" } } */
+/* { dg-final { scan-assembler "vmov\.f64\td1, #1\.0" } } */
+/* { dg-final { scan-assembler "vmov\.f64\td2, #1\.0" } } */
+/* { dg-final { scan-assembler "vmov\.f64\td3, #1\.0" } } */
+/* { dg-final { scan-assembler "vmov\.f64\td4, #1\.0" } } */
+/* { dg-final { scan-assembler "vmov\.f64\td5, #1\.0" } } */
+/* { dg-final { scan-assembler "vmov\.f64\td6, #1\.0" } } */
+/* { dg-final { scan-assembler "vmov\.f64\td7, #1\.0" } } */
/* Now we check that we use the correct intrinsic to call. */
/* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */