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-rw-r--r--gcc/testsuite/c-c++-common/cxxbitfields-2.c19
-rw-r--r--gcc/testsuite/c-c++-common/cxxbitfields-3.c21
-rw-r--r--gcc/testsuite/c-c++-common/cxxbitfields-4.c18
-rw-r--r--gcc/testsuite/c-c++-common/cxxbitfields-5.c29
-rw-r--r--gcc/testsuite/c-c++-common/cxxbitfields.c18
5 files changed, 105 insertions, 0 deletions
diff --git a/gcc/testsuite/c-c++-common/cxxbitfields-2.c b/gcc/testsuite/c-c++-common/cxxbitfields-2.c
new file mode 100644
index 0000000..b98b56d
--- /dev/null
+++ b/gcc/testsuite/c-c++-common/cxxbitfields-2.c
@@ -0,0 +1,19 @@
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O2 --param allow-store-data-races=0" } */
+
+/* Test that we don't store past VAR.K. */
+
+struct S
+{
+ volatile int i;
+ volatile int j: 32;
+ volatile int k: 15;
+ volatile char c[2];
+} var;
+
+void setit()
+{
+ var.k = 13;
+}
+
+/* { dg-final { scan-assembler-not "movl.*, var" } } */
diff --git a/gcc/testsuite/c-c++-common/cxxbitfields-3.c b/gcc/testsuite/c-c++-common/cxxbitfields-3.c
new file mode 100644
index 0000000..6fc4876
--- /dev/null
+++ b/gcc/testsuite/c-c++-common/cxxbitfields-3.c
@@ -0,0 +1,21 @@
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O2 --param allow-store-data-races=0" } */
+
+/* Make sure we don't narrow down to a QI or HI to store into VAR.J,
+ but instead use an SI. */
+
+struct S
+{
+ volatile int i: 4;
+ volatile int j: 4;
+ volatile int k: 8;
+ volatile int l: 8;
+ volatile int m: 8;
+} var;
+
+void setit()
+{
+ var.j = 5;
+}
+
+/* { dg-final { scan-assembler "movl.*, var" } } */
diff --git a/gcc/testsuite/c-c++-common/cxxbitfields-4.c b/gcc/testsuite/c-c++-common/cxxbitfields-4.c
new file mode 100644
index 0000000..a2d55f4
--- /dev/null
+++ b/gcc/testsuite/c-c++-common/cxxbitfields-4.c
@@ -0,0 +1,18 @@
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O2 --param allow-store-data-races=0" } */
+
+struct bits
+{
+ char a;
+ int b:7;
+ int c:9;
+ unsigned char d;
+} x;
+
+/* Store into <c> should not clobber <d>. */
+void update_c(struct bits *p, int val)
+{
+ p -> c = val;
+}
+
+/* { dg-final { scan-assembler-not "movl" } } */
diff --git a/gcc/testsuite/c-c++-common/cxxbitfields-5.c b/gcc/testsuite/c-c++-common/cxxbitfields-5.c
new file mode 100644
index 0000000..69e4e10
--- /dev/null
+++ b/gcc/testsuite/c-c++-common/cxxbitfields-5.c
@@ -0,0 +1,29 @@
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O2 --param allow-store-data-races=0" } */
+
+#include <stdlib.h>
+
+struct bits
+{
+ char a;
+ int b:7;
+ int c:9;
+ unsigned char d;
+} x;
+
+struct bits *p;
+
+static void allocit()
+{
+ p = (struct bits *) malloc (sizeof (struct bits));
+}
+
+/* Store into <c> should not clobber <d>. */
+/* We should not use a 32-bit move to store into p->, but a smaller move. */
+void foo()
+{
+ allocit();
+ p -> c = 55;
+}
+
+/* { dg-final { scan-assembler-not "movl\t\\(" } } */
diff --git a/gcc/testsuite/c-c++-common/cxxbitfields.c b/gcc/testsuite/c-c++-common/cxxbitfields.c
new file mode 100644
index 0000000..43c840b
--- /dev/null
+++ b/gcc/testsuite/c-c++-common/cxxbitfields.c
@@ -0,0 +1,18 @@
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O2 --param allow-store-data-races=0" } */
+
+/* Test that we don't store past VAR.A. */
+
+struct S
+{
+ volatile unsigned int a : 4;
+ unsigned char b;
+ unsigned int c : 6;
+} var;
+
+void set_a()
+{
+ var.a = 12;
+}
+
+/* { dg-final { scan-assembler-not "movl.*, var" } } */