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-rw-r--r--gcc/testsuite/ChangeLog71
-rw-r--r--gcc/testsuite/g++.target/i386/pr120036.C113
-rw-r--r--gcc/testsuite/gcc.dg/plugin/location-overflow-test-pr116047-1.h6
-rw-r--r--gcc/testsuite/gcc.dg/plugin/location-overflow-test-pr116047-2.h1
-rw-r--r--gcc/testsuite/gcc.dg/plugin/location-overflow-test-pr116047.c5
-rw-r--r--gcc/testsuite/gcc.dg/plugin/location-overflow-test-pr120061-1.h6
-rw-r--r--gcc/testsuite/gcc.dg/plugin/location-overflow-test-pr120061-2.h1
-rw-r--r--gcc/testsuite/gcc.dg/plugin/location-overflow-test-pr120061.c6
-rw-r--r--gcc/testsuite/gcc.dg/plugin/location_overflow_plugin.cc15
-rw-r--r--gcc/testsuite/gcc.dg/plugin/plugin.exp4
-rw-r--r--gcc/testsuite/gcc.dg/vect/vect-early-break_134-pr120089.c66
-rw-r--r--gcc/testsuite/gcc.dg/vect/vect-early-break_135-pr120143.c18
-rw-r--r--gcc/testsuite/gcc.target/aarch64/sve/acle/general/whilelt_5.c24
-rw-r--r--gcc/testsuite/gcc.target/aarch64/sve/ldst_ptrue_pat_128_to_neon.c81
-rw-r--r--gcc/testsuite/gcc.target/aarch64/sve/while_7.c4
-rw-r--r--gcc/testsuite/gcc.target/aarch64/sve/while_9.c2
-rw-r--r--gcc/testsuite/gcc.target/arm/armv8_2-fp16-arith-1.c3
-rw-r--r--gcc/testsuite/gcc.target/i386/pr117839-3a.c22
-rw-r--r--gcc/testsuite/gcc.target/i386/pr117839-3b.c5
-rw-r--r--gcc/testsuite/gcc.target/i386/pr119919.c2
-rw-r--r--gcc/testsuite/gcc.target/riscv/arch-48.c5
-rw-r--r--gcc/testsuite/gcc.target/riscv/pr120137.c12
-rw-r--r--gcc/testsuite/gcc.target/riscv/pr120154.c22
-rw-r--r--gcc/testsuite/gcc.target/s390/vector/cstoreti-1.c127
-rw-r--r--gcc/testsuite/gcc.target/s390/vector/cstoreti-2.c25
25 files changed, 631 insertions, 15 deletions
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index b2ebcef..73e8f7c 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,74 @@
+2025-05-07 Jeff Law <jlaw@ventanamicro.com>
+
+ PR target/120137
+ PR target/120154
+ * gcc.target/riscv/pr120137.c: New test.
+ * gcc.target/riscv/pr120154.c: New test.
+
+2025-05-07 Dongyan Chen <chendongyan@isrc.iscas.ac.cn>
+
+ * gcc.target/riscv/arch-48.c: New test.
+
+2025-05-07 Richard Earnshaw <rearnsha@arm.com>
+
+ PR target/110796
+ PR target/118446
+ * gcc.target/arm/armv8_2-fp16-arith-1.c: Adjust due to no-longer
+ emitting VCMPE when -ffast-math..
+
+2025-05-07 Jakub Jelinek <jakub@redhat.com>
+
+ PR preprocessor/108900
+ PR preprocessor/116047
+ PR preprocessor/120061
+ * gcc.dg/plugin/plugin.exp: Add location-overflow-test-pr116047.c
+ and location-overflow-test-pr120061.c.
+ * gcc.dg/plugin/location_overflow_plugin.cc (plugin_init): Don't error
+ on unknown values, instead just break. Handle 0x4fHHHHHH arguments
+ differently.
+ * gcc.dg/plugin/location-overflow-test-pr116047.c: New test.
+ * gcc.dg/plugin/location-overflow-test-pr116047-1.h: New test.
+ * gcc.dg/plugin/location-overflow-test-pr116047-2.h: New test.
+ * gcc.dg/plugin/location-overflow-test-pr120061.c: New test.
+ * gcc.dg/plugin/location-overflow-test-pr120061-1.h: New test.
+ * gcc.dg/plugin/location-overflow-test-pr120061-2.h: New test.
+
+2025-05-07 Jan Hubicka <hubicka@ucw.cz>
+
+ * gcc.target/i386/pr119919.c: Add -mtune=znver1
+
+2025-05-07 Jennifer Schmitz <jschmitz@nvidia.com>
+
+ PR target/117978
+ * gcc.target/aarch64/sve/acle/general/whilelt_5.c: Adjust expected
+ outcome.
+ * gcc.target/aarch64/sve/ldst_ptrue_pat_128_to_neon.c: New test.
+ * gcc.target/aarch64/sve/while_7.c: Adjust expected outcome.
+ * gcc.target/aarch64/sve/while_9.c: Adjust expected outcome.
+
+2025-05-07 Stefan Schulze Frielinghaus <stefansf@gcc.gnu.org>
+
+ * gcc.target/s390/vector/cstoreti-1.c: New test.
+ * gcc.target/s390/vector/cstoreti-2.c: New test.
+
+2025-05-07 H.J. Lu <hjl.tools@gmail.com>
+
+ PR target/120036
+ * g++.target/i386/pr120036.C: New test.
+ * gcc.target/i386/pr117839-3a.c: Likewise.
+ * gcc.target/i386/pr117839-3b.c: Likewise.
+
+2025-05-07 Paul Thomas <pault@gcc.gnu.org>
+ and Steven G. Kargl <kargl@gcc.gnu.org>
+
+ PR fortran/119948
+ * gfortran.dg/pr119948.f90: Update to incorporate failing test,
+ where module procedure is the result. Test submodule cases.
+
+2025-05-07 Jeff Law <jlaw@ventanamicro.com>
+
+ * g++.target/riscv/redundant-andi.C: New test.
+
2025-05-06 Dongyan Chen <chendongyan@isrc.iscas.ac.cn>
* gcc.target/riscv/arch-47.c: New test.
diff --git a/gcc/testsuite/g++.target/i386/pr120036.C b/gcc/testsuite/g++.target/i386/pr120036.C
new file mode 100644
index 0000000..a2fc24f
--- /dev/null
+++ b/gcc/testsuite/g++.target/i386/pr120036.C
@@ -0,0 +1,113 @@
+/* { dg-do compile { target fpic } } */
+/* { dg-options "-O2 -std=c++11 -march=sapphirerapids -fPIC" } */
+
+typedef _Float16 Native;
+struct float16_t
+{
+ Native native;
+ float16_t ();
+ float16_t (Native arg) : native (arg) {}
+ operator Native ();
+ float16_t
+ operator+ (float16_t rhs)
+ {
+ return native + rhs.native;
+ }
+ float16_t
+ operator* (float16_t)
+ {
+ return native * native;
+ }
+};
+template <int N> struct Simd
+{
+ static constexpr int kPrivateLanes = N;
+};
+template <int N> struct ClampNAndPow2
+{
+ using type = Simd<N>;
+};
+template <int kLimit> struct CappedTagChecker
+{
+ static constexpr int N = sizeof (int) ? kLimit : 0;
+ using type = typename ClampNAndPow2<N>::type;
+};
+template <typename, int kLimit, int>
+using CappedTag = typename CappedTagChecker<kLimit>::type;
+template <class D>
+int
+Lanes (D)
+{
+ return D::kPrivateLanes;
+}
+template <class D> int Zero (D);
+template <class D> using VFromD = decltype (Zero (D ()));
+struct Vec512
+{
+ __attribute__ ((__vector_size__ (16))) _Float16 raw;
+};
+Vec512 Zero (Simd<2>);
+template <class D> void ReduceSum (D, VFromD<D>);
+struct Dot
+{
+ template <int, class D, typename T>
+ static T
+ Compute (D d, T *pa, int num_elements)
+ {
+ T *pb;
+ int N = Lanes (d), i = 0;
+ if (__builtin_expect (num_elements < N, 0))
+ {
+ T sum0 = 0, sum1 = 0;
+ for (; i + 2 <= num_elements; i += 2)
+ {
+ float16_t __trans_tmp_6 = pa[i] * pb[i],
+ __trans_tmp_5 = sum0 + __trans_tmp_6,
+ __trans_tmp_8 = pa[i + 1] * pb[1],
+ __trans_tmp_7 = sum1 + __trans_tmp_8;
+ sum0 = __trans_tmp_5;
+ sum1 = __trans_tmp_7;
+ }
+ float16_t __trans_tmp_9 = sum0 + sum1;
+ return __trans_tmp_9;
+ }
+ decltype (Zero (d)) sum0;
+ ReduceSum (d, sum0);
+ __builtin_trap ();
+ }
+};
+template <int kMul, class Test, int kPow2> struct ForeachCappedR
+{
+ static void
+ Do (int min_lanes, int max_lanes)
+ {
+ CappedTag<int, kMul, kPow2> d;
+ Test () (int (), d);
+ ForeachCappedR<kMul / 2, Test, kPow2>::Do (min_lanes, max_lanes);
+ }
+};
+template <class Test, int kPow2> struct ForeachCappedR<0, Test, kPow2>
+{
+ static void Do (int, int);
+};
+struct TestDot
+{
+ template <class T, class D>
+ void
+ operator() (T, D d)
+ {
+ int counts[]{ 1, 3 };
+ for (int num : counts)
+ {
+ float16_t a;
+ T __trans_tmp_4 = Dot::Compute<0> (d, &a, num);
+ }
+ }
+};
+int DotTest_TestAllDot_TestTestBody_max_lanes;
+void
+DotTest_TestAllDot_TestTestBody ()
+{
+ ForeachCappedR<64, TestDot, 0>::Do (
+ 1, DotTest_TestAllDot_TestTestBody_max_lanes);
+}
diff --git a/gcc/testsuite/gcc.dg/plugin/location-overflow-test-pr116047-1.h b/gcc/testsuite/gcc.dg/plugin/location-overflow-test-pr116047-1.h
new file mode 100644
index 0000000..3dd6434
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/plugin/location-overflow-test-pr116047-1.h
@@ -0,0 +1,6 @@
+
+
+
+
+#include "location-overflow-test-pr116047-2.h"
+static_assert (__LINE__ == 6, "");
diff --git a/gcc/testsuite/gcc.dg/plugin/location-overflow-test-pr116047-2.h b/gcc/testsuite/gcc.dg/plugin/location-overflow-test-pr116047-2.h
new file mode 100644
index 0000000..048f715
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/plugin/location-overflow-test-pr116047-2.h
@@ -0,0 +1 @@
+int i;
diff --git a/gcc/testsuite/gcc.dg/plugin/location-overflow-test-pr116047.c b/gcc/testsuite/gcc.dg/plugin/location-overflow-test-pr116047.c
new file mode 100644
index 0000000..75161fa
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/plugin/location-overflow-test-pr116047.c
@@ -0,0 +1,5 @@
+/* PR preprocessor/116047 */
+/* { dg-do preprocess } */
+/* { dg-options "-nostdinc -std=c23 -fplugin-arg-location_overflow_plugin-value=0x4ffe0180" } */
+#include "location-overflow-test-pr116047-1.h"
+/* { dg-final { scan-file location-overflow-test-pr116047.i "static_assert\[^\n\r]\*6\[^\n\r]\*== 6" } } */
diff --git a/gcc/testsuite/gcc.dg/plugin/location-overflow-test-pr120061-1.h b/gcc/testsuite/gcc.dg/plugin/location-overflow-test-pr120061-1.h
new file mode 100644
index 0000000..ebf7704
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/plugin/location-overflow-test-pr120061-1.h
@@ -0,0 +1,6 @@
+
+
+
+
+#include "location-overflow-test-pr120061-2.h"
+
diff --git a/gcc/testsuite/gcc.dg/plugin/location-overflow-test-pr120061-2.h b/gcc/testsuite/gcc.dg/plugin/location-overflow-test-pr120061-2.h
new file mode 100644
index 0000000..048f715
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/plugin/location-overflow-test-pr120061-2.h
@@ -0,0 +1 @@
+int i;
diff --git a/gcc/testsuite/gcc.dg/plugin/location-overflow-test-pr120061.c b/gcc/testsuite/gcc.dg/plugin/location-overflow-test-pr120061.c
new file mode 100644
index 0000000..e8e8038
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/plugin/location-overflow-test-pr120061.c
@@ -0,0 +1,6 @@
+/* PR preprocessor/120061 */
+/* { dg-do preprocess } */
+/* { dg-options "-nostdinc -std=c23 -fplugin-arg-location_overflow_plugin-value=0x61000000" } */
+#include "location-overflow-test-pr120061-1.h"
+static_assert (__LINE__ == 5, "");
+/* { dg-final { scan-file location-overflow-test-pr120061.i "static_assert\[^\n\r]\*5\[^\n\r]\*== 5" } } */
diff --git a/gcc/testsuite/gcc.dg/plugin/location_overflow_plugin.cc b/gcc/testsuite/gcc.dg/plugin/location_overflow_plugin.cc
index f731b14..f770d35 100644
--- a/gcc/testsuite/gcc.dg/plugin/location_overflow_plugin.cc
+++ b/gcc/testsuite/gcc.dg/plugin/location_overflow_plugin.cc
@@ -85,9 +85,18 @@ plugin_init (struct plugin_name_args *plugin_info,
error_at (UNKNOWN_LOCATION, "missing plugin argument");
/* With 64-bit locations, the thresholds are larger, so shift the base
- location argument accordingly. */
+ location argument accordingly, basically remap the GCC 14 32-bit
+ location_t argument values to 64-bit location_t counterparts. There
+ is one exception for values slightly before the 32-bit location_t
+ LINE_MAP_MAX_LOCATION_WITH_PACKED_RANGES (0x50000000). In that case
+ remap them to the same amount before the 64-bit location_t
+ LINE_MAP_MAX_LOCATION_WITH_PACKED_RANGES -
+ ((location_t) 0x50000000) << 31. */
gcc_assert (sizeof (location_t) == sizeof (uint64_t));
- base_location = 1 + ((base_location - 1) << 31);
+ if (base_location >= 0x4f000000 && base_location <= 0x4fffffff)
+ base_location += (((location_t) 0x50000000) << 31) - 0x50000000;
+ else
+ base_location = 1 + ((base_location - 1) << 31);
register_callback (plugin_info->base_name,
PLUGIN_PRAGMAS,
@@ -107,7 +116,7 @@ plugin_init (struct plugin_name_args *plugin_info,
break;
default:
- error_at (UNKNOWN_LOCATION, "unrecognized value for plugin argument");
+ break;
}
return 0;
diff --git a/gcc/testsuite/gcc.dg/plugin/plugin.exp b/gcc/testsuite/gcc.dg/plugin/plugin.exp
index 90c9162..96e76d2 100644
--- a/gcc/testsuite/gcc.dg/plugin/plugin.exp
+++ b/gcc/testsuite/gcc.dg/plugin/plugin.exp
@@ -138,7 +138,9 @@ set plugin_test_list [list \
{ location_overflow_plugin.cc \
location-overflow-test-1.c \
location-overflow-test-2.c \
- location-overflow-test-pr83173.c } \
+ location-overflow-test-pr83173.c \
+ location-overflow-test-pr116047.c \
+ location-overflow-test-pr120061.c } \
{ must_tail_call_plugin.cc \
must-tail-call-1.c \
must-tail-call-2.c } \
diff --git a/gcc/testsuite/gcc.dg/vect/vect-early-break_134-pr120089.c b/gcc/testsuite/gcc.dg/vect/vect-early-break_134-pr120089.c
new file mode 100644
index 0000000..4d8199c
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/vect/vect-early-break_134-pr120089.c
@@ -0,0 +1,66 @@
+/* { dg-add-options vect_early_break } */
+/* { dg-additional-options "-funswitch-loops" } */
+
+#include "tree-vect.h"
+
+typedef int type;
+typedef type Vec2[2];
+
+struct BytesVec {
+ type d[100];
+};
+
+__attribute__((noipa)) struct BytesVec
+buildVertexBufferData(const Vec2 *origVertices, bool needsZW,
+ unsigned paddingSize, unsigned long t) {
+ const unsigned vertexCount = t;
+ struct BytesVec data = (struct BytesVec){.d = {0}};
+ type *nextVertexPtr = data.d;
+
+ for (unsigned vertexIdx = 0u; vertexIdx < vertexCount; ++vertexIdx) {
+
+ if (vertexIdx > t)
+ __builtin_trap();
+ __builtin_memcpy(nextVertexPtr, &origVertices[vertexIdx],
+ 2 * sizeof(type));
+ nextVertexPtr += 2;
+
+ if (needsZW) {
+ nextVertexPtr += 2;
+ }
+
+ nextVertexPtr += paddingSize;
+ }
+
+ return data;
+}
+Vec2 origVertices[] = {
+ {0, 1}, {2, 3}, {4, 5}, {6, 7},
+ {8, 9}, {10, 11}, {12, 13}, {14, 15},
+ {16, 17}, {18, 19}, {20, 21}, {22, 23},
+ {24, 25}, {26, 27}, {27, 28}, {29, 30},
+};
+
+int main()
+{
+ check_vect ();
+ struct BytesVec vec
+ = buildVertexBufferData(origVertices, false, 0,
+ sizeof(origVertices) / sizeof(origVertices[0]));
+
+ int errors = 0;
+ for (unsigned i = 0; i < 100; i++) {
+ if (i / 2 < sizeof(origVertices) / sizeof(origVertices[0])) {
+ int ii = i;
+ int e = origVertices[ii / 2][ii % 2];
+ if (vec.d[i] != e)
+ errors++;
+ } else {
+ if (vec.d[i] != 0)
+ errors++;
+ }
+ }
+ if (errors)
+ __builtin_abort();
+ return 0;
+}
diff --git a/gcc/testsuite/gcc.dg/vect/vect-early-break_135-pr120143.c b/gcc/testsuite/gcc.dg/vect/vect-early-break_135-pr120143.c
new file mode 100644
index 0000000..1ee30a8
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/vect/vect-early-break_135-pr120143.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-add-options vect_early_break } */
+/* { dg-additional-options "-O3 -fwhole-program" } */
+
+short a;
+extern _Bool b[][23];
+short g = 6;
+int v[4];
+int x[3];
+void c(short g, int v[], int x[]) {
+ for (;;)
+ for (unsigned y = 0; y < 023; y++) {
+ b[y][y] = v[y];
+ for (_Bool aa = 0; aa < (_Bool)g; aa = x[y])
+ a = a > 0;
+ }
+}
+int main() { c(g, v, x); }
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general/whilelt_5.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/whilelt_5.c
index f06a74a..05e266a 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/general/whilelt_5.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/whilelt_5.c
@@ -11,8 +11,7 @@ extern "C" {
/*
** load_vl1:
-** ptrue (p[0-7])\.[bhsd], vl1
-** ld1h z0\.h, \1/z, \[x0\]
+** ldr h0, \[x0\]
** ret
*/
svint16_t
@@ -22,7 +21,12 @@ load_vl1 (int16_t *ptr)
}
/*
-** load_vl2:
+** load_vl2: { target aarch64_little_endian }
+** ldr s0, \[x0\]
+** ret
+*/
+/*
+** load_vl2: { target aarch64_big_endian }
** ptrue (p[0-7])\.h, vl2
** ld1h z0\.h, \1/z, \[x0\]
** ret
@@ -46,7 +50,12 @@ load_vl3 (int16_t *ptr)
}
/*
-** load_vl4:
+** load_vl4: { target aarch64_little_endian }
+** ldr d0, \[x0\]
+** ret
+*/
+/*
+** load_vl4: { target aarch64_big_endian }
** ptrue (p[0-7])\.h, vl4
** ld1h z0\.h, \1/z, \[x0\]
** ret
@@ -94,7 +103,12 @@ load_vl7 (int16_t *ptr)
}
/*
-** load_vl8:
+** load_vl8: { target aarch64_little_endian }
+** ldr q0, \[x0\]
+** ret
+*/
+/*
+** load_vl8: { target aarch64_big_endian }
** ptrue (p[0-7])\.h, vl8
** ld1h z0\.h, \1/z, \[x0\]
** ret
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/ldst_ptrue_pat_128_to_neon.c b/gcc/testsuite/gcc.target/aarch64/sve/ldst_ptrue_pat_128_to_neon.c
new file mode 100644
index 0000000..2d47c1f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/sve/ldst_ptrue_pat_128_to_neon.c
@@ -0,0 +1,81 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+/* { dg-require-effective-target aarch64_little_endian } */
+
+#include <arm_sve.h>
+
+#define TEST(TYPE, TY, W, B) \
+ sv##TYPE \
+ ld1_##TY##W##B##_1 (TYPE *x) \
+ { \
+ svbool_t pg = svwhilelt_b##B (0, W); \
+ return svld1_##TY##B (pg, x); \
+ } \
+ sv##TYPE \
+ ld1_##TY##W##B##_2 (TYPE *x) \
+ { \
+ svbool_t pg = svptrue_pat_b##B ((enum svpattern) (W > 8 ? 9 : W)); \
+ return svld1_##TY##B (pg, x); \
+ } \
+ void \
+ st1_##TY##W##B##_1 (TYPE *x, sv##TYPE data) \
+ { \
+ svbool_t pg = svwhilelt_b##B (0, W); \
+ return svst1_##TY##B (pg, x, data); \
+ } \
+ void \
+ st1_##TY##W##B##_2 (TYPE *x, sv##TYPE data) \
+ { \
+ svbool_t pg = svptrue_pat_b##B ((enum svpattern) (W > 8 ? 9 : W)); \
+ return svst1_##TY##B (pg, x, data); \
+ } \
+
+#define TEST64(TYPE, TY, B) \
+ TEST (TYPE, TY, 1, B) \
+ TEST (TYPE, TY, 2, B) \
+
+#define TEST32(TYPE, TY, B) \
+ TEST64 (TYPE, TY, B) \
+ TEST (TYPE, TY, 4, B) \
+
+#define TEST16(TYPE, TY, B) \
+ TEST32 (TYPE, TY, B) \
+ TEST (TYPE, TY, 8, B) \
+
+#define TEST8(TYPE, TY, B) \
+ TEST16 (TYPE, TY, B) \
+ TEST (TYPE, TY, 16, B)
+
+#define T(TYPE, TY, B) \
+ TEST##B (TYPE, TY, B)
+
+T (bfloat16_t, bf, 16)
+T (float16_t, f, 16)
+T (float32_t, f, 32)
+T (float64_t, f, 64)
+T (int8_t, s, 8)
+T (int16_t, s, 16)
+T (int32_t, s, 32)
+T (int64_t, s, 64)
+T (uint8_t, u, 8)
+T (uint16_t, u, 16)
+T (uint32_t, u, 32)
+T (uint64_t, u, 64)
+
+/* { dg-final { scan-assembler-times {\tldr\tq0, \[x0\]} 24 } } */
+/* { dg-final { scan-assembler-times {\tldr\td0, \[x0\]} 24 } } */
+/* { dg-final { scan-assembler-times {\tldr\ts0, \[x0\]} 18 } } */
+/* { dg-final { scan-assembler-times {\tldr\th0, \[x0\]} 12 } } */
+/* { dg-final { scan-assembler-times {\tldr\tb0, \[x0\]} 4 } } */
+
+/* { dg-final { scan-assembler-times {\tstr\tq0, \[x0\]} 24 } } */
+/* { dg-final { scan-assembler-times {\tstr\td0, \[x0\]} 24 } } */
+/* { dg-final { scan-assembler-times {\tstr\ts0, \[x0\]} 18 } } */
+/* { dg-final { scan-assembler-times {\tstr\th0, \[x0\]} 12 } } */
+/* { dg-final { scan-assembler-times {\tstr\tb0, \[x0\]} 4 } } */
+
+svint8_t foo (int8_t *x)
+{
+ return svld1_s8 (svptrue_b16 (), x);
+}
+/* { dg-final { scan-assembler-times {\tptrue\tp[0-7]\.h, all\n\tld1b} 1 } } */ \ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/while_7.c b/gcc/testsuite/gcc.target/aarch64/sve/while_7.c
index a66a20d..ab2fa36 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/while_7.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/while_7.c
@@ -19,7 +19,7 @@
TEST_ALL (ADD_LOOP)
-/* { dg-final { scan-assembler-times {\tptrue\tp[0-7]\.b, vl8\n} 1 } } */
-/* { dg-final { scan-assembler-times {\tptrue\tp[0-7]\.h, vl8\n} 1 } } */
+/* { dg-final { scan-assembler-times {\tldr\td[0-9]+, \[x0\]} 1 } } */
+/* { dg-final { scan-assembler-times {\tldr\tq[0-9]+, \[x0\]} 1 } } */
/* { dg-final { scan-assembler-times {\twhilelo\tp[0-7]\.s,} 2 } } */
/* { dg-final { scan-assembler-times {\twhilelo\tp[0-7]\.d,} 2 } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/while_9.c b/gcc/testsuite/gcc.target/aarch64/sve/while_9.c
index dd3f404..99940dd 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/while_9.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/while_9.c
@@ -19,7 +19,7 @@
TEST_ALL (ADD_LOOP)
-/* { dg-final { scan-assembler-times {\tptrue\tp[0-7]\.b, vl16\n} 1 } } */
+/* { dg-final { scan-assembler-times {\tldr\tq[0-9]+\, \[x0\]} 1 } } */
/* { dg-final { scan-assembler-times {\twhilelo\tp[0-7]\.h,} 2 } } */
/* { dg-final { scan-assembler-times {\twhilelo\tp[0-7]\.s,} 2 } } */
/* { dg-final { scan-assembler-times {\twhilelo\tp[0-7]\.d,} 2 } } */
diff --git a/gcc/testsuite/gcc.target/arm/armv8_2-fp16-arith-1.c b/gcc/testsuite/gcc.target/arm/armv8_2-fp16-arith-1.c
index 52b8737..f3fea52 100644
--- a/gcc/testsuite/gcc.target/arm/armv8_2-fp16-arith-1.c
+++ b/gcc/testsuite/gcc.target/arm/armv8_2-fp16-arith-1.c
@@ -106,8 +106,7 @@ TEST_CMP (greaterthanqual, >=, int16x8_t, float16x8_t)
/* { dg-final { scan-assembler-times {vdiv\.f16\ts[0-9]+, s[0-9]+, s[0-9]+} 13 } } */
/* For float16_t. */
-/* { dg-final { scan-assembler-times {vcmp\.f32\ts[0-9]+, s[0-9]+} 2 } } */
-/* { dg-final { scan-assembler-times {vcmpe\.f32\ts[0-9]+, s[0-9]+} 4 } } */
+/* { dg-final { scan-assembler-times {vcmp\.f32\ts[0-9]+, s[0-9]+} 6 } } */
/* For float16x4_t. */
/* { dg-final { scan-assembler-times {vceq\.f16\td[0-9]+, d[0-9]+} 2 } } */
diff --git a/gcc/testsuite/gcc.target/i386/pr117839-3a.c b/gcc/testsuite/gcc.target/i386/pr117839-3a.c
new file mode 100644
index 0000000..81afa9d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr117839-3a.c
@@ -0,0 +1,22 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mno-avx -msse2 -mtune=generic" } */
+/* { dg-final { scan-assembler-times "xor\[a-z\]*\[\t \]*%xmm\[0-9\]\+,\[^,\]*" 1 } } */
+
+typedef char v4qi __attribute__((vector_size(4)));
+typedef char v16qi __attribute__((vector_size(16)));
+
+v4qi a;
+v16qi b;
+void
+foo (v4qi* c, v16qi* d)
+{
+ v4qi sum = __extension__(v4qi){0, 0, 0, 0};
+ v16qi sum2 = __extension__(v16qi){0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+0, 0, 0, 0, 0};
+ for (int i = 0; i != 100; i++)
+ sum += c[i];
+ for (int i = 0 ; i != 100; i++)
+ sum2 += d[i];
+ a = sum;
+ b = sum2;
+}
diff --git a/gcc/testsuite/gcc.target/i386/pr117839-3b.c b/gcc/testsuite/gcc.target/i386/pr117839-3b.c
new file mode 100644
index 0000000..a599c28
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr117839-3b.c
@@ -0,0 +1,5 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -march=x86-64-v3" } */
+/* { dg-final { scan-assembler-times "xor\[a-z\]*\[\t \]*%xmm\[0-9\]\+,\[^,\]*" 1 } } */
+
+#include "pr117839-3a.c"
diff --git a/gcc/testsuite/gcc.target/i386/pr119919.c b/gcc/testsuite/gcc.target/i386/pr119919.c
index ed64656..e39819f 100644
--- a/gcc/testsuite/gcc.target/i386/pr119919.c
+++ b/gcc/testsuite/gcc.target/i386/pr119919.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O2 -msse2 -fdump-tree-vect-details" } */
+/* { dg-options "-O2 -msse2 -fdump-tree-vect-details -mtune=znver1" } */
int a[9*9];
bool b[9];
void test()
diff --git a/gcc/testsuite/gcc.target/riscv/arch-48.c b/gcc/testsuite/gcc.target/riscv/arch-48.c
new file mode 100644
index 0000000..58a558e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/arch-48.c
@@ -0,0 +1,5 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc_zama16b -mabi=lp64" } */
+int foo()
+{
+}
diff --git a/gcc/testsuite/gcc.target/riscv/pr120137.c b/gcc/testsuite/gcc.target/riscv/pr120137.c
new file mode 100644
index 0000000..c55a1c1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/pr120137.c
@@ -0,0 +1,12 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv_zvl256b -mrvv-vector-bits=zvl -mabi=lp64" } */
+
+char b[13][13];
+void c() {
+ for (int d = 0; d < 13; ++d)
+ for (int e = 0; e < 13; ++e)
+ b[d][e] = e == 0 ? -98 : 38;
+}
+
+
+
diff --git a/gcc/testsuite/gcc.target/riscv/pr120154.c b/gcc/testsuite/gcc.target/riscv/pr120154.c
new file mode 100644
index 0000000..fd849ca
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/pr120154.c
@@ -0,0 +1,22 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gv -mabi=lp64" } */
+
+
+
+typedef __attribute__((__vector_size__(4))) char V;
+
+V g;
+
+V
+bar(V a, V b)
+{
+ V s = a + b + g;
+ return s;
+}
+
+V
+foo()
+{
+ return bar((V){20}, (V){23, 150});
+}
+
diff --git a/gcc/testsuite/gcc.target/s390/vector/cstoreti-1.c b/gcc/testsuite/gcc.target/s390/vector/cstoreti-1.c
new file mode 100644
index 0000000..f2a131b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/s390/vector/cstoreti-1.c
@@ -0,0 +1,127 @@
+/* { dg-do compile { target int128 } } */
+/* { dg-options "-O2 -march=z13" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+/*
+** test_le:
+** vl (%v.),0\(%r2\),3
+** vl (%v.),0\(%r3\),3
+** vecg \2,\1
+** jne \.L.+
+** vchlgs %v.,\1,\2
+** lghi %r2,0
+** locghinl %r2,1
+** br %r14
+*/
+
+int test_le (__int128 x, __int128 y) { return x <= y; }
+
+/*
+** test_leu:
+** vl (%v.),0\(%r2\),3
+** vl (%v.),0\(%r3\),3
+** veclg \2,\1
+** jne \.L.+
+** vchlgs %v.,\1,\2
+** lghi %r2,0
+** locghinl %r2,1
+** br %r14
+*/
+
+int test_leu (unsigned __int128 x, unsigned __int128 y) { return x <= y; }
+
+/*
+** test_lt:
+** vl (%v.),0\(%r2\),3
+** vl (%v.),0\(%r3\),3
+** vecg \1,\2
+** jne \.L.+
+** vchlgs %v.,\2,\1
+** lghi %r2,0
+** locghil %r2,1
+** br %r14
+*/
+
+int test_lt (__int128 x, __int128 y) { return x < y; }
+
+/*
+** test_ltu:
+** vl (%v.),0\(%r2\),3
+** vl (%v.),0\(%r3\),3
+** veclg \1,\2
+** jne \.L.+
+** vchlgs %v.,\2,\1
+** lghi %r2,0
+** locghil %r2,1
+** br %r14
+*/
+
+int test_ltu (unsigned __int128 x, unsigned __int128 y) { return x < y; }
+
+/*
+** test_ge:
+** vl (%v.),0\(%r2\),3
+** vl (%v.),0\(%r3\),3
+** vecg \1,\2
+** jne \.L.+
+** vchlgs %v.,\2,\1
+** lghi %r2,0
+** locghinl %r2,1
+** br %r14
+*/
+
+int test_ge (__int128 x, __int128 y) { return x >= y; }
+
+/*
+** test_geu:
+** vl (%v.),0\(%r2\),3
+** vl (%v.),0\(%r3\),3
+** veclg \1,\2
+** jne \.L.+
+** vchlgs %v.,\2,\1
+** lghi %r2,0
+** locghinl %r2,1
+** br %r14
+*/
+
+int test_geu (unsigned __int128 x, unsigned __int128 y) { return x >= y; }
+
+/*
+** test_gt:
+** vl (%v.),0\(%r2\),3
+** vl (%v.),0\(%r3\),3
+** vecg \2,\1
+** jne \.L.+
+** vchlgs %v.,\1,\2
+** lghi %r2,0
+** locghil %r2,1
+** br %r14
+*/
+
+int test_gt (__int128 x, __int128 y) { return x > y; }
+
+/*
+** test_gtu:
+** vl (%v.),0\(%r2\),3
+** vl (%v.),0\(%r3\),3
+** veclg \2,\1
+** jne \.L.+
+** vchlgs %v.,\1,\2
+** lghi %r2,0
+** locghil %r2,1
+** br %r14
+*/
+
+int test_gtu (unsigned __int128 x, unsigned __int128 y) { return x > y; }
+
+/* { dg-final { scan-assembler-times {vceqgs\t} 4 } } */
+/* { dg-final { scan-assembler-times {locghie\t} 2 } } */
+/* { dg-final { scan-assembler-times {locghine\t} 2 } } */
+
+int test_eq (__int128 x, __int128 y) { return x == y; }
+
+int test_equ (unsigned __int128 x, unsigned __int128 y) { return x == y; }
+
+int test_ne (__int128 x, __int128 y) { return x != y; }
+
+int test_neu (unsigned __int128 x, unsigned __int128 y) { return x != y; }
diff --git a/gcc/testsuite/gcc.target/s390/vector/cstoreti-2.c b/gcc/testsuite/gcc.target/s390/vector/cstoreti-2.c
new file mode 100644
index 0000000..d7b0382
--- /dev/null
+++ b/gcc/testsuite/gcc.target/s390/vector/cstoreti-2.c
@@ -0,0 +1,25 @@
+/* { dg-do compile { target int128 } } */
+/* { dg-options "-O2 -march=z17" } */
+/* { dg-final { scan-assembler-times {vecq\t} 8 } } */
+/* { dg-final { scan-assembler-times {veclq\t} 4 } } */
+/* { dg-final { scan-assembler-times {locghile\t} 1 } } LE */
+/* { dg-final { scan-assembler-times {slbgr\t} 1 } } LEU */
+/* { dg-final { scan-assembler-times {locghil\t} 2 } } LT LTU */
+/* { dg-final { scan-assembler-times {locghihe\t} 2 } } GE GEU */
+/* { dg-final { scan-assembler-times {locghih\t} 1 } } GT */
+/* { dg-final { scan-assembler-times {alcgr\t} 1 } } GTU */
+/* { dg-final { scan-assembler-times {locghie\t} 2 } } EQ EQU */
+/* { dg-final { scan-assembler-times {locghine\t} 2 } } NE NEU */
+
+int test_le (__int128 x, __int128 y) { return x <= y; }
+int test_leu (unsigned __int128 x, unsigned __int128 y) { return x <= y; }
+int test_lt (__int128 x, __int128 y) { return x < y; }
+int test_ltu (unsigned __int128 x, unsigned __int128 y) { return x < y; }
+int test_ge (__int128 x, __int128 y) { return x >= y; }
+int test_geu (unsigned __int128 x, unsigned __int128 y) { return x >= y; }
+int test_gt (__int128 x, __int128 y) { return x > y; }
+int test_gtu (unsigned __int128 x, unsigned __int128 y) { return x > y; }
+int test_eq (__int128 x, __int128 y) { return x == y; }
+int test_equ (unsigned __int128 x, unsigned __int128 y) { return x == y; }
+int test_ne (__int128 x, __int128 y) { return x != y; }
+int test_neu (unsigned __int128 x, unsigned __int128 y) { return x != y; }