3 files changed, 7 insertions, 4 deletions
diff --git a/gcc/testsuite/gcc.target/mips/dspr2-MULT.c b/gcc/testsuite/gcc.target/mips/dspr2-MULT.c
index ab2c28a..8b815e5 100644
--- a/gcc/testsuite/gcc.target/mips/dspr2-MULT.c
+++ b/gcc/testsuite/gcc.target/mips/dspr2-MULT.c
@@ -1,6 +1,7 @@
-/* Test MIPS32 DSP REV 2 MULT instruction */
+/* Test MIPS32 DSP REV 2 MULT instruction.  Tune for a CPU that has
+   pipelined mult.  */
 /* { dg-do compile } */
-/* { dg-options "-mgp32 -mdspr2 -O2 -ffixed-hi -ffixed-lo" } */
+/* { dg-options "-mgp32 -mdspr2 -O2 -ffixed-hi -ffixed-lo -mtune=74kc" } */
 
 /* { dg-final { scan-assembler "\tmult\t" } } */
 /* { dg-final { scan-assembler "ac1" } } */
diff --git a/gcc/testsuite/gcc.target/mips/dspr2-MULTU.c b/gcc/testsuite/gcc.target/mips/dspr2-MULTU.c
index 312938a..c457d24 100644
--- a/gcc/testsuite/gcc.target/mips/dspr2-MULTU.c
+++ b/gcc/testsuite/gcc.target/mips/dspr2-MULTU.c
@@ -1,6 +1,7 @@
-/* Test MIPS32 DSP REV 2 MULTU instruction */
+/* Test MIPS32 DSP REV 2 MULTU instruction.  Tune for a CPU that has
+   pipelined multu.  */
 /* { dg-do compile } */
-/* { dg-options "-mgp32 -mdspr2 -O2 -ffixed-hi -ffixed-lo" } */
+/* { dg-options "-mgp32 -mdspr2 -O2 -ffixed-hi -ffixed-lo -mtune=74kc" } */
 
 /* { dg-final { scan-assembler "\tmultu\t" } } */
 /* { dg-final { scan-assembler "ac1" } } */
diff --git a/gcc/testsuite/gcc.target/mips/mips.exp b/gcc/testsuite/gcc.target/mips/mips.exp
index 7befff5..a0b8fc3 100644
--- a/gcc/testsuite/gcc.target/mips/mips.exp
+++ b/gcc/testsuite/gcc.target/mips/mips.exp
@@ -243,6 +243,7 @@ foreach option {
     branch-cost
     code-readable
     r10k-cache-barrier
+    tune
 } {
     lappend mips_option_groups $option "-m$option=.*"
 }