diff options
Diffstat (limited to 'gcc/testsuite/gcc.target')
18 files changed, 2484 insertions, 25 deletions
diff --git a/gcc/testsuite/gcc.target/aarch64/popcnt-le-1.c b/gcc/testsuite/gcc.target/aarch64/popcnt-le-1.c index b4141da..843fdac 100644 --- a/gcc/testsuite/gcc.target/aarch64/popcnt-le-1.c +++ b/gcc/testsuite/gcc.target/aarch64/popcnt-le-1.c @@ -8,7 +8,7 @@ /* ** le32: ** sub w([0-9]+), w0, #1 -** tst w0, w\1 +** tst (?:w0, w\1|w\1, w0) ** cset w0, eq ** ret */ @@ -20,7 +20,7 @@ unsigned le32 (const unsigned int a) { /* ** gt32: ** sub w([0-9]+), w0, #1 -** tst w0, w\1 +** tst (?:w0, w\1|w\1, w0) ** cset w0, ne ** ret */ diff --git a/gcc/testsuite/gcc.target/aarch64/popcnt-le-3.c b/gcc/testsuite/gcc.target/aarch64/popcnt-le-3.c index b811e6f..3b558e9 100644 --- a/gcc/testsuite/gcc.target/aarch64/popcnt-le-3.c +++ b/gcc/testsuite/gcc.target/aarch64/popcnt-le-3.c @@ -8,7 +8,7 @@ /* ** le16: ** sub w([0-9]+), w0, #1 -** and w([0-9]+), w0, w\1 +** and w([0-9]+), (?:w0, w\1|w\1, w0) ** tst w\2, 65535 ** cset w0, eq ** ret @@ -21,7 +21,7 @@ unsigned le16 (const unsigned short a) { /* ** gt16: ** sub w([0-9]+), w0, #1 -** and w([0-9]+), w0, w\1 +** and w([0-9]+), (?:w0, w\1|w\1, w0) ** tst w\2, 65535 ** cset w0, ne ** ret diff --git a/gcc/testsuite/gcc.target/aarch64/pr100056.c b/gcc/testsuite/gcc.target/aarch64/pr100056.c index 0b77824..70499772 100644 --- a/gcc/testsuite/gcc.target/aarch64/pr100056.c +++ b/gcc/testsuite/gcc.target/aarch64/pr100056.c @@ -1,7 +1,9 @@ /* PR target/100056 */ /* { dg-do compile } */ /* { dg-options "-O2" } */ -/* { dg-final { scan-assembler-not {\t[us]bfiz\tw[0-9]+, w[0-9]+, 11} } } */ +/* { dg-final { scan-assembler-not {\t[us]bfiz\tw[0-9]+, w[0-9]+, 11} { xfail *-*-* } } } */ +/* { dg-final { scan-assembler-times {\t[us]bfiz\tw[0-9]+, w[0-9]+, 11} 2 } } */ +/* { dg-final { scan-assembler-times {\tadd\tw[0-9]+, w[0-9]+, w[0-9]+, uxtb\n} 2 } } */ int or_shift_u8 (unsigned char i) diff --git a/gcc/testsuite/gcc.target/aarch64/sve/gomp/gomp.exp b/gcc/testsuite/gcc.target/aarch64/sve/gomp/gomp.exp new file mode 100644 index 0000000..376985d --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/gomp/gomp.exp @@ -0,0 +1,46 @@ +# Copyright (C) 2006-2025 Free Software Foundation, Inc. +# +# This file is part of GCC. +# +# GCC is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 3, or (at your option) +# any later version. +# +# GCC is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with GCC; see the file COPYING3. If not see +# <http://www.gnu.org/licenses/>. + +# GCC testsuite that uses the `dg.exp' driver. + +# Exit immediately if this isn't an AArch64 target. +if {![istarget aarch64*-*-*] } then { + return +} + +# Load support procs. +load_lib gcc-dg.exp + +# Initialize `dg'. +dg-init + +if ![check_effective_target_fopenmp] { + return +} + +if { [check_effective_target_aarch64_sve] } { + set sve_flags "" +} else { + set sve_flags "-march=armv8.2-a+sve" +} + +# Main loop. +dg-runtest [lsort [find $srcdir/$subdir *.c]] "$sve_flags -fopenmp" "" + +# All done. +dg-finish diff --git a/gcc/testsuite/gcc.target/aarch64/sve/gomp/target-device.c b/gcc/testsuite/gcc.target/aarch64/sve/gomp/target-device.c new file mode 100644 index 0000000..75dd39b --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/gomp/target-device.c @@ -0,0 +1,201 @@ +/* { dg-do compile } */ +/* { dg-options "-msve-vector-bits=256 -fopenmp -O2" } */ + +#include <arm_sve.h> + +#define N __ARM_FEATURE_SVE_BITS + +int64_t __attribute__ ((noipa)) +target_device_ptr_vla (svbool_t vp, svint32_t *vptr) +{ + + int a[N], b[N], c[N]; + svint32_t va, vb, vc; + int64_t res; + int i; + +#pragma omp parallel for + for (i = 0; i < N; i++) + { + b[i] = i; + c[i] = i + 1; + } +/* { dg-error {SVE type 'svint32_t \*' not allowed in 'target' device clauses} "" { target *-*-* } .+1 } */ +#pragma omp target data use_device_ptr (vptr) map (to: b, c) +/* { dg-error {SVE type 'svint32_t \*' not allowed in 'target' device clauses} "" { target *-*-* } .+1 } */ +#pragma omp target is_device_ptr (vptr) map (to: b, c) map (from: res) + for (i = 0; i < 8; i++) + { + /* { dg-error "cannot reference 'svint32_t' object types in 'target' region" "" { target *-*-* } .+1 } */ + vb = *vptr; + /* { dg-error "cannot reference 'svint32_t' object types in 'target' region" "" { target *-*-* } .+2 } */ + /* { dg-error "cannot reference 'svbool_t' object types in 'target' region" "" { target *-*-* } .+1 } */ + vc = svld1_s32 (vp, c); + /* { dg-error "cannot reference 'svint32_t' object types in 'target' region" "" { target *-*-* } .+1 } */ + va = svadd_s32_z (vp, vb, vc); + res = svaddv_s32 (svptrue_b32 (), va); + } + + return res; +} + +int64_t __attribute__ ((noipa)) +target_device_addr_vla (svbool_t vp, svint32_t *vptr) +{ + + int a[N], b[N], c[N]; + svint32_t va, vb, vc; + int64_t res; + int i; + +#pragma omp parallel for + for (i = 0; i < N; i++) + { + b[i] = i; + c[i] = i + 1; + } + +/* { dg-error "SVE type 'svint32_t' not allowed in 'target' device clauses" "" { target *-*-* } .+1 } */ +#pragma omp target data use_device_addr (vb) map (to: b, c) +/* { dg-error {SVE type 'svint32_t \*' not allowed in 'target' device clauses} "" { target *-*-* } .+1 } */ +#pragma omp target is_device_ptr (vptr) map (to: b, c) map (from: res) + for (i = 0; i < 8; i++) + { + /* { dg-error "cannot reference 'svint32_t' object types in 'target' region" "" { target *-*-* } .+1 } */ + vb = *vptr; + /* { dg-error "cannot reference 'svint32_t' object types in 'target' region" "" { target *-*-* } .+2 } */ + /* { dg-error "cannot reference 'svbool_t' object types in 'target' region" "" { target *-*-* } .+1 } */ + vc = svld1_s32 (vp, c); + /* { dg-error "cannot reference 'svint32_t' object types in 'target' region" "" { target *-*-* } .+1 } */ + va = svadd_s32_z (vp, vb, vc); + res = svaddv_s32 (svptrue_b32 (), va); + } + + return res; +} + +int64_t __attribute__ ((noipa)) +target_has_device_addr_vla (svbool_t vp, svint32_t *vptr) +{ + + int a[N], b[N], c[N]; + svint32_t va, vb, vc; + int64_t res; + int i; + +#pragma omp parallel for + for (i = 0; i < N; i++) + { + b[i] = i; + c[i] = i + 1; + } + +/* { dg-error "SVE type 'svint32_t' not allowed in 'target' device clauses" "" { target *-*-* } .+1 } */ +#pragma omp target data use_device_addr (vb) map (to: b, c) +/* { dg-error "SVE type 'svint32_t' not allowed in 'target' device clauses" "" { target *-*-* } .+1 } */ +#pragma omp target has_device_addr (vb) map (to: b, c) map (from: res) + for (i = 0; i < 8; i++) + { + /* { dg-error "cannot reference 'svbool_t' object types in 'target' region" "" { target *-*-* } .+1 } */ + vb = svld1_s32 (vp, b); + /* { dg-error "cannot reference 'svint32_t' object types in 'target' region" "" { target *-*-* } .+1 } */ + vc = svld1_s32 (vp, c); + /* { dg-error "cannot reference 'svint32_t' object types in 'target' region" "" { target *-*-* } .+1 } */ + va = svadd_s32_z (vp, vb, vc); + res = svaddv_s32 (svptrue_b32 (), va); + } + + return res; +} + +#define FIXED_ATTR __attribute__ ((arm_sve_vector_bits (N))) + +typedef __SVInt32_t v8si FIXED_ATTR; +typedef svbool_t v8bi FIXED_ATTR; + +int64_t __attribute__ ((noipa)) +target_device_ptr_vls (v8bi vp, v8si *vptr) +{ + + int a[N], b[N], c[N]; + v8si va, vb, vc; + int64_t res; + int i; + +#pragma omp parallel for + for (i = 0; i < N; i++) + { + b[i] = i; + c[i] = i + 1; + } + +#pragma omp target data use_device_ptr (vptr) map (to: b, c) +#pragma omp target is_device_ptr (vptr) map (to: b, c) map (from: res) + for (i = 0; i < 8; i++) + { + vb = *vptr; + vc = svld1_s32 (vp, c); + va = svadd_s32_z (vp, vb, vc); + res = svaddv_s32 (svptrue_b32 (), va); + } + + return res; +} + +int64_t __attribute__ ((noipa)) +target_device_addr_vls (v8bi vp, v8si *vptr) +{ + + int a[N], b[N], c[N]; + v8si va, vb, vc; + int64_t res; + int i; + +#pragma omp parallel for + for (i = 0; i < N; i++) + { + b[i] = i; + c[i] = i + 1; + } + +#pragma omp target data use_device_addr (vb) map (to: b, c) +#pragma omp target is_device_ptr (vptr) map (to: b, c) map (from: res) + for (i = 0; i < 8; i++) + { + vb = *vptr; + vc = svld1_s32 (vp, c); + va = svadd_s32_z (vp, vb, vc); + res = svaddv_s32 (svptrue_b32 (), va); + } + + return res; +} + +int64_t __attribute__ ((noipa)) +target_has_device_addr_vls (v8bi vp, v8si *vptr) +{ + + int a[N], b[N], c[N]; + v8si va, vb, vc; + int64_t res; + int i; + +#pragma omp parallel for + for (i = 0; i < N; i++) + { + b[i] = i; + c[i] = i + 1; + } + +#pragma omp target data use_device_addr (vb) map (to: b, c) +#pragma omp target has_device_addr (vb) map (to: b, c) map (from: res) + for (i = 0; i < 8; i++) + { + vb = svld1_s32 (vp, b); + vc = svld1_s32 (vp, c); + va = svadd_s32_z (vp, vb, vc); + res = svaddv_s32 (svptrue_b32 (), va); + } + + return res; +} diff --git a/gcc/testsuite/gcc.target/aarch64/sve/gomp/target-link.c b/gcc/testsuite/gcc.target/aarch64/sve/gomp/target-link.c new file mode 100644 index 0000000..2f6184b --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/gomp/target-link.c @@ -0,0 +1,57 @@ +/* { dg-do compile } */ +/* { dg-options "-msve-vector-bits=256 -fopenmp -O2" } */ + +#include <arm_sve.h> + +#define N __ARM_FEATURE_SVE_BITS +#define FIXED_ATTR __attribute__((arm_sve_vector_bits (N))) + +typedef __SVInt32_t v8si FIXED_ATTR; + +static v8si local_vec; +#pragma omp declare target link(local_vec) + +v8si global_vec; +#pragma omp declare target link(global_vec) + +/* { dg-error {SVE type 'svint32_t' does not have a fixed size} "" { target *-*-* } .+1 } */ +static svint32_t slocal_vec; + +/* { dg-error {'slocal_vec' does not have a mappable type in 'link' clause} "" { target *-*-* } .+1 } */ +#pragma omp declare target link(slocal_vec) + +void +one_get_inc2_local_vec_vls () +{ + v8si res, res2, tmp; + +#pragma omp target map(from: res, res2) + { + res = local_vec; + local_vec = svadd_s32_z (svptrue_b32 (), local_vec, local_vec); + res2 = local_vec; + } + + tmp = svadd_s32_z (svptrue_b32 (), res, res); + svbool_t p = svcmpne_s32 (svptrue_b32 (), tmp, res2); + if (svptest_any (svptrue_b32 (), p)) + __builtin_abort (); +} + +void +one_get_inc3_global_vec_vls () +{ + v8si res, res2, tmp; + +#pragma omp target map(from: res, res2) + { + res = global_vec; + global_vec = svadd_s32_z (svptrue_b32 (), global_vec, global_vec); + res2 = global_vec; + } + + tmp = svadd_s32_z (svptrue_b32 (), res, res); + svbool_t p = svcmpne_s32 (svptrue_b32 (), tmp, res2); + if (svptest_any (svptrue_b32 (), p)) + __builtin_abort (); +} diff --git a/gcc/testsuite/gcc.target/aarch64/sve/gomp/target.c b/gcc/testsuite/gcc.target/aarch64/sve/gomp/target.c new file mode 100644 index 0000000..812183d --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/gomp/target.c @@ -0,0 +1,2049 @@ +/* { dg-do compile } */ +/* { dg-options "-msve-vector-bits=256 -fopenmp -O2" } */ + +#include <arm_sve.h> + +#define N __ARM_FEATURE_SVE_BITS +#define FIXED_ATTR __attribute__((arm_sve_vector_bits (N))) + +typedef svint32_t v8si FIXED_ATTR; +typedef svbool_t v8bi FIXED_ATTR; + +void +target_vla1 (svint32_t vb, svint32_t vc, int *a, int *b, int *c) +{ + int i; + +#pragma omp target + for (i = 0; i < 8; i++) + { + svint32_t va; + + /* { dg-error "cannot reference 'svint32_t' object types in 'target' region" "" { target *-*-* } .+1 } */ + svst1_s32 (svptrue_b32 (), b + i * 8, vb); + /* { dg-error "cannot reference 'svint32_t' object types in 'target' region" "" { target *-*-* } .+1 } */ + svst1_s32 (svptrue_b32 (), c + i * 8, vc); + va = svadd_s32_z (svptrue_b32 (), vb, vc); + svst1_s32 (svptrue_b32 (), a + i * 8, va); + } +} + +svint32_t +target_data_map_1_vla1 (svint32_t vb, svint32_t vc, int *b, int *c) +{ + svint32_t va; + int i; + +/* { dg-error "SVE type 'svint32_t' not allowed in 'map' clause" "" { target *-*-* } .+1 } */ +#pragma omp target map(to: b, c, vb, vc) map(from: va) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), b + i * 8, vb); + svst1_s32 (svptrue_b32 (), c + i * 8, vc); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), vb, vc); + } + return va; +} + +svint32_t +target_data_map_2_vla1 (svint32_t vb, svint32_t vc, int *a, int *b, + int *c) +{ + svint32_t va; + int i; + +/* { dg-error "SVE type 'svint32_t' not allowed in 'map' clause" "" { target *-*-* } .+1 } */ +#pragma omp target map(to: b, c, vb, vc) map(from: va) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), b + i * 8, vb); + svst1_s32 (svptrue_b32 (), c + i * 8, vc); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), vb, vc); + } + +/* { dg-error "SVE type 'svint32_t' not allowed in 'map' clause" "" { target *-*-* } .+1 } */ +#pragma omp target map(to: a) map(tofrom: va) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), a + i * 8, va); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), va, svindex_s32 (1, 1)); + } + return va; +} + +svint32_t +target_map_data_enter_exit_vla1 (svint32_t vb, svint32_t vc, int *a, + int *b, int *c) +{ + svint32_t va; + int i; + +/* { dg-error "SVE type 'svint32_t' not allowed in 'map' clause" "" { target *-*-* } .+1 } */ +#pragma omp target enter data map(to: b, c, vb, vc) + +/* { dg-error "SVE type 'svint32_t' not allowed in 'map' clause" "" { target *-*-* } .+1 } */ +#pragma omp target map(from: va) + for (i = 0; i < 8; i++) + { + /* { dg-error "cannot reference 'svint32_t' object types in 'target' region" "" { target *-*-* } .+1 } */ + svst1_s32 (svptrue_b32 (), b + i * 8, vb); + /* { dg-error "cannot reference 'svint32_t' object types in 'target' region" "" { target *-*-* } .+1 } */ + svst1_s32 (svptrue_b32 (), c + i * 8, vc); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), vb, vc); + } + +/* { dg-error "SVE type 'svint32_t' not allowed in 'map' clause" "" { target *-*-* } .+1 } */ +#pragma omp target map(to: va) map(to: a) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), a + i * 8, va); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), va, svindex_s32 (1, 1)); + } + +/* { dg-error "SVE type 'svint32_t' not allowed in 'map' clause" "" { target *-*-* } .+1 } */ +#pragma omp target exit data map(from: va) + + return va; +} + +svint32_t +target_map_data_alloc_update_vla1 (svint32_t vb, svint32_t vc, int *a, + int *b, int *c) +{ + svint32_t va; + int i; + +/* { dg-error "SVE type 'svint32_t' not allowed in 'map' clause" "" { target *-*-* } .+1 } */ +#pragma omp target data map(to: b, c, vb, vc) map(alloc: va) + +#pragma omp target + for (i = 0; i < 8; i++) + { + /* { dg-error "cannot reference 'svint32_t' object types in 'target' region" "" { target *-*-* } .+1 } */ + svst1_s32 (svptrue_b32 (), b + i * 8, vb); + /* { dg-error "cannot reference 'svint32_t' object types in 'target' region" "" { target *-*-* } .+1 } */ + svst1_s32 (svptrue_b32 (), c + i * 8, vc); + if (i == 7) + /* { dg-error "cannot reference 'svint32_t' object types in 'target' region" "" { target *-*-* } .+1 } */ + va = svadd_s32_z (svptrue_b32 (), vb, vc); + } + +#pragma omp target update from(va) + +/* { dg-error "SVE type 'svint32_t' not allowed in 'map' clause" "" { target *-*-* } .+1 } */ +#pragma omp target map(to: a) map(tofrom: va) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), a + i * 8, va); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), va, svindex_s32 (1, 1)); + } + return va; +} + +void +target_vls1 (v8si vb, v8si vc, int *a, int *b, int *c) +{ + int i; + +#pragma omp target + for (i = 0; i < 8; i++) + { + v8si va; + svst1_s32 (svptrue_b32 (), b + i * 8, vb); + svst1_s32 (svptrue_b32 (), c + i * 8, vc); + va = svadd_s32_z (svptrue_b32 (), vb, vc); + svst1_s32 (svptrue_b32 (), a + i * 8, va); + } +} + +v8si +target_data_map_1_vls1 (v8si vb, v8si vc, int *b, int *c) +{ + v8si va; + int i; + +#pragma omp target map(to: b, c, vb, vc) map(from: va) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), b + i * 8, vb); + svst1_s32 (svptrue_b32 (), c + i * 8, vc); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), vb, vc); + } + return va; +} + +v8si +target_data_map_2_vls1 (v8si vb, v8si vc, int *a, int *b, int *c) +{ + v8si va; + int i; + +#pragma omp target map(to: b, c, vb, vc) map(from: va) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), b + i * 8, vb); + svst1_s32 (svptrue_b32 (), c + i * 8, vc); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), vb, vc); + } + +#pragma omp target map(to: a) map(tofrom: va) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), a + i * 8, va); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), va, svindex_s32 (1, 1)); + } + return va; +} + +v8si +target_map_data_enter_exit_vls1 (v8si vb, v8si vc, int *a, int *b, int *c) +{ + v8si va; + int i; + +#pragma omp target enter data map(to: b, c, vb, vc) + +#pragma omp target map(from: va) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), b + i * 8, vb); + svst1_s32 (svptrue_b32 (), c + i * 8, vc); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), vb, vc); + } + +#pragma omp target map(to: va) map(to: a) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), a + i * 8, va); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), va, svindex_s32 (1, 1)); + } + +#pragma omp target exit data map(from: va) + + return va; +} + +v8si +target_map_data_alloc_update_vls1 (v8si vb, v8si vc, int *a, int *b, + int *c) +{ + v8si va; + int i; + +#pragma omp target data map(to: b, c, vb, vc) map(alloc: va) + +#pragma omp target + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), b + i * 8, vb); + svst1_s32 (svptrue_b32 (), c + i * 8, vc); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), vb, vc); + } + +#pragma omp target update from(va) + +#pragma omp target map(to: a) map(tofrom: va) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), a + i * 8, va); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), va, svindex_s32 (1, 1)); + } + return va; +} + +void +target_vla2 (svint32_t vb, svint32_t vc, int *a, int *b, int *c) +{ + int i; + +#pragma omp target parallel + for (i = 0; i < 8; i++) + { + svint32_t va; + + /* { dg-error "cannot reference 'svint32_t' object types in 'target' region" "" { target *-*-* } .+1 } */ + svst1_s32 (svptrue_b32 (), b + i * 8, vb); + /* { dg-error "cannot reference 'svint32_t' object types in 'target' region" "" { target *-*-* } .+1 } */ + svst1_s32 (svptrue_b32 (), c + i * 8, vc); + va = svadd_s32_z (svptrue_b32 (), vb, vc); + svst1_s32 (svptrue_b32 (), a + i * 8, va); + } +} + +svint32_t +target_data_map_1_vla2 (svint32_t vb, svint32_t vc, int *b, int *c) +{ + svint32_t va; + int i; + +/* { dg-error "SVE type 'svint32_t' not allowed in 'map' clause" "" { target *-*-* } .+1 } */ +#pragma omp target parallel map(to: b, c, vb, vc) map(from: va) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), b + i * 8, vb); + svst1_s32 (svptrue_b32 (), c + i * 8, vc); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), vb, vc); + } + return va; +} + +svint32_t +target_data_map_2_vla2 (svint32_t vb, svint32_t vc, int *a, int *b, + int *c) +{ + svint32_t va; + int i; + +/* { dg-error "SVE type 'svint32_t' not allowed in 'map' clause" "" { target *-*-* } .+1 } */ +#pragma omp target parallel map(to: b, c, vb, vc) map(from: va) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), b + i * 8, vb); + svst1_s32 (svptrue_b32 (), c + i * 8, vc); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), vb, vc); + } + +/* { dg-error "SVE type 'svint32_t' not allowed in 'map' clause" "" { target *-*-* } .+1 } */ +#pragma omp target parallel map(to: a) map(tofrom: va) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), a + i * 8, va); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), va, svindex_s32 (1, 1)); + } + return va; +} + +svint32_t +target_map_data_enter_exit_vla2 (svint32_t vb, svint32_t vc, int *a, + int *b, int *c) +{ + svint32_t va; + int i; + +/* { dg-error "SVE type 'svint32_t' not allowed in 'map' clause" "" { target *-*-* } .+1 } */ +#pragma omp target enter data map(to: b, c, vb, vc) + +/* { dg-error "SVE type 'svint32_t' not allowed in 'map' clause" "" { target *-*-* } .+1 } */ +#pragma omp target parallel map(from: va) + for (i = 0; i < 8; i++) + { + /* { dg-error "cannot reference 'svint32_t' object types in 'target' region" "" { target *-*-* } .+1 } */ + svst1_s32 (svptrue_b32 (), b + i * 8, vb); + /* { dg-error "cannot reference 'svint32_t' object types in 'target' region" "" { target *-*-* } .+1 } */ + svst1_s32 (svptrue_b32 (), c + i * 8, vc); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), vb, vc); + } + +/* { dg-error "SVE type 'svint32_t' not allowed in 'map' clause" "" { target *-*-* } .+1 } */ +#pragma omp target parallel map(to: va) map(to: a) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), a + i * 8, va); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), va, svindex_s32 (1, 1)); + } + +/* { dg-error "SVE type 'svint32_t' not allowed in 'map' clause" "" { target *-*-* } .+1 } */ +#pragma omp target exit data map(from: va) + + return va; +} + +svint32_t +target_map_data_alloc_update_vla2 (svint32_t vb, svint32_t vc, int *a, + int *b, int *c) +{ + svint32_t va; + int i; + +/* { dg-error "SVE type 'svint32_t' not allowed in 'map' clause" "" { target *-*-* } .+1 } */ +#pragma omp target data map(to: b, c, vb, vc) map(alloc: va) + +#pragma omp target parallel + for (i = 0; i < 8; i++) + { + /* { dg-error "cannot reference 'svint32_t' object types in 'target' region" "" { target *-*-* } .+1 } */ + svst1_s32 (svptrue_b32 (), b + i * 8, vb); + /* { dg-error "cannot reference 'svint32_t' object types in 'target' region" "" { target *-*-* } .+1 } */ + svst1_s32 (svptrue_b32 (), c + i * 8, vc); + if (i == 7) + /* { dg-error "cannot reference 'svint32_t' object types in 'target' region" "" { target *-*-* } .+1 } */ + va = svadd_s32_z (svptrue_b32 (), vb, vc); + } + +#pragma omp target update from(va) + +/* { dg-error "SVE type 'svint32_t' not allowed in 'map' clause" "" { target *-*-* } .+1 } */ +#pragma omp target parallel map(to: a) map(tofrom: va) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), a + i * 8, va); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), va, svindex_s32 (1, 1)); + } + return va; +} + +void +target_vls2 (v8si vb, v8si vc, int *a, int *b, int *c) +{ + int i; + +#pragma omp target parallel + for (i = 0; i < 8; i++) + { + v8si va; + svst1_s32 (svptrue_b32 (), b + i * 8, vb); + svst1_s32 (svptrue_b32 (), c + i * 8, vc); + va = svadd_s32_z (svptrue_b32 (), vb, vc); + svst1_s32 (svptrue_b32 (), a + i * 8, va); + } +} + +v8si +target_data_map_1_vls2 (v8si vb, v8si vc, int *b, int *c) +{ + v8si va; + int i; + +#pragma omp target parallel map(to: b, c, vb, vc) map(from: va) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), b + i * 8, vb); + svst1_s32 (svptrue_b32 (), c + i * 8, vc); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), vb, vc); + } + return va; +} + +v8si +target_data_map_2_vls2 (v8si vb, v8si vc, int *a, int *b, int *c) +{ + v8si va; + int i; + +#pragma omp target parallel map(to: b, c, vb, vc) map(from: va) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), b + i * 8, vb); + svst1_s32 (svptrue_b32 (), c + i * 8, vc); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), vb, vc); + } + +#pragma omp target parallel map(to: a) map(tofrom: va) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), a + i * 8, va); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), va, svindex_s32 (1, 1)); + } + return va; +} + +v8si +target_map_data_enter_exit_vls2 (v8si vb, v8si vc, int *a, int *b, int *c) +{ + v8si va; + int i; + +#pragma omp target enter data map(to: b, c, vb, vc) + +#pragma omp target parallel map(from: va) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), b + i * 8, vb); + svst1_s32 (svptrue_b32 (), c + i * 8, vc); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), vb, vc); + } + +#pragma omp target parallel map(to: va) map(to: a) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), a + i * 8, va); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), va, svindex_s32 (1, 1)); + } + +#pragma omp target exit data map(from: va) + + return va; +} + +v8si +target_map_data_alloc_update_vls2 (v8si vb, v8si vc, int *a, int *b, + int *c) +{ + v8si va; + int i; + +#pragma omp target data map(to: b, c, vb, vc) map(alloc: va) + +#pragma omp target parallel + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), b + i * 8, vb); + svst1_s32 (svptrue_b32 (), c + i * 8, vc); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), vb, vc); + } + +#pragma omp target update from(va) + +#pragma omp target parallel map(to: a) map(tofrom: va) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), a + i * 8, va); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), va, svindex_s32 (1, 1)); + } + return va; +} + +void +target_vla3 (svint32_t vb, svint32_t vc, int *a, int *b, int *c) +{ + int i; + +#pragma omp target parallel loop + for (i = 0; i < 8; i++) + { + svint32_t va; + + /* { dg-error "cannot reference 'svint32_t' object types in 'target' region" "" { target *-*-* } .+1 } */ + svst1_s32 (svptrue_b32 (), b + i * 8, vb); + /* { dg-error "cannot reference 'svint32_t' object types in 'target' region" "" { target *-*-* } .+1 } */ + svst1_s32 (svptrue_b32 (), c + i * 8, vc); + va = svadd_s32_z (svptrue_b32 (), vb, vc); + svst1_s32 (svptrue_b32 (), a + i * 8, va); + } +} + +svint32_t +target_data_map_1_vla3 (svint32_t vb, svint32_t vc, int *b, int *c) +{ + svint32_t va; + int i; + +/* { dg-error "SVE type 'svint32_t' not allowed in 'map' clause" "" { target *-*-* } .+1 } */ +#pragma omp target parallel loop map(to: b, c, vb, vc) map(from: va) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), b + i * 8, vb); + svst1_s32 (svptrue_b32 (), c + i * 8, vc); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), vb, vc); + } + return va; +} + +svint32_t +target_data_map_2_vla3 (svint32_t vb, svint32_t vc, int *a, int *b, + int *c) +{ + svint32_t va; + int i; + +/* { dg-error "SVE type 'svint32_t' not allowed in 'map' clause" "" { target *-*-* } .+1 } */ +#pragma omp target parallel loop map(to: b, c, vb, vc) map(from: va) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), b + i * 8, vb); + svst1_s32 (svptrue_b32 (), c + i * 8, vc); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), vb, vc); + } + +/* { dg-error "SVE type 'svint32_t' not allowed in 'map' clause" "" { target *-*-* } .+1 } */ +#pragma omp target parallel map(to: a) map(tofrom: va) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), a + i * 8, va); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), va, svindex_s32 (1, 1)); + } + return va; +} + +svint32_t +target_map_data_enter_exit_vla3 (svint32_t vb, svint32_t vc, int *a, + int *b, int *c) +{ + svint32_t va; + int i; + +/* { dg-error "SVE type 'svint32_t' not allowed in 'map' clause" "" { target *-*-* } .+1 } */ +#pragma omp target enter data map(to: b, c, vb, vc) + +/* { dg-error "SVE type 'svint32_t' not allowed in 'map' clause" "" { target *-*-* } .+1 } */ +#pragma omp target parallel loop map(from: va) + for (i = 0; i < 8; i++) + { + /* { dg-error "cannot reference 'svint32_t' object types in 'target' region" "" { target *-*-* } .+1 } */ + svst1_s32 (svptrue_b32 (), b + i * 8, vb); + /* { dg-error "cannot reference 'svint32_t' object types in 'target' region" "" { target *-*-* } .+1 } */ + svst1_s32 (svptrue_b32 (), c + i * 8, vc); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), vb, vc); + } + +/* { dg-error "SVE type 'svint32_t' not allowed in 'map' clause" "" { target *-*-* } .+1 } */ +#pragma omp target parallel loop map(to: va) map(to: a) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), a + i * 8, va); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), va, svindex_s32 (1, 1)); + } + +/* { dg-error "SVE type 'svint32_t' not allowed in 'map' clause" "" { target *-*-* } .+1 } */ +#pragma omp target exit data map(from: va) + + return va; +} + +svint32_t +target_map_data_alloc_update_vla3 (svint32_t vb, svint32_t vc, int *a, + int *b, int *c) +{ + svint32_t va; + int i; + +/* { dg-error "SVE type 'svint32_t' not allowed in 'map' clause" "" { target *-*-* } .+1 } */ +#pragma omp target data map(to: b, c, vb, vc) map(alloc: va) + +#pragma omp target parallel loop + for (i = 0; i < 8; i++) + { + /* { dg-error "cannot reference 'svint32_t' object types in 'target' region" "" { target *-*-* } .+1 } */ + svst1_s32 (svptrue_b32 (), b + i * 8, vb); + /* { dg-error "cannot reference 'svint32_t' object types in 'target' region" "" { target *-*-* } .+1 } */ + svst1_s32 (svptrue_b32 (), c + i * 8, vc); + if (i == 7) + /* { dg-error "cannot reference 'svint32_t' object types in 'target' region" "" { target *-*-* } .+1 } */ + va = svadd_s32_z (svptrue_b32 (), vb, vc); + } + +#pragma omp target update from(va) + +/* { dg-error "SVE type 'svint32_t' not allowed in 'map' clause" "" { target *-*-* } .+1 } */ +#pragma omp target parallel loop map(to: a) map(tofrom: va) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), a + i * 8, va); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), va, svindex_s32 (1, 1)); + } + return va; +} + +void +target_vls3 (v8si vb, v8si vc, int *a, int *b, int *c) +{ + int i; + +#pragma omp target parallel loop + for (i = 0; i < 8; i++) + { + v8si va; + svst1_s32 (svptrue_b32 (), b + i * 8, vb); + svst1_s32 (svptrue_b32 (), c + i * 8, vc); + va = svadd_s32_z (svptrue_b32 (), vb, vc); + svst1_s32 (svptrue_b32 (), a + i * 8, va); + } +} + +v8si +target_data_map_1_vls3 (v8si vb, v8si vc, int *b, int *c) +{ + v8si va; + int i; + +#pragma omp target parallel loop map(to: b, c, vb, vc) map(from: va) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), b + i * 8, vb); + svst1_s32 (svptrue_b32 (), c + i * 8, vc); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), vb, vc); + } + return va; +} + +v8si +target_data_map_2_vls3 (v8si vb, v8si vc, int *a, int *b, int *c) +{ + v8si va; + int i; + +#pragma omp target parallel loop map(to: b, c, vb, vc) map(from: va) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), b + i * 8, vb); + svst1_s32 (svptrue_b32 (), c + i * 8, vc); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), vb, vc); + } + +#pragma omp target parallel map(to: a) map(tofrom: va) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), a + i * 8, va); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), va, svindex_s32 (1, 1)); + } + return va; +} + +v8si +target_map_data_enter_exit_vls3 (v8si vb, v8si vc, int *a, int *b, int *c) +{ + v8si va; + int i; + +#pragma omp target enter data map(to: b, c, vb, vc) + +#pragma omp target parallel loop map(from: va) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), b + i * 8, vb); + svst1_s32 (svptrue_b32 (), c + i * 8, vc); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), vb, vc); + } + +#pragma omp target parallel loop map(to: va) map(to: a) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), a + i * 8, va); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), va, svindex_s32 (1, 1)); + } + +#pragma omp target exit data map(from: va) + + return va; +} + +v8si +target_map_data_alloc_update_vls3 (v8si vb, v8si vc, int *a, int *b, + int *c) +{ + v8si va; + int i; + +#pragma omp target data map(to: b, c, vb, vc) map(alloc: va) + +#pragma omp target parallel loop + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), b + i * 8, vb); + svst1_s32 (svptrue_b32 (), c + i * 8, vc); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), vb, vc); + } + +#pragma omp target update from(va) + +#pragma omp target parallel loop map(to: a) map(tofrom: va) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), a + i * 8, va); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), va, svindex_s32 (1, 1)); + } + return va; +} + +void +target_vla4 (svint32_t vb, svint32_t vc, int *a, int *b, int *c) +{ + int i; + +#pragma omp target simd + for (i = 0; i < 8; i++) + { + svint32_t va; + + /* { dg-error "cannot reference 'svint32_t' object types in 'target' region" "" { target *-*-* } .+1 } */ + svst1_s32 (svptrue_b32 (), b + i * 8, vb); + /* { dg-error "cannot reference 'svint32_t' object types in 'target' region" "" { target *-*-* } .+1 } */ + svst1_s32 (svptrue_b32 (), c + i * 8, vc); + va = svadd_s32_z (svptrue_b32 (), vb, vc); + svst1_s32 (svptrue_b32 (), a + i * 8, va); + } +} + +svint32_t +target_data_map_1_vla4 (svint32_t vb, svint32_t vc, int *b, int *c) +{ + svint32_t va; + int i; + +/* { dg-error "SVE type 'svint32_t' not allowed in 'map' clause" "" { target *-*-* } .+1 } */ +#pragma omp target simd map(to: b, c, vb, vc) map(from: va) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), b + i * 8, vb); + svst1_s32 (svptrue_b32 (), c + i * 8, vc); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), vb, vc); + } + return va; +} + +svint32_t +target_data_map_2_vla4 (svint32_t vb, svint32_t vc, int *a, int *b, + int *c) +{ + svint32_t va; + int i; + +/* { dg-error "SVE type 'svint32_t' not allowed in 'map' clause" "" { target *-*-* } .+1 } */ +#pragma omp target simd map(to: b, c, vb, vc) map(from: va) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), b + i * 8, vb); + svst1_s32 (svptrue_b32 (), c + i * 8, vc); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), vb, vc); + } + +/* { dg-error "SVE type 'svint32_t' not allowed in 'map' clause" "" { target *-*-* } .+1 } */ +#pragma omp target simd map(to: a) map(tofrom: va) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), a + i * 8, va); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), va, svindex_s32 (1, 1)); + } + return va; +} + +svint32_t +target_map_data_enter_exit_vla4 (svint32_t vb, svint32_t vc, int *a, + int *b, int *c) +{ + svint32_t va; + int i; + +/* { dg-error "SVE type 'svint32_t' not allowed in 'map' clause" "" { target *-*-* } .+1 } */ +#pragma omp target enter data map(to: b, c, vb, vc) + +/* { dg-error "SVE type 'svint32_t' not allowed in 'map' clause" "" { target *-*-* } .+1 } */ +#pragma omp target simd map(from: va) + for (i = 0; i < 8; i++) + { + /* { dg-error "cannot reference 'svint32_t' object types in 'target' region" "" { target *-*-* } .+1 } */ + svst1_s32 (svptrue_b32 (), b + i * 8, vb); + /* { dg-error "cannot reference 'svint32_t' object types in 'target' region" "" { target *-*-* } .+1 } */ + svst1_s32 (svptrue_b32 (), c + i * 8, vc); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), vb, vc); + } + +/* { dg-error "SVE type 'svint32_t' not allowed in 'map' clause" "" { target *-*-* } .+1 } */ +#pragma omp target simd map(to: va) map(to: a) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), a + i * 8, va); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), va, svindex_s32 (1, 1)); + } + +/* { dg-error "SVE type 'svint32_t' not allowed in 'map' clause" "" { target *-*-* } .+1 } */ +#pragma omp target exit data map(from: va) + + return va; +} + +svint32_t +target_map_data_alloc_update_vla4 (svint32_t vb, svint32_t vc, int *a, + int *b, int *c) +{ + svint32_t va; + int i; + +/* { dg-error "SVE type 'svint32_t' not allowed in 'map' clause" "" { target *-*-* } .+1 } */ +#pragma omp target data map(to: b, c, vb, vc) map(alloc: va) + +#pragma omp target simd + for (i = 0; i < 8; i++) + { + /* { dg-error "cannot reference 'svint32_t' object types in 'target' region" "" { target *-*-* } .+1 } */ + svst1_s32 (svptrue_b32 (), b + i * 8, vb); + /* { dg-error "cannot reference 'svint32_t' object types in 'target' region" "" { target *-*-* } .+1 } */ + svst1_s32 (svptrue_b32 (), c + i * 8, vc); + if (i == 7) + /* { dg-error "cannot reference 'svint32_t' object types in 'target' region" "" { target *-*-* } .+1 } */ + va = svadd_s32_z (svptrue_b32 (), vb, vc); + } + +#pragma omp target update from(va) + +/* { dg-error "SVE type 'svint32_t' not allowed in 'map' clause" "" { target *-*-* } .+1 } */ +#pragma omp target simd map(to: a) map(tofrom: va) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), a + i * 8, va); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), va, svindex_s32 (1, 1)); + } + return va; +} + +void +target_vls4 (v8si vb, v8si vc, int *a, int *b, int *c) +{ + int i; + +#pragma omp target simd + for (i = 0; i < 8; i++) + { + v8si va; + svst1_s32 (svptrue_b32 (), b + i * 8, vb); + svst1_s32 (svptrue_b32 (), c + i * 8, vc); + va = svadd_s32_z (svptrue_b32 (), vb, vc); + svst1_s32 (svptrue_b32 (), a + i * 8, va); + } +} + +v8si +target_data_map_1_vls4 (v8si vb, v8si vc, int *b, int *c) +{ + v8si va; + int i; + +#pragma omp target simd map(to: b, c, vb, vc) map(from: va) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), b + i * 8, vb); + svst1_s32 (svptrue_b32 (), c + i * 8, vc); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), vb, vc); + } + return va; +} + +v8si +target_data_map_2_vls4 (v8si vb, v8si vc, int *a, int *b, int *c) +{ + v8si va; + int i; + +#pragma omp target simd map(to: b, c, vb, vc) map(from: va) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), b + i * 8, vb); + svst1_s32 (svptrue_b32 (), c + i * 8, vc); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), vb, vc); + } + +#pragma omp target simd map(to: a) map(tofrom: va) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), a + i * 8, va); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), va, svindex_s32 (1, 1)); + } + return va; +} + +v8si +target_map_data_enter_exit_vls4 (v8si vb, v8si vc, int *a, int *b, int *c) +{ + v8si va; + int i; + +#pragma omp target enter data map(to: b, c, vb, vc) + +#pragma omp target simd map(from: va) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), b + i * 8, vb); + svst1_s32 (svptrue_b32 (), c + i * 8, vc); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), vb, vc); + } + +#pragma omp target simd map(to: va) map(to: a) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), a + i * 8, va); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), va, svindex_s32 (1, 1)); + } + +#pragma omp target exit data map(from: va) + + return va; +} + +v8si +target_map_data_alloc_update_vls4 (v8si vb, v8si vc, int *a, int *b, + int *c) +{ + v8si va; + int i; + +#pragma omp target data map(to: b, c, vb, vc) map(alloc: va) + +#pragma omp target simd + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), b + i * 8, vb); + svst1_s32 (svptrue_b32 (), c + i * 8, vc); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), vb, vc); + } + +#pragma omp target update from(va) + +#pragma omp target simd map(to: a) map(tofrom: va) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), a + i * 8, va); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), va, svindex_s32 (1, 1)); + } + return va; +} + +void +target_vla5 (svint32_t vb, svint32_t vc, int *a, int *b, int *c) +{ + int i; + +#pragma omp target teams + for (i = 0; i < 8; i++) + { + svint32_t va; + + /* { dg-error "cannot reference 'svint32_t' object types in 'target' region" "" { target *-*-* } .+1 } */ + svst1_s32 (svptrue_b32 (), b + i * 8, vb); + /* { dg-error "cannot reference 'svint32_t' object types in 'target' region" "" { target *-*-* } .+1 } */ + svst1_s32 (svptrue_b32 (), c + i * 8, vc); + va = svadd_s32_z (svptrue_b32 (), vb, vc); + svst1_s32 (svptrue_b32 (), a + i * 8, va); + } +} + +svint32_t +target_data_map_1_vla5 (svint32_t vb, svint32_t vc, int *b, int *c) +{ + svint32_t va; + int i; + +/* { dg-error "SVE type 'svint32_t' not allowed in 'map' clause" "" { target *-*-* } .+1 } */ +#pragma omp target teams map(to: b, c, vb, vc) map(from: va) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), b + i * 8, vb); + svst1_s32 (svptrue_b32 (), c + i * 8, vc); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), vb, vc); + } + return va; +} + +svint32_t +target_data_map_2_vla5 (svint32_t vb, svint32_t vc, int *a, int *b, + int *c) +{ + svint32_t va; + int i; + +/* { dg-error "SVE type 'svint32_t' not allowed in 'map' clause" "" { target *-*-* } .+1 } */ +#pragma omp target teams map(to: b, c, vb, vc) map(from: va) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), b + i * 8, vb); + svst1_s32 (svptrue_b32 (), c + i * 8, vc); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), vb, vc); + } + +/* { dg-error "SVE type 'svint32_t' not allowed in 'map' clause" "" { target *-*-* } .+1 } */ +#pragma omp target teams map(to: a) map(tofrom: va) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), a + i * 8, va); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), va, svindex_s32 (1, 1)); + } + return va; +} + +svint32_t +target_map_data_enter_exit_vla5 (svint32_t vb, svint32_t vc, int *a, + int *b, int *c) +{ + svint32_t va; + int i; + +/* { dg-error "SVE type 'svint32_t' not allowed in 'map' clause" "" { target *-*-* } .+1 } */ +#pragma omp target enter data map(to: b, c, vb, vc) + +/* { dg-error "SVE type 'svint32_t' not allowed in 'map' clause" "" { target *-*-* } .+1 } */ +#pragma omp target teams map(from: va) + for (i = 0; i < 8; i++) + { + /* { dg-error "cannot reference 'svint32_t' object types in 'target' region" "" { target *-*-* } .+1 } */ + svst1_s32 (svptrue_b32 (), b + i * 8, vb); + /* { dg-error "cannot reference 'svint32_t' object types in 'target' region" "" { target *-*-* } .+1 } */ + svst1_s32 (svptrue_b32 (), c + i * 8, vc); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), vb, vc); + } + +/* { dg-error "SVE type 'svint32_t' not allowed in 'map' clause" "" { target *-*-* } .+1 } */ +#pragma omp target teams map(to: va) map(to: a) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), a + i * 8, va); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), va, svindex_s32 (1, 1)); + } + +/* { dg-error "SVE type 'svint32_t' not allowed in 'map' clause" "" { target *-*-* } .+1 } */ +#pragma omp target exit data map(from: va) + + return va; +} + +svint32_t +target_map_data_alloc_update_vla5 (svint32_t vb, svint32_t vc, int *a, + int *b, int *c) +{ + svint32_t va; + int i; + +/* { dg-error "SVE type 'svint32_t' not allowed in 'map' clause" "" { target *-*-* } .+1 } */ +#pragma omp target data map(to: b, c, vb, vc) map(alloc: va) + +#pragma omp target teams + for (i = 0; i < 8; i++) + { + /* { dg-error "cannot reference 'svint32_t' object types in 'target' region" "" { target *-*-* } .+1 } */ + svst1_s32 (svptrue_b32 (), b + i * 8, vb); + /* { dg-error "cannot reference 'svint32_t' object types in 'target' region" "" { target *-*-* } .+1 } */ + svst1_s32 (svptrue_b32 (), c + i * 8, vc); + if (i == 7) + /* { dg-error "cannot reference 'svint32_t' object types in 'target' region" "" { target *-*-* } .+1 } */ + va = svadd_s32_z (svptrue_b32 (), vb, vc); + } + +#pragma omp target update from(va) + +/* { dg-error "SVE type 'svint32_t' not allowed in 'map' clause" "" { target *-*-* } .+1 } */ +#pragma omp target teams map(to: a) map(tofrom: va) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), a + i * 8, va); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), va, svindex_s32 (1, 1)); + } + return va; +} + +void +target_vls5 (v8si vb, v8si vc, int *a, int *b, int *c) +{ + int i; + +#pragma omp target teams + for (i = 0; i < 8; i++) + { + v8si va; + svst1_s32 (svptrue_b32 (), b + i * 8, vb); + svst1_s32 (svptrue_b32 (), c + i * 8, vc); + va = svadd_s32_z (svptrue_b32 (), vb, vc); + svst1_s32 (svptrue_b32 (), a + i * 8, va); + } +} + +v8si +target_data_map_1_vls5 (v8si vb, v8si vc, int *b, int *c) +{ + v8si va; + int i; + +#pragma omp target teams map(to: b, c, vb, vc) map(from: va) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), b + i * 8, vb); + svst1_s32 (svptrue_b32 (), c + i * 8, vc); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), vb, vc); + } + return va; +} + +v8si +target_data_map_2_vls5 (v8si vb, v8si vc, int *a, int *b, int *c) +{ + v8si va; + int i; + +#pragma omp target teams map(to: b, c, vb, vc) map(from: va) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), b + i * 8, vb); + svst1_s32 (svptrue_b32 (), c + i * 8, vc); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), vb, vc); + } + +#pragma omp target teams map(to: a) map(tofrom: va) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), a + i * 8, va); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), va, svindex_s32 (1, 1)); + } + return va; +} + +v8si +target_map_data_enter_exit_vls5 (v8si vb, v8si vc, int *a, int *b, int *c) +{ + v8si va; + int i; + +#pragma omp target enter data map(to: b, c, vb, vc) + +#pragma omp target teams map(from: va) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), b + i * 8, vb); + svst1_s32 (svptrue_b32 (), c + i * 8, vc); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), vb, vc); + } + +#pragma omp target teams map(to: va) map(to: a) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), a + i * 8, va); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), va, svindex_s32 (1, 1)); + } + +#pragma omp target exit data map(from: va) + + return va; +} + +v8si +target_map_data_alloc_update_vls5 (v8si vb, v8si vc, int *a, int *b, + int *c) +{ + v8si va; + int i; + +#pragma omp target data map(to: b, c, vb, vc) map(alloc: va) + +#pragma omp target teams + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), b + i * 8, vb); + svst1_s32 (svptrue_b32 (), c + i * 8, vc); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), vb, vc); + } + +#pragma omp target update from(va) + +#pragma omp target teams map(to: a) map(tofrom: va) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), a + i * 8, va); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), va, svindex_s32 (1, 1)); + } + return va; +} + +void +target_vla6 (svint32_t vb, svint32_t vc, int *a, int *b, int *c) +{ + int i; + +#pragma omp target teams loop + for (i = 0; i < 8; i++) + { + svint32_t va; + + /* { dg-error "cannot reference 'svint32_t' object types in 'target' region" "" { target *-*-* } .+1 } */ + svst1_s32 (svptrue_b32 (), b + i * 8, vb); + /* { dg-error "cannot reference 'svint32_t' object types in 'target' region" "" { target *-*-* } .+1 } */ + svst1_s32 (svptrue_b32 (), c + i * 8, vc); + va = svadd_s32_z (svptrue_b32 (), vb, vc); + svst1_s32 (svptrue_b32 (), a + i * 8, va); + } +} + +svint32_t +target_data_map_1_vla6 (svint32_t vb, svint32_t vc, int *b, int *c) +{ + svint32_t va; + int i; + +/* { dg-error "SVE type 'svint32_t' not allowed in 'map' clause" "" { target *-*-* } .+1 } */ +#pragma omp target teams loop map(to: b, c, vb, vc) map(from: va) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), b + i * 8, vb); + svst1_s32 (svptrue_b32 (), c + i * 8, vc); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), vb, vc); + } + return va; +} + +svint32_t +target_data_map_2_vla6 (svint32_t vb, svint32_t vc, int *a, int *b, + int *c) +{ + svint32_t va; + int i; + +/* { dg-error "SVE type 'svint32_t' not allowed in 'map' clause" "" { target *-*-* } .+1 } */ +#pragma omp target teams loop map(to: b, c, vb, vc) map(from: va) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), b + i * 8, vb); + svst1_s32 (svptrue_b32 (), c + i * 8, vc); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), vb, vc); + } + +/* { dg-error "SVE type 'svint32_t' not allowed in 'map' clause" "" { target *-*-* } .+1 } */ +#pragma omp target teams map(to: a) map(tofrom: va) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), a + i * 8, va); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), va, svindex_s32 (1, 1)); + } + return va; +} + +svint32_t +target_map_data_enter_exit_vla6 (svint32_t vb, svint32_t vc, int *a, + int *b, int *c) +{ + svint32_t va; + int i; + +/* { dg-error "SVE type 'svint32_t' not allowed in 'map' clause" "" { target *-*-* } .+1 } */ +#pragma omp target enter data map(to: b, c, vb, vc) + +/* { dg-error "SVE type 'svint32_t' not allowed in 'map' clause" "" { target *-*-* } .+1 } */ +#pragma omp target teams loop map(from: va) + for (i = 0; i < 8; i++) + { + /* { dg-error "cannot reference 'svint32_t' object types in 'target' region" "" { target *-*-* } .+1 } */ + svst1_s32 (svptrue_b32 (), b + i * 8, vb); + /* { dg-error "cannot reference 'svint32_t' object types in 'target' region" "" { target *-*-* } .+1 } */ + svst1_s32 (svptrue_b32 (), c + i * 8, vc); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), vb, vc); + } + +/* { dg-error "SVE type 'svint32_t' not allowed in 'map' clause" "" { target *-*-* } .+1 } */ +#pragma omp target teams loop map(to: va) map(to: a) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), a + i * 8, va); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), va, svindex_s32 (1, 1)); + } + +/* { dg-error "SVE type 'svint32_t' not allowed in 'map' clause" "" { target *-*-* } .+1 } */ +#pragma omp target exit data map(from: va) + + return va; +} + +svint32_t +target_map_data_alloc_update_vla6 (svint32_t vb, svint32_t vc, int *a, + int *b, int *c) +{ + svint32_t va; + int i; + +/* { dg-error "SVE type 'svint32_t' not allowed in 'map' clause" "" { target *-*-* } .+1 } */ +#pragma omp target data map(to: b, c, vb, vc) map(alloc: va) + +#pragma omp target teams loop + for (i = 0; i < 8; i++) + { + /* { dg-error "cannot reference 'svint32_t' object types in 'target' region" "" { target *-*-* } .+1 } */ + svst1_s32 (svptrue_b32 (), b + i * 8, vb); + /* { dg-error "cannot reference 'svint32_t' object types in 'target' region" "" { target *-*-* } .+1 } */ + svst1_s32 (svptrue_b32 (), c + i * 8, vc); + if (i == 7) + /* { dg-error "cannot reference 'svint32_t' object types in 'target' region" "" { target *-*-* } .+1 } */ + va = svadd_s32_z (svptrue_b32 (), vb, vc); + } + +#pragma omp target update from(va) + +/* { dg-error "SVE type 'svint32_t' not allowed in 'map' clause" "" { target *-*-* } .+1 } */ +#pragma omp target teams loop map(to: a) map(tofrom: va) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), a + i * 8, va); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), va, svindex_s32 (1, 1)); + } + return va; +} + +void +target_vls6 (v8si vb, v8si vc, int *a, int *b, int *c) +{ + int i; + +#pragma omp target teams loop + for (i = 0; i < 8; i++) + { + v8si va; + svst1_s32 (svptrue_b32 (), b + i * 8, vb); + svst1_s32 (svptrue_b32 (), c + i * 8, vc); + va = svadd_s32_z (svptrue_b32 (), vb, vc); + svst1_s32 (svptrue_b32 (), a + i * 8, va); + } +} + +v8si +target_data_map_1_vls6 (v8si vb, v8si vc, int *b, int *c) +{ + v8si va; + int i; + +#pragma omp target teams loop map(to: b, c, vb, vc) map(from: va) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), b + i * 8, vb); + svst1_s32 (svptrue_b32 (), c + i * 8, vc); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), vb, vc); + } + return va; +} + +v8si +target_data_map_2_vls6 (v8si vb, v8si vc, int *a, int *b, int *c) +{ + v8si va; + int i; + +#pragma omp target teams loop map(to: b, c, vb, vc) map(from: va) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), b + i * 8, vb); + svst1_s32 (svptrue_b32 (), c + i * 8, vc); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), vb, vc); + } + +#pragma omp target teams map(to: a) map(tofrom: va) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), a + i * 8, va); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), va, svindex_s32 (1, 1)); + } + return va; +} + +v8si +target_map_data_enter_exit_vls6 (v8si vb, v8si vc, int *a, int *b, int *c) +{ + v8si va; + int i; + +#pragma omp target enter data map(to: b, c, vb, vc) + +#pragma omp target teams loop map(from: va) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), b + i * 8, vb); + svst1_s32 (svptrue_b32 (), c + i * 8, vc); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), vb, vc); + } + +#pragma omp target teams loop map(to: va) map(to: a) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), a + i * 8, va); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), va, svindex_s32 (1, 1)); + } + +#pragma omp target exit data map(from: va) + + return va; +} + +v8si +target_map_data_alloc_update_vls6 (v8si vb, v8si vc, int *a, int *b, + int *c) +{ + v8si va; + int i; + +#pragma omp target data map(to: b, c, vb, vc) map(alloc: va) + +#pragma omp target teams loop + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), b + i * 8, vb); + svst1_s32 (svptrue_b32 (), c + i * 8, vc); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), vb, vc); + } + +#pragma omp target update from(va) + +#pragma omp target teams loop map(to: a) map(tofrom: va) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), a + i * 8, va); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), va, svindex_s32 (1, 1)); + } + return va; +} + +void +target_vla7 (svint32_t vb, svint32_t vc, int *a, int *b, int *c) +{ + int i; + +#pragma omp target teams distribute + for (i = 0; i < 8; i++) + { + svint32_t va; + + /* { dg-error "cannot reference 'svint32_t' object types in 'target' region" "" { target *-*-* } .+1 } */ + svst1_s32 (svptrue_b32 (), b + i * 8, vb); + /* { dg-error "cannot reference 'svint32_t' object types in 'target' region" "" { target *-*-* } .+1 } */ + svst1_s32 (svptrue_b32 (), c + i * 8, vc); + va = svadd_s32_z (svptrue_b32 (), vb, vc); + svst1_s32 (svptrue_b32 (), a + i * 8, va); + } +} + +svint32_t +target_data_map_1_vla7 (svint32_t vb, svint32_t vc, int *b, int *c) +{ + svint32_t va; + int i; + +/* { dg-error "SVE type 'svint32_t' not allowed in 'map' clause" "" { target *-*-* } .+1 } */ +#pragma omp target teams distribute map(to: b, c, vb, vc) map(from: va) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), b + i * 8, vb); + svst1_s32 (svptrue_b32 (), c + i * 8, vc); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), vb, vc); + } + return va; +} + +svint32_t +target_data_map_2_vla7 (svint32_t vb, svint32_t vc, int *a, int *b, + int *c) +{ + svint32_t va; + int i; + +/* { dg-error "SVE type 'svint32_t' not allowed in 'map' clause" "" { target *-*-* } .+1 } */ +#pragma omp target teams distribute map(to: b, c, vb, vc) map(from: va) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), b + i * 8, vb); + svst1_s32 (svptrue_b32 (), c + i * 8, vc); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), vb, vc); + } + +/* { dg-error "SVE type 'svint32_t' not allowed in 'map' clause" "" { target *-*-* } .+1 } */ +#pragma omp target teams map(to: a) map(tofrom: va) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), a + i * 8, va); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), va, svindex_s32 (1, 1)); + } + return va; +} + +svint32_t +target_map_data_enter_exit_vla7 (svint32_t vb, svint32_t vc, int *a, + int *b, int *c) +{ + svint32_t va; + int i; + +/* { dg-error "SVE type 'svint32_t' not allowed in 'map' clause" "" { target *-*-* } .+1 } */ +#pragma omp target enter data map(to: b, c, vb, vc) + +/* { dg-error "SVE type 'svint32_t' not allowed in 'map' clause" "" { target *-*-* } .+1 } */ +#pragma omp target teams distribute map(from: va) + for (i = 0; i < 8; i++) + { + /* { dg-error "cannot reference 'svint32_t' object types in 'target' region" "" { target *-*-* } .+1 } */ + svst1_s32 (svptrue_b32 (), b + i * 8, vb); + /* { dg-error "cannot reference 'svint32_t' object types in 'target' region" "" { target *-*-* } .+1 } */ + svst1_s32 (svptrue_b32 (), c + i * 8, vc); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), vb, vc); + } + +/* { dg-error "SVE type 'svint32_t' not allowed in 'map' clause" "" { target *-*-* } .+1 } */ +#pragma omp target teams distribute map(to: va) map(to: a) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), a + i * 8, va); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), va, svindex_s32 (1, 1)); + } + +/* { dg-error "SVE type 'svint32_t' not allowed in 'map' clause" "" { target *-*-* } .+1 } */ +#pragma omp target exit data map(from: va) + + return va; +} + +svint32_t +target_map_data_alloc_update_vla7 (svint32_t vb, svint32_t vc, int *a, + int *b, int *c) +{ + svint32_t va; + int i; + +/* { dg-error "SVE type 'svint32_t' not allowed in 'map' clause" "" { target *-*-* } .+1 } */ +#pragma omp target data map(to: b, c, vb, vc) map(alloc: va) + +#pragma omp target teams distribute + for (i = 0; i < 8; i++) + { + /* { dg-error "cannot reference 'svint32_t' object types in 'target' region" "" { target *-*-* } .+1 } */ + svst1_s32 (svptrue_b32 (), b + i * 8, vb); + /* { dg-error "cannot reference 'svint32_t' object types in 'target' region" "" { target *-*-* } .+1 } */ + svst1_s32 (svptrue_b32 (), c + i * 8, vc); + if (i == 7) + /* { dg-error "cannot reference 'svint32_t' object types in 'target' region" "" { target *-*-* } .+1 } */ + va = svadd_s32_z (svptrue_b32 (), vb, vc); + } + +#pragma omp target update from(va) + +/* { dg-error "SVE type 'svint32_t' not allowed in 'map' clause" "" { target *-*-* } .+1 } */ +#pragma omp target teams distribute map(to: a) map(tofrom: va) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), a + i * 8, va); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), va, svindex_s32 (1, 1)); + } + return va; +} + +void +target_vls7 (v8si vb, v8si vc, int *a, int *b, int *c) +{ + int i; + +#pragma omp target teams distribute + for (i = 0; i < 8; i++) + { + v8si va; + svst1_s32 (svptrue_b32 (), b + i * 8, vb); + svst1_s32 (svptrue_b32 (), c + i * 8, vc); + va = svadd_s32_z (svptrue_b32 (), vb, vc); + svst1_s32 (svptrue_b32 (), a + i * 8, va); + } +} + +v8si +target_data_map_1_vls7 (v8si vb, v8si vc, int *b, int *c) +{ + v8si va; + int i; + +#pragma omp target teams distribute map(to: b, c, vb, vc) map(from: va) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), b + i * 8, vb); + svst1_s32 (svptrue_b32 (), c + i * 8, vc); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), vb, vc); + } + return va; +} + +v8si +target_data_map_2_vls7 (v8si vb, v8si vc, int *a, int *b, int *c) +{ + v8si va; + int i; + +#pragma omp target teams distribute map(to: b, c, vb, vc) map(from: va) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), b + i * 8, vb); + svst1_s32 (svptrue_b32 (), c + i * 8, vc); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), vb, vc); + } + +#pragma omp target teams map(to: a) map(tofrom: va) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), a + i * 8, va); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), va, svindex_s32 (1, 1)); + } + return va; +} + +v8si +target_map_data_enter_exit_vls7 (v8si vb, v8si vc, int *a, int *b, int *c) +{ + v8si va; + int i; + +#pragma omp target enter data map(to: b, c, vb, vc) + +#pragma omp target teams distribute map(from: va) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), b + i * 8, vb); + svst1_s32 (svptrue_b32 (), c + i * 8, vc); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), vb, vc); + } + +#pragma omp target teams distribute map(to: va) map(to: a) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), a + i * 8, va); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), va, svindex_s32 (1, 1)); + } + +#pragma omp target exit data map(from: va) + + return va; +} + +v8si +target_map_data_alloc_update_vls7 (v8si vb, v8si vc, int *a, int *b, + int *c) +{ + v8si va; + int i; + +#pragma omp target data map(to: b, c, vb, vc) map(alloc: va) + +#pragma omp target teams distribute + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), b + i * 8, vb); + svst1_s32 (svptrue_b32 (), c + i * 8, vc); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), vb, vc); + } + +#pragma omp target update from(va) + +#pragma omp target teams distribute map(to: a) map(tofrom: va) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), a + i * 8, va); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), va, svindex_s32 (1, 1)); + } + return va; +} + +void +target_vla8 (svint32_t vb, svint32_t vc, int *a, int *b, int *c) +{ + int i; + +#pragma omp target teams distribute simd + for (i = 0; i < 8; i++) + { + svint32_t va; + /* { dg-error "cannot reference 'svint32_t' object types in 'target' region" "" { target *-*-* } .+1 } */ + svst1_s32 (svptrue_b32 (), b + i * 8, vb); + /* { dg-error "cannot reference 'svint32_t' object types in 'target' region" "" { target *-*-* } .+1 } */ + svst1_s32 (svptrue_b32 (), c + i * 8, vc); + va = svadd_s32_z (svptrue_b32 (), vb, vc); + svst1_s32 (svptrue_b32 (), a + i * 8, va); + } +} + +svint32_t +target_data_map_1_vla8 (svint32_t vb, svint32_t vc, int *b, int *c) +{ + svint32_t va; + int i; + +/* { dg-error "SVE type 'svint32_t' not allowed in 'map' clause" "" { target *-*-* } .+1 } */ +#pragma omp target teams distribute simd map(to: b, c, vb, vc) map(from: va) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), b + i * 8, vb); + svst1_s32 (svptrue_b32 (), c + i * 8, vc); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), vb, vc); + } + return va; +} + +svint32_t +target_data_map_2_vla8 (svint32_t vb, svint32_t vc, int *a, int *b, + int *c) +{ + svint32_t va; + int i; + +/* { dg-error "SVE type 'svint32_t' not allowed in 'map' clause" "" { target *-*-* } .+1 } */ +#pragma omp target teams distribute simd map(to: b, c, vb, vc) map(from: va) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), b + i * 8, vb); + svst1_s32 (svptrue_b32 (), c + i * 8, vc); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), vb, vc); + } + +/* { dg-error "SVE type 'svint32_t' not allowed in 'map' clause" "" { target *-*-* } .+1 } */ +#pragma omp target teams map(to: a) map(tofrom: va) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), a + i * 8, va); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), va, svindex_s32 (1, 1)); + } + return va; +} + +svint32_t +target_map_data_enter_exit_vla8 (svint32_t vb, svint32_t vc, int *a, + int *b, int *c) +{ + svint32_t va; + int i; + +/* { dg-error "SVE type 'svint32_t' not allowed in 'map' clause" "" { target *-*-* } .+1 } */ +#pragma omp target enter data map(to: b, c, vb, vc) + +/* { dg-error "SVE type 'svint32_t' not allowed in 'map' clause" "" { target *-*-* } .+1 } */ +#pragma omp target teams distribute simd map(from: va) + for (i = 0; i < 8; i++) + { + /* { dg-error "cannot reference 'svint32_t' object types in 'target' region" "" { target *-*-* } .+1 } */ + svst1_s32 (svptrue_b32 (), b + i * 8, vb); + /* { dg-error "cannot reference 'svint32_t' object types in 'target' region" "" { target *-*-* } .+1 } */ + svst1_s32 (svptrue_b32 (), c + i * 8, vc); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), vb, vc); + } + +/* { dg-error "SVE type 'svint32_t' not allowed in 'map' clause" "" { target *-*-* } .+1 } */ +#pragma omp target teams distribute simd map(to: va) map(to: a) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), a + i * 8, va); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), va, svindex_s32 (1, 1)); + } + +/* { dg-error "SVE type 'svint32_t' not allowed in 'map' clause" "" { target *-*-* } .+1 } */ +#pragma omp target exit data map(from: va) + + return va; +} + +svint32_t +target_map_data_alloc_update_vla8 (svint32_t vb, svint32_t vc, int *a, + int *b, int *c) +{ + svint32_t va; + int i; + +/* { dg-error "SVE type 'svint32_t' not allowed in 'map' clause" "" { target *-*-* } .+1 } */ +#pragma omp target data map(to: b, c, vb, vc) map(alloc: va) + +#pragma omp target teams distribute simd + for (i = 0; i < 8; i++) + { + /* { dg-error "cannot reference 'svint32_t' object types in 'target' region" "" { target *-*-* } .+1 } */ + svst1_s32 (svptrue_b32 (), b + i * 8, vb); + /* { dg-error "cannot reference 'svint32_t' object types in 'target' region" "" { target *-*-* } .+1 } */ + svst1_s32 (svptrue_b32 (), c + i * 8, vc); + if (i == 7) + /* { dg-error "cannot reference 'svint32_t' object types in 'target' region" "" { target *-*-* } .+1 } */ + va = svadd_s32_z (svptrue_b32 (), vb, vc); + } + +#pragma omp target update from(va) + +/* { dg-error "SVE type 'svint32_t' not allowed in 'map' clause" "" { target *-*-* } .+1 } */ +#pragma omp target teams distribute simd map(to: a) map(tofrom: va) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), a + i * 8, va); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), va, svindex_s32 (1, 1)); + } + return va; +} + +void +target_vls8 (v8si vb, v8si vc, int *a, int *b, int *c) +{ + int i; + +#pragma omp target teams distribute simd + for (i = 0; i < 8; i++) + { + v8si va; + svst1_s32 (svptrue_b32 (), b + i * 8, vb); + svst1_s32 (svptrue_b32 (), c + i * 8, vc); + va = svadd_s32_z (svptrue_b32 (), vb, vc); + svst1_s32 (svptrue_b32 (), a + i * 8, va); + } +} + +v8si +target_data_map_1_vls8 (v8si vb, v8si vc, int *b, int *c) +{ + v8si va; + int i; + +#pragma omp target teams distribute simd map(to: b, c, vb, vc) map(from: va) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), b + i * 8, vb); + svst1_s32 (svptrue_b32 (), c + i * 8, vc); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), vb, vc); + } + return va; +} + +v8si +target_data_map_2_vls8 (v8si vb, v8si vc, int *a, int *b, int *c) +{ + v8si va; + int i; + +#pragma omp target teams distribute simd map(to: b, c, vb, vc) map(from: va) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), b + i * 8, vb); + svst1_s32 (svptrue_b32 (), c + i * 8, vc); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), vb, vc); + } + +#pragma omp target teams map(to: a) map(tofrom: va) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), a + i * 8, va); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), va, svindex_s32 (1, 1)); + } + return va; +} + +v8si +target_map_data_enter_exit_vls8 (v8si vb, v8si vc, int *a, int *b, int *c) +{ + v8si va; + int i; + +#pragma omp target enter data map(to: b, c, vb, vc) + +#pragma omp target teams distribute simd map(from: va) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), b + i * 8, vb); + svst1_s32 (svptrue_b32 (), c + i * 8, vc); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), vb, vc); + } + +#pragma omp target teams distribute simd map(to: va) map(to: a) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), a + i * 8, va); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), va, svindex_s32 (1, 1)); + } + +#pragma omp target exit data map(from: va) + + return va; +} + +v8si +target_map_data_alloc_update_vls8 (v8si vb, v8si vc, int *a, int *b, + int *c) +{ + v8si va; + int i; + +#pragma omp target data map(to: b, c, vb, vc) map(alloc: va) + +#pragma omp target teams distribute simd + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), b + i * 8, vb); + svst1_s32 (svptrue_b32 (), c + i * 8, vc); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), vb, vc); + } + +#pragma omp target update from(va) + +#pragma omp target teams distribute simd map(to: a) map(tofrom: va) + for (i = 0; i < 8; i++) + { + svst1_s32 (svptrue_b32 (), a + i * 8, va); + if (i == 7) + va = svadd_s32_z (svptrue_b32 (), va, svindex_s32 (1, 1)); + } + return va; +} diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pred-not-gen-1.c b/gcc/testsuite/gcc.target/aarch64/sve/pred-not-gen-1.c index a7d2795..c9a8b82 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/pred-not-gen-1.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/pred-not-gen-1.c @@ -19,6 +19,6 @@ void f10(double * restrict z, double * restrict w, double * restrict x, double * } } -/* { dg-final { scan-assembler-not {\tbic\t} { xfail *-*-* } } } */ -/* { dg-final { scan-assembler-times {\tnot\tp[0-9]+\.b, p[0-9]+/z, p[0-9]+\.b\n} 1 { xfail *-*-* } } } */ +/* { dg-final { scan-assembler-not {\tbic\t} } } */ +/* { dg-final { scan-assembler-times {\tnot\tp[0-9]+\.b, p[0-9]+/z, p[0-9]+\.b\n} 1 } } */ /* { dg-final { scan-assembler-times {\tfcmgt\tp[0-9]+\.d, p[0-9]+/z, z[0-9]+\.d, #0} 1 } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pred-not-gen-4.c b/gcc/testsuite/gcc.target/aarch64/sve/pred-not-gen-4.c index 20cbd75..1845bd3 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/pred-not-gen-4.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/pred-not-gen-4.c @@ -8,6 +8,6 @@ void f13(double * restrict z, double * restrict w, double * restrict x, double * } } -/* { dg-final { scan-assembler-not {\tbic\t} { xfail *-*-* } } } */ -/* { dg-final { scan-assembler-times {\tnot\tp[0-9]+\.b, p[0-9]+/z, p[0-9]+\.b\n} 1 { xfail *-*-* } } } */ +/* { dg-final { scan-assembler-not {\tbic\t} } } */ +/* { dg-final { scan-assembler-times {\tnot\tp[0-9]+\.b, p[0-9]+/z, p[0-9]+\.b\n} 1 } } */ /* { dg-final { scan-assembler-times {\tfcmuo\tp[0-9]+\.d, p[0-9]+/z, z[0-9]+\.d, z[0-9]+\.d} 1 } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/var_stride_2.c b/gcc/testsuite/gcc.target/aarch64/sve/var_stride_2.c index 33b9f0f..b8afea7 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/var_stride_2.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/var_stride_2.c @@ -16,7 +16,8 @@ f (TYPE *x, TYPE *y, unsigned short n, unsigned short m) /* { dg-final { scan-assembler {\tldr\tw[0-9]+} } } */ /* { dg-final { scan-assembler {\tstr\tw[0-9]+} } } */ /* Should multiply by (257-1)*4 rather than (VF-1)*4 or (VF-2)*4. */ -/* { dg-final { scan-assembler-times {\tadd\tx[0-9]+, x[0-9]+, x[0-9]+, lsl 10\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tubfiz\tx[0-9]+, x2, 10, 16\n} 1 } } */ +/* { dg-final { scan-assembler-times {\tubfiz\tx[0-9]+, x3, 10, 16\n} 1 } } */ /* { dg-final { scan-assembler-not {\tcmp\tx[0-9]+, 0} } } */ /* { dg-final { scan-assembler-not {\tcmp\tw[0-9]+, 0} } } */ /* { dg-final { scan-assembler-not {\tcsel\tx[0-9]+} } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/var_stride_4.c b/gcc/testsuite/gcc.target/aarch64/sve/var_stride_4.c index 71b826a..d2e74f9 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/var_stride_4.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/var_stride_4.c @@ -16,7 +16,8 @@ f (TYPE *x, TYPE *y, int n, int m) /* { dg-final { scan-assembler {\tldr\tw[0-9]+} } } */ /* { dg-final { scan-assembler {\tstr\tw[0-9]+} } } */ /* Should multiply by (257-1)*4 rather than (VF-1)*4. */ -/* { dg-final { scan-assembler-times {\t(?:lsl\tx[0-9]+, x[0-9]+, 10|sbfiz\tx[0-9]+, x[0-9]+, 10, 32)\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tsbfiz\tx[0-9]+, x2, 10, 32\n} 1 } } */ +/* { dg-final { scan-assembler-times {\tsbfiz\tx[0-9]+, x3, 10, 32\n} 1 } } */ /* { dg-final { scan-assembler {\tcmp\tw2, 0} } } */ /* { dg-final { scan-assembler {\tcmp\tw3, 0} } } */ /* { dg-final { scan-assembler-times {\tcsel\tx[0-9]+} 4 } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/mve.exp b/gcc/testsuite/gcc.target/arm/mve/mve.exp index a5d8511..9dc56c9 100644 --- a/gcc/testsuite/gcc.target/arm/mve/mve.exp +++ b/gcc/testsuite/gcc.target/arm/mve/mve.exp @@ -35,6 +35,7 @@ global dg_runtest_extra_prunes set dg_runtest_extra_prunes "" lappend dg_runtest_extra_prunes "warning: switch '-m(cpu|arch)=.*' conflicts with switch '-m(cpu|arch)=.*'" +set saved-dg-do-what-default ${dg-do-what-default} set dg-do-what-default "assemble" # Initialize `dg'. @@ -53,6 +54,8 @@ dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/general-c/*.\[cCS\]]] \ dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/*.\[cCS\]]] \ "" $DEFAULT_CFLAGS +set dg-do-what-default ${saved-dg-do-what-default} + # All done. set dg_runtest_extra_prunes "" dg-finish diff --git a/gcc/testsuite/gcc.target/arm/short-vfp-1.c b/gcc/testsuite/gcc.target/arm/short-vfp-1.c index f6866c4..418fc27 100644 --- a/gcc/testsuite/gcc.target/arm/short-vfp-1.c +++ b/gcc/testsuite/gcc.target/arm/short-vfp-1.c @@ -1,45 +1,75 @@ /* { dg-do compile } */ -/* { dg-require-effective-target arm_vfp_ok } */ -/* { dg-add-options arm_vfp } */ +/* { dg-require-effective-target arm_arch_v7a_fp_hard_ok } */ +/* { dg-options "-O2" } */ +/* { dg-add-options arm_arch_v7a_fp_hard } */ +/* { dg-final { check-function-bodies "**" "" } } */ +/* +** test_sisf: +** vcvt.s32.f32 (s[0-9]+), s0 +** vmov r0, \1 @ int +** bx lr +*/ int test_sisf (float x) { return (int)x; } +/* +** test_hisf: +** vcvt.s32.f32 (s[0-9]+), s0 +** vmov (r[0-9]+), \1 @ int +** sxth r0, \2 +** bx lr +*/ short test_hisf (float x) { return (short)x; } +/* +** test_sfsi: +** vmov (s[0-9]+), r0 @ int +** vcvt.f32.s32 s0, \1 +** bx lr +*/ float test_sfsi (int x) { return (float)x; } +/* +** test_sfhi: +** vmov (s[0-9]+), r0 @ int +** vcvt.f32.s32 s0, \1 +** bx lr +*/ float test_sfhi (short x) { return (float)x; } +/* +** test_hisi: +** sxth r0, r0 +** bx lr +*/ short test_hisi (int x) { return (short)x; } +/* +** test_sihi: +** bx lr +*/ int test_sihi (short x) { return (int)x; } - -/* { dg-final { scan-assembler-times {vcvt\.s32\.f32\ts[0-9]+, s[0-9]+} 2 } } */ -/* { dg-final { scan-assembler-times {vcvt\.f32\.s32\ts[0-9]+, s[0-9]+} 2 } } */ -/* { dg-final { scan-assembler-times {vmov\tr[0-9]+, s[0-9]+} 2 } } */ -/* { dg-final { scan-assembler-times {vmov\ts[0-9]+, r[0-9]+} 2 } } */ -/* { dg-final { scan-assembler-times {sxth\tr[0-9]+, r[0-9]+} 2 } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr115910.c b/gcc/testsuite/gcc.target/i386/pr115910.c new file mode 100644 index 0000000..5f1cd9a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr115910.c @@ -0,0 +1,20 @@ +/* PR target/115910 */ +/* { dg-do compile { target { ! ia32 } } } */ +/* { dg-options "-O2 -march=x86-64 -mtune=generic -masm=att" } */ +/* { dg-final { scan-assembler-times {\timulq\t} 2 } } */ +/* { dg-final { scan-assembler-times {\tshrq\t\$33,} 2 } } */ +/* { dg-final { scan-assembler-not {\tsarl\t} } } */ + +int +foo (int x) +{ + if (x < 0) + __builtin_unreachable (); + return x / 3U; +} + +int +bar (int x) +{ + return x / 3U; +} diff --git a/gcc/testsuite/gcc.target/nvptx/alloca-2-O0_-mfake-ptx-alloca.c b/gcc/testsuite/gcc.target/nvptx/alloca-2-O0_-mfake-ptx-alloca.c index 4cc4d0c..92562cd 100644 --- a/gcc/testsuite/gcc.target/nvptx/alloca-2-O0_-mfake-ptx-alloca.c +++ b/gcc/testsuite/gcc.target/nvptx/alloca-2-O0_-mfake-ptx-alloca.c @@ -1,4 +1,4 @@ -/* { dg-do link } */ +/* { dg-do run } */ /* { dg-options {-O0 -mno-soft-stack} } */ /* { dg-additional-options -march=sm_30 } */ /* { dg-additional-options -mfake-ptx-alloca } */ @@ -13,6 +13,7 @@ main(void) /* { dg-final { scan-assembler-times {(?n)^\.extern \.func \(\.param\.u64 %value_out\) __GCC_nvptx__PTX_alloca_not_supported \(\.param\.u64 %in_ar0\);$} 1 } } */ -/* { dg-message __GCC_nvptx__PTX_alloca_not_supported {unresolved symbol} { target *-*-* } 0 } */ +/* { dg-bogus __GCC_nvptx__PTX_alloca_not_supported {unresolved symbol} { target *-*-* } 0 } */ -/* { dg-final output-exists-not } */ +/* { dg-output {GCC/nvptx: sorry, unimplemented: dynamic stack allocation not supported[\r\n]+} } + { dg-shouldfail __GCC_nvptx__PTX_alloca_not_supported } */ diff --git a/gcc/testsuite/gcc.target/nvptx/decl.c b/gcc/testsuite/gcc.target/nvptx/decl.c index 190a64d..45dd699 100644 --- a/gcc/testsuite/gcc.target/nvptx/decl.c +++ b/gcc/testsuite/gcc.target/nvptx/decl.c @@ -13,8 +13,8 @@ int Foo () } /* { dg-final { scan-assembler "\[\r\n\]\[\t \]*.visible .global \[^,\r\n\]*glob_export" } } */ -/* { dg-final { scan-assembler "\[\r\n\]\[\t \]*.visible .const \[^,\r\n\]*cst_export" } } */ +/* { dg-final { scan-assembler "\[\r\n\]\[\t \]*.visible .global \[^,\r\n\]*cst_export" } } */ /* { dg-final { scan-assembler "\[\r\n\]\[\t \]*.global \[^,\r\n\]*glob_local" } } */ -/* { dg-final { scan-assembler "\[\r\n\]\[\t \]*.const \[^,\r\n\]*cst_local" } } */ +/* { dg-final { scan-assembler "\[\r\n\]\[\t \]*.global \[^,\r\n\]*cst_local" } } */ /* { dg-final { scan-assembler "\[\r\n\]\[\t \]*.extern .global \[^,\r\n\]*glob_import" } } */ -/* { dg-final { scan-assembler "\[\r\n\]\[\t \]*.extern .const \[^,\r\n\]*cst_import" } } */ +/* { dg-final { scan-assembler "\[\r\n\]\[\t \]*.extern .global \[^,\r\n\]*cst_import" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/vsext.c b/gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/vsext.c new file mode 100644 index 0000000..55db283 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/vsext.c @@ -0,0 +1,24 @@ +/* { dg-do compile { target { rv64 } } } */ +/* { dg-options "-march=rv64gc_xtheadvector -mabi=lp64d -O3" } */ + +#include <riscv_vector.h> + +struct a +{ + int b[]; +} c (vint32m4_t), d; + +char e; +char *f; + +void g () +{ + int h; + vint32m4_t i; + vint8m1_t j = __riscv_vlse8_v_i8m1 (&e, d.b[3], h); + vint16m2_t k = __riscv_vwadd_vx_i16m2 (j, 0, h); + i = __riscv_vwmacc_vx_i32m4 (i, f[0], k, h); + c (i); +} + +/* { dg-final { scan-assembler-not {th\.vsext\.vf2} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/vzext.c b/gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/vzext.c new file mode 100644 index 0000000..fcb5659 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/vzext.c @@ -0,0 +1,24 @@ +/* { dg-do compile { target { rv64 } } } */ +/* { dg-options "-march=rv64gc_xtheadvector -mabi=lp64d -O3" } */ + +#include <riscv_vector.h> + +struct a +{ + int b[]; +} c (vuint32m4_t), d; + +char e; +char *f; + +void g () +{ + int h; + vuint32m4_t i; + vuint8m1_t j = __riscv_vlse8_v_u8m1 (&e, d.b[3], h); + vuint16m2_t k = __riscv_vwaddu_vx_u16m2 (j, 0, h); + i = __riscv_vwmaccu_vx_u32m4 (i, f[0], k, h); + c (i); +} + +/* { dg-final { scan-assembler-not {th\.vzext\.vf2} } } */ |