diff options
Diffstat (limited to 'gcc/testsuite/gcc.target')
5 files changed, 193 insertions, 4 deletions
diff --git a/gcc/testsuite/gcc.target/i386/apx-interrupt-1.c b/gcc/testsuite/gcc.target/i386/apx-interrupt-1.c index fefe2e6..fa1acc7 100644 --- a/gcc/testsuite/gcc.target/i386/apx-interrupt-1.c +++ b/gcc/testsuite/gcc.target/i386/apx-interrupt-1.c @@ -66,7 +66,7 @@ void foo (void *frame) /* { dg-final { scan-assembler-times {\t\.cfi_offset 132, -120} 1 } } */ /* { dg-final { scan-assembler-times {\t\.cfi_offset 131, -128} 1 } } */ /* { dg-final { scan-assembler-times {\t\.cfi_offset 130, -136} 1 } } */ -/* { dg-final { scan-assembler-times ".cfi_restore" 15} } */ +/* { dg-final { scan-assembler-times ".cfi_restore" 31 } } */ /* { dg-final { scan-assembler-times "pop(?:l|q)\[\\t \]*%(?:e|r)ax" 1 } } */ /* { dg-final { scan-assembler-times "pop(?:l|q)\[\\t \]*%(?:e|r)bx" 1 } } */ /* { dg-final { scan-assembler-times "pop(?:l|q)\[\\t \]*%(?:e|r)cx" 1 } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr119784a.c b/gcc/testsuite/gcc.target/i386/pr119784a.c new file mode 100644 index 0000000..8a119d4 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr119784a.c @@ -0,0 +1,96 @@ +/* { dg-do compile { target { *-*-linux* && lp64 } } } */ +/* { dg-options "-O2 -fno-pic -mtune=generic -mgeneral-regs-only -mapxf -mtune-ctrl=prologue_using_move,epilogue_using_move" } */ +/* Keep labels and directives ('.cfi_startproc', '.cfi_endproc'). */ +/* { dg-final { check-function-bodies "**" "" "" { target "*-*-*" } {^\t?\.} } } */ + +/* start must save and restore all caller saved registers. */ + +/* +**start: +**.LFB[0-9]+: +** .cfi_startproc +** subq \$248, %rsp +**... +** movq %rax, \(%rsp\) +** movq %rdx, 8\(%rsp\) +** movq %rcx, 16\(%rsp\) +** movq %rbx, 24\(%rsp\) +** movq %rsi, 32\(%rsp\) +** movq %rdi, 40\(%rsp\) +**... +** movq %rbp, 48\(%rsp\) +** movq %r8, 56\(%rsp\) +** movq %r9, 64\(%rsp\) +** movq %r10, 72\(%rsp\) +** movq %r11, 80\(%rsp\) +** movq %r12, 88\(%rsp\) +** movq %r13, 96\(%rsp\) +** movq %r14, 104\(%rsp\) +** movq %r15, 112\(%rsp\) +** movq %r16, 120\(%rsp\) +** movq %r17, 128\(%rsp\) +** movq %r18, 136\(%rsp\) +** movq %r19, 144\(%rsp\) +** movq %r20, 152\(%rsp\) +** movq %r21, 160\(%rsp\) +** movq %r22, 168\(%rsp\) +** movq %r23, 176\(%rsp\) +** movq %r24, 184\(%rsp\) +** movq %r25, 192\(%rsp\) +** movq %r26, 200\(%rsp\) +** movq %r27, 208\(%rsp\) +** movq %r28, 216\(%rsp\) +** movq %r29, 224\(%rsp\) +** movq %r30, 232\(%rsp\) +** movq %r31, 240\(%rsp\) +**... +** call \*code\(%rip\) +** movq \(%rsp\), %rax +** movq 8\(%rsp\), %rdx +** movq 16\(%rsp\), %rcx +** movq 24\(%rsp\), %rbx +** movq 32\(%rsp\), %rsi +** movq 40\(%rsp\), %rdi +** movq 48\(%rsp\), %rbp +** movq 56\(%rsp\), %r8 +** movq 64\(%rsp\), %r9 +** movq 72\(%rsp\), %r10 +** movq 80\(%rsp\), %r11 +** movq 88\(%rsp\), %r12 +** movq 96\(%rsp\), %r13 +** movq 104\(%rsp\), %r14 +** movq 112\(%rsp\), %r15 +** movq 120\(%rsp\), %r16 +** movq 128\(%rsp\), %r17 +** movq 136\(%rsp\), %r18 +** movq 144\(%rsp\), %r19 +** movq 152\(%rsp\), %r20 +** movq 160\(%rsp\), %r21 +** movq 168\(%rsp\), %r22 +** movq 176\(%rsp\), %r23 +** movq 184\(%rsp\), %r24 +** movq 192\(%rsp\), %r25 +** movq 200\(%rsp\), %r26 +** movq 208\(%rsp\), %r27 +** movq 216\(%rsp\), %r28 +** movq 224\(%rsp\), %r29 +** movq 232\(%rsp\), %r30 +** movq 240\(%rsp\), %r31 +** addq \$248, %rsp +**... +** ret +** .cfi_endproc +**... +*/ + +#define DONT_SAVE_REGS __attribute__((no_callee_saved_registers)) +#define SAVE_REGS __attribute__((no_caller_saved_registers)) + +typedef DONT_SAVE_REGS void (*op_t)(void); + +extern op_t code[]; + +SAVE_REGS void start() +{ + code[0](); +} diff --git a/gcc/testsuite/gcc.target/i386/pr119784b.c b/gcc/testsuite/gcc.target/i386/pr119784b.c new file mode 100644 index 0000000..c676197 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr119784b.c @@ -0,0 +1,87 @@ +/* { dg-do compile { target { *-*-linux* && x32 } } } */ +/* { dg-options "-O2 -fno-pic -mtune=generic -mgeneral-regs-only -mapxf -mtune-ctrl=prologue_using_move,epilogue_using_move" } */ +/* Keep labels and directives ('.cfi_startproc', '.cfi_endproc'). */ +/* { dg-final { check-function-bodies "**" "" "" { target "*-*-*" } {^\t?\.} } } */ + +/* start must save and restore all caller saved registers. */ + +/* +**start: +**.LFB[0-9]+: +** .cfi_startproc +** subl \$248, %esp +**... +** movq %rax, \(%rsp\) +** movq %rdx, 8\(%rsp\) +** movq %rcx, 16\(%rsp\) +** movq %rbx, 24\(%rsp\) +** movq %rsi, 32\(%rsp\) +** movq %rdi, 40\(%rsp\) +**... +** movq %rbp, 48\(%rsp\) +** movq %r8, 56\(%rsp\) +** movq %r9, 64\(%rsp\) +** movq %r10, 72\(%rsp\) +** movq %r11, 80\(%rsp\) +** movq %r12, 88\(%rsp\) +** movq %r13, 96\(%rsp\) +** movq %r14, 104\(%rsp\) +** movq %r15, 112\(%rsp\) +** movq %r16, 120\(%rsp\) +** movq %r17, 128\(%rsp\) +** movq %r18, 136\(%rsp\) +** movq %r19, 144\(%rsp\) +** movq %r20, 152\(%rsp\) +** movq %r21, 160\(%rsp\) +** movq %r22, 168\(%rsp\) +** movq %r23, 176\(%rsp\) +** movq %r24, 184\(%rsp\) +** movq %r25, 192\(%rsp\) +** movq %r26, 200\(%rsp\) +** movq %r27, 208\(%rsp\) +** movq %r28, 216\(%rsp\) +** movq %r29, 224\(%rsp\) +** movq %r30, 232\(%rsp\) +** movq %r31, 240\(%rsp\) +**... +** movl code\(%rip\), %ebp +** call \*%rbp +** movq \(%rsp\), %rax +** movq 8\(%rsp\), %rdx +** movq 16\(%rsp\), %rcx +** movq 24\(%rsp\), %rbx +** movq 32\(%rsp\), %rsi +** movq 40\(%rsp\), %rdi +** movq 48\(%rsp\), %rbp +** movq 56\(%rsp\), %r8 +** movq 64\(%rsp\), %r9 +** movq 72\(%rsp\), %r10 +** movq 80\(%rsp\), %r11 +** movq 88\(%rsp\), %r12 +** movq 96\(%rsp\), %r13 +** movq 104\(%rsp\), %r14 +** movq 112\(%rsp\), %r15 +** movq 120\(%rsp\), %r16 +** movq 128\(%rsp\), %r17 +** movq 136\(%rsp\), %r18 +** movq 144\(%rsp\), %r19 +** movq 152\(%rsp\), %r20 +** movq 160\(%rsp\), %r21 +** movq 168\(%rsp\), %r22 +** movq 176\(%rsp\), %r23 +** movq 184\(%rsp\), %r24 +** movq 192\(%rsp\), %r25 +** movq 200\(%rsp\), %r26 +** movq 208\(%rsp\), %r27 +** movq 216\(%rsp\), %r28 +** movq 224\(%rsp\), %r29 +** movq 232\(%rsp\), %r30 +** movq 240\(%rsp\), %r31 +** addl \$248, %esp +**... +** ret +** .cfi_endproc +**... +*/ + +#include "pr119784a.c" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-68.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-68.c index bf95e1c..64666d3 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-68.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-68.c @@ -21,6 +21,12 @@ void f2 (void * restrict in, void * restrict out, int l, int n, int m) } } +/* The second check is XFAILed because we currently don't lift + vsetvls into non-transparent (in LCM parlance) blocks. + See PR119547. + In this test it is still possible because the conflicting + register only ever feeds vsetvls. */ + /* { dg-final { scan-assembler-times {vsetvli} 2 { target { no-opts "-O0" no-opts "-Os" no-opts "-Oz" no-opts "-g" no-opts "-funroll-loops" } } } } */ -/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*tu,\s*m[au]} 2 { target { no-opts "-O0" no-opts "-Os" no-opts "-Oz" no-opts "-g" no-opts "-funroll-loops" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*tu,\s*m[au]} 2 { target { no-opts "-O0" no-opts "-Os" no-opts "-Oz" no-opts "-g" no-opts "-funroll-loops" } xfail { *-*-* } } } } */ /* { dg-final { scan-assembler-times {addi\s+[a-x0-9]+,\s*[a-x0-9]+,\s*44} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-Oz" no-opts "-g" no-opts "-funroll-loops" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-10.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-10.c index ddf53ca..0dbf34a 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-10.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-10.c @@ -43,6 +43,6 @@ void foo (int8_t * restrict in, int8_t * restrict out, int n, int cond) } } -/* { dg-final { scan-assembler-times {vsetvli} 15 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 14 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */ -/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */ |