aboutsummaryrefslogtreecommitdiff
path: root/gcc/testsuite/gcc.target/mips/save-restore-5.c
diff options
context:
space:
mode:
Diffstat (limited to 'gcc/testsuite/gcc.target/mips/save-restore-5.c')
-rw-r--r--gcc/testsuite/gcc.target/mips/save-restore-5.c4
1 files changed, 1 insertions, 3 deletions
diff --git a/gcc/testsuite/gcc.target/mips/save-restore-5.c b/gcc/testsuite/gcc.target/mips/save-restore-5.c
index a7e82ba..0dd823a 100644
--- a/gcc/testsuite/gcc.target/mips/save-restore-5.c
+++ b/gcc/testsuite/gcc.target/mips/save-restore-5.c
@@ -1,7 +1,5 @@
/* Check that we don't try to save the same register twice. */
-/* { dg-do assemble { target mips16_attribute } } */
-/* { dg-mips-options "-mips32r2 -mgp32 -O2" } */
-/* { dg-add-options mips16_attribute } */
+/* { dg-options "(-mips16) isa_rev>=1 -mgp32 -O2" } */
int bar (int, int, int, int);
void frob (void);