3 files changed, 32 insertions, 1 deletions
diff --git a/gcc/testsuite/gcc.target/i386/avx2-vpcmpgtq-1.c b/gcc/testsuite/gcc.target/i386/avx2-vpcmpgtq-1.c
index 7a98380..5e6f431 100644
--- a/gcc/testsuite/gcc.target/i386/avx2-vpcmpgtq-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx2-vpcmpgtq-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-mavx2 -O2" } */
+/* { dg-options "-mavx2 -O2 -fno-fuse-ops-with-volatile-access" } */
 /* { dg-final { scan-assembler "vpcmpgtq\[ \\t\]+\[^\n\]*%ymm\[0-9\]" } } */
 
 #include <immintrin.h>
diff --git a/gcc/testsuite/gcc.target/i386/pr121230.c b/gcc/testsuite/gcc.target/i386/pr121230.c
new file mode 100644
index 0000000..67c9c5c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr121230.c
@@ -0,0 +1,16 @@
+/* { dg-do compile { target ia32 } } */
+/* { dg-options "-O3 -march=athlon-xp -mfpmath=387 -fexcess-precision=standard" } */
+
+typedef struct {
+    float a;
+    float b;
+} f32_2;
+
+f32_2 add32_2(f32_2 x, f32_2 y) {
+    return (f32_2){ x.a + y.a, x.b + y.b};
+}
+
+/* We do not want the vectorizer to vectorize the store and/or the
+   conversion (with IA32 we do not support V2SF add) given that spills
+   FP regs to reload them to XMM.  */
+/* { dg-final { scan-assembler-not "movss\[ \\t\]+\[0-9\]*\\\(%esp\\\), %xmm" } } */
diff --git a/gcc/testsuite/gcc.target/i386/pr123027.c b/gcc/testsuite/gcc.target/i386/pr123027.c
new file mode 100644
index 0000000..b7effac
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr123027.c
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -msse -mfpmath=sse -ffinite-math-only" } */
+
+float foo (float a, float b)
+{
+  return a < b ? a : b;
+}
+
+float bar (float a, float b)
+{
+  return a > b ? a : b;
+}
+
+/* { dg-final { scan-assembler-times "minss" 1 } } */
+/* { dg-final { scan-assembler-times "maxss" 1 } } */