diff options
Diffstat (limited to 'gcc/testsuite/gcc.target/i386')
26 files changed, 382 insertions, 38 deletions
diff --git a/gcc/testsuite/gcc.target/i386/apx-interrupt-1.c b/gcc/testsuite/gcc.target/i386/apx-interrupt-1.c index fefe2e6..fa1acc7 100644 --- a/gcc/testsuite/gcc.target/i386/apx-interrupt-1.c +++ b/gcc/testsuite/gcc.target/i386/apx-interrupt-1.c @@ -66,7 +66,7 @@ void foo (void *frame) /* { dg-final { scan-assembler-times {\t\.cfi_offset 132, -120} 1 } } */ /* { dg-final { scan-assembler-times {\t\.cfi_offset 131, -128} 1 } } */ /* { dg-final { scan-assembler-times {\t\.cfi_offset 130, -136} 1 } } */ -/* { dg-final { scan-assembler-times ".cfi_restore" 15} } */ +/* { dg-final { scan-assembler-times ".cfi_restore" 31 } } */ /* { dg-final { scan-assembler-times "pop(?:l|q)\[\\t \]*%(?:e|r)ax" 1 } } */ /* { dg-final { scan-assembler-times "pop(?:l|q)\[\\t \]*%(?:e|r)bx" 1 } } */ /* { dg-final { scan-assembler-times "pop(?:l|q)\[\\t \]*%(?:e|r)cx" 1 } } */ diff --git a/gcc/testsuite/gcc.target/i386/avx512f-pr96891-3.c b/gcc/testsuite/gcc.target/i386/avx512f-pr96891-3.c index 5b26081..5eb60d9 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-pr96891-3.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-pr96891-3.c @@ -1,11 +1,10 @@ /* { dg-do compile } */ /* { dg-options "-mavx512vl -mavx512bw -mavx512dq -O2 -masm=att -mstv -mno-stackrealign" } */ /* { dg-final { scan-assembler-not {not[bwlqd]\]} } } */ -/* { dg-final { scan-assembler-times {(?n)vpcmp[bwdq][ \t]*\$5} 4} } */ -/* { dg-final { scan-assembler-times {(?n)vpcmp[bwdq][ \t]*\$6} 4} } */ +/* { dg-final { scan-assembler-times {(?n)vpcmp[bwdq][ \t]*\$5} 2} } */ +/* { dg-final { scan-assembler-times {(?n)vpcmp[bwdq][ \t]*\$6} 3} } */ /* { dg-final { scan-assembler-times {(?n)vpcmp[bwdq][ \t]*\$[37]} 4} } */ -/* { dg-final { scan-assembler-times {(?n)vcmpp[sd][ \t]*\$5} 2} } */ -/* { dg-final { scan-assembler-times {(?n)vcmpp[sd][ \t]*\$6} 2} } */ +/* { dg-final { scan-assembler-times {(?n)vcmpp[sd][ \t]*\$6} 1} } */ /* { dg-final { scan-assembler-times {(?n)vcmpp[sd][ \t]*\$7} 2} } */ #include<immintrin.h> @@ -20,20 +19,14 @@ FOO (__m128i,, epi8, __mmask16, 128, 1); FOO (__m128i,, epi16, __mmask8, 128, 1); -FOO (__m128i,, epi32, __mmask8, 128, 1); -FOO (__m128i,, epi64, __mmask8, 128, 1); FOO (__m256i, 256, epi8, __mmask32, 256, 2); FOO (__m256i, 256, epi16, __mmask16, 256, 2); FOO (__m256i, 256, epi32, __mmask8, 256, 2); -FOO (__m256i, 256, epi64, __mmask8, 256, 2); FOO (__m512i, 512, epi8, __mmask64, 512, 3); FOO (__m512i, 512, epi16, __mmask32, 512, 3); FOO (__m512i, 512, epi32, __mmask16, 512, 3); FOO (__m512i, 512, epi64, __mmask8, 512, 3); -FOO (__m128,, ps, __mmask8, 128, 1); -FOO (__m128d,, pd, __mmask8, 128, 1); FOO (__m256, 256, ps, __mmask8, 256, 2); -FOO (__m256d, 256, pd, __mmask8, 256, 2); FOO (__m512, 512, ps, __mmask16, 512, 3); FOO (__m512d, 512, pd, __mmask8, 512, 3); diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpgtuq-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpgtuq-1.c index ef6a525..37ca646 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vpcmpgtuq-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcmpgtuq-1.c @@ -12,5 +12,5 @@ void extern avx512f_test (void) { m = _mm512_cmpgt_epu64_mask (x, x); - m = _mm512_mask_cmpgt_epu64_mask (3, x, x); + m = _mm512_mask_cmpgt_epu64_mask (5, x, x); } diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-pr103750-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-pr103750-1.c new file mode 100644 index 0000000..a15fae8 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-pr103750-1.c @@ -0,0 +1,79 @@ +/* PR target/103750 */ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512vl" } */ +/* { dg-final { scan-assembler-not "and" } } */ + +#include <immintrin.h> +extern __m128i* pi128; +extern __m256i* pi256; + +extern __m128* ps128; +extern __m256* ps256; + +extern __m128d* pd128; +extern __m256d* pd256; + +extern char a; +void +foo () +{ + __mmask8 mask1 = _mm_cmpeq_epu32_mask (pi128[0], pi128[1]); + a = mask1 & 15; +} + +void +foo1 () +{ + __mmask8 mask1 = _mm_cmpeq_epu64_mask (pi128[0], pi128[1]); + a = mask1 & 3; +} + +void +foo2 () +{ + __mmask8 mask1 = _mm256_cmpeq_epu64_mask (pi256[0], pi256[1]); + a = mask1 & 15; +} + +void +sign_foo () +{ + __mmask8 mask1 = _mm_cmpeq_epi32_mask (pi128[0], pi128[1]); + a = mask1 & 15; +} + +void +sign_foo1 () +{ + __mmask8 mask1 = _mm_cmpeq_epi64_mask (pi128[0], pi128[1]); + a = mask1 & 3; +} + + +void +sign_foo2 () +{ + __mmask8 mask1 = _mm256_cmpeq_epi64_mask (pi256[0], pi256[1]); + a = mask1 & 15; +} + +void +float_foo () +{ + __mmask8 mask1 = _mm_cmp_ps_mask (ps128[0], ps128[1], 1); + a = mask1 & 15; +} + +void +double_foo () +{ + __mmask8 mask1 = _mm_cmp_pd_mask (pd128[0], pd128[1], 1); + a = mask1 & 3; +} + +void +double_foo2 () +{ + __mmask8 mask1 = _mm256_cmp_pd_mask (pd256[0], pd256[1], 1); + a = mask1 & 15; +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpeqq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpeqq-1.c index 69b200a..a798d06 100644 --- a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpeqq-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpeqq-1.c @@ -16,6 +16,6 @@ avx512vl_test (void) { m = _mm_cmpeq_epi64_mask (x128, x128); m = _mm256_cmpeq_epi64_mask (x256, x256); - m = _mm_mask_cmpeq_epi64_mask (3, x128, x128); - m = _mm256_mask_cmpeq_epi64_mask (3, x256, x256); + m = _mm_mask_cmpeq_epi64_mask (5, x128, x128); + m = _mm256_mask_cmpeq_epi64_mask (5, x256, x256); } diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpequq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpequq-1.c index c925d32..736763f 100644 --- a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpequq-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpequq-1.c @@ -16,6 +16,6 @@ avx512vl_test (void) { m = _mm_cmpeq_epu64_mask (x128, x128); m = _mm256_cmpeq_epu64_mask (x256, x256); - m = _mm_mask_cmpeq_epu64_mask (3, x128, x128); - m = _mm256_mask_cmpeq_epu64_mask (3, x256, x256); + m = _mm_mask_cmpeq_epu64_mask (5, x128, x128); + m = _mm256_mask_cmpeq_epu64_mask (5, x256, x256); } diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgeq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgeq-1.c index ef40e41..19110a5 100644 --- a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgeq-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgeq-1.c @@ -16,6 +16,6 @@ avx512vl_test (void) { m = _mm_cmpge_epi64_mask (x128, x128); m = _mm256_cmpge_epi64_mask (x256, x256); - m = _mm_mask_cmpge_epi64_mask (3, x128, x128); - m = _mm256_mask_cmpge_epi64_mask (3, x256, x256); + m = _mm_mask_cmpge_epi64_mask (5, x128, x128); + m = _mm256_mask_cmpge_epi64_mask (5, x256, x256); } diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgeuq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgeuq-1.c index 1f7dd49..d82f8e5 100644 --- a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgeuq-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgeuq-1.c @@ -16,6 +16,6 @@ avx512vl_test (void) { m = _mm_cmpge_epu64_mask (x128, x128); m = _mm256_cmpge_epu64_mask (x256, x256); - m = _mm_mask_cmpge_epu64_mask (3, x128, x128); - m = _mm256_mask_cmpge_epu64_mask (3, x256, x256); + m = _mm_mask_cmpge_epu64_mask (5, x128, x128); + m = _mm256_mask_cmpge_epu64_mask (5, x256, x256); } diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgtq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgtq-1.c index 26cac3a..79f9430 100644 --- a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgtq-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgtq-1.c @@ -16,6 +16,6 @@ avx512vl_test (void) { m = _mm_cmpgt_epi64_mask (x128, x128); m = _mm256_cmpgt_epi64_mask (x256, x256); - m = _mm_mask_cmpgt_epi64_mask (3, x128, x128); - m = _mm256_mask_cmpgt_epi64_mask (3, x256, x256); + m = _mm_mask_cmpgt_epi64_mask (5, x128, x128); + m = _mm256_mask_cmpgt_epi64_mask (5, x256, x256); } diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgtuq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgtuq-1.c index 10717cd..bef015f 100644 --- a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgtuq-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgtuq-1.c @@ -16,6 +16,6 @@ avx512vl_test (void) { m = _mm_cmpgt_epu64_mask (x128, x128); m = _mm256_cmpgt_epu64_mask (x256, x256); - m = _mm_mask_cmpgt_epu64_mask (3, x128, x128); - m = _mm256_mask_cmpgt_epu64_mask (3, x256, x256); + m = _mm_mask_cmpgt_epu64_mask (5, x128, x128); + m = _mm256_mask_cmpgt_epu64_mask (5, x256, x256); } diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpleq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpleq-1.c index 110ff70..9974aa5 100644 --- a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpleq-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpleq-1.c @@ -16,6 +16,6 @@ avx512vl_test (void) { m = _mm_cmple_epi64_mask (x128, x128); m = _mm256_cmple_epi64_mask (x256, x256); - m = _mm_mask_cmple_epi64_mask (3, x128, x128); - m = _mm256_mask_cmple_epi64_mask (3, x256, x256); + m = _mm_mask_cmple_epi64_mask (5, x128, x128); + m = _mm256_mask_cmple_epi64_mask (5, x256, x256); } diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpleuq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpleuq-1.c index e3faf41..0a5a513 100644 --- a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpleuq-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpleuq-1.c @@ -16,6 +16,6 @@ avx512vl_test (void) { m = _mm_cmple_epu64_mask (x128, x128); m = _mm256_cmple_epu64_mask (x256, x256); - m = _mm_mask_cmple_epu64_mask (3, x128, x128); - m = _mm256_mask_cmple_epu64_mask (3, x256, x256); + m = _mm_mask_cmple_epu64_mask (5, x128, x128); + m = _mm256_mask_cmple_epu64_mask (5, x256, x256); } diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpltq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpltq-1.c index 1b8f7f1..5f40c79 100644 --- a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpltq-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpltq-1.c @@ -16,6 +16,6 @@ avx512vl_test (void) { m = _mm_cmplt_epi64_mask (x128, x128); m = _mm256_cmplt_epi64_mask (x256, x256); - m = _mm_mask_cmplt_epi64_mask (3, x128, x128); - m = _mm256_mask_cmplt_epi64_mask (3, x256, x256); + m = _mm_mask_cmplt_epi64_mask (5, x128, x128); + m = _mm256_mask_cmplt_epi64_mask (5, x256, x256); } diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpltuq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpltuq-1.c index 5c2f025..afda5e7 100644 --- a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpltuq-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpltuq-1.c @@ -16,6 +16,6 @@ avx512vl_test (void) { m = _mm_cmplt_epu64_mask (x128, x128); m = _mm256_cmplt_epu64_mask (x256, x256); - m = _mm_mask_cmplt_epu64_mask (3, x128, x128); - m = _mm256_mask_cmplt_epu64_mask (3, x256, x256); + m = _mm_mask_cmplt_epu64_mask (5, x128, x128); + m = _mm256_mask_cmplt_epu64_mask (5, x256, x256); } diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpneqq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpneqq-1.c index f48de10..5ef2548 100644 --- a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpneqq-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpneqq-1.c @@ -16,6 +16,6 @@ avx512vl_test (void) { m = _mm_cmpneq_epi64_mask (x128, x128); m = _mm256_cmpneq_epi64_mask (x256, x256); - m = _mm_mask_cmpneq_epi64_mask (3, x128, x128); - m = _mm256_mask_cmpneq_epi64_mask (3, x256, x256); + m = _mm_mask_cmpneq_epi64_mask (5, x128, x128); + m = _mm256_mask_cmpneq_epi64_mask (5, x256, x256); } diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpnequq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpnequq-1.c index 726a887..4a9aacf 100644 --- a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpnequq-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpnequq-1.c @@ -16,6 +16,6 @@ avx512vl_test (void) { m = _mm_cmpneq_epu64_mask (x128, x128); m = _mm256_cmpneq_epu64_mask (x256, x256); - m = _mm_mask_cmpneq_epu64_mask (3, x128, x128); - m = _mm256_mask_cmpneq_epu64_mask (3, x256, x256); + m = _mm_mask_cmpneq_epu64_mask (5, x128, x128); + m = _mm256_mask_cmpneq_epu64_mask (5, x256, x256); } diff --git a/gcc/testsuite/gcc.target/i386/blendv-to-maxmin.c b/gcc/testsuite/gcc.target/i386/blendv-to-maxmin.c new file mode 100644 index 0000000..042eb7d --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/blendv-to-maxmin.c @@ -0,0 +1,12 @@ +/* { dg-do compile } */ +/* { dg-options "-march=x86-64-v3 -O2 -mfpmath=sse" } */ +/* { dg-final { scan-assembler-times "vmaxsd" 1 } } */ + +double +foo (double a) +{ + if (a > 0.0) + return a; + return 0.0; +} + diff --git a/gcc/testsuite/gcc.target/i386/blendv-to-pand.c b/gcc/testsuite/gcc.target/i386/blendv-to-pand.c new file mode 100644 index 0000000..2896a2b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/blendv-to-pand.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -march=x86-64-v3 -mfpmath=sse" } */ +/* { dg-final { scan-assembler-not "vblendv" } } */ + +void +foo (float* a, float* b, float* c, float* __restrict d, int n) +{ + for (int i = 0; i != n; i++) + { + c[i] *= 2.0f; + if (a[i] > b[i]) + d[i] = 0.0f; + else + d[i] = c[i]; + } +} diff --git a/gcc/testsuite/gcc.target/i386/pr119386-1.c b/gcc/testsuite/gcc.target/i386/pr119386-1.c new file mode 100644 index 0000000..9a0dc64 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr119386-1.c @@ -0,0 +1,10 @@ +/* PR target/119386 */ +/* { dg-do compile { target *-*-linux* } } */ +/* { dg-options "-O2 -fpic -pg" } */ +/* { dg-final { scan-assembler "call\[ \t\]+mcount@PLT" } } */ + +int +main () +{ + return 0; +} diff --git a/gcc/testsuite/gcc.target/i386/pr119386-2.c b/gcc/testsuite/gcc.target/i386/pr119386-2.c new file mode 100644 index 0000000..3ea978e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr119386-2.c @@ -0,0 +1,12 @@ +/* PR target/119386 */ +/* { dg-do compile { target *-*-linux* } } */ +/* { dg-options "-O2 -fpic -fno-plt -pg" } */ +/* { dg-final { scan-assembler "call\[ \t\]+\\*mcount@GOTPCREL\\(" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler "call\[ \t\]+\\*mcount@GOT\\(" { target ia32 } } } */ + + +int +main () +{ + return 0; +} diff --git a/gcc/testsuite/gcc.target/i386/pr119386-3.c b/gcc/testsuite/gcc.target/i386/pr119386-3.c new file mode 100644 index 0000000..287410b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr119386-3.c @@ -0,0 +1,10 @@ +/* PR target/119386 */ +/* { dg-do compile { target *-*-linux* } } */ +/* { dg-options "-O2 -fpic -pg -mnop-mcount" } */ +/* { dg-final { scan-assembler ".byte\[ \t\]+0x0f, 0x1f, 0x44, 0x00, 0x00" } } */ + +int +main () +{ + return 0; +} diff --git a/gcc/testsuite/gcc.target/i386/pr119784a.c b/gcc/testsuite/gcc.target/i386/pr119784a.c new file mode 100644 index 0000000..8a119d4 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr119784a.c @@ -0,0 +1,96 @@ +/* { dg-do compile { target { *-*-linux* && lp64 } } } */ +/* { dg-options "-O2 -fno-pic -mtune=generic -mgeneral-regs-only -mapxf -mtune-ctrl=prologue_using_move,epilogue_using_move" } */ +/* Keep labels and directives ('.cfi_startproc', '.cfi_endproc'). */ +/* { dg-final { check-function-bodies "**" "" "" { target "*-*-*" } {^\t?\.} } } */ + +/* start must save and restore all caller saved registers. */ + +/* +**start: +**.LFB[0-9]+: +** .cfi_startproc +** subq \$248, %rsp +**... +** movq %rax, \(%rsp\) +** movq %rdx, 8\(%rsp\) +** movq %rcx, 16\(%rsp\) +** movq %rbx, 24\(%rsp\) +** movq %rsi, 32\(%rsp\) +** movq %rdi, 40\(%rsp\) +**... +** movq %rbp, 48\(%rsp\) +** movq %r8, 56\(%rsp\) +** movq %r9, 64\(%rsp\) +** movq %r10, 72\(%rsp\) +** movq %r11, 80\(%rsp\) +** movq %r12, 88\(%rsp\) +** movq %r13, 96\(%rsp\) +** movq %r14, 104\(%rsp\) +** movq %r15, 112\(%rsp\) +** movq %r16, 120\(%rsp\) +** movq %r17, 128\(%rsp\) +** movq %r18, 136\(%rsp\) +** movq %r19, 144\(%rsp\) +** movq %r20, 152\(%rsp\) +** movq %r21, 160\(%rsp\) +** movq %r22, 168\(%rsp\) +** movq %r23, 176\(%rsp\) +** movq %r24, 184\(%rsp\) +** movq %r25, 192\(%rsp\) +** movq %r26, 200\(%rsp\) +** movq %r27, 208\(%rsp\) +** movq %r28, 216\(%rsp\) +** movq %r29, 224\(%rsp\) +** movq %r30, 232\(%rsp\) +** movq %r31, 240\(%rsp\) +**... +** call \*code\(%rip\) +** movq \(%rsp\), %rax +** movq 8\(%rsp\), %rdx +** movq 16\(%rsp\), %rcx +** movq 24\(%rsp\), %rbx +** movq 32\(%rsp\), %rsi +** movq 40\(%rsp\), %rdi +** movq 48\(%rsp\), %rbp +** movq 56\(%rsp\), %r8 +** movq 64\(%rsp\), %r9 +** movq 72\(%rsp\), %r10 +** movq 80\(%rsp\), %r11 +** movq 88\(%rsp\), %r12 +** movq 96\(%rsp\), %r13 +** movq 104\(%rsp\), %r14 +** movq 112\(%rsp\), %r15 +** movq 120\(%rsp\), %r16 +** movq 128\(%rsp\), %r17 +** movq 136\(%rsp\), %r18 +** movq 144\(%rsp\), %r19 +** movq 152\(%rsp\), %r20 +** movq 160\(%rsp\), %r21 +** movq 168\(%rsp\), %r22 +** movq 176\(%rsp\), %r23 +** movq 184\(%rsp\), %r24 +** movq 192\(%rsp\), %r25 +** movq 200\(%rsp\), %r26 +** movq 208\(%rsp\), %r27 +** movq 216\(%rsp\), %r28 +** movq 224\(%rsp\), %r29 +** movq 232\(%rsp\), %r30 +** movq 240\(%rsp\), %r31 +** addq \$248, %rsp +**... +** ret +** .cfi_endproc +**... +*/ + +#define DONT_SAVE_REGS __attribute__((no_callee_saved_registers)) +#define SAVE_REGS __attribute__((no_caller_saved_registers)) + +typedef DONT_SAVE_REGS void (*op_t)(void); + +extern op_t code[]; + +SAVE_REGS void start() +{ + code[0](); +} diff --git a/gcc/testsuite/gcc.target/i386/pr119784b.c b/gcc/testsuite/gcc.target/i386/pr119784b.c new file mode 100644 index 0000000..c676197 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr119784b.c @@ -0,0 +1,87 @@ +/* { dg-do compile { target { *-*-linux* && x32 } } } */ +/* { dg-options "-O2 -fno-pic -mtune=generic -mgeneral-regs-only -mapxf -mtune-ctrl=prologue_using_move,epilogue_using_move" } */ +/* Keep labels and directives ('.cfi_startproc', '.cfi_endproc'). */ +/* { dg-final { check-function-bodies "**" "" "" { target "*-*-*" } {^\t?\.} } } */ + +/* start must save and restore all caller saved registers. */ + +/* +**start: +**.LFB[0-9]+: +** .cfi_startproc +** subl \$248, %esp +**... +** movq %rax, \(%rsp\) +** movq %rdx, 8\(%rsp\) +** movq %rcx, 16\(%rsp\) +** movq %rbx, 24\(%rsp\) +** movq %rsi, 32\(%rsp\) +** movq %rdi, 40\(%rsp\) +**... +** movq %rbp, 48\(%rsp\) +** movq %r8, 56\(%rsp\) +** movq %r9, 64\(%rsp\) +** movq %r10, 72\(%rsp\) +** movq %r11, 80\(%rsp\) +** movq %r12, 88\(%rsp\) +** movq %r13, 96\(%rsp\) +** movq %r14, 104\(%rsp\) +** movq %r15, 112\(%rsp\) +** movq %r16, 120\(%rsp\) +** movq %r17, 128\(%rsp\) +** movq %r18, 136\(%rsp\) +** movq %r19, 144\(%rsp\) +** movq %r20, 152\(%rsp\) +** movq %r21, 160\(%rsp\) +** movq %r22, 168\(%rsp\) +** movq %r23, 176\(%rsp\) +** movq %r24, 184\(%rsp\) +** movq %r25, 192\(%rsp\) +** movq %r26, 200\(%rsp\) +** movq %r27, 208\(%rsp\) +** movq %r28, 216\(%rsp\) +** movq %r29, 224\(%rsp\) +** movq %r30, 232\(%rsp\) +** movq %r31, 240\(%rsp\) +**... +** movl code\(%rip\), %ebp +** call \*%rbp +** movq \(%rsp\), %rax +** movq 8\(%rsp\), %rdx +** movq 16\(%rsp\), %rcx +** movq 24\(%rsp\), %rbx +** movq 32\(%rsp\), %rsi +** movq 40\(%rsp\), %rdi +** movq 48\(%rsp\), %rbp +** movq 56\(%rsp\), %r8 +** movq 64\(%rsp\), %r9 +** movq 72\(%rsp\), %r10 +** movq 80\(%rsp\), %r11 +** movq 88\(%rsp\), %r12 +** movq 96\(%rsp\), %r13 +** movq 104\(%rsp\), %r14 +** movq 112\(%rsp\), %r15 +** movq 120\(%rsp\), %r16 +** movq 128\(%rsp\), %r17 +** movq 136\(%rsp\), %r18 +** movq 144\(%rsp\), %r19 +** movq 152\(%rsp\), %r20 +** movq 160\(%rsp\), %r21 +** movq 168\(%rsp\), %r22 +** movq 176\(%rsp\), %r23 +** movq 184\(%rsp\), %r24 +** movq 192\(%rsp\), %r25 +** movq 200\(%rsp\), %r26 +** movq 208\(%rsp\), %r27 +** movq 216\(%rsp\), %r28 +** movq 224\(%rsp\), %r29 +** movq 232\(%rsp\), %r30 +** movq 240\(%rsp\), %r31 +** addl \$248, %esp +**... +** ret +** .cfi_endproc +**... +*/ + +#include "pr119784a.c" diff --git a/gcc/testsuite/gcc.target/i386/pr119919.c b/gcc/testsuite/gcc.target/i386/pr119919.c new file mode 100644 index 0000000..ed64656 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr119919.c @@ -0,0 +1,13 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -msse2 -fdump-tree-vect-details" } */ +int a[9*9]; +bool b[9]; +void test() +{ + for (int i = 0; i < 9; i++) + { + b[i] = a[i*9] != 0; + } +} + +/* { dg-final { scan-tree-dump "loop vectorized using 8 byte vectors" "vect" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr89618-2.c b/gcc/testsuite/gcc.target/i386/pr89618-2.c index c414053..11d658f 100644 --- a/gcc/testsuite/gcc.target/i386/pr89618-2.c +++ b/gcc/testsuite/gcc.target/i386/pr89618-2.c @@ -19,5 +19,9 @@ void foo (int n, int *off, double *a) } /* Make sure the cost model selects SSE vectors rather than AVX to avoid - too many scalar ops for the address computes in the loop. */ -/* { dg-final { scan-tree-dump "loop vectorized using 16 byte vectors" "vect" { target { ! ia32 } } } } */ + too many scalar ops for the address computes in the loop. + + Since open-coded scatters are costed wrong, we no longer vectorize after fixing + COND_EXPR costs. See PR119902. */ +/* { dg-final { scan-tree-dump "loop vectorized using 16 byte vectors" "vect" { target { ! ia32 } xfail *-*-* } } } */ +/* { dg-final { scan-tree-dump-not "loop vectorized using 32 byte vectors" "vect" { target { ! ia32 } } } } */ diff --git a/gcc/testsuite/gcc.target/i386/recip-vec-divf-fma.c b/gcc/testsuite/gcc.target/i386/recip-vec-divf-fma.c new file mode 100644 index 0000000..ad9e07b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/recip-vec-divf-fma.c @@ -0,0 +1,12 @@ +/* { dg-do compile } */ +/* { dg-options "-Ofast -mfma -mavx2" } */ +/* { dg-final { scan-assembler-times {(?n)vfn?m(add|sub)[1-3]*ps} 2 } } */ + +typedef float v4sf __attribute__((vector_size(16))); +/* (a - (rcp(b) * a * b)) * rcp(b) + rcp(b) * a */ + +v4sf +foo (v4sf a, v4sf b) +{ + return a / b; +} |