diff options
Diffstat (limited to 'gcc/testsuite/gcc.target/i386')
251 files changed, 624 insertions, 3095 deletions
diff --git a/gcc/testsuite/gcc.target/i386/addr-space-1.c b/gcc/testsuite/gcc.target/i386/addr-space-1.c index 1e13147..9a5ce9c 100644 --- a/gcc/testsuite/gcc.target/i386/addr-space-1.c +++ b/gcc/testsuite/gcc.target/i386/addr-space-1.c @@ -1,4 +1,4 @@ -/* { dg-do compile */ +/* { dg-do compile } */ /* { dg-options "-O2" } */ /* { dg-final { scan-assembler "movl\[ \t\]%gs:\\((%eax|%rax)\\), %eax" } } */ diff --git a/gcc/testsuite/gcc.target/i386/avx-1.c b/gcc/testsuite/gcc.target/i386/avx-1.c index dda40af0..444a25e 100644 --- a/gcc/testsuite/gcc.target/i386/avx-1.c +++ b/gcc/testsuite/gcc.target/i386/avx-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O2 -Werror-implicit-function-declaration -march=k8 -m3dnow -mavx -mavx2 -maes -mpclmul -mgfni -mprefetchi -mavx10.2-512 -mmovrs" } */ +/* { dg-options "-O2 -Werror-implicit-function-declaration -march=k8 -m3dnow -mavx -mavx2 -maes -mpclmul -mgfni -mprefetchi -mavx10.2 -mmovrs" } */ /* { dg-add-options bind_pic_locally } */ #include <mm_malloc.h> @@ -842,166 +842,6 @@ /* sm3intrin.h */ #define __builtin_ia32_vsm3rnds2(A, B, C, D) __builtin_ia32_vsm3rnds2 (A, B, C, 1) -/* avx10_2roundingintrin.h */ -#define __builtin_ia32_addpd256_mask_round(A, B, C, D, E) __builtin_ia32_addpd256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_addph256_mask_round(A, B, C, D, E) __builtin_ia32_addph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_addps256_mask_round(A, B, C, D, E) __builtin_ia32_addps256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_cmppd256_mask_round(A, B, C, D, E) __builtin_ia32_cmppd256_mask_round(A, B, 1, D, 8) -#define __builtin_ia32_cmpph256_mask_round(A, B, C, D, E) __builtin_ia32_cmpph256_mask_round(A, B, 1, D, 8) -#define __builtin_ia32_cmpps256_mask_round(A, B, C, D, E) __builtin_ia32_cmpps256_mask_round(A, B, 1, D, 8) -#define __builtin_ia32_vcvtdq2ph256_mask_round(A, B, C, D) __builtin_ia32_vcvtdq2ph256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtdq2ps256_mask_round(A, B, C, D) __builtin_ia32_cvtdq2ps256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtpd2ph256_mask_round(A, B, C, D) __builtin_ia32_vcvtpd2ph256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtpd2ps256_mask_round(A, B, C, D) __builtin_ia32_cvtpd2ps256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtpd2dq256_mask_round(A, B, C, D) __builtin_ia32_cvtpd2dq256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtpd2qq256_mask_round(A, B, C, D) __builtin_ia32_cvtpd2qq256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtpd2udq256_mask_round(A, B, C, D) __builtin_ia32_cvtpd2udq256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtpd2uqq256_mask_round(A, B, C, D) __builtin_ia32_cvtpd2uqq256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtph2dq256_mask_round(A, B, C, D) __builtin_ia32_vcvtph2dq256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtph2pd256_mask_round(A, B, C, D) __builtin_ia32_vcvtph2pd256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtph2ps256_mask_round(A, B, C, D) __builtin_ia32_vcvtph2ps256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtph2psx256_mask_round(A, B, C, D) __builtin_ia32_vcvtph2psx256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtph2qq256_mask_round(A, B, C, D) __builtin_ia32_vcvtph2qq256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtph2udq256_mask_round(A, B, C, D) __builtin_ia32_vcvtph2udq256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtph2uqq256_mask_round(A, B, C, D) __builtin_ia32_vcvtph2uqq256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtph2uw256_mask_round(A, B, C, D) __builtin_ia32_vcvtph2uw256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtph2w256_mask_round(A, B, C, D) __builtin_ia32_vcvtph2w256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtps2pd256_mask_round(A, B, C, D) __builtin_ia32_vcvtps2pd256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtps2phx256_mask_round(A, B, C, D) __builtin_ia32_vcvtps2phx256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtps2dq256_mask_round(A, B, C, D) __builtin_ia32_vcvtps2dq256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtps2qq256_mask_round(A, B, C, D) __builtin_ia32_cvtps2qq256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtps2udq256_mask_round(A, B, C, D) __builtin_ia32_cvtps2udq256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtps2uqq256_mask_round(A, B, C, D) __builtin_ia32_cvtps2uqq256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtqq2pd256_mask_round(A, B, C, D) __builtin_ia32_cvtqq2pd256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtqq2ph256_mask_round(A, B, C, D) __builtin_ia32_vcvtqq2ph256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtqq2ps256_mask_round(A, B, C, D) __builtin_ia32_cvtqq2ps256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttpd2dq256_mask_round(A, B, C, D) __builtin_ia32_cvttpd2dq256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttpd2qq256_mask_round(A, B, C, D) __builtin_ia32_cvttpd2qq256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttpd2udq256_mask_round(A, B, C, D) __builtin_ia32_cvttpd2udq256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttpd2uqq256_mask_round(A, B, C, D) __builtin_ia32_cvttpd2uqq256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvttph2dq256_mask_round(A, B, C, D) __builtin_ia32_vcvttph2dq256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvttph2qq256_mask_round(A, B, C, D) __builtin_ia32_vcvttph2qq256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvttph2uqq256_mask_round(A, B, C, D) __builtin_ia32_vcvttph2uqq256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvttph2udq256_mask_round(A, B, C, D) __builtin_ia32_vcvttph2udq256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvttph2uw256_mask_round(A, B, C, D) __builtin_ia32_vcvttph2uw256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvttph2w256_mask_round(A, B, C, D) __builtin_ia32_vcvttph2w256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttps2dq256_mask_round(A, B, C, D) __builtin_ia32_cvttps2dq256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttps2qq256_mask_round(A, B, C, D) __builtin_ia32_cvttps2qq256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttps2udq256_mask_round(A, B, C, D) __builtin_ia32_cvttps2udq256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttps2uqq256_mask_round(A, B, C, D) __builtin_ia32_cvttps2uqq256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtudq2ph256_mask_round(A, B, C, D) __builtin_ia32_vcvtudq2ph256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtudq2ps256_mask_round(A, B, C, D) __builtin_ia32_cvtudq2ps256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtuqq2pd256_mask_round(A, B, C, D) __builtin_ia32_cvtuqq2pd256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtuqq2ph256_mask_round(A, B, C, D) __builtin_ia32_vcvtuqq2ph256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtuqq2ps256_mask_round(A, B, C, D) __builtin_ia32_cvtuqq2ps256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtuw2ph256_mask_round(A, B, C, D) __builtin_ia32_vcvtuw2ph256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtw2ph256_mask_round(A, B, C, D) __builtin_ia32_vcvtw2ph256_mask_round(A, B, C, 8) -#define __builtin_ia32_divpd256_mask_round(A, B, C, D, E) __builtin_ia32_divpd256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_divph256_mask_round(A, B, C, D, E) __builtin_ia32_divph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_divps256_mask_round(A, B, C, D, E) __builtin_ia32_divps256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfcmaddcph256_round(A, B, C, D) __builtin_ia32_vfcmaddcph256_round(A, B, C, 8) -#define __builtin_ia32_vfcmaddcph256_mask_round(A, C, D, B, E) __builtin_ia32_vfcmaddcph256_mask_round(A, C, D, B, 8) -#define __builtin_ia32_vfcmaddcph256_mask3_round(A, C, D, B, E) __builtin_ia32_vfcmaddcph256_mask3_round(A, C, D, B, 8) -#define __builtin_ia32_vfcmaddcph256_maskz_round(B, C, D, A, E) __builtin_ia32_vfcmaddcph256_maskz_round(B, C, D, A, 8) -#define __builtin_ia32_vfcmulcph256_round(A, B, C) __builtin_ia32_vfcmulcph256_round(A, B, 8) -#define __builtin_ia32_vfcmulcph256_mask_round(A, B, C, D, E) __builtin_ia32_vfcmulcph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_fixupimmpd256_mask_round(A, B, C, I, E, F) __builtin_ia32_fixupimmpd256_mask_round(A, B, C, 1, E, 8) -#define __builtin_ia32_fixupimmpd256_maskz_round(A, B, C, I, E, F) __builtin_ia32_fixupimmpd256_maskz_round(A, B, C, 1, E, 8) -#define __builtin_ia32_fixupimmps256_mask_round(A, B, C, I, E, F) __builtin_ia32_fixupimmps256_mask_round(A, B, C, 1, E, 8) -#define __builtin_ia32_fixupimmps256_maskz_round(A, B, C, I, E, F) __builtin_ia32_fixupimmps256_maskz_round(A, B, C, 1, E, 8) -#define __builtin_ia32_vfmaddpd256_mask_round(A, B, C, D, E) __builtin_ia32_vfmaddpd256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddpd256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmaddpd256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddpd256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmaddpd256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddph256_mask_round(A, B, C, D, E) __builtin_ia32_vfmaddph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddph256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmaddph256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddph256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmaddph256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddps256_mask_round(A, B, C, D, E) __builtin_ia32_vfmaddps256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddps256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmaddps256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddps256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmaddps256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddcph256_round(A, B, C, D) __builtin_ia32_vfmaddcph256_round(A, B, C, 8) -#define __builtin_ia32_vfmaddcph256_mask_round(A, C, D, B, E) __builtin_ia32_vfmaddcph256_mask_round(A, C, D, B, 8) -#define __builtin_ia32_vfmaddcph256_mask3_round(A, C, D, B, E) __builtin_ia32_vfmaddcph256_mask3_round(A, C, D, B, 8) -#define __builtin_ia32_vfmaddcph256_maskz_round(B, C, D, A, E) __builtin_ia32_vfmaddcph256_maskz_round(B, C, D, A, 8) -#define __builtin_ia32_vfmaddsubpd256_mask_round(A, B, C, D, E) __builtin_ia32_vfmaddsubpd256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddsubpd256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmaddsubpd256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddsubpd256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmaddsubpd256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddsubph256_mask_round(A, B, C, D, E) __builtin_ia32_vfmaddsubph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddsubph256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmaddsubph256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddsubph256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmaddsubph256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddsubps256_mask_round(A, B, C, D, E) __builtin_ia32_vfmaddsubps256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddsubps256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmaddsubps256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddsubps256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmaddsubps256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubpd256_mask_round(A, B, C, D, E) __builtin_ia32_vfmsubpd256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubpd256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmsubpd256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubpd256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmsubpd256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubph256_mask_round(A, B, C, D, E) __builtin_ia32_vfmsubph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubph256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmsubph256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubph256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmsubph256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubps256_mask_round(A, B, C, D, E) __builtin_ia32_vfmsubps256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubps256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmsubps256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubps256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmsubps256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubaddpd256_mask_round(A, B, C, D, E) __builtin_ia32_vfmsubaddpd256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubaddpd256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmsubaddpd256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubaddpd256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmsubaddpd256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubaddph256_mask_round(A, B, C, D, E) __builtin_ia32_vfmsubaddph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubaddph256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmsubaddph256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubaddph256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmsubaddph256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubaddps256_mask_round(A, B, C, D, E) __builtin_ia32_vfmsubaddps256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubaddps256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmsubaddps256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubaddps256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmsubaddps256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfmulcph256_round(A, B, C) __builtin_ia32_vfmulcph256_round(A, B, 8) -#define __builtin_ia32_vfmulcph256_mask_round(A, B, C, D, E) __builtin_ia32_vfmulcph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmaddpd256_mask_round(A, B, C, D, E) __builtin_ia32_vfnmaddpd256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmaddpd256_mask3_round(A, B, C, D, E) __builtin_ia32_vfnmaddpd256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmaddpd256_maskz_round(A, B, C, D, E) __builtin_ia32_vfnmaddpd256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmaddph256_mask_round(A, B, C, D, E) __builtin_ia32_vfnmaddph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmaddph256_mask3_round(A, B, C, D, E) __builtin_ia32_vfnmaddph256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmaddph256_maskz_round(A, B, C, D, E) __builtin_ia32_vfnmaddph256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmaddps256_mask_round(A, B, C, D, E) __builtin_ia32_vfnmaddps256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmaddps256_mask3_round(A, B, C, D, E) __builtin_ia32_vfnmaddps256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmaddps256_maskz_round(A, B, C, D, E) __builtin_ia32_vfnmaddps256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmsubpd256_mask_round(A, B, C, D, E) __builtin_ia32_vfnmsubpd256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmsubpd256_mask3_round(A, B, C, D, E) __builtin_ia32_vfnmsubpd256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmsubpd256_maskz_round(A, B, C, D, E) __builtin_ia32_vfnmsubpd256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmsubph256_mask_round(A, B, C, D, E) __builtin_ia32_vfnmsubph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmsubph256_mask3_round(A, B, C, D, E) __builtin_ia32_vfnmsubph256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmsubph256_maskz_round(A, B, C, D, E) __builtin_ia32_vfnmsubph256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmsubps256_mask_round(A, B, C, D, E) __builtin_ia32_vfnmsubps256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmsubps256_mask3_round(A, B, C, D, E) __builtin_ia32_vfnmsubps256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmsubps256_maskz_round(A, B, C, D, E) __builtin_ia32_vfnmsubps256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_getexppd256_mask_round(A, B, C, D) __builtin_ia32_getexppd256_mask_round(A, B, C, 8) -#define __builtin_ia32_getexpph256_mask_round(A, B, C, D) __builtin_ia32_getexpph256_mask_round(A, B, C, 8) -#define __builtin_ia32_getexpps256_mask_round(A, B, C, D) __builtin_ia32_getexpps256_mask_round(A, B, C, 8) -#define __builtin_ia32_getmantpd256_mask_round(A, F, C, D, E) __builtin_ia32_getmantpd256_mask_round(A, 1, C, D, 8) -#define __builtin_ia32_getmantph256_mask_round(A, F, C, D, E) __builtin_ia32_getmantph256_mask_round(A, 1, C, D, 8) -#define __builtin_ia32_getmantps256_mask_round(A, F, C, D, E) __builtin_ia32_getmantps256_mask_round(A, 1, C, D, 8) -#define __builtin_ia32_maxpd256_mask_round(A, B, C, D, E) __builtin_ia32_maxpd256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_maxph256_mask_round(A, B, C, D, E) __builtin_ia32_maxph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_maxps256_mask_round(A, B, C, D, E) __builtin_ia32_maxps256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_minpd256_mask_round(A, B, C, D, E) __builtin_ia32_minpd256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_minph256_mask_round(A, B, C, D, E) __builtin_ia32_minph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_minps256_mask_round(A, B, C, D, E) __builtin_ia32_minps256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_mulpd256_mask_round(A, B, C, D, E) __builtin_ia32_mulpd256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_mulph256_mask_round(A, B, C, D, E) __builtin_ia32_mulph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_mulps256_mask_round(A, B, C, D, E) __builtin_ia32_mulps256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_rangeps256_mask_round(A, B, I, D, E, F) __builtin_ia32_rangeps256_mask_round(A, B, 1, D, E, 8) -#define __builtin_ia32_rangepd256_mask_round(A, B, I, D, E, F) __builtin_ia32_rangepd256_mask_round(A, B, 1, D, E, 8) -#define __builtin_ia32_reducepd256_mask_round(A, B, C, D, E) __builtin_ia32_reducepd256_mask_round(A, 8, C, D, 8) -#define __builtin_ia32_reduceph256_mask_round(A, B, C, D, E) __builtin_ia32_reduceph256_mask_round(A, 8, C, D, 8) -#define __builtin_ia32_reduceps256_mask_round(A, B, C, D, E) __builtin_ia32_reduceps256_mask_round(A, 8, C, D, 8) -#define __builtin_ia32_rndscalepd256_mask_round(A, B, C, D, E) __builtin_ia32_rndscalepd256_mask_round(A, 1, C, D, 8) -#define __builtin_ia32_rndscaleph256_mask_round(A, B, C, D, E) __builtin_ia32_rndscaleph256_mask_round(A, 1, C, D, 8) -#define __builtin_ia32_rndscaleps256_mask_round(A, B, C, D, E) __builtin_ia32_rndscaleps256_mask_round(A, 1, C, D, 8) -#define __builtin_ia32_scalefpd256_mask_round(A, B, C, D, E) __builtin_ia32_scalefpd256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_scalefph256_mask_round(A, B, C, D, E) __builtin_ia32_scalefph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_scalefps256_mask_round(A, B, C, D, E) __builtin_ia32_scalefps256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_sqrtpd256_mask_round(A, B, C, D) __builtin_ia32_sqrtpd256_mask_round(A, B, C, 8) -#define __builtin_ia32_sqrtph256_mask_round(A, B, C, D) __builtin_ia32_sqrtph256_mask_round(A, B, C, 8) -#define __builtin_ia32_sqrtps256_mask_round(A, B, C, D) __builtin_ia32_sqrtps256_mask_round(A, B, C, 8) -#define __builtin_ia32_subpd256_mask_round(A, B, C, D, E) __builtin_ia32_subpd256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_subph256_mask_round(A, B, C, D, E) __builtin_ia32_subph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_subps256_mask_round(A, B, C, D, E) __builtin_ia32_subps256_mask_round(A, B, C, D, 8) - /* avx10_2-512mediaintrin.h */ #define __builtin_ia32_mpsadbw512(A, B, C) __builtin_ia32_mpsadbw512 (A, B, 1) #define __builtin_ia32_mpsadbw512_mask(A, B, C, D, E) __builtin_ia32_mpsadbw512_mask (A, B, 1, D, E) @@ -1010,9 +850,6 @@ #define __builtin_ia32_mpsadbw128_mask(A, B, C, D, E) __builtin_ia32_mpsadbw128_mask (A, B, 1, D, E) #define __builtin_ia32_mpsadbw256_mask(A, B, C, D, E) __builtin_ia32_mpsadbw256_mask (A, B, 1, D, E) -/* avx10_2convertintrin.h */ -#define __builtin_ia32_vcvt2ps2phx256_mask_round(A, B, C, D, E) __builtin_ia32_vcvt2ps2phx256_mask_round(A, B, C, D, 8) - /* avx10_2-512convertintrin.h */ #define __builtin_ia32_vcvt2ps2phx512_mask_round(A, B, C, D, E) __builtin_ia32_vcvt2ps2phx512_mask_round(A, B, C, D, 8) @@ -1054,22 +891,6 @@ #define __builtin_ia32_cvttps2uqqs512_mask_round(A, B, C, D) __builtin_ia32_cvttps2uqqs512_mask_round(A, B, C, 8) /* avx10_2satcvtintrin.h */ -#define __builtin_ia32_cvtph2ibs256_mask_round(A, B, C, D) __builtin_ia32_cvtph2ibs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtph2iubs256_mask_round(A, B, C, D) __builtin_ia32_cvtph2iubs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtps2ibs256_mask_round(A, B, C, D) __builtin_ia32_cvtps2ibs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtps2iubs256_mask_round(A, B, C, D) __builtin_ia32_cvtps2iubs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttph2ibs256_mask_round(A, B, C, D) __builtin_ia32_cvttph2ibs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttph2iubs256_mask_round(A, B, C, D) __builtin_ia32_cvttph2iubs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttps2ibs256_mask_round(A, B, C, D) __builtin_ia32_cvttps2ibs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttps2iubs256_mask_round(A, B, C, D) __builtin_ia32_cvttps2iubs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttpd2dqs256_mask_round(A, B, C, D) __builtin_ia32_cvttpd2dqs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttpd2qqs256_mask_round(A, B, C, D) __builtin_ia32_cvttpd2qqs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttpd2udqs256_mask_round(A, B, C, D) __builtin_ia32_cvttpd2udqs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttpd2uqqs256_mask_round(A, B, C, D) __builtin_ia32_cvttpd2uqqs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttps2dqs256_mask_round(A, B, C, D) __builtin_ia32_cvttps2dqs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttps2qqs256_mask_round(A, B, C, D) __builtin_ia32_cvttps2qqs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttps2udqs256_mask_round(A, B, C, D) __builtin_ia32_cvttps2udqs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttps2uqqs256_mask_round(A, B, C, D) __builtin_ia32_cvttps2uqqs256_mask_round(A, B, C, 8) #define __builtin_ia32_cvttsd2sis32_round(A, B) __builtin_ia32_cvttsd2sis32_round(A, 8) #define __builtin_ia32_cvttsd2usis32_round(A, B) __builtin_ia32_cvttsd2usis32_round(A, 8) #define __builtin_ia32_cvttss2sis32_round(A, B) __builtin_ia32_cvttss2sis32_round(A, 8) @@ -1094,11 +915,11 @@ #define __builtin_ia32_minmaxbf16128_mask(A, B, C, D, E) __builtin_ia32_minmaxbf16128_mask (A, B, 4, D, E) #define __builtin_ia32_minmaxbf16256_mask(A, B, C, D, E) __builtin_ia32_minmaxbf16256_mask (A, B, 4, D, E) #define __builtin_ia32_minmaxpd128_mask(A, B, C, D, E) __builtin_ia32_minmaxpd128_mask (A, B, 4, D, E) -#define __builtin_ia32_minmaxpd256_mask_round(A, B, C, D, E, F) __builtin_ia32_minmaxpd256_mask_round (A, B, 4, D, E, 4) +#define __builtin_ia32_minmaxpd256_mask(A, B, C, D, E) __builtin_ia32_minmaxpd256_mask (A, B, 4, D, E) #define __builtin_ia32_minmaxph128_mask(A, B, C, D, E) __builtin_ia32_minmaxph128_mask (A, B, 4, D, E) -#define __builtin_ia32_minmaxph256_mask_round(A, B, C, D, E, F) __builtin_ia32_minmaxph256_mask_round (A, B, 4, D, E, 4) +#define __builtin_ia32_minmaxph256_mask(A, B, C, D, E) __builtin_ia32_minmaxph256_mask (A, B, 4, D, E) #define __builtin_ia32_minmaxps128_mask(A, B, C, D, E) __builtin_ia32_minmaxps128_mask (A, B, 4, D, E) -#define __builtin_ia32_minmaxps256_mask_round(A, B, C, D, E, F) __builtin_ia32_minmaxps256_mask_round (A, B, 4, D, E, 4) +#define __builtin_ia32_minmaxps256_mask(A, B, C, D, E) __builtin_ia32_minmaxps256_mask (A, B, 4, D, E) #include <wmmintrin.h> #include <immintrin.h> diff --git a/gcc/testsuite/gcc.target/i386/avx10-check.h b/gcc/testsuite/gcc.target/i386/avx10-check.h index e847dc3..7d4326d 100644 --- a/gcc/testsuite/gcc.target/i386/avx10-check.h +++ b/gcc/testsuite/gcc.target/i386/avx10-check.h @@ -38,12 +38,9 @@ int main () { /* Run AVX10 test only if host has ISA support. */ - if (__builtin_cpu_supports ("avx10.1-256") + if (__builtin_cpu_supports ("avx10.1") #ifdef AVX10_2 - && __builtin_cpu_supports ("avx10.2-256") -#endif -#ifdef AVX10_2_512 - && __builtin_cpu_supports ("avx10.2-512") + && __builtin_cpu_supports ("avx10.2") #endif && avx10_os_support ()) { diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-1.c b/gcc/testsuite/gcc.target/i386/avx10_1-1.c index 33ce99e..bd3249e 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_1-1.c +++ b/gcc/testsuite/gcc.target/i386/avx10_1-1.c @@ -1,5 +1,6 @@ /* { dg-do compile { target { ! ia32 } } } */ -/* { dg-options "-O2 -march=x86-64 -mavx10.1-256" } */ +/* { dg-options "-O2 -march=x86-64 -mavx10.1" } */ +/* { dg-warning "'-mavx10.1' is aliased to 512 bit since GCC14.3 and GCC15.1 while '-mavx10.1-256' and '-mavx10.1-512' will be deprecated in GCC 16 due to all machines 512 bit vector size supported" "" { target *-*-* } 0 } */ #include <immintrin.h> diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-10.c b/gcc/testsuite/gcc.target/i386/avx10_1-10.c index 0db5240..dba2a4e 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_1-10.c +++ b/gcc/testsuite/gcc.target/i386/avx10_1-10.c @@ -1,6 +1,8 @@ /* { dg-do compile } */ -/* { dg-options "-march=x86-64 -mavx10.1-512 -mavx512f -mno-evex512" } */ +/* { dg-options "-march=x86-64 -mavx10.1 -mavx512f -mno-evex512" } */ /* { dg-warning "'-mno-evex512' or '-mno-avx512XXX' cannot disable AVX10 instructions when AVX10.1-512 is available" "" { target *-*-* } 0 } */ +/* { dg-warning "'-mavx10.1' is aliased to 512 bit since GCC14.3 and GCC15.1 while '-mavx10.1-256' and '-mavx10.1-512' will be deprecated in GCC 16 due to all machines 512 bit vector size supported" "" { target *-*-* } 0 } */ +/* { dg-warning "'-mevex512' will be deprecated in GCC 16 due to all machines 512 bit vector size supported" "" { target *-*-* } 0 } */ /* { dg-final { scan-assembler "%zmm" } } */ #include "avx10_1-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-11.c b/gcc/testsuite/gcc.target/i386/avx10_1-11.c index c0ad4fc..608817a 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_1-11.c +++ b/gcc/testsuite/gcc.target/i386/avx10_1-11.c @@ -1,6 +1,7 @@ /* { dg-do compile } */ -/* { dg-options "-march=x86-64 -mavx10.1-512 -mno-avx512f" } */ +/* { dg-options "-march=x86-64 -mavx10.1 -mno-avx512f" } */ /* { dg-warning "'-mno-evex512' or '-mno-avx512XXX' cannot disable AVX10 instructions when AVX10.1-512 is available" "" { target *-*-* } 0 } */ +/* { dg-warning "'-mavx10.1' is aliased to 512 bit since GCC14.3 and GCC15.1 while '-mavx10.1-256' and '-mavx10.1-512' will be deprecated in GCC 16 due to all machines 512 bit vector size supported" "" { target *-*-* } 0 } */ /* { dg-final { scan-assembler "%zmm" } } */ #include "avx10_1-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-12.c b/gcc/testsuite/gcc.target/i386/avx10_1-12.c index ae1c77b..1650f26 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_1-12.c +++ b/gcc/testsuite/gcc.target/i386/avx10_1-12.c @@ -1,6 +1,7 @@ /* { dg-do compile } */ /* { dg-options "-march=x86-64 -mno-avx10.1-512 -mavx512f" } */ /* { dg-warning "'-mno-avx10.1-256, -mno-avx10.1-512' cannot disable AVX512 instructions when '-mavx512XXX'" "" { target *-*-* } 0 } */ +/* { dg-warning "'-mavx10.1' is aliased to 512 bit since GCC14.3 and GCC15.1 while '-mavx10.1-256' and '-mavx10.1-512' will be deprecated in GCC 16 due to all machines 512 bit vector size supported" "" { target *-*-* } 0 } */ /* { dg-final { scan-assembler "%zmm" } } */ #include "avx10_1-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-13.c b/gcc/testsuite/gcc.target/i386/avx10_1-13.c index e94ac8e..a864e96 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_1-13.c +++ b/gcc/testsuite/gcc.target/i386/avx10_1-13.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-march=x86-64 -mavx10.1-256" } */ +/* { dg-warning "'-mavx10.1' is aliased to 512 bit since GCC14.3 and GCC15.1 while '-mavx10.1-256' and '-mavx10.1-512' will be deprecated in GCC 16 due to all machines 512 bit vector size supported" "" { target *-*-* } 0 } */ /* { dg-final { scan-assembler "%zmm" } } */ typedef double __m512d __attribute__ ((__vector_size__ (64), __may_alias__)); diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-15.c b/gcc/testsuite/gcc.target/i386/avx10_1-15.c index d1731f0..b227cf3 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_1-15.c +++ b/gcc/testsuite/gcc.target/i386/avx10_1-15.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ -/* { dg-options "-march=x86-64 -mavx10.1-512" } */ +/* { dg-options "-march=x86-64 -mavx10.1" } */ +/* { dg-warning "'-mavx10.1' is aliased to 512 bit since GCC14.3 and GCC15.1 while '-mavx10.1-256' and '-mavx10.1-512' will be deprecated in GCC 16 due to all machines 512 bit vector size supported" "" { target *-*-* } 0 } */ /* { dg-final { scan-assembler "%zmm" } } */ typedef double __m512d __attribute__ ((__vector_size__ (64), __may_alias__)); diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-16.c b/gcc/testsuite/gcc.target/i386/avx10_1-16.c index f5f3ff8..b3fdb3f 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_1-16.c +++ b/gcc/testsuite/gcc.target/i386/avx10_1-16.c @@ -1,10 +1,11 @@ /* { dg-do compile } */ /* { dg-options "-march=x86-64 -mavx512f -mno-evex512" } */ +/* { dg-warning "'-mevex512' will be deprecated in GCC 16 due to all machines 512 bit vector size supported" "" { target *-*-* } 0 } */ /* { dg-final { scan-assembler "%zmm" } } */ typedef double __m512d __attribute__ ((__vector_size__ (64), __may_alias__)); -__attribute__ ((target ("avx10.1-512"))) __m512d +__attribute__ ((target ("avx10.1"))) __m512d foo () { /* { dg-warning "'-mno-evex512' or '-mno-avx512XXX' cannot disable AVX10 instructions when AVX10.1-512 is available" } */ __m512d a, b; diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-18.c b/gcc/testsuite/gcc.target/i386/avx10_1-18.c index c50fd2b..c1edce8 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_1-18.c +++ b/gcc/testsuite/gcc.target/i386/avx10_1-18.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ -/* { dg-options "-march=x86-64 -mavx10.1-512" } */ +/* { dg-options "-march=x86-64 -mavx10.1" } */ +/* { dg-warning "'-mavx10.1' is aliased to 512 bit since GCC14.3 and GCC15.1 while '-mavx10.1-256' and '-mavx10.1-512' will be deprecated in GCC 16 due to all machines 512 bit vector size supported" "" { target *-*-* } 0 } */ /* { dg-final { scan-assembler "%zmm" } } */ typedef double __m512d __attribute__ ((__vector_size__ (64), __may_alias__)); diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-19.c b/gcc/testsuite/gcc.target/i386/avx10_1-19.c index 7445ecf..25b5887 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_1-19.c +++ b/gcc/testsuite/gcc.target/i386/avx10_1-19.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-march=x86-64 -mno-avx10.1-512" } */ +/* { dg-warning "'-mavx10.1' is aliased to 512 bit since GCC14.3 and GCC15.1 while '-mavx10.1-256' and '-mavx10.1-512' will be deprecated in GCC 16 due to all machines 512 bit vector size supported" "" { target *-*-* } 0 } */ /* { dg-final { scan-assembler "%zmm" } } */ typedef double __m512d __attribute__ ((__vector_size__ (64), __may_alias__)); diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-2.c b/gcc/testsuite/gcc.target/i386/avx10_1-2.c index 0b3991d..19962bc 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_1-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_1-2.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ -/* { dg-options "-march=x86-64 -mavx10.1-512" } */ +/* { dg-options "-march=x86-64 -mavx10.1" } */ +/* { dg-warning "'-mavx10.1' is aliased to 512 bit since GCC14.3 and GCC15.1 while '-mavx10.1-256' and '-mavx10.1-512' will be deprecated in GCC 16 due to all machines 512 bit vector size supported" "" { target *-*-* } 0 } */ /* { dg-final { scan-assembler "%zmm" } } */ typedef double __m512d __attribute__ ((__vector_size__ (64), __may_alias__)); diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-20.c b/gcc/testsuite/gcc.target/i386/avx10_1-20.c index d63c6b4..a223065 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_1-20.c +++ b/gcc/testsuite/gcc.target/i386/avx10_1-20.c @@ -4,7 +4,7 @@ typedef double __m512d __attribute__ ((__vector_size__ (64), __may_alias__)); -__attribute__ ((target ("avx10.1-512"))) __m512d +__attribute__ ((target ("avx10.1"))) __m512d foo () { /* { dg-warning "'-mno-evex512' or '-mno-avx512XXX' cannot disable AVX10 instructions when AVX10.1-512 is available" } */ __m512d a, b; diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-21.c b/gcc/testsuite/gcc.target/i386/avx10_1-21.c index 0a1fcc9..2ae437e 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_1-21.c +++ b/gcc/testsuite/gcc.target/i386/avx10_1-21.c @@ -1,6 +1,8 @@ /* { dg-do compile } */ /* { dg-options "-march=x86-64 -mavx10.1-256 -mevex512 -Wno-psabi" } */ /* { dg-warning "Using '-mevex512' without any AVX512 features enabled together with AVX10.1 only will not enable any AVX512 or AVX10.1-512 features, using 256 as max vector size" "" { target *-*-* } 0 } */ +/* { dg-warning "'-mavx10.1' is aliased to 512 bit since GCC14.3 and GCC15.1 while '-mavx10.1-256' and '-mavx10.1-512' will be deprecated in GCC 16 due to all machines 512 bit vector size supported" "" { target *-*-* } 0 } */ +/* { dg-warning "'-mevex512' will be deprecated in GCC 16 due to all machines 512 bit vector size supported" "" { target *-*-* } 0 } */ /* { dg-final { scan-assembler-not "%zmm" } } */ #include "avx10_1-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-22.c b/gcc/testsuite/gcc.target/i386/avx10_1-22.c index cb649dc..df7bffb 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_1-22.c +++ b/gcc/testsuite/gcc.target/i386/avx10_1-22.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-march=x86-64 -mavx10.1-256 -Wno-psabi" } */ +/* { dg-warning "'-mavx10.1' is aliased to 512 bit since GCC14.3 and GCC15.1 while '-mavx10.1-256' and '-mavx10.1-512' will be deprecated in GCC 16 due to all machines 512 bit vector size supported" "" { target *-*-* } 0 } */ /* { dg-final { scan-assembler-not "%zmm" } } */ typedef double __m512d __attribute__ ((__vector_size__ (64), __may_alias__)); diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-23.c b/gcc/testsuite/gcc.target/i386/avx10_1-23.c index f31c636..1f84584 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_1-23.c +++ b/gcc/testsuite/gcc.target/i386/avx10_1-23.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-march=x86-64 -mevex512 -Wno-psabi" } */ +/* { dg-warning "'-mevex512' will be deprecated in GCC 16 due to all machines 512 bit vector size supported" "" { target *-*-* } 0 } */ /* { dg-final { scan-assembler-not "%zmm" } } */ typedef double __m512d __attribute__ ((__vector_size__ (64), __may_alias__)); diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-24.c b/gcc/testsuite/gcc.target/i386/avx10_1-24.c deleted file mode 100644 index 1bba0fb..0000000 --- a/gcc/testsuite/gcc.target/i386/avx10_1-24.c +++ /dev/null @@ -1,7 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-O2 -march=x86-64 -mavx10.1-256" } */ -/* { dg-final { scan-assembler-not "%zmm" } } */ - -typedef float __m512 __attribute__ ((__vector_size__ (64), __may_alias__)); - -void __attribute__((target("avx10.1-256"))) callee256(__m512 *a, __m512 *b) { *a = *b; } diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-25.c b/gcc/testsuite/gcc.target/i386/avx10_1-25.c deleted file mode 100644 index fb378b9..0000000 --- a/gcc/testsuite/gcc.target/i386/avx10_1-25.c +++ /dev/null @@ -1,10 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-O2 -march=x86-64-v2 -mavx" } */ -/* { dg-require-ifunc "" } */ - -#include <immintrin.h> -__attribute__((target_clones ("default","avx10.1-256"))) -__m256d foo(__m256d a, __m256d b) -{ - return a + b; -} diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-26.c b/gcc/testsuite/gcc.target/i386/avx10_1-26.c index e54e2f5..d887404 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_1-26.c +++ b/gcc/testsuite/gcc.target/i386/avx10_1-26.c @@ -3,7 +3,7 @@ /* { dg-require-ifunc "" } */ #include <immintrin.h> -__attribute__((target_clones ("default","avx10.1-512"))) +__attribute__((target_clones ("default","avx10.1"))) __m512d foo(__m512d a, __m512d b) { return a + b; diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-3.c b/gcc/testsuite/gcc.target/i386/avx10_1-3.c index a176f27..992364a 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_1-3.c +++ b/gcc/testsuite/gcc.target/i386/avx10_1-3.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ -/* { dg-options "-O2 -march=x86-64 -mavx10.1-256" } */ +/* { dg-options "-O2 -march=x86-64 -mavx10.1" } */ +/* { dg-warning "'-mavx10.1' is aliased to 512 bit since GCC14.3 and GCC15.1 while '-mavx10.1-256' and '-mavx10.1-512' will be deprecated in GCC 16 due to all machines 512 bit vector size supported" "" { target *-*-* } 0 } */ #include <immintrin.h> diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-4.c b/gcc/testsuite/gcc.target/i386/avx10_1-4.c index 68cbf19..b3d2603 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_1-4.c +++ b/gcc/testsuite/gcc.target/i386/avx10_1-4.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ -/* { dg-options "-O2 -march=x86-64 -mavx10.1-512" } */ +/* { dg-options "-O2 -march=x86-64 -mavx10.1" } */ +/* { dg-warning "'-mavx10.1' is aliased to 512 bit since GCC14.3 and GCC15.1 while '-mavx10.1-256' and '-mavx10.1-512' will be deprecated in GCC 16 due to all machines 512 bit vector size supported" "" { target *-*-* } 0 } */ #include <immintrin.h> diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-5.c b/gcc/testsuite/gcc.target/i386/avx10_1-5.c deleted file mode 100644 index 3079cf1..0000000 --- a/gcc/testsuite/gcc.target/i386/avx10_1-5.c +++ /dev/null @@ -1,5 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-O0 -march=x86-64 -mavx10.1-256 -Wno-psabi" } */ -/* { dg-final { scan-assembler-not ".%zmm" } } */ - -#include "avx10_1-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-6.c b/gcc/testsuite/gcc.target/i386/avx10_1-6.c deleted file mode 100644 index 60dbd05..0000000 --- a/gcc/testsuite/gcc.target/i386/avx10_1-6.c +++ /dev/null @@ -1,13 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-O2 -march=x86-64 -mavx10.1-256" } */ - -#include <immintrin.h> - -long long -foo (long long c) -{ - register long long a __asm ("k7") = c; - long long b = foo (a); - asm volatile ("" : "+k" (b)); - return b; -} diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-7.c b/gcc/testsuite/gcc.target/i386/avx10_1-7.c index afce290..fb74ffb 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_1-7.c +++ b/gcc/testsuite/gcc.target/i386/avx10_1-7.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ -/* { dg-options "-march=x86-64 -mavx10.1-512 -mavx512f" } */ +/* { dg-options "-march=x86-64 -mavx10.1 -mavx512f" } */ +/* { dg-warning "'-mavx10.1' is aliased to 512 bit since GCC14.3 and GCC15.1 while '-mavx10.1-256' and '-mavx10.1-512' will be deprecated in GCC 16 due to all machines 512 bit vector size supported" "" { target *-*-* } 0 } */ /* { dg-final { scan-assembler "%zmm" } } */ #include "avx10_1-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-8.c b/gcc/testsuite/gcc.target/i386/avx10_1-8.c index ec930f7..dbb7d64 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_1-8.c +++ b/gcc/testsuite/gcc.target/i386/avx10_1-8.c @@ -1,4 +1,6 @@ /* { dg-do compile { target { ! ia32 } } } */ /* { dg-options "-march=x86-64 -mavx10.1-256 -mavx512f -mno-evex512" } */ +/* { dg-warning "'-mavx10.1' is aliased to 512 bit since GCC14.3 and GCC15.1 while '-mavx10.1-256' and '-mavx10.1-512' will be deprecated in GCC 16 due to all machines 512 bit vector size supported" "" { target *-*-* } 0 } */ +/* { dg-warning "'-mevex512' will be deprecated in GCC 16 due to all machines 512 bit vector size supported" "" { target *-*-* } 0 } */ #include "avx10_1-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-9.c b/gcc/testsuite/gcc.target/i386/avx10_1-9.c index 8e83827..b951738 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_1-9.c +++ b/gcc/testsuite/gcc.target/i386/avx10_1-9.c @@ -1,6 +1,7 @@ /* { dg-do compile } */ /* { dg-options "-march=x86-64 -mavx10.1-256 -mavx512f" } */ /* { dg-warning "Vector size conflicts between AVX10.1 and AVX512, using 512 as max vector size" "" { target *-*-* } 0 } */ +/* { dg-warning "'-mavx10.1' is aliased to 512 bit since GCC14.3 and GCC15.1 while '-mavx10.1-256' and '-mavx10.1-512' will be deprecated in GCC 16 due to all machines 512 bit vector size supported" "" { target *-*-* } 0 } */ /* { dg-final { scan-assembler "%zmm" } } */ #include "avx10_1-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-bf16-1.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-bf16-1.c index 60121d2..f28be2a 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-bf16-1.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-bf16-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=x86-64-v3 -mavx10.2-512 -O2" } */ +/* { dg-options "-march=x86-64-v3 -mavx10.2 -O2" } */ /* { dg-final { scan-assembler-times "vaddbf16\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vaddbf16\[ \\t\]+%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vaddbf16\[ \\t\]+%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ @@ -71,7 +71,7 @@ volatile __m512bh res, x1, x2; volatile __mmask32 m32; void extern -avx10_2_512_test (void) +avx10_2_test (void) { res = _mm512_add_pbh (x1, x2); res = _mm512_mask_add_pbh (res, m32, x1, x2); diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-bf16-vector-cmp-1.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-bf16-vector-cmp-1.c index a5e1d43..ff72698 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-bf16-vector-cmp-1.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-bf16-vector-cmp-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=x86-64-v3 -mavx10.2-512 -O2 -mprefer-vector-width=512" } */ +/* { dg-options "-march=x86-64-v3 -mavx10.2 -O2 -mprefer-vector-width=512" } */ /* { dg-final { scan-assembler-times "vcmpbf16" 5 } } */ typedef __bf16 v32bf __attribute__ ((__vector_size__ (64))); diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-bf16-vector-fma-1.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-bf16-vector-fma-1.c index 77198d2..cc9497c 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-bf16-vector-fma-1.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-bf16-vector-fma-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=x86-64-v3 -mavx10.2-512 -O2" } */ +/* { dg-options "-march=x86-64-v3 -mavx10.2 -O2" } */ /* { dg-final { scan-assembler-times "vfmadd132bf16\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vfmsub132bf16\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vfnmadd132bf16\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-bf16-vector-operations-1.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-bf16-vector-operations-1.c index e224a36..9ca2b95 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-bf16-vector-operations-1.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-bf16-vector-operations-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=x86-64-v3 -mavx10.2-512 -O2" } */ +/* { dg-options "-march=x86-64-v3 -mavx10.2 -O2" } */ /* { dg-final { scan-assembler-times "vmulbf16\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 2 } } */ /* { dg-final { scan-assembler-times "vaddbf16\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vdivbf16\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-bf16-vector-smaxmin-1.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-bf16-vector-smaxmin-1.c index 0282de5..ee2ac85 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-bf16-vector-smaxmin-1.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-bf16-vector-smaxmin-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=x86-64-v3 -mavx10.2-512 -mprefer-vector-width=512 -Ofast" } */ +/* { dg-options "-march=x86-64-v3 -mavx10.2 -mprefer-vector-width=512 -Ofast" } */ /* { dg-final { scan-assembler-times "vmaxbf16" 1 } } */ /* { dg-final { scan-assembler-times "vminbf16" 1 } } */ diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-convert-1.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-convert-1.c index c1e44ef..ff103d0 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-convert-1.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-convert-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=x86-64-v3 -mavx10.2-512 -O2" } */ +/* { dg-options "-march=x86-64-v3 -mavx10.2 -O2" } */ /* { dg-final { scan-assembler-times "vcvt2ps2phx\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvt2ps2phx\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvt2ps2phx\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ @@ -64,7 +64,7 @@ __m512bh *c; __m512h *d; void extern -avx10_2_512_test (void) +avx10_2_test (void) { y = _mm512_cvtx2ps_ph (a1, b1); y = _mm512_mask_cvtx2ps_ph (y, m32, a1, b1); @@ -76,7 +76,7 @@ avx10_2_512_test (void) } void extern -avx10_2_512_vcvtbiasph2bf8_test (void) +avx10_2_vcvtbiasph2bf8_test (void) { x256i = _mm512_cvtbiasph_bf8 (x512i, x512h); x256i = _mm512_mask_cvtbiasph_bf8 (x256i, m32, x512i, x512h); @@ -84,15 +84,15 @@ avx10_2_512_vcvtbiasph2bf8_test (void) } void extern -avx10_2_512_vcvtbiasph2bf8s_test (void) +avx10_2_vcvtbiasph2bf8s_test (void) { - x256i = _mm512_cvtbiassph_bf8 (x512i, x512h); - x256i = _mm512_mask_cvtbiassph_bf8 (x256i, m32, x512i, x512h); - x256i = _mm512_maskz_cvtbiassph_bf8 (m32, x512i, x512h); + x256i = _mm512_cvts_biasph_bf8 (x512i, x512h); + x256i = _mm512_mask_cvts_biasph_bf8 (x256i, m32, x512i, x512h); + x256i = _mm512_maskz_cvts_biasph_bf8 (m32, x512i, x512h); } void extern -avx10_2_512_vcvtbiasph2hf8_test (void) +avx10_2_vcvtbiasph2hf8_test (void) { x256i = _mm512_cvtbiasph_hf8 (x512i, x512h); x256i = _mm512_mask_cvtbiasph_hf8 (x256i, m32, x512i, x512h); @@ -100,15 +100,15 @@ avx10_2_512_vcvtbiasph2hf8_test (void) } void extern -avx10_2_512_vcvtbiasph2hf8s_test (void) +avx10_2_vcvtbiasph2hf8s_test (void) { - x256i = _mm512_cvtbiassph_hf8 (x512i, x512h); - x256i = _mm512_mask_cvtbiassph_hf8 (x256i, m32, x512i, x512h); - x256i = _mm512_maskz_cvtbiassph_hf8 (m32, x512i, x512h); + x256i = _mm512_cvts_biasph_hf8 (x512i, x512h); + x256i = _mm512_mask_cvts_biasph_hf8 (x256i, m32, x512i, x512h); + x256i = _mm512_maskz_cvts_biasph_hf8 (m32, x512i, x512h); } void extern -avx10_2_512_vcvt2ph2bf8_test (void) +avx10_2_vcvt2ph2bf8_test (void) { x512i = _mm512_cvt2ph_bf8 (x512h, x512h); x512i = _mm512_mask_cvt2ph_bf8 (x512i, m64, x512h, x512h); @@ -116,15 +116,15 @@ avx10_2_512_vcvt2ph2bf8_test (void) } void extern -avx10_2_512_vcvt2ph2bf8s_test (void) +avx10_2_vcvt2ph2bf8s_test (void) { - x512i = _mm512_cvts2ph_bf8 (x512h, x512h); - x512i = _mm512_mask_cvts2ph_bf8 (x512i, m64, x512h, x512h); - x512i = _mm512_maskz_cvts2ph_bf8 (m64, x512h, x512h); + x512i = _mm512_cvts_2ph_bf8 (x512h, x512h); + x512i = _mm512_mask_cvts_2ph_bf8 (x512i, m64, x512h, x512h); + x512i = _mm512_maskz_cvts_2ph_bf8 (m64, x512h, x512h); } void extern -avx10_2_512_vcvt2ph2hf8_test (void) +avx10_2_vcvt2ph2hf8_test (void) { x512i = _mm512_cvt2ph_hf8 (x512h, x512h); x512i = _mm512_mask_cvt2ph_hf8 (x512i, m64, x512h, x512h); @@ -132,15 +132,15 @@ avx10_2_512_vcvt2ph2hf8_test (void) } void extern -avx10_2_512_vcvt2ph2hf8s_test (void) +avx10_2_vcvt2ph2hf8s_test (void) { - x512i = _mm512_cvts2ph_hf8 (x512h, x512h); - x512i = _mm512_mask_cvts2ph_hf8 (x512i, m64, x512h, x512h); - x512i = _mm512_maskz_cvts2ph_hf8 (m64, x512h, x512h); + x512i = _mm512_cvts_2ph_hf8 (x512h, x512h); + x512i = _mm512_mask_cvts_2ph_hf8 (x512i, m64, x512h, x512h); + x512i = _mm512_maskz_cvts_2ph_hf8 (m64, x512h, x512h); } void extern -avx10_2_512_vcvthf82ph_test (void) +avx10_2_vcvthf82ph_test (void) { x512h = _mm512_cvthf8_ph (x256i); x512h = _mm512_mask_cvthf8_ph (x512h, m32, x256i); @@ -148,7 +148,7 @@ avx10_2_512_vcvthf82ph_test (void) } void extern -avx10_2_512_vcvtph2bf8_test (void) +avx10_2_vcvtph2bf8_test (void) { x256i = _mm512_cvtph_bf8 (x512h); x256i = _mm512_mask_cvtph_bf8 (x256i, m32, x512h); @@ -156,15 +156,15 @@ avx10_2_512_vcvtph2bf8_test (void) } void extern -avx10_2_512_vcvtph2bf8s_test (void) +avx10_2_vcvtph2bf8s_test (void) { - x256i = _mm512_cvtsph_bf8 (x512h); - x256i = _mm512_mask_cvtsph_bf8 (x256i, m32, x512h); - x256i = _mm512_maskz_cvtsph_bf8 (m32, x512h); + x256i = _mm512_cvts_ph_bf8 (x512h); + x256i = _mm512_mask_cvts_ph_bf8 (x256i, m32, x512h); + x256i = _mm512_maskz_cvts_ph_bf8 (m32, x512h); } void extern -avx10_2_512_vcvtph2hf8_test (void) +avx10_2_vcvtph2hf8_test (void) { x256i = _mm512_cvtph_hf8 (x512h); x256i = _mm512_mask_cvtph_hf8 (x256i, m32, x512h); @@ -172,15 +172,15 @@ avx10_2_512_vcvtph2hf8_test (void) } void extern -avx10_2_512_vcvtph2hf8s_test (void) +avx10_2_vcvtph2hf8s_test (void) { - x256i = _mm512_cvtsph_hf8 (x512h); - x256i = _mm512_mask_cvtsph_hf8 (x256i, m32, x512h); - x256i = _mm512_maskz_cvtsph_hf8 (m32, x512h); + x256i = _mm512_cvts_ph_hf8 (x512h); + x256i = _mm512_mask_cvts_ph_hf8 (x256i, m32, x512h); + x256i = _mm512_maskz_cvts_ph_hf8 (m32, x512h); } void extern -avx10_2_512_cvtbf8_fp16_test (void) +avx10_2_cvtbf8_fp16_test (void) { y = _mm512_cvtbf8_ph (z1); y = _mm512_mask_cvtbf8_ph (z, m32, z1); diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-media-1.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-media-1.c index d24c06d..a0675f6 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-media-1.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-media-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=x86-64-v3 -mavx10.2-512 -O2" } */ +/* { dg-options "-march=x86-64-v3 -mavx10.2 -O2" } */ /* { dg-final { scan-assembler-times "vpdpbssd\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vpdpbssd\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\\n\\r]*%zmm\[0-9\]+\[^\\n\\r\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vpdpbssd\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\\n\\r]*%zmm\[0-9\]+\[^\\n\\r\]*%zmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ @@ -52,7 +52,7 @@ volatile __m512i x,y,z,z1; volatile __mmask16 m16; volatile __mmask32 m32; -void avx10_2_512_test (void) +void avx10_2_test (void) { x = _mm512_dpbssd_epi32 (x, y, z); x = _mm512_mask_dpbssd_epi32 (x, m16, y, z); diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-minmax-1.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-minmax-1.c index adb57eb..fb9a92a 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-minmax-1.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-minmax-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ /* { dg-final { scan-assembler-times "vminmaxbf16\[ \\t\]+\[^\{\n\]*\[^\}\]%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r\]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vminmaxbf16\[ \\t\]+\[^\{\n\]*\[^\}\]%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vminmaxbf16\[ \\t\]+\[^\{\n\]*\[^\}\]%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r\]*%zmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ @@ -25,7 +25,7 @@ volatile __mmask16 m16; volatile __mmask8 m8; void extern -avx10_2_512_test (void) +avx10_2_test (void) { x1 = _mm512_minmax_pbh (x1, x1, 100); x1 = _mm512_mask_minmax_pbh (x1, m32, x1, x1, 100); diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-movrs-1.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-movrs-1.c index 682b812..2aaa1a9 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-movrs-1.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-movrs-1.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { ! ia32 } } } */ -/* { dg-options "-march=x86-64-v3 -mavx10.2-512 -mmovrs -O2" } */ +/* { dg-options "-march=x86-64-v3 -mavx10.2 -mmovrs -O2" } */ /* { dg-final { scan-assembler-times "vmovrsb\[ \\t\]\+\\(%(?:r|e).x\\), %zmm\[0-9\]+" 3 } } */ /* { dg-final { scan-assembler-times "vmovrsb\[ \\t\]\+\\(%(?:r|e).x\\), %zmm\[0-9\]+{%k\[1-7\]}" 2 } } */ /* { dg-final { scan-assembler-times "vmovrsb\[ \\t\]\+\\(%(?:r|e).x\\), %zmm\[0-9\]+{%k\[1-7\]}{z}" 1 } } */ @@ -23,7 +23,7 @@ volatile __mmask8 m3; volatile __mmask32 m4; void extern -avx512movrs_test (void) +avx10_movrs_test (void) { x = _mm512_loadrs_epi8(px); x = _mm512_mask_loadrs_epi8(x, m1, px); diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-satcvt-1.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-satcvt-1.c index dd24216..74a515b 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-satcvt-1.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-satcvt-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ /* { dg-final { scan-assembler-times "vcvtph2ibs\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 2 } } */ /* { dg-final { scan-assembler-times "vcvtph2ibs\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvtph2ibs\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vaddbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vaddbf16-2.c index fe13c64..4aca46d 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vaddbf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vaddbf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcmpbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcmpbf16-2.c index a6f8f54..885cec7 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcmpbf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcmpbf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvt2ph2bf8-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvt2ph2bf8-2.c index 8662d26..5bd2b7f 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvt2ph2bf8-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvt2ph2bf8-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvt2ph2bf8s-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvt2ph2bf8s-2.c index 4933a8b..33d9c0c 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvt2ph2bf8s-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvt2ph2bf8s-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 @@ -64,16 +64,16 @@ TEST (void) CALC(res_ref, src1.a, src2.a); - res1.x = INTRINSIC (_cvts2ph_bf8) (src1.x, src2.x); + res1.x = INTRINSIC (_cvts_2ph_bf8) (src1.x, src2.x); if (UNION_CHECK (AVX512F_LEN, i_b) (res1, res_ref)) abort (); - res2.x = INTRINSIC (_mask_cvts2ph_bf8) (res2.x, mask, src1.x, src2.x); + res2.x = INTRINSIC (_mask_cvts_2ph_bf8) (res2.x, mask, src1.x, src2.x); MASK_MERGE (i_b) (res_ref, mask, SIZE); if (UNION_CHECK (AVX512F_LEN, i_b) (res2, res_ref)) abort (); - res3.x = INTRINSIC (_maskz_cvts2ph_bf8) (mask, src1.x, src2.x); + res3.x = INTRINSIC (_maskz_cvts_2ph_bf8) (mask, src1.x, src2.x); MASK_ZERO (i_b) (res_ref, mask, SIZE); if (UNION_CHECK (AVX512F_LEN, i_b) (res3, res_ref)) abort (); diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvt2ph2hf8-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvt2ph2hf8-2.c index 633d15a..b9fdbd4 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvt2ph2hf8-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvt2ph2hf8-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvt2ph2hf8s-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvt2ph2hf8s-2.c index e53e924..b9fdfac 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvt2ph2hf8s-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvt2ph2hf8s-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 @@ -64,16 +64,16 @@ TEST (void) CALC(res_ref, src1.a, src2.a); - res1.x = INTRINSIC (_cvts2ph_hf8) (src1.x, src2.x); + res1.x = INTRINSIC (_cvts_2ph_hf8) (src1.x, src2.x); if (UNION_CHECK (AVX512F_LEN, i_b) (res1, res_ref)) abort (); - res2.x = INTRINSIC (_mask_cvts2ph_hf8) (res2.x, mask, src1.x, src2.x); + res2.x = INTRINSIC (_mask_cvts_2ph_hf8) (res2.x, mask, src1.x, src2.x); MASK_MERGE (i_b) (res_ref, mask, SIZE); if (UNION_CHECK (AVX512F_LEN, i_b) (res2, res_ref)) abort (); - res3.x = INTRINSIC (_maskz_cvts2ph_hf8) (mask, src1.x, src2.x); + res3.x = INTRINSIC (_maskz_cvts_2ph_hf8) (mask, src1.x, src2.x); MASK_ZERO (i_b) (res_ref, mask, SIZE); if (UNION_CHECK (AVX512F_LEN, i_b) (res3, res_ref)) abort (); diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvt2ps2phx-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvt2ps2phx-2.c index e3cc050..f9f799a 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvt2ps2phx-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvt2ps2phx-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtbf162ibs-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtbf162ibs-2.c index 7f7e20c..4976892 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtbf162ibs-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtbf162ibs-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtbf162iubs-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtbf162iubs-2.c index 3b4c2ec..03bd36a 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtbf162iubs-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtbf162iubs-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtbiasph2bf8-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtbiasph2bf8-2.c index c5edce61..4d90dcf8 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtbiasph2bf8-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtbiasph2bf8-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtbiasph2bf8s-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtbiasph2bf8s-2.c index c454cb5..93de7ea 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtbiasph2bf8s-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtbiasph2bf8s-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 @@ -61,16 +61,16 @@ TEST (void) CALC (res_ref, src1.a, src2.a); - res1.x = INTRINSIC (_cvtbiassph_bf8) (src1.x, src2.x); + res1.x = INTRINSIC (_cvts_biasph_bf8) (src1.x, src2.x); if (UNION_CHECK (AVX512F_LEN_HALF, i_b) (res1, res_ref)) abort (); - res2.x = INTRINSIC (_mask_cvtbiassph_bf8) (res2.x, mask, src1.x, src2.x); + res2.x = INTRINSIC (_mask_cvts_biasph_bf8) (res2.x, mask, src1.x, src2.x); MASK_MERGE (i_b) (res_ref, mask, SIZE); if (UNION_CHECK (AVX512F_LEN_HALF, i_b) (res2, res_ref)) abort (); - res3.x = INTRINSIC (_maskz_cvtbiassph_bf8) (mask, src1.x, src2.x); + res3.x = INTRINSIC (_maskz_cvts_biasph_bf8) (mask, src1.x, src2.x); MASK_ZERO (i_b) (res_ref, mask, SIZE); if (UNION_CHECK (AVX512F_LEN_HALF, i_b) (res3, res_ref)) abort (); diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtbiasph2hf8-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtbiasph2hf8-2.c index 84f19ae..14a2251 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtbiasph2hf8-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtbiasph2hf8-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtbiasph2hf8s-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtbiasph2hf8s-2.c index 2630c69..0333f08 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtbiasph2hf8s-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtbiasph2hf8s-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 @@ -60,16 +60,16 @@ TEST (void) CALC (res_ref, src1.a, src2.a); - res1.x = INTRINSIC (_cvtbiassph_hf8) (src1.x, src2.x); + res1.x = INTRINSIC (_cvts_biasph_hf8) (src1.x, src2.x); if (UNION_CHECK (AVX512F_LEN_HALF, i_b) (res1, res_ref)) abort (); - res2.x = INTRINSIC (_mask_cvtbiassph_hf8) (res2.x, mask, src1.x, src2.x); + res2.x = INTRINSIC (_mask_cvts_biasph_hf8) (res2.x, mask, src1.x, src2.x); MASK_MERGE (i_b) (res_ref, mask, SIZE); if (UNION_CHECK (AVX512F_LEN_HALF, i_b) (res2, res_ref)) abort (); - res3.x = INTRINSIC (_maskz_cvtbiassph_hf8) (mask, src1.x, src2.x); + res3.x = INTRINSIC (_maskz_cvts_biasph_hf8) (mask, src1.x, src2.x); MASK_ZERO (i_b) (res_ref, mask, SIZE); if (UNION_CHECK (AVX512F_LEN_HALF, i_b) (res3, res_ref)) abort (); diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvthf82ph-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvthf82ph-2.c index 48083ae..9301ee3 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvthf82ph-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvthf82ph-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtph2bf8-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtph2bf8-2.c index 189c2d6..f42f856 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtph2bf8-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtph2bf8-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtph2bf8s-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtph2bf8s-2.c index 090c4c1..c22e1aa 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtph2bf8s-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtph2bf8s-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 @@ -60,16 +60,16 @@ TEST (void) CALC(res_ref, src.a); - res1.x = INTRINSIC (_cvtsph_bf8) (src.x); + res1.x = INTRINSIC (_cvts_ph_bf8) (src.x); if (UNION_CHECK (AVX512F_LEN_HALF, i_b) (res1, res_ref)) abort (); - res2.x = INTRINSIC (_mask_cvtsph_bf8) (res2.x, mask, src.x); + res2.x = INTRINSIC (_mask_cvts_ph_bf8) (res2.x, mask, src.x); MASK_MERGE (i_b) (res_ref, mask, SIZE); if (UNION_CHECK (AVX512F_LEN_HALF, i_b) (res2, res_ref)) abort (); - res3.x = INTRINSIC (_maskz_cvtsph_bf8) (mask, src.x); + res3.x = INTRINSIC (_maskz_cvts_ph_bf8) (mask, src.x); MASK_ZERO (i_b) (res_ref, mask, SIZE); if (UNION_CHECK (AVX512F_LEN_HALF, i_b) (res3, res_ref)) abort (); diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtph2hf8-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtph2hf8-2.c index 8cdb513..e328e9d 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtph2hf8-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtph2hf8-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtph2hf8s-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtph2hf8s-2.c index ded773e..e6872e8 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtph2hf8s-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtph2hf8s-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 @@ -60,16 +60,16 @@ TEST (void) CALC(res_ref, src.a); - res1.x = INTRINSIC (_cvtsph_hf8) (src.x); + res1.x = INTRINSIC (_cvts_ph_hf8) (src.x); if (UNION_CHECK (AVX512F_LEN_HALF, i_b) (res1, res_ref)) abort (); - res2.x = INTRINSIC (_mask_cvtsph_hf8) (res2.x, mask, src.x); + res2.x = INTRINSIC (_mask_cvts_ph_hf8) (res2.x, mask, src.x); MASK_MERGE (i_b) (res_ref, mask, SIZE); if (UNION_CHECK (AVX512F_LEN_HALF, i_b) (res2, res_ref)) abort (); - res3.x = INTRINSIC (_maskz_cvtsph_hf8) (mask, src.x); + res3.x = INTRINSIC (_maskz_cvts_ph_hf8) (mask, src.x); MASK_ZERO (i_b) (res_ref, mask, SIZE); if (UNION_CHECK (AVX512F_LEN_HALF, i_b) (res3, res_ref)) abort (); diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtph2ibs-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtph2ibs-2.c index 523b3f0..2bddbb1 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtph2ibs-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtph2ibs-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 @@ -68,7 +68,7 @@ TEST (void) if (UNION_CHECK (AVX512F_LEN, i_w) (res3, res_ref)) abort (); -#if AVX512F_LEN != 128 +#if AVX512F_LEN == 512 for (i = 0; i < SIZE; i++) res2.a[i] = DEFAULT_VALUE; diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtph2iubs-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtph2iubs-2.c index a8f6e57..df73fcd 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtph2iubs-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtph2iubs-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 @@ -68,7 +68,7 @@ TEST (void) if (UNION_CHECK (AVX512F_LEN, i_w) (res3, res_ref)) abort (); -#if AVX512F_LEN != 128 +#if AVX512F_LEN == 512 for (i = 0; i < SIZE; i++) res2.a[i] = DEFAULT_VALUE; diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtps2ibs-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtps2ibs-2.c index 369cb64..2ab24b9 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtps2ibs-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtps2ibs-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 @@ -69,7 +69,7 @@ TEST (void) if (UNION_CHECK (AVX512F_LEN, i_d) (res3, res_ref)) abort (); -#if AVX512F_LEN != 128 +#if AVX512F_LEN == 512 for (i = 0; i < SIZE; i++) res2.a[i] = DEFAULT_VALUE; diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtps2iubs-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtps2iubs-2.c index f79264e..2b02ee3 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtps2iubs-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtps2iubs-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 @@ -67,7 +67,7 @@ TEST (void) if (UNION_CHECK (AVX512F_LEN, i_d) (res3, res_ref)) abort (); -#if AVX512F_LEN != 128 +#if AVX512F_LEN == 512 for (i = 0; i < SIZE; i++) res2.a[i] = DEFAULT_VALUE; diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttbf162ibs-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttbf162ibs-2.c index eea2e70..38154c8 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttbf162ibs-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttbf162ibs-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttbf162iubs-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttbf162iubs-2.c index 9f52302..9ca0912 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttbf162iubs-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttbf162iubs-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttpd2dqs-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttpd2dqs-2.c index 7293772..f56e568 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttpd2dqs-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttpd2dqs-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 @@ -67,7 +67,7 @@ TEST (void) if (UNION_CHECK (AVX512F_LEN_HALF, i_d) (res3, res_ref)) abort (); -#if AVX512F_LEN != 128 +#if AVX512F_LEN == 512 for (i = 0; i < SIZE; i++) res2.a[i] = DEFAULT_VALUE; diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttpd2qqs-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttpd2qqs-2.c index 23eb111..4400c7c 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttpd2qqs-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttpd2qqs-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 @@ -66,7 +66,7 @@ TEST (void) if (UNION_CHECK (AVX512F_LEN, i_q) (res3, res_ref)) abort (); -#if AVX512F_LEN != 128 +#if AVX512F_LEN == 512 for (i = 0; i < SIZE; i++) res2.a[i] = DEFAULT_VALUE; diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttpd2udqs-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttpd2udqs-2.c index 7058423..f687d0e 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttpd2udqs-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttpd2udqs-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 @@ -67,7 +67,7 @@ TEST (void) if (UNION_CHECK (AVX512F_LEN_HALF, i_ud) (res3, res_ref)) abort (); -#if AVX512F_LEN != 128 +#if AVX512F_LEN == 512 for (i = 0; i < SIZE; i++) res2.a[i] = DEFAULT_VALUE; diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttpd2uqqs-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttpd2uqqs-2.c index 9c826f4..7b44cdd 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttpd2uqqs-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttpd2uqqs-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 @@ -66,7 +66,7 @@ TEST (void) if (UNION_CHECK (AVX512F_LEN, i_uq) (res3, res_ref)) abort (); -#if AVX512F_LEN != 128 +#if AVX512F_LEN == 512 for (i = 0; i < SIZE; i++) res2.a[i] = DEFAULT_VALUE; diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttph2ibs-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttph2ibs-2.c index 7f94020a..13eb9f0 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttph2ibs-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttph2ibs-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 @@ -68,7 +68,7 @@ TEST (void) if (UNION_CHECK (AVX512F_LEN, i_w) (res3, res_ref)) abort (); -#if AVX512F_LEN != 128 +#if AVX512F_LEN == 512 for (i = 0; i < SIZE; i++) res2.a[i] = DEFAULT_VALUE; diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttph2iubs-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttph2iubs-2.c index 8a05dfd..1db5a89 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttph2iubs-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttph2iubs-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 @@ -9,6 +9,7 @@ #endif #include "avx10-helper.h" #include <limits.h> +#include <string.h> #define SIZE (AVX512F_LEN / 16) #include "avx512f-mask-type.h" @@ -37,7 +38,7 @@ TEST (void) UNION_TYPE (AVX512F_LEN, h) s; UNION_TYPE (AVX512F_LEN, i_w) res1, res2, res3; MASK_TYPE mask = MASK_VALUE; - short res_ref[SIZE] = { 0 }; + short res_ref[SIZE] = { 0 }, res_ref2[SIZE] = { 0 }; int i, sign = 1; for (i = 0; i < SIZE; i++) @@ -54,11 +55,7 @@ TEST (void) res3.x = INTRINSIC (_maskz_ipcvtts_ph_epu8) (mask, s.x); CALC (s.a, res_ref); - -#if AVX512F_LEN != 128 - res1.x = INTRINSIC (_ipcvtts_roundph_epu8) (s.x, 8); - res2.x = INTRINSIC (_mask_ipcvtts_roundph_epu8) (res2.x, mask, s.x, 8); - res3.x = INTRINSIC (_maskz_ipcvtts_roundph_epu8) (mask, s.x, 8); + memcpy(res_ref2, res_ref, sizeof(res_ref)); if (UNION_CHECK (AVX512F_LEN, i_w) (res1, res_ref)) abort (); @@ -70,5 +67,24 @@ TEST (void) MASK_ZERO (i_w) (res_ref, mask, SIZE); if (UNION_CHECK (AVX512F_LEN, i_w) (res3, res_ref)) abort (); + +#if AVX512F_LEN == 512 + for (i = 0; i < SIZE; i++) + res2.a[i] = DEFAULT_VALUE; + + res1.x = INTRINSIC (_ipcvtts_roundph_epu8) (s.x, 8); + res2.x = INTRINSIC (_mask_ipcvtts_roundph_epu8) (res2.x, mask, s.x, 8); + res3.x = INTRINSIC (_maskz_ipcvtts_roundph_epu8) (mask, s.x, 8); + + if (UNION_CHECK (AVX512F_LEN, i_w) (res1, res_ref2)) + abort (); + + MASK_MERGE (i_w) (res_ref2, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res2, res_ref2)) + abort (); + + MASK_ZERO (i_w) (res_ref2, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res3, res_ref2)) + abort (); #endif } diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttps2dqs-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttps2dqs-2.c index 9d3bc2c..0e9ee27 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttps2dqs-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttps2dqs-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 @@ -66,7 +66,7 @@ TEST (void) if (UNION_CHECK (AVX512F_LEN, i_d) (res3, res_ref)) abort (); -#if AVX512F_LEN != 128 +#if AVX512F_LEN == 512 for (i = 0; i < SIZE; i++) res2.a[i] = DEFAULT_VALUE; diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttps2ibs-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttps2ibs-2.c index 9654385..c2dc7fe 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttps2ibs-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttps2ibs-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 @@ -69,7 +69,7 @@ TEST (void) if (UNION_CHECK (AVX512F_LEN, i_d) (res3, res_ref)) abort (); -#if AVX512F_LEN != 128 +#if AVX512F_LEN == 512 for (i = 0; i < SIZE; i++) res2.a[i] = DEFAULT_VALUE; diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttps2iubs-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttps2iubs-2.c index 976677f..5f5ee8a 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttps2iubs-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttps2iubs-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 @@ -67,7 +67,7 @@ TEST (void) if (UNION_CHECK (AVX512F_LEN, i_d) (res3, res_ref)) abort (); -#if AVX512F_LEN != 128 +#if AVX512F_LEN == 512 for (i = 0; i < SIZE; i++) res2.a[i] = DEFAULT_VALUE; diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttps2qqs-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttps2qqs-2.c index 0d5797e..473fffa 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttps2qqs-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttps2qqs-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 @@ -67,7 +67,7 @@ TEST (void) if (UNION_CHECK (AVX512F_LEN, i_q) (res3, res_ref)) abort (); -#if AVX512F_LEN != 128 +#if AVX512F_LEN == 512 for (i = 0; i < SIZE; i++) res2.a[i] = DEFAULT_VALUE; diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttps2udqs-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttps2udqs-2.c index f578cd0..5d7ee3c 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttps2udqs-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttps2udqs-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 @@ -66,7 +66,7 @@ TEST (void) if (UNION_CHECK (AVX512F_LEN, i_ud) (res3, res_ref)) abort (); -#if AVX512F_LEN != 128 +#if AVX512F_LEN == 512 for (i = 0; i < SIZE; i++) res2.a[i] = DEFAULT_VALUE; diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttps2uqqs-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttps2uqqs-2.c index 93e71ac..99ab0ce 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttps2uqqs-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttps2uqqs-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 @@ -67,7 +67,7 @@ TEST (void) if (UNION_CHECK (AVX512F_LEN, i_uq) (res3, res_ref)) abort (); -#if AVX512F_LEN != 128 +#if AVX512F_LEN == 512 for (i = 0; i < SIZE; i++) res2.a[i] = DEFAULT_VALUE; diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vdivbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vdivbf16-2.c index 54bc275..ff68470 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vdivbf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vdivbf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vdpphps-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vdpphps-2.c index 38b984c..8f815ce 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vdpphps-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vdpphps-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vfmaddXXXbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vfmaddXXXbf16-2.c index 2e5c424..6a50ede 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vfmaddXXXbf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vfmaddXXXbf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vfmsubXXXbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vfmsubXXXbf16-2.c index 983ca2e..5869c5c 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vfmsubXXXbf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vfmsubXXXbf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vfnmaddXXXbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vfnmaddXXXbf16-2.c index 0dd1996..2173cd3 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vfnmaddXXXbf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vfnmaddXXXbf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vfnmsubXXXbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vfnmsubXXXbf16-2.c index 95ed19c..dc323fa 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vfnmsubXXXbf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vfnmsubXXXbf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vfpclassbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vfpclassbf16-2.c index 55b3a83..1e8609d 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vfpclassbf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vfpclassbf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vgetexpbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vgetexpbf16-2.c index 577e20a..a920db5 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vgetexpbf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vgetexpbf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vgetmantbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vgetmantbf16-2.c index 0c58873..82e3663 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vgetmantbf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vgetmantbf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vmaxbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vmaxbf16-2.c index 2485e80..75236c6 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vmaxbf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vmaxbf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vminbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vminbf16-2.c index 7591edf..3ca03cf 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vminbf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vminbf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vminmaxbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vminmaxbf16-2.c index 4356d93..b1a7bed 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vminmaxbf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vminmaxbf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-fsignaling-nans -mfpmath=sse -O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-fsignaling-nans -mfpmath=sse -O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vminmaxpd-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vminmaxpd-2.c index c0839c1..7bb531f 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vminmaxpd-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vminmaxpd-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-fsignaling-nans -mfpmath=sse -O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-fsignaling-nans -mfpmath=sse -O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vminmaxph-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vminmaxph-2.c index 8759fd1..7647f8e 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vminmaxph-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vminmaxph-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-fsignaling-nans -mfpmath=sse -O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-fsignaling-nans -mfpmath=sse -O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vminmaxps-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vminmaxps-2.c index 42864a4..1eaa0b2 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vminmaxps-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vminmaxps-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-fsignaling-nans -mfpmath=sse -O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-fsignaling-nans -mfpmath=sse -O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vmpsadbw-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vmpsadbw-2.c index 61219d2..a0a90f7 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vmpsadbw-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vmpsadbw-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vmulbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vmulbf16-2.c index 6e03d71..fe65d95 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vmulbf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vmulbf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpbssd-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpbssd-2.c index 04d142f..493cd2b 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpbssd-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpbssd-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpbssds-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpbssds-2.c index 75e7a8b..479b893 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpbssds-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpbssds-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpbsud-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpbsud-2.c index 6278b44..d0c090d 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpbsud-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpbsud-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpbsuds-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpbsuds-2.c index a7e0fc9..8d89c33 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpbsuds-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpbsuds-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpbuud-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpbuud-2.c index 3757303..37a4a54 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpbuud-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpbuud-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpbuuds-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpbuuds-2.c index 56ba154..8b18d6f 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpbuuds-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpbuuds-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpwsud-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpwsud-2.c index 1f72021..824f814 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpwsud-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpwsud-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpwsuds-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpwsuds-2.c index e4977aa..7e51349 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpwsuds-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpwsuds-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpwusd-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpwusd-2.c index 121b846..4727d91 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpwusd-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpwusd-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpwusds-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpwusds-2.c index d89e4a2..9f965df 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpwusds-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpwusds-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpwuud-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpwuud-2.c index dc4fcb2..bf0a564 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpwuud-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpwuud-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpwuuds-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpwuuds-2.c index bd42480..c075e0e 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpwuuds-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpwuuds-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vrcpbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vrcpbf16-2.c index 9bb620eb..28c7ada 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vrcpbf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vrcpbf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vreducebf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vreducebf16-2.c index 1bfca41..d506389 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vreducebf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vreducebf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vrndscalebf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vrndscalebf16-2.c index 6f671d8..1b29fc6 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vrndscalebf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vrndscalebf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vrsqrtbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vrsqrtbf16-2.c index 3858c1c..444b332 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vrsqrtbf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vrsqrtbf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vscalefbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vscalefbf16-2.c index f3f588d..b1c5f4b 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vscalefbf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vscalefbf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vsqrtbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vsqrtbf16-2.c index 09d87ec..12f87b3 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vsqrtbf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vsqrtbf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vsubbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vsubbf16-2.c index 7e8df5f..16a5ace 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vsubbf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vsubbf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-bf16-1.c b/gcc/testsuite/gcc.target/i386/avx10_2-bf16-1.c index 607730f..9b33b91 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-bf16-1.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-bf16-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=x86-64-v3 -mavx10.2-256 -O2" } */ +/* { dg-options "-march=x86-64-v3 -mavx10.2 -O2" } */ /* { dg-final { scan-assembler-times "vaddbf16\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vaddbf16\[ \\t\]+%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vaddbf16\[ \\t\]+%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-bf16-vector-cmp-1.c b/gcc/testsuite/gcc.target/i386/avx10_2-bf16-vector-cmp-1.c index 837491c..79bddb5 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-bf16-vector-cmp-1.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-bf16-vector-cmp-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=x86-64-v3 -mavx10.2-256 -O2" } */ +/* { dg-options "-march=x86-64-v3 -mavx10.2 -O2" } */ /* { dg-final { scan-assembler-times "vcmpbf16" 10 } } */ typedef __bf16 v16bf __attribute__ ((__vector_size__ (32))); diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-bf16-vector-fma-1.c b/gcc/testsuite/gcc.target/i386/avx10_2-bf16-vector-fma-1.c index f39c254..05f86f7 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-bf16-vector-fma-1.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-bf16-vector-fma-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=x86-64-v3 -mavx10.2-256 -O2" } */ +/* { dg-options "-march=x86-64-v3 -mavx10.2 -O2" } */ /* { dg-final { scan-assembler-times "vfmadd132bf16\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vfmsub132bf16\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vfnmadd132bf16\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-bf16-vector-operations-1.c b/gcc/testsuite/gcc.target/i386/avx10_2-bf16-vector-operations-1.c index 5945b0d..530167b 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-bf16-vector-operations-1.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-bf16-vector-operations-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=x86-64-v3 -mavx10.2-256 -O2" } */ +/* { dg-options "-march=x86-64-v3 -mavx10.2 -O2" } */ /* { dg-final { scan-assembler-times "vmulbf16\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 2 } } */ /* { dg-final { scan-assembler-times "vaddbf16\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vdivbf16\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-bf16-vector-smaxmin-1.c b/gcc/testsuite/gcc.target/i386/avx10_2-bf16-vector-smaxmin-1.c index 6acab8f..703ea64 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-bf16-vector-smaxmin-1.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-bf16-vector-smaxmin-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=x86-64-v3 -mavx10.2-256 -Ofast" } */ +/* { dg-options "-march=x86-64-v3 -mavx10.2 -Ofast" } */ /* { dg-final { scan-assembler-times "vmaxbf16" 2 } } */ /* { dg-final { scan-assembler-times "vminbf16" 2 } } */ diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-builtin-1.c b/gcc/testsuite/gcc.target/i386/avx10_2-builtin-1.c index 1837674..2c793cf 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-builtin-1.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-builtin-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O0 -march=x86-64-v3 -mavx10.2-256 -mno-avxvnniint8" } */ +/* { dg-options "-O0 -march=x86-64-v3 -mavx10.2 -mno-avxvnniint8" } */ typedef int v8si __attribute__ ((vector_size (32))); v8si foo (v8si a, v8si b, v8si c) diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-builtin-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-builtin-2.c index 33f7bf3..6eeb20e 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-builtin-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-builtin-2.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O0 -march=x86-64-v3 -mavx10.2-256 -mno-avxvnniint16" } */ +/* { dg-options "-O0 -march=x86-64-v3 -mavx10.2 -mno-avxvnniint16" } */ typedef int v8si __attribute__ ((vector_size (32))); v8si foo (v8si a, v8si b, v8si c) diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-comibf-1.c b/gcc/testsuite/gcc.target/i386/avx10_2-comibf-1.c index a676756..3862f1e 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-comibf-1.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-comibf-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=x86-64-v3 -mavx10.2-256 -O2 -fno-trapping-math" } */ +/* { dg-options "-march=x86-64-v3 -mavx10.2 -O2 -fno-trapping-math" } */ /* { dg-final { scan-assembler-times "vcomisbf16\[ \\t\]+\[^{}\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 6 } } */ /* { dg-final { scan-assembler-times {j[a-z]+\s} 6 } } */ diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-comibf-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-comibf-2.c index 07d5957..a70904c 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-comibf-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-comibf-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-march=x86-64-v3 -mavx10.2-256 -O2 -fno-trapping-math" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-march=x86-64-v3 -mavx10.2 -O2 -fno-trapping-math" } */ +/* { dg-require-effective-target avx10_2 } */ #include <stdlib.h> #include <stdint.h> @@ -92,7 +92,7 @@ test_ge (__bf16 a, __bf16 b) int main (void) { - if (!__builtin_cpu_supports ("avx10.2-256")) + if (!__builtin_cpu_supports ("avx10.2")) return 0; float test_values[] = { diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-comibf-3.c b/gcc/testsuite/gcc.target/i386/avx10_2-comibf-3.c index 26c2a80..28b2ad3 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-comibf-3.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-comibf-3.c @@ -5,7 +5,7 @@ /* { dg-final { scan-assembler-times "set\[aeglnb\]+" 6 } } */ #define AVX10_ATTR \ -__attribute__((noinline, __target__("avx10.2-256"), optimize("no-trapping-math"))) +__attribute__((noinline, __target__("avx10.2"), optimize("no-trapping-math"))) AVX10_ATTR int foo1_avx10 (__bf16 a, __bf16 b, __bf16 c, __bf16 d) diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-comibf-4.c b/gcc/testsuite/gcc.target/i386/avx10_2-comibf-4.c index c646e16..18848dd 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-comibf-4.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-comibf-4.c @@ -1,4 +1,4 @@ -/* { dg-do run { target { avx10_2_256 } } } */ +/* { dg-do run { target { avx10_2 } } } */ /* { dg-options "-march=x86-64-v3 -O2" } */ #include "avx10_2-comibf-3.c" @@ -24,7 +24,7 @@ int foo3 (__bf16 a, __bf16 b, __bf16 c, __bf16 d) int main (void) { - if (!__builtin_cpu_supports ("avx10.2-256")) + if (!__builtin_cpu_supports ("avx10.2")) return 0; __bf16 a = 0.5bf16, b = -0.25bf16, c = 1.75bf16, d = -0.125bf16; diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-compare-1.c b/gcc/testsuite/gcc.target/i386/avx10_2-compare-1.c index e841570..17dca5c 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-compare-1.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-compare-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ /* { dg-final { scan-assembler-times "vcomxsd\[ \\t\]+\{sae\}\[^\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcomxss\[ \\t\]+\{sae\}\[^\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vucomxsd\[ \\t\]+\{sae\}\[^\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-compare-1b.c b/gcc/testsuite/gcc.target/i386/avx10_2-compare-1b.c index 23fa4da..cc7f820 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-compare-1b.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-compare-1b.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256 -mfpmath=sse" } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2 -mfpmath=sse" } */ /* { dg-final { scan-assembler-times "comi" 6 } } */ /* { dg-final { scan-assembler-times "comx" 12 } } */ diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-convert-1.c b/gcc/testsuite/gcc.target/i386/avx10_2-convert-1.c index 729496f..3d5e921 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-convert-1.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-convert-1.c @@ -1,14 +1,11 @@ /* { dg-do compile } */ -/* { dg-options "-march=x86-64-v3 -mavx10.2-256 -O2" } */ +/* { dg-options "-march=x86-64-v3 -mavx10.2 -O2" } */ /* { dg-final { scan-assembler-times "vcvt2ps2phx\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvt2ps2phx\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvt2ps2phx\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvt2ps2phx\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvt2ps2phx\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvt2ps2phx\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvt2ps2phx\[ \\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvt2ps2phx\[ \\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvt2ps2phx\[ \\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvtbiasph2bf8\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+,\[^\{\n\]*%xmm\[0-9\]+,\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvtbiasph2bf8\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+,\[^\{\n\]*%xmm\[0-9\]+,\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvtbiasph2bf8\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+,\[^\{\n\]*%xmm\[0-9\]+,\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ @@ -124,9 +121,6 @@ avx10_2_test (void) y2 = _mm256_mask_cvtx2ps_ph (y2, m16, a2, b2); y2 = _mm256_maskz_cvtx2ps_ph (m16, a2, b2); - y2 = _mm256_cvtx_round2ps_ph (a2, b2, 8); - y2 = _mm256_mask_cvtx_round2ps_ph (y2, m16, a2, b2, 8); - y2 = _mm256_maskz_cvtx_round2ps_ph (m16, a2, b2, 8); } void extern @@ -144,13 +138,13 @@ avx10_2_vcvtbiasph2bf8_test (void) void extern avx10_2_vcvtbiasph2bf8s_test (void) { - x128i = _mm_cvtbiassph_bf8 (x128i, x128h); - x128i = _mm_mask_cvtbiassph_bf8 (x128i, m8, x128i, x128h); - x128i = _mm_maskz_cvtbiassph_bf8 (m8, x128i, x128h); + x128i = _mm_cvts_biasph_bf8 (x128i, x128h); + x128i = _mm_mask_cvts_biasph_bf8 (x128i, m8, x128i, x128h); + x128i = _mm_maskz_cvts_biasph_bf8 (m8, x128i, x128h); - x128i = _mm256_cvtbiassph_bf8 (x256i, x256h); - x128i = _mm256_mask_cvtbiassph_bf8 (x128i, m16, x256i, x256h); - x128i = _mm256_maskz_cvtbiassph_bf8 (m16, x256i, x256h); + x128i = _mm256_cvts_biasph_bf8 (x256i, x256h); + x128i = _mm256_mask_cvts_biasph_bf8 (x128i, m16, x256i, x256h); + x128i = _mm256_maskz_cvts_biasph_bf8 (m16, x256i, x256h); } void extern @@ -168,13 +162,13 @@ avx10_2_vcvtbiasph2hf8_test (void) void extern avx10_2_vcvtbiasph2hf8s_test (void) { - x128i = _mm_cvtbiassph_hf8 (x128i, x128h); - x128i = _mm_mask_cvtbiassph_hf8 (x128i, m8, x128i, x128h); - x128i = _mm_maskz_cvtbiassph_hf8 (m8, x128i, x128h); + x128i = _mm_cvts_biasph_hf8 (x128i, x128h); + x128i = _mm_mask_cvts_biasph_hf8 (x128i, m8, x128i, x128h); + x128i = _mm_maskz_cvts_biasph_hf8 (m8, x128i, x128h); - x128i = _mm256_cvtbiassph_hf8 (x256i, x256h); - x128i = _mm256_mask_cvtbiassph_hf8 (x128i, m16, x256i, x256h); - x128i = _mm256_maskz_cvtbiassph_hf8 (m16, x256i, x256h); + x128i = _mm256_cvts_biasph_hf8 (x256i, x256h); + x128i = _mm256_mask_cvts_biasph_hf8 (x128i, m16, x256i, x256h); + x128i = _mm256_maskz_cvts_biasph_hf8 (m16, x256i, x256h); } void extern @@ -191,12 +185,12 @@ avx10_2_vcvt2ph2bf8_test (void) void extern avx10_2_vcvt2ph2bf8s_test (void) { - x128i = _mm_cvts2ph_bf8 (x128h, x128h); - x128i = _mm_mask_cvts2ph_bf8 (x128i, m16, x128h, x128h); - x128i = _mm_maskz_cvts2ph_bf8 (m16, x128h, x128h); - x256i = _mm256_cvts2ph_bf8 (x256h, x256h); - x256i = _mm256_mask_cvts2ph_bf8 (x256i, m32, x256h, x256h); - x256i = _mm256_maskz_cvts2ph_bf8 (m32, x256h, x256h); + x128i = _mm_cvts_2ph_bf8 (x128h, x128h); + x128i = _mm_mask_cvts_2ph_bf8 (x128i, m16, x128h, x128h); + x128i = _mm_maskz_cvts_2ph_bf8 (m16, x128h, x128h); + x256i = _mm256_cvts_2ph_bf8 (x256h, x256h); + x256i = _mm256_mask_cvts_2ph_bf8 (x256i, m32, x256h, x256h); + x256i = _mm256_maskz_cvts_2ph_bf8 (m32, x256h, x256h); } void extern @@ -213,12 +207,12 @@ avx10_2_vcvt2ph2hf8_test (void) void extern avx10_2_vcvt2ph2hf8s_test (void) { - x128i = _mm_cvts2ph_hf8 (x128h, x128h); - x128i = _mm_mask_cvts2ph_hf8 (x128i, m16, x128h, x128h); - x128i = _mm_maskz_cvts2ph_hf8 (m16, x128h, x128h); - x256i = _mm256_cvts2ph_hf8 (x256h, x256h); - x256i = _mm256_mask_cvts2ph_hf8 (x256i, m32, x256h, x256h); - x256i = _mm256_maskz_cvts2ph_hf8 (m32, x256h, x256h); + x128i = _mm_cvts_2ph_hf8 (x128h, x128h); + x128i = _mm_mask_cvts_2ph_hf8 (x128i, m16, x128h, x128h); + x128i = _mm_maskz_cvts_2ph_hf8 (m16, x128h, x128h); + x256i = _mm256_cvts_2ph_hf8 (x256h, x256h); + x256i = _mm256_mask_cvts_2ph_hf8 (x256i, m32, x256h, x256h); + x256i = _mm256_maskz_cvts_2ph_hf8 (m32, x256h, x256h); } void extern @@ -248,13 +242,13 @@ avx10_2_vcvtph2bf8_test (void) void extern avx10_2_vcvtph2bf8s_test (void) { - x128i = _mm_cvtsph_bf8 (x128h); - x128i = _mm_mask_cvtsph_bf8 (x128i, m8, x128h); - x128i = _mm_maskz_cvtsph_bf8 (m8, x128h); + x128i = _mm_cvts_ph_bf8 (x128h); + x128i = _mm_mask_cvts_ph_bf8 (x128i, m8, x128h); + x128i = _mm_maskz_cvts_ph_bf8 (m8, x128h); - x128i = _mm256_cvtsph_bf8 (x256h); - x128i = _mm256_mask_cvtsph_bf8 (x128i, m16, x256h); - x128i = _mm256_maskz_cvtsph_bf8 (m16, x256h); + x128i = _mm256_cvts_ph_bf8 (x256h); + x128i = _mm256_mask_cvts_ph_bf8 (x128i, m16, x256h); + x128i = _mm256_maskz_cvts_ph_bf8 (m16, x256h); } void extern @@ -272,13 +266,13 @@ avx10_2_vcvtph2hf8_test (void) void extern avx10_2_vcvtph2hf8s_test (void) { - x128i = _mm_cvtsph_hf8 (x128h); - x128i = _mm_mask_cvtsph_hf8 (x128i, m8, x128h); - x128i = _mm_maskz_cvtsph_hf8 (m8, x128h); + x128i = _mm_cvts_ph_hf8 (x128h); + x128i = _mm_mask_cvts_ph_hf8 (x128i, m8, x128h); + x128i = _mm_maskz_cvts_ph_hf8 (m8, x128h); - x128i = _mm256_cvtsph_hf8 (x256h); - x128i = _mm256_mask_cvtsph_hf8 (x128i, m16, x256h); - x128i = _mm256_maskz_cvtsph_hf8 (m16, x256h); + x128i = _mm256_cvts_ph_hf8 (x256h); + x128i = _mm256_mask_cvts_ph_hf8 (x128i, m16, x256h); + x128i = _mm256_maskz_cvts_ph_hf8 (m16, x256h); } void extern diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-media-1.c b/gcc/testsuite/gcc.target/i386/avx10_2-media-1.c index a34075b..bdf6a6d 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-media-1.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-media-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=x86-64-v3 -mavx10.2-256 -O2" } */ +/* { dg-options "-march=x86-64-v3 -mavx10.2 -O2" } */ /* { dg-final { scan-assembler-times "vpdpbssd\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vpdpbssd\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\\n\\r]*%ymm\[0-9\]+\[^\\n\\r\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vpdpbssd\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\\n\\r]*%ymm\[0-9\]+\[^\\n\\r\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-minmax-1.c b/gcc/testsuite/gcc.target/i386/avx10_2-minmax-1.c index f16d560..77aacfa 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-minmax-1.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-minmax-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ /* { dg-final { scan-assembler-times "vminmaxbf16\[ \\t\]+\[^\{\n\]*\[^\}\]%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vminmaxbf16\[ \\t\]+\[^\{\n\]*\[^\}\]%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vminmaxbf16\[ \\t\]+\[^\{\n\]*\[^\}\]%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ @@ -12,45 +12,27 @@ /* { dg-final { scan-assembler-times "vminmaxph\[ \\t\]+\[^\{\n\]*\[^\}\]%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vminmaxph\[ \\t\]+\[^\{\n\]*\[^\}\]%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vminmaxph\[ \\t\]+\[^\{\n\]*\[^\}\]%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vminmaxph\[ \\t\]+\[^\n\]*\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vminmaxph\[ \\t\]+\[^\n\]*\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vminmaxph\[ \\t\]+\[^\n\]*\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vminmaxps\[ \\t\]+\[^\{\n\]*\[^\}\]%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vminmaxps\[ \\t\]+\[^\{\n\]*\[^\}\]%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vminmaxps\[ \\t\]+\[^\{\n\]*\[^\}\]%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vminmaxps\[ \\t\]+\[^\{\n\]*\[^\}\]%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vminmaxps\[ \\t\]+\[^\{\n\]*\[^\}\]%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vminmaxps\[ \\t\]+\[^\{\n\]*\[^\}\]%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vminmaxps\[ \\t\]+\[^\n\]*\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vminmaxps\[ \\t\]+\[^\n\]*\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vminmaxps\[ \\t\]+\[^\n\]*\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vminmaxpd\[ \\t\]+\[^\{\n\]*\[^\}\]%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vminmaxpd\[ \\t\]+\[^\{\n\]*\[^\}\]%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vminmaxpd\[ \\t\]+\[^\{\n\]*\[^\}\]%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vminmaxpd\[ \\t\]+\[^\{\n\]*\[^\}\]%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vminmaxpd\[ \\t\]+\[^\{\n\]*\[^\}\]%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vminmaxpd\[ \\t\]+\[^\{\n\]*\[^\}\]%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vminmaxpd\[ \\t\]+\[^\n\]*\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vminmaxpd\[ \\t\]+\[^\n\]*\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vminmaxpd\[ \\t\]+\[^\n\]*\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vminmaxsh\[ \\t\]+\[^\{\n\]*\[^\}\]%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vminmaxsh\[ \\t\]+\[^\{\n\]*\[^\}\]%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vminmaxsh\[ \\t\]+\[^\{\n\]*\[^\}\]%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vminmaxsh\[ \\t\]+\[^\n\]*\{sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vminmaxsh\[ \\t\]+\[^\n\]*\{sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vminmaxsh\[ \\t\]+\[^\n\]*\{sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vminmaxss\[ \\t\]+\[^\{\n\]*\[^\}\]%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vminmaxss\[ \\t\]+\[^\{\n\]*\[^\}\]%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vminmaxss\[ \\t\]+\[^\{\n\]*\[^\}\]%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vminmaxss\[ \\t\]+\[^\n\]*\{sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vminmaxss\[ \\t\]+\[^\n\]*\{sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vminmaxss\[ \\t\]+\[^\n\]*\{sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vminmaxsd\[ \\t\]+\[^\{\n\]*\[^\}\]%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vminmaxsd\[ \\t\]+\[^\{\n\]*\[^\}\]%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vminmaxsd\[ \\t\]+\[^\{\n\]*\[^\}\]%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vminmaxsd\[ \\t\]+\[^\n\]*\{sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vminmaxsd\[ \\t\]+\[^\n\]*\{sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vminmaxsd\[ \\t\]+\[^\n\]*\{sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ #include <immintrin.h> @@ -80,27 +62,18 @@ avx10_2_test (void) y2 = _mm256_minmax_ph (y2, y2, 100); y2 = _mm256_mask_minmax_ph (y2, m16, y2, y2, 100); y2 = _mm256_maskz_minmax_ph (m16, y2, y2, 100); - y2 = _mm256_minmax_round_ph (y2, y2, 100, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - y2 = _mm256_mask_minmax_round_ph (y2, m16, y2, y2, 100, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - y2 = _mm256_maskz_minmax_round_ph (m16, y2, y2, 100, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); x3 = _mm_minmax_ps (x3, x3, 100); x3 = _mm_mask_minmax_ps (x3, m8, x3, x3, 100); x3 = _mm_maskz_minmax_ps (m8, x3, x3, 100); y3 = _mm256_minmax_ps (y3, y3, 100); y3 = _mm256_mask_minmax_ps (y3, m8, y3, y3, 100); y3 = _mm256_maskz_minmax_ps (m8, y3, y3, 100); - y3 = _mm256_minmax_round_ps (y3, y3, 100, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - y3 = _mm256_mask_minmax_round_ps (y3, m8, y3, y3, 100, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - y3 = _mm256_maskz_minmax_round_ps (m8, y3, y3, 100, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); x4 = _mm_minmax_pd (x4, x4, 100); x4 = _mm_mask_minmax_pd (x4, m8, x4, x4, 100); x4 = _mm_maskz_minmax_pd (m8, x4, x4, 100); y4 = _mm256_minmax_pd (y4, y4, 100); y4 = _mm256_mask_minmax_pd (y4, m8, y4, y4, 100); y4 = _mm256_maskz_minmax_pd (m8, y4, y4, 100); - y4 = _mm256_minmax_round_pd (y4, y4, 100, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - y4 = _mm256_mask_minmax_round_pd (y4, m8, y4, y4, 100, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - y4 = _mm256_maskz_minmax_round_pd (m8, y4, y4, 100, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); x2 = _mm_minmax_sh (x2, x2, 1); x2 = _mm_mask_minmax_sh (x2, m8, x2, x2, 1); x2 = _mm_maskz_minmax_sh (m8, x2, x2, 1); diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-movrs-1.c b/gcc/testsuite/gcc.target/i386/avx10_2-movrs-1.c index 7d1446d..e3f0bfd 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-movrs-1.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-movrs-1.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { ! ia32 } } } */ -/* { dg-options "-march=x86-64-v3 -mavx10.2-256 -mmovrs -O2" } */ +/* { dg-options "-march=x86-64-v3 -mavx10.2 -mmovrs -O2" } */ /* { dg-final { scan-assembler-times "vmovrsb\[ \\t\]\+\\(%(?:r|e).x\\), %ymm\[0-9\]+" 3 } } */ /* { dg-final { scan-assembler-times "vmovrsb\[ \\t\]\+\\(%(?:r|e).x\\), %ymm\[0-9\]+{%k\[1-7\]}" 2 } } */ /* { dg-final { scan-assembler-times "vmovrsb\[ \\t\]\+\\(%(?:r|e).x\\), %ymm\[0-9\]+{%k\[1-7\]}{z}" 1 } } */ @@ -37,7 +37,7 @@ volatile __mmask16 m3; void extern -avx512movrs_test (void) +avx10_movrs_test (void) { x1 = _mm256_loadrs_epi8(px1); x1 = _mm256_mask_loadrs_epi8(x1, m1, px1); diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-partial-bf16-vector-fast-math-1.c b/gcc/testsuite/gcc.target/i386/avx10_2-partial-bf16-vector-fast-math-1.c index 6eb74bf..28856b1 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-partial-bf16-vector-fast-math-1.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-partial-bf16-vector-fast-math-1.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { ! ia32 } } } */ -/* { dg-options "-march=x86-64-v3 -mavx10.2-256 -O2" } */ +/* { dg-options "-march=x86-64-v3 -mavx10.2 -O2" } */ /* { dg-final { scan-assembler-times "vmulbf16\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 2 } } */ /* { dg-final { scan-assembler-times "vrcpbf16\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 2 } } */ diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-partial-bf16-vector-fma-1.c b/gcc/testsuite/gcc.target/i386/avx10_2-partial-bf16-vector-fma-1.c index 3db34be..0fa63de 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-partial-bf16-vector-fma-1.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-partial-bf16-vector-fma-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=x86-64-v3 -mavx10.2-256 -O2" } */ +/* { dg-options "-march=x86-64-v3 -mavx10.2 -O2" } */ /* { dg-final { scan-assembler-times "vfmadd132bf16\[^\n\r\]*xmm\[0-9\]" 3 { target ia32 } } } */ /* { dg-final { scan-assembler-times "vfmsub132bf16\[^\n\r\]*xmm\[0-9\]" 3 { target ia32 } } } */ /* { dg-final { scan-assembler-times "vfnmadd132bf16\[^\n\r\]*xmm\[0-9\]" 3 { target ia32 } } } */ diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-partial-bf16-vector-operations-1.c b/gcc/testsuite/gcc.target/i386/avx10_2-partial-bf16-vector-operations-1.c index a7a017c..22ba8a2 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-partial-bf16-vector-operations-1.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-partial-bf16-vector-operations-1.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { ! ia32 } } } */ -/* { dg-options "-march=x86-64-v3 -mavx10.2-256 -O2" } */ +/* { dg-options "-march=x86-64-v3 -mavx10.2 -O2" } */ /* { dg-final { scan-assembler-times "vmulbf16\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 2 } } */ /* { dg-final { scan-assembler-times "vaddbf16\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 2 } } */ /* { dg-final { scan-assembler-times "vdivbf16\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 2 } } */ diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-partial-bf16-vector-smaxmin-1.c b/gcc/testsuite/gcc.target/i386/avx10_2-partial-bf16-vector-smaxmin-1.c index f27e93a..59a0fc5 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-partial-bf16-vector-smaxmin-1.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-partial-bf16-vector-smaxmin-1.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { ! ia32 } } } */ -/* { dg-options "-march=x86-64-v3 -mavx10.2-256 -Ofast" } */ +/* { dg-options "-march=x86-64-v3 -mavx10.2 -Ofast" } */ /* { dg-final { scan-assembler-times "vmaxbf16" 2 } } */ /* { dg-final { scan-assembler-times "vminbf16" 2 } } */ diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-rounding-1.c b/gcc/testsuite/gcc.target/i386/avx10_2-rounding-1.c deleted file mode 100644 index 59951a3..0000000 --- a/gcc/testsuite/gcc.target/i386/avx10_2-rounding-1.c +++ /dev/null @@ -1,252 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-final { scan-assembler-times "vaddpd\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vaddpd\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vaddpd\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vaddph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vaddph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vaddph\[ \\t\]+\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vaddps\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vaddps\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vaddps\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcmppd\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\[^\n^k\]*%k\[0-7\](?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcmppd\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\[^\n^k\]*%k\[0-7\]\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcmpph\[ \\t\]+\\\$3\[^\n\r]*\{sae\}\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%k\[0-9\]\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcmpph\[ \\t\]+\[^\{\n\]*\\\$4\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%k\[0-9\]\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcmpps\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\[^\n^k\]*%k\[0-7\](?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcmpps\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\[^\n^k\]*%k\[0-7\]\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtdq2phy\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtdq2ph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtdq2ph\[ \\t\]+\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtdq2ps\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtdq2ps\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtdq2ps\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtpd2phy\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtpd2ph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtpd2ph\[ \\t\]+\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtpd2ps\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtpd2ps\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtpd2ps\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtpd2dq\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%ymm\[0-9\]+\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtpd2dq\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\n\]*%ymm\[0-9\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtpd2dq\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\n\]*%ymm\[0-9\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtpd2qq\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtpd2qq\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtpd2qq\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtpd2udq\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%ymm\[0-9\]+\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtpd2udq\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\n\]*%ymm\[0-9\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtpd2udq\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\n\]*%ymm\[0-9\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtpd2uqq\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtpd2uqq\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtpd2uqq\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2dq\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2dq\[ \\t\]+\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2dq\[ \\t\]+\{rz-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2pd\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2pd\[ \\t\]+\{sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2pd\[ \\t\]+\{sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2ps\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2ps\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2ps\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2psx\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2psx\[ \\t\]+\{sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2psx\[ \\t\]+\{sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2qq\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2qq\[ \\t\]+\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2qq\[ \\t\]+\{rz-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2udq\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2udq\[ \\t\]+\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2udq\[ \\t\]+\{rz-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2uqq\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2uqq\[ \\t\]+\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2uqq\[ \\t\]+\{rz-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2uw\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2uw\[ \\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2uw\[ \\t\]+\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2w\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2w\[ \\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2w\[ \\t\]+\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtps2pd\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%xmm\[0-9\]+\[^\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtps2pd\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%xmm\[0-9\]+\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtps2pd\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%xmm\[0-9\]+\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtps2phxy\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtps2phx\[ \\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtps2phx\[ \\t\]+\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtps2dq\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtps2dq\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtps2dq\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtps2qq\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtps2qq\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtps2qq\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtps2udq\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtps2udq\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtps2udq\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtps2uqq\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtps2uqq\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtps2uqq\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ - -#include <immintrin.h> - -volatile __m128 hx; -volatile __m128i hxi; -volatile __m128h hxh; -volatile __m256 x; -volatile __m256d xd; -volatile __m256h xh; -volatile __m256i xi; -volatile __mmask8 m8; -volatile __mmask16 m16; -volatile __mmask32 m32; - -void extern -avx10_2_test_1 (void) -{ - xd = _mm256_add_round_pd (xd, xd, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - xd = _mm256_mask_add_round_pd (xd, m8, xd, xd, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC); - xd = _mm256_maskz_add_round_pd (m8, xd, xd, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); - - xh = _mm256_add_round_ph (xh, xh, 8); - xh = _mm256_mask_add_round_ph (xh, m32, xh, xh, 8); - xh = _mm256_maskz_add_round_ph (m32, xh, xh, 11); - - x = _mm256_add_round_ps (x, x, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - x = _mm256_mask_add_round_ps (x, m16, x, x, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC); - x = _mm256_maskz_add_round_ps (m16, x, x, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); -} - -void extern -avx10_2_test_2 (void) -{ - m8 = _mm256_cmp_round_pd_mask (xd, xd, _CMP_FALSE_OQ, _MM_FROUND_NO_EXC); - m8 = _mm256_mask_cmp_round_pd_mask (m8, xd, xd, _CMP_FALSE_OQ, _MM_FROUND_NO_EXC); - - m16 = _mm256_cmp_round_ph_mask (xh, xh, 3, 8); - m16 = _mm256_mask_cmp_round_ph_mask (m16, xh, xh, 4, 4); - - m8 = _mm256_cmp_round_ps_mask (x, x, _CMP_FALSE_OQ, _MM_FROUND_NO_EXC); - m8 = _mm256_mask_cmp_round_ps_mask (m8, x, x, _CMP_FALSE_OQ, _MM_FROUND_NO_EXC); -} - -void extern -avx10_2_test_3 (void) -{ - hxh = _mm256_cvt_roundepi32_ph (xi, 4); - hxh = _mm256_mask_cvt_roundepi32_ph (hxh, m8, xi, 8); - hxh = _mm256_maskz_cvt_roundepi32_ph (m8, xi, 11); - - x = _mm256_cvt_roundepi32_ps (xi, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - x = _mm256_mask_cvt_roundepi32_ps (x, m8, xi, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC); - x = _mm256_maskz_cvt_roundepi32_ps (m8, xi, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); -} - -void extern -avx10_2_test_4 (void) -{ - hxh = _mm256_cvt_roundpd_ph (xd, 4); - hxh = _mm256_mask_cvt_roundpd_ph (hxh, m8, xd, 8); - hxh = _mm256_maskz_cvt_roundpd_ph (m8, xd, 11); - - hx = _mm256_cvt_roundpd_ps (xd, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - hx = _mm256_mask_cvt_roundpd_ps (hx, 4, xd, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC); - hx = _mm256_maskz_cvt_roundpd_ps (6, xd, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); -} - -void extern -avx10_2_test_5 (void) -{ - hxi = _mm256_cvt_roundpd_epi32 (xd, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - hxi = _mm256_mask_cvt_roundpd_epi32 (hxi, m8, xd, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC); - hxi = _mm256_maskz_cvt_roundpd_epi32 (m8, xd, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); - - xi = _mm256_cvt_roundpd_epi64 (xd, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - xi = _mm256_mask_cvt_roundpd_epi64 (xi, m8, xd, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC); - xi = _mm256_maskz_cvt_roundpd_epi64 (m8, xd, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); - - hxi = _mm256_cvt_roundpd_epu32 (xd, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - hxi = _mm256_mask_cvt_roundpd_epu32 (hxi, m8, xd, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC); - hxi = _mm256_maskz_cvt_roundpd_epu32 (m8, xd, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); - - xi = _mm256_cvt_roundpd_epu64 (xd, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - xi = _mm256_mask_cvt_roundpd_epu64 (xi, m8, xd, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC); - xi = _mm256_maskz_cvt_roundpd_epu64 (m8, xd, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); -} - -void extern -avx10_2_test_6 (void) -{ - xi = _mm256_cvt_roundph_epi32 (hxh, 4); - xi = _mm256_mask_cvt_roundph_epi32 (xi, m8, hxh, 8); - xi = _mm256_maskz_cvt_roundph_epi32 (m8, hxh, 11); - - xi = _mm256_cvt_roundph_epi64 (hxh, 4); - xi = _mm256_mask_cvt_roundph_epi64 (xi, m8, hxh, 8); - xi = _mm256_maskz_cvt_roundph_epi64 (m8, hxh, 11); - - xi = _mm256_cvt_roundph_epu32 (hxh, 4); - xi = _mm256_mask_cvt_roundph_epu32 (xi, m8, hxh, 8); - xi = _mm256_maskz_cvt_roundph_epu32 (m8, hxh, 11); - - xi = _mm256_cvt_roundph_epu64 (hxh, 4); - xi = _mm256_mask_cvt_roundph_epu64 (xi, m8, hxh, 8); - xi = _mm256_maskz_cvt_roundph_epu64 (m8, hxh, 11); -} - -void extern -avx10_2_test_7 (void) -{ - xd = _mm256_cvt_roundph_pd (hxh, 4); - xd = _mm256_mask_cvt_roundph_pd (xd, m8, hxh, 8); - xd = _mm256_maskz_cvt_roundph_pd (m8, hxh, 8); - - x = _mm256_cvt_roundph_ps (hxh, _MM_FROUND_NO_EXC); - x = _mm256_mask_cvt_roundph_ps (x, 4, hxh, _MM_FROUND_NO_EXC); - x = _mm256_maskz_cvt_roundph_ps (6, hxh, _MM_FROUND_NO_EXC); - - x = _mm256_cvtx_roundph_ps (hxh, 4); - x = _mm256_mask_cvtx_roundph_ps (x, m8, hxh, 8); - x = _mm256_maskz_cvtx_roundph_ps (m8, hxh, 8); -} - -void extern -avx10_2_test_8 (void) -{ - xi = _mm256_cvt_roundph_epu16 (xh, 4); - xi = _mm256_mask_cvt_roundph_epu16 (xi, m16, xh, 8); - xi = _mm256_maskz_cvt_roundph_epu16 (m16, xh, 11); - - xi = _mm256_cvt_roundph_epi16 (xh, 4); - xi = _mm256_mask_cvt_roundph_epi16 (xi, m16, xh, 8); - xi = _mm256_maskz_cvt_roundph_epi16 (m16, xh, 11); -} - -void extern -avx10_2_test_9 (void) -{ - xd = _mm256_cvt_roundps_pd (hx, _MM_FROUND_NO_EXC); - xd = _mm256_mask_cvt_roundps_pd (xd, m8, hx, _MM_FROUND_NO_EXC); - xd = _mm256_maskz_cvt_roundps_pd (m8, hx, _MM_FROUND_NO_EXC); - - hxh = _mm256_cvtx_roundps_ph (x, 4); - hxh = _mm256_mask_cvtx_roundps_ph (hxh, m8, x, 8); - hxh = _mm256_maskz_cvtx_roundps_ph (m8, x, 11); -} - -void extern -avx10_2_test_10 (void) -{ - xi = _mm256_cvt_roundps_epi32 (x, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - xi = _mm256_mask_cvt_roundps_epi32 (xi, m8, x, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC); - xi = _mm256_maskz_cvt_roundps_epi32 (m8, x, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); - - xi = _mm256_cvt_roundps_epi64 (hx, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - xi = _mm256_mask_cvt_roundps_epi64 (xi, m8, hx, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC); - xi = _mm256_maskz_cvt_roundps_epi64 (m8, hx, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); - - xi = _mm256_cvt_roundps_epu32 (x, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - xi = _mm256_mask_cvt_roundps_epu32 (xi, m8, x, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC); - xi = _mm256_maskz_cvt_roundps_epu32 (m8, x, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); - - xi = _mm256_cvt_roundps_epu64 (hx, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - xi = _mm256_mask_cvt_roundps_epu64 (xi, m8, hx, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC); - xi = _mm256_maskz_cvt_roundps_epu64 (m8, hx, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); -} diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-rounding-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-rounding-2.c deleted file mode 100644 index cc2d780..0000000 --- a/gcc/testsuite/gcc.target/i386/avx10_2-rounding-2.c +++ /dev/null @@ -1,193 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-final { scan-assembler-times "vcvtqq2pd\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%ymm\[0-9\]+\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtqq2pd\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\n\]*%ymm\[0-9\]+\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtqq2pd\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\n\]*%ymm\[0-9\]+\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtqq2phy\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtqq2ph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtqq2ph\[ \\t\]+\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtqq2ps\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%ymm\[0-9\]+\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtqq2ps\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\n\]*%ymm\[0-9\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtqq2ps\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\n\]*%ymm\[0-9\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttpd2dq\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\[^\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttpd2dq\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttpd2dq\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttpd2qq\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttpd2qq\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttpd2qq\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttpd2udq\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\[^\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttpd2udq\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttpd2udq\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttpd2uqq\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttpd2uqq\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttpd2uqq\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttph2dq\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttph2dq\[ \\t\]+\{sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttph2dq\[ \\t\]+\{sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttph2qq\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttph2qq\[ \\t\]+\{sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttph2qq\[ \\t\]+\{sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttph2udq\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttph2udq\[ \\t\]+\{sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttph2udq\[ \\t\]+\{sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttph2uqq\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttph2uqq\[ \\t\]+\{sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttph2uqq\[ \\t\]+\{sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttph2uw\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttph2uw\[ \\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttph2uw\[ \\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttph2w\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttph2w\[ \\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttph2w\[ \\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttps2dq\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttps2dq\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttps2dq\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttps2qq\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttps2qq\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttps2qq\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttps2udq\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttps2udq\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttps2udq\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttps2uqq\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttps2uqq\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttps2uqq\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtudq2phy\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtudq2ph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtudq2ph\[ \\t\]+\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtudq2ps\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtudq2ps\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtudq2ps\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtuqq2pd\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%ymm\[0-9\]+\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtuqq2pd\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\n\]*%ymm\[0-9\]+\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtuqq2pd\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\n\]*%ymm\[0-9\]+\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtuqq2phy\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtuqq2ph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtuqq2ph\[ \\t\]+\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtuqq2ps\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%ymm\[0-9\]+\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtuqq2ps\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\n\]*%ymm\[0-9\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtuqq2ps\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\n\]*%ymm\[0-9\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ - -#include <immintrin.h> - -volatile __m128 hx; -volatile __m128i hxi; -volatile __m128h hxh; -volatile __m256 x; -volatile __m256d xd; -volatile __m256h xh; -volatile __m256i xi; -volatile __mmask8 m8; -volatile __mmask16 m16; -volatile __mmask32 m32; - -void extern -avx10_2_test_1 (void) -{ - xd = _mm256_cvt_roundepi64_pd (xi, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - xd = _mm256_mask_cvt_roundepi64_pd (xd, m8, xi, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC); - xd = _mm256_maskz_cvt_roundepi64_pd (m8, xi, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); - - hxh = _mm256_cvt_roundepi64_ph (xi, 4); - hxh = _mm256_mask_cvt_roundepi64_ph (hxh, m8, xi, 8); - hxh = _mm256_maskz_cvt_roundepi64_ph (m8, xi, 11); - - hx = _mm256_cvt_roundepi64_ps (xi, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - hx = _mm256_mask_cvt_roundepi64_ps (hx, m8, xi, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC); - hx = _mm256_maskz_cvt_roundepi64_ps (m8, xi, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); -} - -void extern -avx10_2_test_2 (void) -{ - hxi = _mm256_cvtt_roundpd_epi32 (xd, _MM_FROUND_NO_EXC); - hxi = _mm256_mask_cvtt_roundpd_epi32 (hxi, m8, xd, _MM_FROUND_NO_EXC); - hxi = _mm256_maskz_cvtt_roundpd_epi32 (m8, xd, _MM_FROUND_NO_EXC); - - xi = _mm256_cvtt_roundpd_epi64 (xd, _MM_FROUND_NO_EXC); - xi = _mm256_mask_cvtt_roundpd_epi64 (xi, m8, xd, _MM_FROUND_NO_EXC); - xi = _mm256_maskz_cvtt_roundpd_epi64 (m8, xd, _MM_FROUND_NO_EXC); - - hxi = _mm256_cvtt_roundpd_epu32 (xd, _MM_FROUND_NO_EXC); - hxi = _mm256_mask_cvtt_roundpd_epu32 (hxi, m8, xd, _MM_FROUND_NO_EXC); - hxi = _mm256_maskz_cvtt_roundpd_epu32 (m8, xd, _MM_FROUND_NO_EXC); - - xi = _mm256_cvtt_roundpd_epu64 (xd, _MM_FROUND_NO_EXC); - xi = _mm256_mask_cvtt_roundpd_epu64 (xi, m8, xd, _MM_FROUND_NO_EXC); - xi = _mm256_maskz_cvtt_roundpd_epu64 (m8, xd, _MM_FROUND_NO_EXC); -} - -void extern -avx10_2_test_3 (void) -{ - xi = _mm256_cvtt_roundph_epi32 (hxh, 4); - xi = _mm256_mask_cvtt_roundph_epi32 (xi, m8, hxh, 8); - xi = _mm256_maskz_cvtt_roundph_epi32 (m8, hxh, 8); - - xi = _mm256_cvtt_roundph_epi64 (hxh, 4); - xi = _mm256_mask_cvtt_roundph_epi64 (xi, m8, hxh, 8); - xi = _mm256_maskz_cvtt_roundph_epi64 (m8, hxh, 8); - - xi = _mm256_cvtt_roundph_epu32 (hxh, 4); - xi = _mm256_mask_cvtt_roundph_epu32 (xi, m8, hxh, 8); - xi = _mm256_maskz_cvtt_roundph_epu32 (m8, hxh, 8); - - xi = _mm256_cvtt_roundph_epu64 (hxh, 4); - xi = _mm256_mask_cvtt_roundph_epu64 (xi, m8, hxh, 8); - xi = _mm256_maskz_cvtt_roundph_epu64 (m8, hxh, 8); - - xi = _mm256_cvtt_roundph_epu16 (xh, 4); - xi = _mm256_mask_cvtt_roundph_epu16 (xi, m16, xh, 8); - xi = _mm256_maskz_cvtt_roundph_epu16 (m16, xh, 8); - - xi = _mm256_cvtt_roundph_epi16 (xh, 4); - xi = _mm256_mask_cvtt_roundph_epi16 (xi, m16, xh, 8); - xi = _mm256_maskz_cvtt_roundph_epi16 (m16, xh, 8); -} - -void extern -avx10_2_test_4 (void) -{ - xi = _mm256_cvtt_roundps_epi32 (x, _MM_FROUND_NO_EXC); - xi = _mm256_mask_cvtt_roundps_epi32 (xi, m8, x, _MM_FROUND_NO_EXC); - xi = _mm256_maskz_cvtt_roundps_epi32 (m8, x, _MM_FROUND_NO_EXC); - - xi = _mm256_cvtt_roundps_epi64 (hx, _MM_FROUND_NO_EXC); - xi = _mm256_mask_cvtt_roundps_epi64 (xi, m8, hx, _MM_FROUND_NO_EXC); - xi = _mm256_maskz_cvtt_roundps_epi64 (m8, hx, _MM_FROUND_NO_EXC); - - xi = _mm256_cvtt_roundps_epu32 (x, _MM_FROUND_NO_EXC); - xi = _mm256_mask_cvtt_roundps_epu32 (xi, m8, x, _MM_FROUND_NO_EXC); - xi = _mm256_maskz_cvtt_roundps_epu32 (m8, x, _MM_FROUND_NO_EXC); - - xi = _mm256_cvtt_roundps_epu64 (hx, _MM_FROUND_NO_EXC); - xi = _mm256_mask_cvtt_roundps_epu64 (xi, m8, hx, _MM_FROUND_NO_EXC); - xi = _mm256_maskz_cvtt_roundps_epu64 (m8, hx, _MM_FROUND_NO_EXC); -} - -void extern -avx10_2_test_5 (void) -{ - hxh = _mm256_cvt_roundepu32_ph (xi, 4); - hxh = _mm256_mask_cvt_roundepu32_ph (hxh, m8, xi, 8); - hxh = _mm256_maskz_cvt_roundepu32_ph (m8, xi, 11); - - x = _mm256_cvt_roundepu32_ps (xi, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - x = _mm256_mask_cvt_roundepu32_ps (x, m8, xi, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC); - x = _mm256_maskz_cvt_roundepu32_ps (m8, xi, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); -} - -void extern -avx10_2_test_6 (void) -{ - xd = _mm256_cvt_roundepu64_pd (xi, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - xd = _mm256_mask_cvt_roundepu64_pd (xd, m8, xi, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC); - xd = _mm256_maskz_cvt_roundepu64_pd (m8, xi, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); - - hxh = _mm256_cvt_roundepu64_ph (xi, 4); - hxh = _mm256_mask_cvt_roundepu64_ph (hxh, m8, xi, 8); - hxh = _mm256_maskz_cvt_roundepu64_ph (m8, xi, 11); - - hx = _mm256_cvt_roundepu64_ps (xi, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - hx = _mm256_mask_cvt_roundepu64_ps (hx, m8, xi, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC); - hx = _mm256_maskz_cvt_roundepu64_ps (m8, xi, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); -} diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-rounding-3.c b/gcc/testsuite/gcc.target/i386/avx10_2-rounding-3.c deleted file mode 100644 index 57839f4..0000000 --- a/gcc/testsuite/gcc.target/i386/avx10_2-rounding-3.c +++ /dev/null @@ -1,601 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-final { scan-assembler-times "vcvtuw2ph\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtuw2ph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtuw2ph\[ \\t\]+\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtw2ph\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtw2ph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtw2ph\[ \\t\]+\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vdivpd\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vdivpd\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vdivpd\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vdivph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vdivph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vdivph\[ \\t\]+\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vdivps\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vdivps\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vdivps\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfcmaddcph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfcmaddcph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */ -/* { dg-final { scan-assembler-times "vfcmaddcph\[ \\t\]+\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfcmulcph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 2 } } */ -/* { dg-final { scan-assembler-times "vfcmulcph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */ -/* { dg-final { scan-assembler-times "vfcmulcph\[ \\t\]+\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */ -/* { dg-final { scan-assembler-times "vfixupimmpd\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfixupimmpd\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfixupimmpd\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfixupimmps\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfixupimmps\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfixupimmps\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmadd...pd\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmadd...pd\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmadd231pd\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmadd...pd\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmadd...ph\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmadd...ph\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmadd231ph\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmadd...ph\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmadd...ps\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmadd...ps\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmadd231ps\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmadd...ps\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmaddcph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmaddcph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */ -/* { dg-final { scan-assembler-times "vfmaddcph\[ \\t\]+\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmaddsub...pd\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmaddsub...pd\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmaddsub231pd\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmaddsub...pd\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmaddsub...ph\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmaddsub...ph\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmaddsub231ph\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmaddsub...ph\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmaddsub...ps\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmaddsub...ps\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmaddsub231ps\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmaddsub...ps\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmsub...pd\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmsub...pd\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmsub231pd\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmsub...pd\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmsub...ph\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmsub...ph\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmsub231ph\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmsub...ph\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmsub...ps\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmsub...ps\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmsub231ps\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmsub...ps\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmsubadd...pd\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmsubadd...pd\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmsubadd231pd\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmsubadd...pd\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmsubadd...ph\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmsubadd...ph\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmsubadd231ph\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmsubadd...ph\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmsubadd...ps\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmsubadd...ps\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmsubadd231ps\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmsubadd...ps\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmulcph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 2 } } */ -/* { dg-final { scan-assembler-times "vfmulcph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */ -/* { dg-final { scan-assembler-times "vfmulcph\[ \\t\]+\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */ -/* { dg-final { scan-assembler-times "vfnmadd...pd\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfnmadd...pd\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfnmadd231pd\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfnmadd...pd\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfnmadd...ph\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfnmadd...ph\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfnmadd231ph\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfnmadd...ph\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfnmadd...ps\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfnmadd...ps\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfnmadd231ps\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfnmadd...ps\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfnmsub...ps\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfnmsub...ps\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfnmsub231ps\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfnmsub...ps\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfnmsub...pd\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfnmsub...pd\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfnmsub231pd\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfnmsub...pd\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfnmsub...ph\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfnmsub...ph\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfnmsub231ph\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfnmsub...ph\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vgetexppd\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vgetexppd\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vgetexppd\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vgetexpph\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vgetexpph\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vgetexpph\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vgetexpps\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vgetexpps\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vgetexpps\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vgetmantpd\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vgetmantpd\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vgetmantpd\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vgetmantph\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vgetmantph\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vgetmantph\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vgetmantps\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vgetmantps\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vgetmantps\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vmaxpd\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vmaxpd\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vmaxpd\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vmaxph\[ \\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vmaxph\[ \\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */ -/* { dg-final { scan-assembler-times "vmaxph\[ \\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vmaxps\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vmaxps\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vmaxps\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vminpd\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vminpd\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vminpd\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vminph\[ \\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vminph\[ \\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */ -/* { dg-final { scan-assembler-times "vminph\[ \\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vminps\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vminps\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vminps\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vmulpd\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vmulpd\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vmulpd\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vmulph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vmulph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vmulph\[ \\t\]+\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vmulps\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vmulps\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vmulps\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vrangepd\[ \\t\]+\[^\$\n\]*\\$\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vrangepd\[ \\t\]+\[^\$\n\]*\\$\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vrangepd\[ \\t\]+\[^\$\n\]*\\$\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vrangeps\[ \\t\]+\[^\$\n\]*\\$\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vrangeps\[ \\t\]+\[^\$\n\]*\\$\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vrangeps\[ \\t\]+\[^\$\n\]*\\$\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vreducepd\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vreducepd\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vreducepd\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vreduceph\[ \\t\]+\[^\{\n\]*\{sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vreduceph\[ \\t\]+\[^\{\n\]*\{sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vreduceph\[ \\t\]+\[^\{\n\]*\{sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vreduceps\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vreduceps\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vreduceps\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vrndscalepd\[ \\t\]+\\S*,\[ \\t\]+\{sae\}\[^\n\]*%ymm\[0-9\]+\[^\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vrndscalepd\[ \\t\]+\\S*,\[ \\t\]+\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vrndscalepd\[ \\t\]+\\S*,\[ \\t\]+\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vrndscaleph\[ \\t\]+\[^\n\]*\{sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vrndscaleph\[ \\t\]+\[^\n\]*\{sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vrndscaleph\[ \\t\]+\[^\n\]*\{sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vrndscaleps\[ \\t\]+\\S*,\[ \\t\]+\{sae\}\[^\n\]*%ymm\[0-9\]+\[^\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vrndscaleps\[ \\t\]+\\S*,\[ \\t\]+\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vrndscaleps\[ \\t\]+\\S*,\[ \\t\]+\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vscalefpd\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vscalefpd\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vscalefpd\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vscalefph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vscalefph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vscalefph\[ \\t\]+\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vscalefps\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vscalefps\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vscalefps\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vsqrtpd\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vsqrtpd\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vsqrtpd\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vsqrtph\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vsqrtph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vsqrtph\[ \\t\]+\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vsqrtps\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vsqrtps\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vsqrtps\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vsubpd\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vsubpd\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vsubpd\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vsubph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vsubph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vsubph\[ \\t\]+\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vsubps\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vsubps\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vsubps\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ - -#include <immintrin.h> - -volatile __m128 hx; -volatile __m128i hxi; -volatile __m128h hxh; -volatile __m256 x; -volatile __m256d xd; -volatile __m256h xh; -volatile __m256i xi; -volatile __mmask8 m8; -volatile __mmask16 m16; -volatile __mmask32 m32; - -void extern -avx10_2_test_1 (void) -{ - xh = _mm256_cvt_roundepu16_ph (xi, 4); - xh = _mm256_mask_cvt_roundepu16_ph (xh, m16, xi, 8); - xh = _mm256_maskz_cvt_roundepu16_ph (m16, xi, 11); - - xh = _mm256_cvt_roundepi16_ph (xi, 4); - xh = _mm256_mask_cvt_roundepi16_ph (xh, m16, xi, 8); - xh = _mm256_maskz_cvt_roundepi16_ph (m16, xi, 11); -} - -void extern -avx10_2_test_2 (void) -{ - xd = _mm256_div_round_pd (xd, xd, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - xd = _mm256_mask_div_round_pd (xd, m8, xd, xd, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC); - xd = _mm256_maskz_div_round_pd (m8, xd, xd, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); - - xh = _mm256_div_round_ph (xh, xh, 8); - xh = _mm256_mask_div_round_ph (xh, m16, xh, xh, 8); - xh = _mm256_maskz_div_round_ph (m16, xh, xh, 11); - - x = _mm256_div_round_ps (x, x, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - x = _mm256_mask_div_round_ps (x, m16, x, x, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC); - x = _mm256_maskz_div_round_ps (m16, x, x, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); -} - -void extern -avx10_2_test_3 (void) -{ - xh = _mm256_fcmadd_round_pch (xh, xh, xh, 8); - xh = _mm256_mask_fcmadd_round_pch (xh, m8, xh, xh, 8); - xh = _mm256_mask3_fcmadd_round_pch (xh, xh, xh, m8, 8); - xh = _mm256_maskz_fcmadd_round_pch (m8, xh, xh, xh, 11); -} - -void extern -avx10_2_test_4 (void) -{ - xh = _mm256_fcmul_round_pch (xh, xh, 8); - xh = _mm256_mask_fcmul_round_pch (xh, m8, xh, xh, 8); - xh = _mm256_maskz_fcmul_round_pch (m8, xh, xh, 11); -} - -void extern -avx10_2_test_5 (void) -{ - xh = _mm256_cmul_round_pch (xh, xh, 8); - xh = _mm256_mask_cmul_round_pch (xh, m8, xh, xh, 8); - xh = _mm256_maskz_cmul_round_pch (m8, xh, xh, 11); -} - -void extern -avx10_2_test_6 (void) -{ - xd = _mm256_fixupimm_round_pd (xd, xd, xi, 3, _MM_FROUND_NO_EXC); - xd = _mm256_mask_fixupimm_round_pd (xd, m8, xd, xi, 3, _MM_FROUND_NO_EXC); - xd = _mm256_maskz_fixupimm_round_pd (m8, xd, xd, xi, 3, _MM_FROUND_NO_EXC); - - x = _mm256_fixupimm_round_ps (x, x, xi, 3, _MM_FROUND_NO_EXC); - x = _mm256_mask_fixupimm_round_ps (x, m8, x, xi, 3, _MM_FROUND_NO_EXC); - x = _mm256_maskz_fixupimm_round_ps (m8, x, x, xi, 3, _MM_FROUND_NO_EXC); -} - -void extern -avx10_2_test_7 (void) -{ - xd = _mm256_fmadd_round_pd (xd, xd, xd, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - xd = _mm256_mask_fmadd_round_pd (xd, m8, xd, xd, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC); - xd = _mm256_mask3_fmadd_round_pd (xd, xd, xd, m8, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC); - xd = _mm256_maskz_fmadd_round_pd (m8, xd, xd, xd, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); - - xh = _mm256_fmadd_round_ph (xh, xh, xh, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - xh = _mm256_mask_fmadd_round_ph (xh, m16, xh, xh, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC); - xh = _mm256_mask3_fmadd_round_ph (xh, xh, xh, m16, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC); - xh = _mm256_maskz_fmadd_round_ph (m16, xh, xh, xh, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); - - x = _mm256_fmadd_round_ps (x, x, x, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - x = _mm256_mask_fmadd_round_ps (x, m8, x, x, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC); - x = _mm256_mask3_fmadd_round_ps (x, x, x, m8, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC); - x = _mm256_maskz_fmadd_round_ps (m8, x, x, x, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); -} - -void extern -avx10_2_test_8 (void) -{ - xh = _mm256_fmadd_round_pch (xh, xh, xh, 8); - xh = _mm256_mask_fmadd_round_pch (xh, m8, xh, xh, 8); - xh = _mm256_mask3_fmadd_round_pch (xh, xh, xh, m8, 8); - xh = _mm256_maskz_fmadd_round_pch (m8, xh, xh, xh, 11); -} - -void extern -avx10_2_test_9 (void) -{ - xd = _mm256_fmaddsub_round_pd (xd, xd, xd, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - xd = _mm256_mask_fmaddsub_round_pd (xd, m8, xd, xd, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC); - xd = _mm256_mask3_fmaddsub_round_pd (xd, xd, xd, m8, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC); - xd = _mm256_maskz_fmaddsub_round_pd (m8, xd, xd, xd, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); - - xh = _mm256_fmaddsub_round_ph (xh, xh, xh, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - xh = _mm256_mask_fmaddsub_round_ph (xh, m8, xh, xh, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC); - xh = _mm256_mask3_fmaddsub_round_ph (xh, xh, xh, m8, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC); - xh = _mm256_maskz_fmaddsub_round_ph (m8, xh, xh, xh, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); - - x = _mm256_fmaddsub_round_ps (x, x, x, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - x = _mm256_mask_fmaddsub_round_ps (x, m8, x, x, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC); - x = _mm256_mask3_fmaddsub_round_ps (x, x, x, m8, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC); - x = _mm256_maskz_fmaddsub_round_ps (m8, x, x, x, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); -} - -void extern -avx10_2_test_10 (void) -{ - xd = _mm256_fmsub_round_pd (xd, xd, xd, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - xd = _mm256_mask_fmsub_round_pd (xd, m8, xd, xd, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC); - xd = _mm256_mask3_fmsub_round_pd (xd, xd, xd, m8, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC); - xd = _mm256_maskz_fmsub_round_pd (m8, xd, xd, xd, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); - - xh = _mm256_fmsub_round_ph (xh, xh, xh, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - xh = _mm256_mask_fmsub_round_ph (xh, m8, xh, xh, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC); - xh = _mm256_mask3_fmsub_round_ph (xh, xh, xh, m8, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC); - xh = _mm256_maskz_fmsub_round_ph (m8, xh, xh, xh, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); - - x = _mm256_fmsub_round_ps (x, x, x, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - x = _mm256_mask_fmsub_round_ps (x, m8, x, x, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC); - x = _mm256_mask3_fmsub_round_ps (x, x, x, m8, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC); - x = _mm256_maskz_fmsub_round_ps (m8, x, x, x, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); -} - -void extern -avx10_2_test_11 (void) -{ - xd = _mm256_fmsubadd_round_pd (xd, xd, xd, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - xd = _mm256_mask_fmsubadd_round_pd (xd, m8, xd, xd, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC); - xd = _mm256_mask3_fmsubadd_round_pd (xd, xd, xd, m8, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC); - xd = _mm256_maskz_fmsubadd_round_pd (m8, xd, xd, xd, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); - - xh = _mm256_fmsubadd_round_ph (xh, xh, xh, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - xh = _mm256_mask_fmsubadd_round_ph (xh, m8, xh, xh, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC); - xh = _mm256_mask3_fmsubadd_round_ph (xh, xh, xh, m8, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC); - xh = _mm256_maskz_fmsubadd_round_ph (m8, xh, xh, xh, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); - - x = _mm256_fmsubadd_round_ps (x, x, x, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - x = _mm256_mask_fmsubadd_round_ps (x, m8, x, x, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC); - x = _mm256_mask3_fmsubadd_round_ps (x, x, x, m8, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC); - x = _mm256_maskz_fmsubadd_round_ps (m8, x, x, x, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); -} - -void extern -avx10_2_test_12 (void) -{ - xh = _mm256_fmul_round_pch (xh, xh, 8); - xh = _mm256_mask_fmul_round_pch (xh, m8, xh, xh, 8); - xh = _mm256_maskz_fmul_round_pch (m8, xh, xh, 11); -} - -void extern -avx10_2_test_13 (void) -{ - xh = _mm256_mul_round_pch (xh, xh, 8); - xh = _mm256_mask_mul_round_pch (xh, m8, xh, xh, 8); - xh = _mm256_maskz_mul_round_pch (m8, xh, xh, 11); -} - -void extern -avx10_2_test_14 (void) -{ - xd = _mm256_fnmadd_round_pd (xd, xd, xd, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - xd = _mm256_mask_fnmadd_round_pd (xd, m8, xd, xd, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC); - xd = _mm256_mask3_fnmadd_round_pd (xd, xd, xd, m8, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC); - xd = _mm256_maskz_fnmadd_round_pd (m8, xd, xd, xd, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); - - xh = _mm256_fnmadd_round_ph (xh, xh, xh, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - xh = _mm256_mask_fnmadd_round_ph (xh, m8, xh, xh, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC); - xh = _mm256_mask3_fnmadd_round_ph (xh, xh, xh, m8, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC); - xh = _mm256_maskz_fnmadd_round_ph (m8, xh, xh, xh, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); - - x = _mm256_fnmadd_round_ps (x, x, x, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - x = _mm256_mask_fnmadd_round_ps (x, m8, x, x, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC); - x = _mm256_mask3_fnmadd_round_ps (x, x, x, m8, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC); - x = _mm256_maskz_fnmadd_round_ps (m8, x, x, x, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); -} - -void extern -avx10_2_test_15 (void) -{ - xd = _mm256_fnmsub_round_pd (xd, xd, xd, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - xd = _mm256_mask_fnmsub_round_pd (xd, m8, xd, xd, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC); - xd = _mm256_mask3_fnmsub_round_pd (xd, xd, xd, m8, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC); - xd = _mm256_maskz_fnmsub_round_pd (m8, xd, xd, xd, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); - - xh = _mm256_fnmsub_round_ph (xh, xh, xh, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - xh = _mm256_mask_fnmsub_round_ph (xh, m8, xh, xh, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC); - xh = _mm256_mask3_fnmsub_round_ph (xh, xh, xh, m8, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC); - xh = _mm256_maskz_fnmsub_round_ph (m8, xh, xh, xh, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); - - x = _mm256_fnmsub_round_ps (x, x, x, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - x = _mm256_mask_fnmsub_round_ps (x, m8, x, x, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC); - x = _mm256_mask3_fnmsub_round_ps (x, x, x, m8, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC); - x = _mm256_maskz_fnmsub_round_ps (m8, x, x, x, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); -} - -void extern -avx10_2_test_16 (void) -{ - xd = _mm256_getexp_round_pd (xd, _MM_FROUND_NO_EXC); - xd = _mm256_mask_getexp_round_pd (xd, m8, xd, _MM_FROUND_NO_EXC); - xd = _mm256_maskz_getexp_round_pd (m8, xd, _MM_FROUND_NO_EXC); - - xh = _mm256_getexp_round_ph (xh, _MM_FROUND_NO_EXC); - xh = _mm256_mask_getexp_round_ph (xh, m16, xh, _MM_FROUND_NO_EXC); - xh = _mm256_maskz_getexp_round_ph (m16, xh, _MM_FROUND_NO_EXC); - - x = _mm256_getexp_round_ps (x, _MM_FROUND_NO_EXC); - x = _mm256_mask_getexp_round_ps (x, m8, x, _MM_FROUND_NO_EXC); - x = _mm256_maskz_getexp_round_ps (m8, x, _MM_FROUND_NO_EXC); -} - -void extern -avx10_2_test_17 (void) -{ - xd = _mm256_getmant_round_pd (xd, _MM_MANT_NORM_p75_1p5, _MM_MANT_SIGN_src, - _MM_FROUND_NO_EXC); - xd = _mm256_mask_getmant_round_pd (xd, m8, xd, _MM_MANT_NORM_p75_1p5, - _MM_MANT_SIGN_src, _MM_FROUND_NO_EXC); - xd = _mm256_maskz_getmant_round_pd (m8, xd, _MM_MANT_NORM_p75_1p5, - _MM_MANT_SIGN_src, _MM_FROUND_NO_EXC); - - xh = _mm256_getmant_round_ph (xh, _MM_MANT_NORM_p75_1p5, _MM_MANT_SIGN_src, - _MM_FROUND_NO_EXC); - xh = _mm256_mask_getmant_round_ph (xh, m16, xh, _MM_MANT_NORM_p75_1p5, - _MM_MANT_SIGN_src, _MM_FROUND_NO_EXC); - xh = _mm256_maskz_getmant_round_ph (m16, xh, _MM_MANT_NORM_p75_1p5, - _MM_MANT_SIGN_src, _MM_FROUND_NO_EXC); - - x = _mm256_getmant_round_ps (x, _MM_MANT_NORM_p75_1p5, _MM_MANT_SIGN_src, - _MM_FROUND_NO_EXC); - x = _mm256_mask_getmant_round_ps (x, m8, x, _MM_MANT_NORM_p75_1p5, - _MM_MANT_SIGN_src, _MM_FROUND_NO_EXC); - x = _mm256_maskz_getmant_round_ps (m8, x, _MM_MANT_NORM_p75_1p5, - _MM_MANT_SIGN_src, _MM_FROUND_NO_EXC); -} - -void extern -avx10_2_test_18 (void) -{ - xd = _mm256_max_round_pd (xd, xd, _MM_FROUND_NO_EXC); - xd = _mm256_mask_max_round_pd (xd, m8, xd, xd, _MM_FROUND_NO_EXC); - xd = _mm256_maskz_max_round_pd (m8, xd, xd, _MM_FROUND_NO_EXC); - - xh = _mm256_max_round_ph (xh, xh, _MM_FROUND_NO_EXC); - xh = _mm256_mask_max_round_ph (xh, m16, xh, xh, _MM_FROUND_NO_EXC); - xh = _mm256_maskz_max_round_ph (m16, xh, xh, _MM_FROUND_NO_EXC); - - x = _mm256_max_round_ps (x, x, _MM_FROUND_NO_EXC); - x = _mm256_mask_max_round_ps (x, m8, x, x, _MM_FROUND_NO_EXC); - x = _mm256_maskz_max_round_ps (m8, x, x, _MM_FROUND_NO_EXC); -} - -void extern -avx10_2_test_19 (void) -{ - xd = _mm256_min_round_pd (xd, xd, _MM_FROUND_NO_EXC); - xd = _mm256_mask_min_round_pd (xd, m8, xd, xd, _MM_FROUND_NO_EXC); - xd = _mm256_maskz_min_round_pd (m8, xd, xd, _MM_FROUND_NO_EXC); - - xh = _mm256_min_round_ph (xh, xh, _MM_FROUND_NO_EXC); - xh = _mm256_mask_min_round_ph (xh, m16, xh, xh, _MM_FROUND_NO_EXC); - xh = _mm256_maskz_min_round_ph (m16, xh, xh, _MM_FROUND_NO_EXC); - - x = _mm256_min_round_ps (x, x, _MM_FROUND_NO_EXC); - x = _mm256_mask_min_round_ps (x, m8, x, x, _MM_FROUND_NO_EXC); - x = _mm256_maskz_min_round_ps (m8, x, x, _MM_FROUND_NO_EXC); -} - -void extern -avx10_2_test_20 (void) -{ - xd = _mm256_mul_round_pd (xd, xd, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - xd = _mm256_mask_mul_round_pd (xd, m8, xd, xd, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC); - xd = _mm256_maskz_mul_round_pd (m8, xd, xd, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); - - xh = _mm256_mul_round_ph (xh, xh, 8); - xh = _mm256_mask_mul_round_ph (xh, m16, xh, xh, 8); - xh = _mm256_maskz_mul_round_ph (m16, xh, xh, 11); - - x = _mm256_mul_round_ps (x, x, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - x = _mm256_mask_mul_round_ps (x, m8, x, x, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC); - x = _mm256_maskz_mul_round_ps (m8, x, x, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); -} - -void extern -avx10_2_test_21 (void) -{ - xd = _mm256_range_round_pd (xd, xd, 15, _MM_FROUND_NO_EXC); - xd = _mm256_mask_range_round_pd (xd, m8, xd, xd, 15, _MM_FROUND_NO_EXC); - xd = _mm256_maskz_range_round_pd (m8, xd, xd, 15, _MM_FROUND_NO_EXC); - - x = _mm256_range_round_ps (x, x, 15, _MM_FROUND_NO_EXC); - x = _mm256_mask_range_round_ps (x, m16, x, x, 15, _MM_FROUND_NO_EXC); - x = _mm256_maskz_range_round_ps (m16, x, x, 15, _MM_FROUND_NO_EXC); -} - -void extern -avx10_2_test_22 (void) -{ - xd = _mm256_reduce_round_pd (xd, 123, _MM_FROUND_NO_EXC); - xd = _mm256_mask_reduce_round_pd (xd, m8, xd, 123, _MM_FROUND_NO_EXC); - xd = _mm256_maskz_reduce_round_pd (m8, xd, 123, _MM_FROUND_NO_EXC); - - xh = _mm256_reduce_round_ph (xh, 123, _MM_FROUND_NO_EXC); - xh = _mm256_mask_reduce_round_ph (xh, m16, xh, 123, _MM_FROUND_NO_EXC); - xh = _mm256_maskz_reduce_round_ph (m16, xh, 123, _MM_FROUND_NO_EXC); - - x = _mm256_reduce_round_ps (x, 123, _MM_FROUND_NO_EXC); - x = _mm256_mask_reduce_round_ps (x, m8, x, 123, _MM_FROUND_NO_EXC); - x = _mm256_maskz_reduce_round_ps (m8, x, 123, _MM_FROUND_NO_EXC); -} - -void extern -avx10_2_test_23 (void) -{ - xd = _mm256_roundscale_round_pd (xd, 0x42, _MM_FROUND_NO_EXC); - xd = _mm256_mask_roundscale_round_pd (xd, 2, xd, 0x42, _MM_FROUND_NO_EXC); - xd = _mm256_maskz_roundscale_round_pd (2, xd, 0x42, _MM_FROUND_NO_EXC); - - xh = _mm256_roundscale_round_ph (xh, 123, 8); - xh = _mm256_mask_roundscale_round_ph (xh, m16, xh, 123, 8); - xh = _mm256_maskz_roundscale_round_ph (m16, xh, 123, 8); - - x = _mm256_roundscale_round_ps (x, 0x42, _MM_FROUND_NO_EXC); - x = _mm256_mask_roundscale_round_ps (x, 2, x, 0x42, _MM_FROUND_NO_EXC); - x = _mm256_maskz_roundscale_round_ps (2, x, 0x42, _MM_FROUND_NO_EXC); -} - -void extern -avx10_2_test_24 (void) -{ - xd = _mm256_scalef_round_pd (xd, xd, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - xd = _mm256_mask_scalef_round_pd (xd, m8, xd, xd, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC); - xd = _mm256_maskz_scalef_round_pd (m8, xd, xd, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); - - xh = _mm256_scalef_round_ph (xh, xh, 8); - xh = _mm256_mask_scalef_round_ph (xh, m16, xh, xh, 8); - xh = _mm256_maskz_scalef_round_ph (m16, xh, xh, 11); - - x = _mm256_scalef_round_ps (x, x, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - x = _mm256_mask_scalef_round_ps (x, m8, x, x, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC); - x = _mm256_maskz_scalef_round_ps (m8, x, x, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); -} - -void extern -avx10_2_test_25 (void) -{ - xd = _mm256_sqrt_round_pd (xd, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - xd = _mm256_mask_sqrt_round_pd (xd, m8, xd, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC); - xd = _mm256_maskz_sqrt_round_pd (m8, xd, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); - - xh = _mm256_sqrt_round_ph (xh, 4); - xh = _mm256_mask_sqrt_round_ph (xh, m16, xh, 8); - xh = _mm256_maskz_sqrt_round_ph (m16, xh, 11); - - x = _mm256_sqrt_round_ps (x, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - x = _mm256_mask_sqrt_round_ps (x, m8, x, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC); - x = _mm256_maskz_sqrt_round_ps (m8, x, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); -} - -void extern -avx10_2_test_26 (void) -{ - xd = _mm256_sub_round_pd (xd, xd, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - xd = _mm256_mask_sub_round_pd (xd, m8, xd, xd, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC); - xd = _mm256_maskz_sub_round_pd (m8, xd, xd, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); - - xh = _mm256_sub_round_ph (xh, xh, 8); - xh = _mm256_mask_sub_round_ph (xh, m16, xh, xh, 8); - xh = _mm256_maskz_sub_round_ph (m16, xh, xh, 11); - - x = _mm256_sub_round_ps (x, x, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - x = _mm256_mask_sub_round_ps (x, m8, x, x, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC); - x = _mm256_maskz_sub_round_ps (m8, x, x, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); -} diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-satcvt-1.c b/gcc/testsuite/gcc.target/i386/avx10_2-satcvt-1.c index dd8b874..4ae1fc1 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-satcvt-1.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-satcvt-1.c @@ -1,45 +1,29 @@ /* { dg-do compile } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-final { scan-assembler-times "vcvtph2ibs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 2 } } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-final { scan-assembler-times "vcvtph2ibs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvtph2ibs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvtph2ibs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2ibs\[ \\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2ibs\[ \\t\]+\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2iubs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 2 } } */ +/* { dg-final { scan-assembler-times "vcvtph2iubs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvtph2iubs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvtph2iubs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2iubs\[ \\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2iubs\[ \\t\]+\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttph2ibs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 2 } } */ +/* { dg-final { scan-assembler-times "vcvttph2ibs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvttph2ibs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvttph2ibs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttph2ibs\[ \\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttph2ibs\[ \\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttph2iubs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 2 } } */ +/* { dg-final { scan-assembler-times "vcvttph2iubs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvttph2iubs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvttph2iubs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttph2iubs\[ \\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttph2iubs\[ \\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtps2ibs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 2 } } */ +/* { dg-final { scan-assembler-times "vcvtps2ibs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvtps2ibs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvtps2ibs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtps2ibs\[ \\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtps2ibs\[ \\t\]+\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtps2iubs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 2 } } */ +/* { dg-final { scan-assembler-times "vcvtps2iubs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvtps2iubs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvtps2iubs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtps2iubs\[ \\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtps2iubs\[ \\t\]+\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttps2ibs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 2 } } */ +/* { dg-final { scan-assembler-times "vcvttps2ibs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvttps2ibs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvttps2ibs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttps2ibs\[ \\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttps2ibs\[ \\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttps2iubs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 2 } } */ +/* { dg-final { scan-assembler-times "vcvttps2iubs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvttps2iubs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvttps2iubs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttps2iubs\[ \\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttps2iubs\[ \\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvtbf162ibs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvtbf162ibs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvtbf162ibs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ @@ -91,51 +75,27 @@ /* { dg-final { scan-assembler-times "vcvttpd2dqsy\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvttpd2dqsy\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvttpd2dqsy\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttpd2dqsy\[ \\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttpd2dqsy\[ \\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttpd2dqsy\[ \\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvttpd2qqs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvttpd2qqs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvttpd2qqs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttpd2qqs\[ \\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttpd2qqs\[ \\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttpd2qqs\[ \\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvttpd2udqsy\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvttpd2udqsy\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvttpd2udqsy\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttpd2udqsy\[ \\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttpd2udqsy\[ \\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttpd2udqsy\[ \\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvttpd2uqqs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvttpd2uqqs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvttpd2uqqs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttpd2uqqs\[ \\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttpd2uqqs\[ \\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttpd2uqqs\[ \\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvttps2dqs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvttps2dqs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvttps2dqs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttps2dqs\[ \\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttps2dqs\[ \\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttps2dqs\[ \\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvttps2qqs\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvttps2qqs\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvttps2qqs\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttps2qqs\[ \\t\]+\{sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttps2qqs\[ \\t\]+\{sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttps2qqs\[ \\t\]+\{sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvttps2udqs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvttps2udqs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvttps2udqs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttps2udqs\[ \\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttps2udqs\[ \\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttps2udqs\[ \\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvttps2uqqs\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvttps2uqqs\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvttps2uqqs\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttps2uqqs\[ \\t\]+\{sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttps2uqqs\[ \\t\]+\{sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttps2uqqs\[ \\t\]+\{sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvttpd2dqsx\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvttpd2dqsx\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvttpd2dqsx\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ @@ -202,58 +162,34 @@ avx10_2_test (void) xi = _mm256_ipcvts_ph_epi8 (xh); xi = _mm256_mask_ipcvts_ph_epi8 (xi, m16, xh); xi = _mm256_maskz_ipcvts_ph_epi8 (m16, xh); - xi = _mm256_ipcvts_roundph_epi8 (xh, 4); - xi = _mm256_mask_ipcvts_roundph_epi8 (xi, m16, xh, 8); - xi = _mm256_maskz_ipcvts_roundph_epi8 (m16, xh, 11); xi = _mm256_ipcvts_ph_epu8 (xh); xi = _mm256_mask_ipcvts_ph_epu8 (xi, m16, xh); xi = _mm256_maskz_ipcvts_ph_epu8 (m16, xh); - xi = _mm256_ipcvts_roundph_epu8 (xh, 4); - xi = _mm256_mask_ipcvts_roundph_epu8 (xi, m16, xh, 8); - xi = _mm256_maskz_ipcvts_roundph_epu8 (m16, xh, 11); xi = _mm256_ipcvtts_ph_epi8 (xh); xi = _mm256_mask_ipcvtts_ph_epi8 (xi, m16, xh); xi = _mm256_maskz_ipcvtts_ph_epi8 (m16, xh); - xi = _mm256_ipcvtts_roundph_epi8 (xh, 4); - xi = _mm256_mask_ipcvtts_roundph_epi8 (xi, m16, xh, 8); - xi = _mm256_maskz_ipcvtts_roundph_epi8 (m16, xh, 8); xi = _mm256_ipcvtts_ph_epu8 (xh); xi = _mm256_mask_ipcvtts_ph_epu8 (xi, m16, xh); xi = _mm256_maskz_ipcvtts_ph_epu8 (m16, xh); - xi = _mm256_ipcvtts_roundph_epu8 (xh, 4); - xi = _mm256_mask_ipcvtts_roundph_epu8 (xi, m16, xh, 8); - xi = _mm256_maskz_ipcvtts_roundph_epu8 (m16, xh, 8); xi = _mm256_ipcvts_ps_epi8 (x); xi = _mm256_mask_ipcvts_ps_epi8 (xi, m8, x); xi = _mm256_maskz_ipcvts_ps_epi8 (m8, x); - xi = _mm256_ipcvts_roundps_epi8 (x, 4); - xi = _mm256_mask_ipcvts_roundps_epi8 (xi, m8, x, 8); - xi = _mm256_maskz_ipcvts_roundps_epi8 (m8, x, 11); xi = _mm256_ipcvts_ps_epu8 (x); xi = _mm256_mask_ipcvts_ps_epu8 (xi, m8, x); xi = _mm256_maskz_ipcvts_ps_epu8 (m8, x); - xi = _mm256_ipcvts_roundps_epu8 (x, 4); - xi = _mm256_mask_ipcvts_roundps_epu8 (xi, m8, x, 8); - xi = _mm256_maskz_ipcvts_roundps_epu8 (m8, x, 11); xi = _mm256_ipcvtts_ps_epi8 (x); xi = _mm256_mask_ipcvtts_ps_epi8 (xi, m8, x); xi = _mm256_maskz_ipcvtts_ps_epi8 (m8, x); - xi = _mm256_ipcvtts_roundps_epi8 (x, 4); - xi = _mm256_mask_ipcvtts_roundps_epi8 (xi, m8, x, 8); - xi = _mm256_maskz_ipcvtts_roundps_epi8 (m8, x, 8); xi = _mm256_ipcvtts_ps_epu8 (x); xi = _mm256_mask_ipcvtts_ps_epu8 (xi, m8, x); xi = _mm256_maskz_ipcvtts_ps_epu8 (m8, x); - xi = _mm256_ipcvtts_roundps_epu8 (x, 4); - xi = _mm256_mask_ipcvtts_roundps_epu8 (xi, m8, x, 8); - xi = _mm256_maskz_ipcvtts_roundps_epu8 (m8, x, 8); xi = _mm256_ipcvts_bf16_epi8 (xbh); xi = _mm256_mask_ipcvts_bf16_epi8 (xi, m16, xbh); @@ -322,58 +258,34 @@ avx10_2_test (void) hxi = _mm256_cvtts_pd_epi32 (xd); hxi = _mm256_mask_cvtts_pd_epi32 (hxi, m8, xd); hxi = _mm256_maskz_cvtts_pd_epi32 (m8, xd); - hxi = _mm256_cvtts_roundpd_epi32 (xd, 8); - hxi = _mm256_mask_cvtts_roundpd_epi32 (hxi, m8, xd, 8); - hxi = _mm256_maskz_cvtts_roundpd_epi32 (m8, xd, 8); xi = _mm256_cvtts_pd_epi64 (xd); xi = _mm256_mask_cvtts_pd_epi64 (xi, m8, xd); xi = _mm256_maskz_cvtts_pd_epi64 (m8, xd); - xi = _mm256_cvtts_roundpd_epi64 (xd, 8); - xi = _mm256_mask_cvtts_roundpd_epi64 (xi, m8, xd, 8); - xi = _mm256_maskz_cvtts_roundpd_epi64 (m8, xd, 8); hxi = _mm256_cvtts_pd_epu32 (xd); hxi = _mm256_mask_cvtts_pd_epu32 (hxi, m8, xd); hxi = _mm256_maskz_cvtts_pd_epu32 (m8, xd); - hxi = _mm256_cvtts_roundpd_epu32 (xd, 8); - hxi = _mm256_mask_cvtts_roundpd_epu32 (hxi, m8, xd, 8); - hxi = _mm256_maskz_cvtts_roundpd_epu32 (m8, xd, 8); xi = _mm256_cvtts_pd_epu64 (xd); xi = _mm256_mask_cvtts_pd_epu64 (xi, m8, xd); xi = _mm256_maskz_cvtts_pd_epu64 (m8, xd); - xi = _mm256_cvtts_roundpd_epu64 (xd, 8); - xi = _mm256_mask_cvtts_roundpd_epu64 (xi, m8, xd, 8); - xi = _mm256_maskz_cvtts_roundpd_epu64 (m8, xd, 8); xi = _mm256_cvtts_ps_epi32 (x); xi = _mm256_mask_cvtts_ps_epi32 (xi, m16, x); xi = _mm256_maskz_cvtts_ps_epi32 (m16, x); - xi = _mm256_cvtts_roundps_epi32 (x, 8); - xi = _mm256_mask_cvtts_roundps_epi32 (xi, m16, x, 8); - xi = _mm256_maskz_cvtts_roundps_epi32 (m16, x, 8); xi = _mm256_cvtts_ps_epi64 (hx); xi = _mm256_mask_cvtts_ps_epi64 (xi, m8, hx); xi = _mm256_maskz_cvtts_ps_epi64 (m8, hx); - xi = _mm256_cvtts_roundps_epi64 (hx, 8); - xi = _mm256_mask_cvtts_roundps_epi64 (xi, m8, hx, 8); - xi = _mm256_maskz_cvtts_roundps_epi64 (m8, hx, 8); xi = _mm256_cvtts_ps_epu32 (x); xi = _mm256_mask_cvtts_ps_epu32 (xi, m16, x); xi = _mm256_maskz_cvtts_ps_epu32 (m16, x); - xi = _mm256_cvtts_roundps_epu32 (x, 8); - xi = _mm256_mask_cvtts_roundps_epu32 (xi, m16, x, 8); - xi = _mm256_maskz_cvtts_roundps_epu32 (m16, x, 8); xi = _mm256_cvtts_ps_epu64 (hx); xi = _mm256_mask_cvtts_ps_epu64 (xi, m8, hx); xi = _mm256_maskz_cvtts_ps_epu64 (m8, hx); - xi = _mm256_cvtts_roundps_epu64 (hx, 8); - xi = _mm256_mask_cvtts_roundps_epu64 (xi, m8, hx, 8); - xi = _mm256_maskz_cvtts_roundps_epu64 (m8, hx, 8); hxi = _mm_cvtts_pd_epi32 (hxd); hxi = _mm_mask_cvtts_pd_epi32 (hxi, m8, hxd); diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vaddbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vaddbf16-2.c index c2564b6..d880454 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vaddbf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vaddbf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcmpbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcmpbf16-2.c index 7ac7eda..cb6506a 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcmpbf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcmpbf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcomisbf16-1.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcomisbf16-1.c index ac981b1..3f08ff5 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcomisbf16-1.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcomisbf16-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=x86-64-v3 -mavx10.2-256 -O2" } */ +/* { dg-options "-march=x86-64-v3 -mavx10.2 -O2" } */ /* { dg-final { scan-assembler-times "vcomisbf16\[ \\t\]+\[^{}\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 6 } } */ /* { dg-final { scan-assembler-times "jp" 2 } } */ #include <immintrin.h> diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcomisbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcomisbf16-2.c index 1dd15a9..7266e3a 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcomisbf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcomisbf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX10_SCALAR diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcvt2ph2bf8-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcvt2ph2bf8-2.c index eee2539..9dd940c 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcvt2ph2bf8-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcvt2ph2bf8-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcvt2ph2bf8s-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcvt2ph2bf8s-2.c index ee5b35a..2a9caca 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcvt2ph2bf8s-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcvt2ph2bf8s-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcvt2ph2hf8-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcvt2ph2hf8-2.c index 683196b..80dc248 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcvt2ph2hf8-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcvt2ph2hf8-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcvt2ph2hf8s-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcvt2ph2hf8s-2.c index 3d2c6eec..30f6a60 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcvt2ph2hf8s-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcvt2ph2hf8s-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcvt2ps2phx-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcvt2ps2phx-2.c index 82aaa6c..125713c 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcvt2ps2phx-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcvt2ps2phx-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcvtbf162ibs-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcvtbf162ibs-2.c index a328598..824ec68 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcvtbf162ibs-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcvtbf162ibs-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcvtbf162iubs-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcvtbf162iubs-2.c index 7b48ee1..b8f9925 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcvtbf162iubs-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcvtbf162iubs-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcvtbiasph2bf8-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcvtbiasph2bf8-2.c index 7769571..e3f2a81 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcvtbiasph2bf8-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcvtbiasph2bf8-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcvtbiasph2bf8s-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcvtbiasph2bf8s-2.c index 9ca0104..2b9f81d 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcvtbiasph2bf8s-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcvtbiasph2bf8s-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcvtbiasph2hf8-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcvtbiasph2hf8-2.c index 15c6dc4..27e5f210 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcvtbiasph2hf8-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcvtbiasph2hf8-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcvtbiasph2hf8s-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcvtbiasph2hf8s-2.c index 0854a71..b93a1f978 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcvtbiasph2hf8s-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcvtbiasph2hf8s-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcvthf82ph-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcvthf82ph-2.c index 57203d5..d647fde 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcvthf82ph-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcvthf82ph-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcvtph2bf8-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcvtph2bf8-2.c index df0d10d..826b5ff 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcvtph2bf8-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcvtph2bf8-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcvtph2bf8s-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcvtph2bf8s-2.c index eeee592..c5b9576 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcvtph2bf8s-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcvtph2bf8s-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcvtph2hf8-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcvtph2hf8-2.c index 12a4ebf..00f2928 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcvtph2hf8-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcvtph2hf8-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcvtph2hf8s-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcvtph2hf8s-2.c index cea6899..a2fa0c8 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcvtph2hf8s-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcvtph2hf8s-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcvtph2ibs-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcvtph2ibs-2.c index c0261f4..2265f81 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcvtph2ibs-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcvtph2ibs-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcvtph2iubs-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcvtph2iubs-2.c index ef53dd3..c4b2b575 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcvtph2iubs-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcvtph2iubs-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcvtps2ibs-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcvtps2ibs-2.c index 9f6a8ad..fdf825b 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcvtps2ibs-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcvtps2ibs-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcvtps2iubs-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcvtps2iubs-2.c index d58019e..a27d5c7 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcvtps2iubs-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcvtps2iubs-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcvttbf162ibs-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcvttbf162ibs-2.c index 066bc06..0585048 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcvttbf162ibs-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcvttbf162ibs-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcvttbf162iubs-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcvttbf162iubs-2.c index 38021ca..3082ca0 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcvttbf162iubs-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcvttbf162iubs-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcvttpd2dqs-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcvttpd2dqs-2.c index e4f71c2..d23024d 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcvttpd2dqs-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcvttpd2dqs-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcvttpd2qqs-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcvttpd2qqs-2.c index 466ce37..d7aa1e5 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcvttpd2qqs-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcvttpd2qqs-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcvttpd2udqs-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcvttpd2udqs-2.c index 761c7c5..88caedf 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcvttpd2udqs-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcvttpd2udqs-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcvttpd2uqqs-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcvttpd2uqqs-2.c index 42fb9e7..3304eeb 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcvttpd2uqqs-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcvttpd2uqqs-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcvttph2ibs-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcvttph2ibs-2.c index 52f3e13..dfa110c 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcvttph2ibs-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcvttph2ibs-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcvttph2iubs-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcvttph2iubs-2.c index b37bc72..500e323 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcvttph2iubs-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcvttph2iubs-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcvttps2dqs-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcvttps2dqs-2.c index 51db01a..d2ef60b 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcvttps2dqs-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcvttps2dqs-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcvttps2ibs-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcvttps2ibs-2.c index 745c934..7002945 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcvttps2ibs-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcvttps2ibs-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcvttps2iubs-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcvttps2iubs-2.c index 95b6238..4c05d3c 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcvttps2iubs-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcvttps2iubs-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcvttps2qqs-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcvttps2qqs-2.c index 5a39579..a7882ad 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcvttps2qqs-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcvttps2qqs-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcvttps2udqs-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcvttps2udqs-2.c index 3bb3d4c..66b654e 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcvttps2udqs-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcvttps2udqs-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcvttps2uqqs-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcvttps2uqqs-2.c index 85658bf..3f32060 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcvttps2uqqs-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcvttps2uqqs-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcvttsd2sis-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcvttsd2sis-2.c index 72c7fe4..8069497 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcvttsd2sis-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcvttsd2sis-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX10_SCALAR diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcvttsd2usis-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcvttsd2usis-2.c index bce0043..e2b18d6 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcvttsd2usis-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcvttsd2usis-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX10_SCALAR diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcvttss2sis-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcvttss2sis-2.c index 0c64922..82db8ef 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcvttss2sis-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcvttss2sis-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX10_SCALAR diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcvttss2usis-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcvttss2usis-2.c index af63bb7..c3d16ff 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcvttss2usis-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcvttss2usis-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX10_SCALAR diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vdivbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vdivbf16-2.c index ad18ce8..69d5019 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vdivbf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vdivbf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vdpphps-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vdpphps-2.c index c15d838..e2f422d 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vdpphps-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vdpphps-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vfmaddXXXbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vfmaddXXXbf16-2.c index c3aafae..85041d4 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vfmaddXXXbf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vfmaddXXXbf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vfmsubXXXbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vfmsubXXXbf16-2.c index 7a26f17..761d5d1 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vfmsubXXXbf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vfmsubXXXbf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vfnmaddXXXbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vfnmaddXXXbf16-2.c index 862a998..9b260aa 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vfnmaddXXXbf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vfnmaddXXXbf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vfnmsubXXXbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vfnmsubXXXbf16-2.c index 00da303..86539f7 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vfnmsubXXXbf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vfnmsubXXXbf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vfpclassbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vfpclassbf16-2.c index 8fb655b6..40baeca 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vfpclassbf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vfpclassbf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vgetexpbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vgetexpbf16-2.c index 1447c12..e6a707c 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vgetexpbf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vgetexpbf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vgetmantbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vgetmantbf16-2.c index 285b286..9cdec14 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vgetmantbf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vgetmantbf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vmaxbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vmaxbf16-2.c index 4591d9b..950870f 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vmaxbf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vmaxbf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vminbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vminbf16-2.c index 84912d0..9786127 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vminbf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vminbf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vminmaxbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vminmaxbf16-2.c index 4458ddb..0c181d9 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vminmaxbf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vminmaxbf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-fsignaling-nans -mfpmath=sse -O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-fsignaling-nans -mfpmath=sse -O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vminmaxpd-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vminmaxpd-2.c index 9caea72..106083d 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vminmaxpd-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vminmaxpd-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-fsignaling-nans -mfpmath=sse -O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-fsignaling-nans -mfpmath=sse -O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vminmaxph-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vminmaxph-2.c index edbbb53..d465e7a 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vminmaxph-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vminmaxph-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-fsignaling-nans -mfpmath=sse -O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-fsignaling-nans -mfpmath=sse -O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vminmaxps-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vminmaxps-2.c index 1d8b4db..88aaf5b 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vminmaxps-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vminmaxps-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-fsignaling-nans -mfpmath=sse -O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-fsignaling-nans -mfpmath=sse -O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vminmaxsd-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vminmaxsd-2.c index 7add239..b8db288 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vminmaxsd-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vminmaxsd-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-fsignaling-nans -mfpmath=sse -O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-fsignaling-nans -mfpmath=sse -O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX10_SCALAR diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vminmaxsh-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vminmaxsh-2.c index 5037337..8ce838d 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vminmaxsh-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vminmaxsh-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-fsignaling-nans -mfpmath=sse -O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-fsignaling-nans -mfpmath=sse -O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX10_SCALAR diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vminmaxss-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vminmaxss-2.c index f87cc8b..65f59ca 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vminmaxss-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vminmaxss-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-fsignaling-nans -mfpmath=sse -O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-fsignaling-nans -mfpmath=sse -O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX10_SCALAR diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vmovd-1.c b/gcc/testsuite/gcc.target/i386/avx10_2-vmovd-1.c index d6bcbe5..21bd1a1 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vmovd-1.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vmovd-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ /* { dg-final { scan-assembler-times "vmovd\t\[0-9\]+\\(%e\[bs\]p\\), %xmm0" 1 { target ia32 } } } */ /* { dg-final { scan-assembler-times "vmovss\t\[0-9\]+\\(%e\[bs\]p\\), %xmm0" 1 { target ia32 } } } */ /* { dg-final { scan-assembler-times "vmovd\t%xmm0, %xmm0" 3 { target ia32 } } } */ diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vmovd-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vmovd-2.c index ace18d6..0929950 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vmovd-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vmovd-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX10_SCALAR diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vmovw-1.c b/gcc/testsuite/gcc.target/i386/avx10_2-vmovw-1.c index 06712c5..49fa51d 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vmovw-1.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vmovw-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ /* { dg-final { scan-assembler-times "vmovw\t\[0-9\]+\\(%e\[bs\]p\\), %xmm0" 4 { target ia32 } } } */ /* { dg-final { scan-assembler-times "vmovw\t%xmm0, %xmm0" 4 { target ia32 } } } */ /* { dg-final { scan-assembler-times "vmovw\t%edi, %xmm0" 1 { target { ! ia32 } } } } */ diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vmovw-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vmovw-2.c index 54016a5..c474638 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vmovw-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vmovw-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX10_SCALAR diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vmpsadbw-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vmpsadbw-2.c index 7f01c73..fdf68e6 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vmpsadbw-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vmpsadbw-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vmulbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vmulbf16-2.c index 8bda6d6..568c0a9 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vmulbf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vmulbf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vpdpbssd-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vpdpbssd-2.c index 5565049..256d10e 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vpdpbssd-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vpdpbssd-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vpdpbssds-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vpdpbssds-2.c index 8302f17..88ab613 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vpdpbssds-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vpdpbssds-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vpdpbsud-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vpdpbsud-2.c index e41c5e4..cdbd57c 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vpdpbsud-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vpdpbsud-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vpdpbsuds-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vpdpbsuds-2.c index f27983a..5e9937a 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vpdpbsuds-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vpdpbsuds-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vpdpbuud-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vpdpbuud-2.c index d9fde4a..73e3f71 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vpdpbuud-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vpdpbuud-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vpdpbuuds-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vpdpbuuds-2.c index fe5a133..09c1c81 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vpdpbuuds-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vpdpbuuds-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vpdpwsud-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vpdpwsud-2.c index 1684967..f68d3ed 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vpdpwsud-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vpdpwsud-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vpdpwsuds-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vpdpwsuds-2.c index 1e28e5f..3b3f5df 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vpdpwsuds-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vpdpwsuds-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vpdpwusd-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vpdpwusd-2.c index bf1bddf..209e62d 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vpdpwusd-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vpdpwusd-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vpdpwusds-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vpdpwusds-2.c index 66eca16..6e9692b 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vpdpwusds-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vpdpwusds-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vpdpwuud-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vpdpwuud-2.c index 73f87fe..8feb5d7 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vpdpwuud-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vpdpwuud-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vpdpwuuds-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vpdpwuuds-2.c index 905038c..930839e 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vpdpwuuds-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vpdpwuuds-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vrcpbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vrcpbf16-2.c index 7d804c4..367b2cf 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vrcpbf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vrcpbf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vreducebf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vreducebf16-2.c index 9d4209f..318e430 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vreducebf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vreducebf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vrndscalebf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vrndscalebf16-2.c index a6ad6b0..5720438 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vrndscalebf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vrndscalebf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vrsqrtbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vrsqrtbf16-2.c index 1f33d12..6083c86 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vrsqrtbf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vrsqrtbf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vscalefbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vscalefbf16-2.c index bed0871..81b24f3 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vscalefbf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vscalefbf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vsqrtbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vsqrtbf16-2.c index fffa45c..5188e05 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vsqrtbf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vsqrtbf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vsubbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vsubbf16-2.c index 42f7d4f..16f444a 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vsubbf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vsubbf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vmovw-1b.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vmovw-1b.c index a96007d..9b08f5a 100644 --- a/gcc/testsuite/gcc.target/i386/avx512fp16-vmovw-1b.c +++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vmovw-1b.c @@ -1,4 +1,4 @@ -/* { dg-do run {target avx512fp16} } */ +/* { dg-do run { target avx512fp16 } } */ /* { dg-options "-O2 -mavx512fp16" } */ static void do_test (void); diff --git a/gcc/testsuite/gcc.target/i386/funcspec-56.inc b/gcc/testsuite/gcc.target/i386/funcspec-56.inc index 34c821a..e462ead 100644 --- a/gcc/testsuite/gcc.target/i386/funcspec-56.inc +++ b/gcc/testsuite/gcc.target/i386/funcspec-56.inc @@ -87,8 +87,7 @@ extern void test_sm3 (void) __attribute__((__target__("sm3"))); extern void test_sha512 (void) __attribute__((__target__("sha512"))); extern void test_sm4 (void) __attribute__((__target__("sm4"))); extern void test_user_msr (void) __attribute__((__target__("usermsr"))); -extern void test_avx10_2_256 (void) __attribute__((__target__("avx10.2-256"))); -extern void test_avx10_2_512 (void) __attribute__((__target__("avx10.2-512"))); +extern void test_avx10_2 (void) __attribute__((__target__("avx10.2"))); extern void test_amx_avx512 (void) __attribute__((__target__("amx-avx512"))); extern void test_amx_tf32 (void) __attribute__((__target__("amx-tf32"))); extern void test_amx_transpose (void) __attribute__((__target__("amx-transpose"))); diff --git a/gcc/testsuite/gcc.target/i386/noevex512-1.c b/gcc/testsuite/gcc.target/i386/noevex512-1.c index 7fd45f1..89eb528 100644 --- a/gcc/testsuite/gcc.target/i386/noevex512-1.c +++ b/gcc/testsuite/gcc.target/i386/noevex512-1.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-O0 -march=x86-64 -mavx512f -mno-evex512 -Wno-psabi" } */ +/* { dg-warning "'-mevex512' will be deprecated in GCC 16 due to all machines 512 bit vector size supported" "" { target *-*-* } 0 } */ /* { dg-final { scan-assembler-not ".%zmm" } } */ typedef double __m512d __attribute__ ((__vector_size__ (64), __may_alias__)); diff --git a/gcc/testsuite/gcc.target/i386/noevex512-2.c b/gcc/testsuite/gcc.target/i386/noevex512-2.c index b7915d8..34740ff 100644 --- a/gcc/testsuite/gcc.target/i386/noevex512-2.c +++ b/gcc/testsuite/gcc.target/i386/noevex512-2.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-O2 -march=x86-64 -mavx512bw -mno-evex512" } */ +/* { dg-warning "'-mevex512' will be deprecated in GCC 16 due to all machines 512 bit vector size supported" "" { target *-*-* } 0 } */ #include <immintrin.h> diff --git a/gcc/testsuite/gcc.target/i386/part-vect-vec_cmpbf.c b/gcc/testsuite/gcc.target/i386/part-vect-vec_cmpbf.c index d4138f2..c904dc0 100644 --- a/gcc/testsuite/gcc.target/i386/part-vect-vec_cmpbf.c +++ b/gcc/testsuite/gcc.target/i386/part-vect-vec_cmpbf.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { ! ia32 } } } */ -/* { dg-options "-O2 -mavx10.2-256" } */ +/* { dg-options "-O2 -mavx10.2" } */ /* { dg-final { scan-assembler-times "vcmpbf16" 10 } } */ typedef __bf16 __attribute__((__vector_size__ (4))) v2bf; diff --git a/gcc/testsuite/gcc.target/i386/pr111068.c b/gcc/testsuite/gcc.target/i386/pr111068.c index 4ff2ea0..70c1e9a 100644 --- a/gcc/testsuite/gcc.target/i386/pr111068.c +++ b/gcc/testsuite/gcc.target/i386/pr111068.c @@ -1,6 +1,7 @@ /* PR target/111068 */ /* { dg-do compile } */ -/* { dg-options "-ffloat-store -mavx10.1-512" } */ +/* { dg-options "-ffloat-store -mavx10.1" } */ +/* { dg-warning "'-mavx10.1' is aliased to 512 bit since GCC14.3 and GCC15.1 while '-mavx10.1-256' and '-mavx10.1-512' will be deprecated in GCC 16 due to all machines 512 bit vector size supported" "" { target *-*-* } 0 } */ typedef _Float16 __attribute__((__vector_size__ (8))) V; V u, v, w; diff --git a/gcc/testsuite/gcc.target/i386/pr111907.c b/gcc/testsuite/gcc.target/i386/pr111907.c index 5275e94..cadc9e4 100644 --- a/gcc/testsuite/gcc.target/i386/pr111907.c +++ b/gcc/testsuite/gcc.target/i386/pr111907.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-mavx512f -mno-evex512" } */ +/* { dg-warning "'-mevex512' will be deprecated in GCC 16 due to all machines 512 bit vector size supported" "" { target *-*-* } 0 } */ _Float128 foo (_Float128 d, _Float128 e) diff --git a/gcc/testsuite/gcc.target/i386/pr117240_avx512f.c b/gcc/testsuite/gcc.target/i386/pr117240_avx512f.c index c2d616a..d34ebb7 100644 --- a/gcc/testsuite/gcc.target/i386/pr117240_avx512f.c +++ b/gcc/testsuite/gcc.target/i386/pr117240_avx512f.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-O2 -mvaes -mevex512 -mno-xsave -Wno-psabi" } */ +/* { dg-warning "'-mevex512' will be deprecated in GCC 16 due to all machines 512 bit vector size supported" "" { target *-*-* } 0 } */ typedef __attribute__((__vector_size__(64))) char V; diff --git a/gcc/testsuite/gcc.target/i386/pr117304-1.c b/gcc/testsuite/gcc.target/i386/pr117304-1.c index ec75f27..58fb53c 100644 --- a/gcc/testsuite/gcc.target/i386/pr117304-1.c +++ b/gcc/testsuite/gcc.target/i386/pr117304-1.c @@ -1,6 +1,7 @@ /* PR target/117304 */ /* { dg-do compile } */ /* { dg-options "-O2 -mavx512f -mno-evex512" } */ +/* { dg-warning "'-mevex512' will be deprecated in GCC 16 due to all machines 512 bit vector size supported" "" { target *-*-* } 0 } */ typedef __attribute__((__vector_size__(32))) int __v8si; typedef __attribute__((__vector_size__(32))) unsigned int __v8su; diff --git a/gcc/testsuite/gcc.target/i386/pr117495.c b/gcc/testsuite/gcc.target/i386/pr117495.c index 5f17bb9..90f3561 100644 --- a/gcc/testsuite/gcc.target/i386/pr117495.c +++ b/gcc/testsuite/gcc.target/i386/pr117495.c @@ -3,7 +3,7 @@ /* { dg-options "-march=x86-64-v3 -fno-trapping-math" } */ /* { dg-final { scan-assembler-times "vcomisbf16" 2 } } */ -__attribute__((target("avx10.2-256"))) +__attribute__((target("avx10.2"))) int foo (int b, int x) { return (__bf16) b < x; @@ -14,7 +14,7 @@ int foo2 (int b, int x) return (__bf16) b < x; } -__attribute__((target("avx10.2-256"))) +__attribute__((target("avx10.2"))) int foo3 (__bf16 b, __bf16 x) { return (__bf16) b < x; diff --git a/gcc/testsuite/gcc.target/i386/pr117946.c b/gcc/testsuite/gcc.target/i386/pr117946.c index e7b660b..b46921c 100644 --- a/gcc/testsuite/gcc.target/i386/pr117946.c +++ b/gcc/testsuite/gcc.target/i386/pr117946.c @@ -1,5 +1,7 @@ /* { dg-do compile { target { ! ia32 } } } */ -/* { dg-options "-O -favoid-store-forwarding -mavx10.1-256 -mprefer-avx128 --param=store-forwarding-max-distance=128 -Wno-psabi" } */ +/* { dg-require-effective-target dfp } */ +/* { dg-options "-O -favoid-store-forwarding -mavx10.1 -mprefer-avx128 --param=store-forwarding-max-distance=128 -Wno-psabi" } */ +/* { dg-warning "'-mavx10.1' is aliased to 512 bit since GCC14.3 and GCC15.1 while '-mavx10.1-256' and '-mavx10.1-512' will be deprecated in GCC 16 due to all machines 512 bit vector size supported" "" { target *-*-* } 0 } */ typedef __attribute__((__vector_size__ (64))) _Decimal32 V; void diff --git a/gcc/testsuite/gcc.target/i386/pr118017.c b/gcc/testsuite/gcc.target/i386/pr118017.c index 28797a0..831ec6e 100644 --- a/gcc/testsuite/gcc.target/i386/pr118017.c +++ b/gcc/testsuite/gcc.target/i386/pr118017.c @@ -1,5 +1,7 @@ /* PR target/118017 */ -/* { dg-do compile { target int128 } } */ +/* { dg-do compile } */ +/* { dg-require-effective-target int128 } */ +/* { dg-require-effective-target dfp } */ /* { dg-options "-Og -frounding-math -mno-80387 -mno-mmx -Wno-psabi" } */ typedef __attribute__((__vector_size__ (64))) _Float128 F; diff --git a/gcc/testsuite/gcc.target/i386/pr118815.c b/gcc/testsuite/gcc.target/i386/pr118815.c index 84308fc..7de20d4 100644 --- a/gcc/testsuite/gcc.target/i386/pr118815.c +++ b/gcc/testsuite/gcc.target/i386/pr118815.c @@ -2,7 +2,7 @@ /* { dg-options "-O2 -march=x86-64-v3" } */ #pragma GCC push_options -#pragma GCC target("avx10.2-256") +#pragma GCC target("avx10.2") void foo(); diff --git a/gcc/testsuite/gcc.target/i386/pr119425.c b/gcc/testsuite/gcc.target/i386/pr119425.c new file mode 100644 index 0000000..b926979 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr119425.c @@ -0,0 +1,37 @@ +/* PR target/119425 */ +/* { dg-do compile { target { ! ia32 } } } */ +/* { dg-options "-Os -fno-vect-cost-model -ftree-slp-vectorize -mavxneconvert -mapxf" } */ +extern long K512[]; +extern long sha512_block_data_order_ctx[]; + +#define Ch(x, y, z) ~x &z +#define ROUND_00_15(i, a, b, c, d, e, f, g, h) \ + T1 += ~e & g + K512[i]; \ +h = 0; \ +d += h += T1 +#define ROUND_16_80(i, j, a, b, c, d, e, f, g, h, X) \ + ROUND_00_15(i + j, , , , d, e, , g, h) + +unsigned sha512_block_data_order_f, sha512_block_data_order_g; + +void +sha512_block_data_order() +{ + unsigned a, b, c, d, e, h, T1; + int i = 6; + for (; i < 80; i += 6) { + ROUND_16_80(i, 0, , , , d, e, , , h, ); + ROUND_16_80(i, 11, , , , a, b, , d, e, ); + ROUND_16_80(i, 12, , , , h, a, , c, d, ); + ROUND_16_80(i, 13, , , , sha512_block_data_order_g, h, , b, c, ); + ROUND_16_80(i, 14, , , , sha512_block_data_order_f, + sha512_block_data_order_g, , a, b, ); + ROUND_16_80(i, 15, , , , e, sha512_block_data_order_f, , , a, ); + + } + sha512_block_data_order_ctx[0] += a; + sha512_block_data_order_ctx[1] += b; + sha512_block_data_order_ctx[2] += c; + sha512_block_data_order_ctx[3] += d; + +} diff --git a/gcc/testsuite/gcc.target/i386/pr119450.c b/gcc/testsuite/gcc.target/i386/pr119450.c new file mode 100644 index 0000000..fa4bbda --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr119450.c @@ -0,0 +1,15 @@ +/* PR target/119450 */ +/* { dg-do compile } */ +/* { dg-options "-O3" } */ + +long *a; +int b; + +void +foo (void) +{ + unsigned d = b >> 30; + a = (long *) (__UINTPTR_TYPE__) d; + if (*a & 1 << 30) + *a = 0; +} diff --git a/gcc/testsuite/gcc.target/i386/pr55583.c b/gcc/testsuite/gcc.target/i386/pr55583.c index ea6a2d5..8773451 100644 --- a/gcc/testsuite/gcc.target/i386/pr55583.c +++ b/gcc/testsuite/gcc.target/i386/pr55583.c @@ -1,9 +1,8 @@ /* { dg-do compile } */ /* { dg-options "-O2 -Wno-shift-count-overflow" } */ -/* { dg-final { scan-assembler-times {(?n)shrd[ql]?[\t ]*\$2} 4 { target { ! ia32 } } } } */ -/* { dg-final { scan-assembler-times {(?n)shrdl?[\t ]*\$2} 2 { target ia32 } } } */ -/* { dg-final { scan-assembler-times {(?n)shldl?[\t ]*\$2} 1 { target ia32 } } } */ -/* { dg-final { scan-assembler-times {(?n)shld[ql]?[\t ]*\$2} 2 { target { ! ia32 } } } } */ +/* { dg-additional-options "-mno-sse -mno-mmx" { target ia32 } } */ +/* { dg-final { scan-assembler-times {(?n)shrd[ql]?[\t ]*\$2} 4 } } */ +/* { dg-final { scan-assembler-times {(?n)shld[ql]?[\t ]*\$2} 2 } } */ typedef unsigned long long u64; typedef unsigned int u32; diff --git a/gcc/testsuite/gcc.target/i386/sm4-avx10_2-1.c b/gcc/testsuite/gcc.target/i386/sm4-avx10_2-1.c index 4f5733c..4746f6f 100644 --- a/gcc/testsuite/gcc.target/i386/sm4-avx10_2-1.c +++ b/gcc/testsuite/gcc.target/i386/sm4-avx10_2-1.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { ! ia32 } } } */ -/* { dg-options "-O2 -march=x86-64-v3 -msm4 -mavx10.2-256" } */ +/* { dg-options "-O2 -march=x86-64-v3 -msm4 -mavx10.2" } */ #include <immintrin.h> diff --git a/gcc/testsuite/gcc.target/i386/sm4-avx10_2-512-1.c b/gcc/testsuite/gcc.target/i386/sm4-avx10_2-512-1.c index 546472a..e7f7934 100644 --- a/gcc/testsuite/gcc.target/i386/sm4-avx10_2-512-1.c +++ b/gcc/testsuite/gcc.target/i386/sm4-avx10_2-512-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O2 -march=x86-64-v3 -msm4 -mavx10.2-512" } */ +/* { dg-options "-O2 -march=x86-64-v3 -msm4 -mavx10.2" } */ /* { dg-final { scan-assembler "vsm4key4\[ \\t\]+\[^\n\]*%zmm\[0-9\]+\[^\n\]*%zmm\[0-9\]+\[^\n\]*%zmm\[0-9\]" } } */ /* { dg-final { scan-assembler "vsm4rnds4\[ \\t\]+\[^\n\]*%zmm\[0-9\]+\[^\n\]*%zmm\[0-9\]+\[^\n\]*%zmm\[0-9\]" } } */ diff --git a/gcc/testsuite/gcc.target/i386/sm4-check.h b/gcc/testsuite/gcc.target/i386/sm4-check.h index 7fc431d..76c16db 100644 --- a/gcc/testsuite/gcc.target/i386/sm4-check.h +++ b/gcc/testsuite/gcc.target/i386/sm4-check.h @@ -194,10 +194,7 @@ main () /* Check CPU support for SM4. */ if (__builtin_cpu_supports ("sm4") #ifdef AVX10_2 - && __builtin_cpu_supports ("avx10.2-256") -#endif -#ifdef AVX10_2_512 - && __builtin_cpu_supports ("avx10.2-512") + && __builtin_cpu_supports ("avx10.2") #endif ) { diff --git a/gcc/testsuite/gcc.target/i386/sm4key4-avx10_2-512-2.c b/gcc/testsuite/gcc.target/i386/sm4key4-avx10_2-512-2.c index 85b7e3e..1c8b2c3 100644 --- a/gcc/testsuite/gcc.target/i386/sm4key4-avx10_2-512-2.c +++ b/gcc/testsuite/gcc.target/i386/sm4key4-avx10_2-512-2.c @@ -1,7 +1,7 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -msm4 -mavx10.2-512" } */ +/* { dg-options "-O2 -march=x86-64-v3 -msm4 -mavx10.2" } */ /* { dg-require-effective-target sm4 } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX10_2_512 diff --git a/gcc/testsuite/gcc.target/i386/sm4rnds4-avx10_2-512-2.c b/gcc/testsuite/gcc.target/i386/sm4rnds4-avx10_2-512-2.c index 1eaf08b..5418a53 100644 --- a/gcc/testsuite/gcc.target/i386/sm4rnds4-avx10_2-512-2.c +++ b/gcc/testsuite/gcc.target/i386/sm4rnds4-avx10_2-512-2.c @@ -1,7 +1,7 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -msm4 -mavx10.2-512" } */ +/* { dg-options "-O2 -march=x86-64-v3 -msm4 -mavx10.2" } */ /* { dg-require-effective-target sm4 } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX10_2_512 diff --git a/gcc/testsuite/gcc.target/i386/sse-12.c b/gcc/testsuite/gcc.target/i386/sse-12.c index c9907fc..cabccb0 100644 --- a/gcc/testsuite/gcc.target/i386/sse-12.c +++ b/gcc/testsuite/gcc.target/i386/sse-12.c @@ -3,7 +3,7 @@ popcntintrin.h gfniintrin.h and mm_malloc.h are usable with -O -std=c89 -pedantic-errors. */ /* { dg-do compile } */ -/* { dg-options "-O -std=c89 -pedantic-errors -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -msha -mxsavec -mxsaves -mclflushopt -mclwb -mmwaitx -mclzero -mpku -msgx -mrdpid -mgfni -mpconfig -mwbnoinvd -menqcmd -mavx512vp2intersect -mserialize -mtsxldtrk -mamx-tile -mamx-int8 -mamx-bf16 -mkl -mwidekl -mavxvnni -mavxifma -mavxvnniint8 -mavxneconvert -mamx-fp16 -mraoint -mamx-complex -mavxvnniint16 -msm3 -msha512 -msm4 -mavx10.2-512 -mamx-avx512 -mamx-tf32 -mamx-transpose -mamx-fp8 -mmovrs -mamx-movrs" } */ +/* { dg-options "-O -std=c89 -pedantic-errors -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -msha -mxsavec -mxsaves -mclflushopt -mclwb -mmwaitx -mclzero -mpku -msgx -mrdpid -mgfni -mpconfig -mwbnoinvd -menqcmd -mavx512vp2intersect -mserialize -mtsxldtrk -mamx-tile -mamx-int8 -mamx-bf16 -mkl -mwidekl -mavxvnni -mavxifma -mavxvnniint8 -mavxneconvert -mamx-fp16 -mraoint -mamx-complex -mavxvnniint16 -msm3 -msha512 -msm4 -mavx10.2 -mamx-avx512 -mamx-tf32 -mamx-transpose -mamx-fp8 -mmovrs -mamx-movrs" } */ #include <x86intrin.h> diff --git a/gcc/testsuite/gcc.target/i386/sse-13.c b/gcc/testsuite/gcc.target/i386/sse-13.c index 2418773..3132eca 100644 --- a/gcc/testsuite/gcc.target/i386/sse-13.c +++ b/gcc/testsuite/gcc.target/i386/sse-13.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O2 -Werror-implicit-function-declaration -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -msha -mxsavec -mxsaves -mclflushopt -mavx512vp2intersect -mclwb -mmwaitx -mclzero -mpku -msgx -mrdpid -mgfni -mpconfig -mwbnoinvd -menqcmd -mserialize -mtsxldtrk -mamx-tile -mamx-int8 -mamx-bf16 -mkl -mwidekl -mavxvnni -mavxifma -mavxvnniint8 -mavxneconvert -mcmpccxadd -mamx-fp16 -mprefetchi -mraoint -mamx-complex -mavxvnniint16 -msm3 -msha512 -msm4 -mavx10.2-512 -mamx-avx512 -mamx-tf32 -mamx-transpose -mamx-fp8 -mmovrs -mamx-movrs" } */ +/* { dg-options "-O2 -Werror-implicit-function-declaration -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -msha -mxsavec -mxsaves -mclflushopt -mavx512vp2intersect -mclwb -mmwaitx -mclzero -mpku -msgx -mrdpid -mgfni -mpconfig -mwbnoinvd -menqcmd -mserialize -mtsxldtrk -mamx-tile -mamx-int8 -mamx-bf16 -mkl -mwidekl -mavxvnni -mavxifma -mavxvnniint8 -mavxneconvert -mcmpccxadd -mamx-fp16 -mprefetchi -mraoint -mamx-complex -mavxvnniint16 -msm3 -msha512 -msm4 -mavx10.2 -mamx-avx512 -mamx-tf32 -mamx-transpose -mamx-fp8 -mmovrs -mamx-movrs" } */ /* { dg-add-options bind_pic_locally } */ #include <mm_malloc.h> @@ -849,167 +849,6 @@ /* sm3intrin.h */ #define __builtin_ia32_vsm3rnds2(A, B, C, D) __builtin_ia32_vsm3rnds2 (A, B, C, 1) -/* avx10_2roundingintrin.h */ -#define __builtin_ia32_addpd256_mask_round(A, B, C, D, E) __builtin_ia32_addpd256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_addph256_mask_round(A, B, C, D, E) __builtin_ia32_addph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_addps256_mask_round(A, B, C, D, E) __builtin_ia32_addps256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_cmppd256_mask_round(A, B, C, D, E) __builtin_ia32_cmppd256_mask_round(A, B, 1, D, 8) -#define __builtin_ia32_cmpph256_mask_round(A, B, C, D, E) __builtin_ia32_cmpph256_mask_round(A, B, 1, D, 8) -#define __builtin_ia32_cmpps256_mask_round(A, B, C, D, E) __builtin_ia32_cmpps256_mask_round(A, B, 1, D, 8) -#define __builtin_ia32_vcvtdq2ph256_mask_round(A, B, C, D) __builtin_ia32_vcvtdq2ph256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtdq2ps256_mask_round(A, B, C, D) __builtin_ia32_cvtdq2ps256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtpd2ph256_mask_round(A, B, C, D) __builtin_ia32_vcvtpd2ph256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtpd2ps256_mask_round(A, B, C, D) __builtin_ia32_cvtpd2ps256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtpd2dq256_mask_round(A, B, C, D) __builtin_ia32_cvtpd2dq256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtpd2qq256_mask_round(A, B, C, D) __builtin_ia32_cvtpd2qq256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtpd2udq256_mask_round(A, B, C, D) __builtin_ia32_cvtpd2udq256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtpd2uqq256_mask_round(A, B, C, D) __builtin_ia32_cvtpd2uqq256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtph2dq256_mask_round(A, B, C, D) __builtin_ia32_vcvtph2dq256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtph2pd256_mask_round(A, B, C, D) __builtin_ia32_vcvtph2pd256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtph2ps256_mask_round(A, B, C, D) __builtin_ia32_vcvtph2ps256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtph2psx256_mask_round(A, B, C, D) __builtin_ia32_vcvtph2psx256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtph2qq256_mask_round(A, B, C, D) __builtin_ia32_vcvtph2qq256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtph2udq256_mask_round(A, B, C, D) __builtin_ia32_vcvtph2udq256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtph2uqq256_mask_round(A, B, C, D) __builtin_ia32_vcvtph2uqq256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtph2uw256_mask_round(A, B, C, D) __builtin_ia32_vcvtph2uw256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtph2w256_mask_round(A, B, C, D) __builtin_ia32_vcvtph2w256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtps2pd256_mask_round(A, B, C, D) __builtin_ia32_vcvtps2pd256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtps2phx256_mask_round(A, B, C, D) __builtin_ia32_vcvtps2phx256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtps2dq256_mask_round(A, B, C, D) __builtin_ia32_vcvtps2dq256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtps2qq256_mask_round(A, B, C, D) __builtin_ia32_cvtps2qq256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtps2udq256_mask_round(A, B, C, D) __builtin_ia32_cvtps2udq256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtps2uqq256_mask_round(A, B, C, D) __builtin_ia32_cvtps2uqq256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtqq2pd256_mask_round(A, B, C, D) __builtin_ia32_cvtqq2pd256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtqq2ph256_mask_round(A, B, C, D) __builtin_ia32_vcvtqq2ph256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtqq2ps256_mask_round(A, B, C, D) __builtin_ia32_cvtqq2ps256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttpd2dq256_mask_round(A, B, C, D) __builtin_ia32_cvttpd2dq256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttpd2qq256_mask_round(A, B, C, D) __builtin_ia32_cvttpd2qq256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttpd2udq256_mask_round(A, B, C, D) __builtin_ia32_cvttpd2udq256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttpd2uqq256_mask_round(A, B, C, D) __builtin_ia32_cvttpd2uqq256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvttph2dq256_mask_round(A, B, C, D) __builtin_ia32_vcvttph2dq256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvttph2qq256_mask_round(A, B, C, D) __builtin_ia32_vcvttph2qq256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvttph2uqq256_mask_round(A, B, C, D) __builtin_ia32_vcvttph2uqq256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvttph2udq256_mask_round(A, B, C, D) __builtin_ia32_vcvttph2udq256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvttph2uw256_mask_round(A, B, C, D) __builtin_ia32_vcvttph2uw256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvttph2w256_mask_round(A, B, C, D) __builtin_ia32_vcvttph2w256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttps2dq256_mask_round(A, B, C, D) __builtin_ia32_cvttps2dq256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttps2qq256_mask_round(A, B, C, D) __builtin_ia32_cvttps2qq256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttps2udq256_mask_round(A, B, C, D) __builtin_ia32_cvttps2udq256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttps2uqq256_mask_round(A, B, C, D) __builtin_ia32_cvttps2uqq256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtudq2ph256_mask_round(A, B, C, D) __builtin_ia32_vcvtudq2ph256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtudq2ps256_mask_round(A, B, C, D) __builtin_ia32_cvtudq2ps256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtuqq2pd256_mask_round(A, B, C, D) __builtin_ia32_cvtuqq2pd256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtuqq2ph256_mask_round(A, B, C, D) __builtin_ia32_vcvtuqq2ph256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtuqq2ps256_mask_round(A, B, C, D) __builtin_ia32_cvtuqq2ps256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtuw2ph256_mask_round(A, B, C, D) __builtin_ia32_vcvtuw2ph256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtw2ph256_mask_round(A, B, C, D) __builtin_ia32_vcvtw2ph256_mask_round(A, B, C, 8) -#define __builtin_ia32_divpd256_mask_round(A, B, C, D, E) __builtin_ia32_divpd256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_divph256_mask_round(A, B, C, D, E) __builtin_ia32_divph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_divps256_mask_round(A, B, C, D, E) __builtin_ia32_divps256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfcmaddcph256_round(A, B, C, D) __builtin_ia32_vfcmaddcph256_round(A, B, C, 8) -#define __builtin_ia32_vfcmaddcph256_mask_round(A, C, D, B, E) __builtin_ia32_vfcmaddcph256_mask_round(A, C, D, B, 8) -#define __builtin_ia32_vfcmaddcph256_mask3_round(A, C, D, B, E) __builtin_ia32_vfcmaddcph256_mask3_round(A, C, D, B, 8) -#define __builtin_ia32_vfcmaddcph256_maskz_round(B, C, D, A, E) __builtin_ia32_vfcmaddcph256_maskz_round(B, C, D, A, 8) -#define __builtin_ia32_vfcmulcph256_round(A, B, C) __builtin_ia32_vfcmulcph256_round(A, B, 8) -#define __builtin_ia32_vfcmulcph256_mask_round(A, B, C, D, E) __builtin_ia32_vfcmulcph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_fixupimmpd256_mask_round(A, B, C, D, E, F) __builtin_ia32_fixupimmpd256_mask_round(A, B, C, 1, E, 8) -#define __builtin_ia32_fixupimmpd256_maskz_round(A, B, C, D, E, F) __builtin_ia32_fixupimmpd256_maskz_round(A, B, C, 1, E, 8) -#define __builtin_ia32_fixupimmps256_mask_round(A, B, C, D, E, F) __builtin_ia32_fixupimmps256_mask_round(A, B, C, 1, E, 8) -#define __builtin_ia32_fixupimmps256_maskz_round(A, B, C, D, E, F) __builtin_ia32_fixupimmps256_maskz_round(A, B, C, 1, E, 8) -#define __builtin_ia32_vfmaddpd256_mask_round(A, B, C, D, E) __builtin_ia32_vfmaddpd256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddpd256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmaddpd256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddpd256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmaddpd256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddph256_mask_round(A, B, C, D, E) __builtin_ia32_vfmaddph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddph256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmaddph256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddph256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmaddph256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddps256_mask_round(A, B, C, D, E) __builtin_ia32_vfmaddps256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddps256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmaddps256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddps256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmaddps256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddcph256_round(A, B, C, D) __builtin_ia32_vfmaddcph256_round(A, B, C, 8) -#define __builtin_ia32_vfmaddcph256_mask_round(A, C, D, B, E) __builtin_ia32_vfmaddcph256_mask_round(A, C, D, B, 8) -#define __builtin_ia32_vfmaddcph256_mask3_round(A, C, D, B, E) __builtin_ia32_vfmaddcph256_mask3_round(A, C, D, B, 8) -#define __builtin_ia32_vfmaddcph256_maskz_round(B, C, D, A, E) __builtin_ia32_vfmaddcph256_maskz_round(B, C, D, A, 8) -#define __builtin_ia32_vfmaddsubpd256_mask_round(A, B, C, D, E) __builtin_ia32_vfmaddsubpd256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddsubpd256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmaddsubpd256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddsubpd256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmaddsubpd256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddsubph256_mask_round(A, B, C, D, E) __builtin_ia32_vfmaddsubph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddsubph256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmaddsubph256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddsubph256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmaddsubph256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddsubps256_mask_round(A, B, C, D, E) __builtin_ia32_vfmaddsubps256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddsubps256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmaddsubps256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddsubps256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmaddsubps256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubpd256_mask_round(A, B, C, D, E) __builtin_ia32_vfmsubpd256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubpd256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmsubpd256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubpd256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmsubpd256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubph256_mask_round(A, B, C, D, E) __builtin_ia32_vfmsubph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubph256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmsubph256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubph256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmsubph256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubps256_mask_round(A, B, C, D, E) __builtin_ia32_vfmsubps256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubps256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmsubps256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubps256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmsubps256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubaddpd256_mask_round(A, B, C, D, E) __builtin_ia32_vfmsubaddpd256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubaddpd256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmsubaddpd256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubaddpd256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmsubaddpd256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubaddph256_mask_round(A, B, C, D, E) __builtin_ia32_vfmsubaddph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubaddph256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmsubaddph256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubaddph256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmsubaddph256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubaddps256_mask_round(A, B, C, D, E) __builtin_ia32_vfmsubaddps256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubaddps256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmsubaddps256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubaddps256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmsubaddps256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfmulcph256_round(A, B, C) __builtin_ia32_vfmulcph256_round(A, B, 8) -#define __builtin_ia32_vfmulcph256_mask_round(A, B, C, D, E) __builtin_ia32_vfmulcph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmaddpd256_mask_round(A, B, C, D, E) __builtin_ia32_vfnmaddpd256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmaddpd256_mask3_round(A, B, C, D, E) __builtin_ia32_vfnmaddpd256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmaddpd256_maskz_round(A, B, C, D, E) __builtin_ia32_vfnmaddpd256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmaddph256_mask_round(A, B, C, D, E) __builtin_ia32_vfnmaddph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmaddph256_mask3_round(A, B, C, D, E) __builtin_ia32_vfnmaddph256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmaddph256_maskz_round(A, B, C, D, E) __builtin_ia32_vfnmaddph256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmaddps256_mask_round(A, B, C, D, E) __builtin_ia32_vfnmaddps256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmaddps256_mask3_round(A, B, C, D, E) __builtin_ia32_vfnmaddps256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmaddps256_maskz_round(A, B, C, D, E) __builtin_ia32_vfnmaddps256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmsubpd256_mask_round(A, B, C, D, E) __builtin_ia32_vfnmsubpd256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmsubpd256_mask3_round(A, B, C, D, E) __builtin_ia32_vfnmsubpd256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmsubpd256_maskz_round(A, B, C, D, E) __builtin_ia32_vfnmsubpd256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmsubph256_mask_round(A, B, C, D, E) __builtin_ia32_vfnmsubph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmsubph256_mask3_round(A, B, C, D, E) __builtin_ia32_vfnmsubph256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmsubph256_maskz_round(A, B, C, D, E) __builtin_ia32_vfnmsubph256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmsubps256_mask_round(A, B, C, D, E) __builtin_ia32_vfnmsubps256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmsubps256_mask3_round(A, B, C, D, E) __builtin_ia32_vfnmsubps256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmsubps256_maskz_round(A, B, C, D, E) __builtin_ia32_vfnmsubps256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_getexppd256_mask_round(A, B, C, D) __builtin_ia32_getexppd256_mask_round(A, B, C, 8) -#define __builtin_ia32_getexpph256_mask_round(A, B, C, D) __builtin_ia32_getexpph256_mask_round(A, B, C, 8) -#define __builtin_ia32_getexpps256_mask_round(A, B, C, D) __builtin_ia32_getexpps256_mask_round(A, B, C, 8) -#define __builtin_ia32_getmantpd256_mask_round(A, F, C, D, E) __builtin_ia32_getmantpd256_mask_round(A, 1, C, D, 8) -#define __builtin_ia32_getmantph256_mask_round(A, F, C, D, E) __builtin_ia32_getmantph256_mask_round(A, 1, C, D, 8) -#define __builtin_ia32_getmantps256_mask_round(A, F, C, D, E) __builtin_ia32_getmantps256_mask_round(A, 1, C, D, 8) -#define __builtin_ia32_maxpd256_mask_round(A, B, C, D, E) __builtin_ia32_maxpd256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_maxph256_mask_round(A, B, C, D, E) __builtin_ia32_maxph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_maxps256_mask_round(A, B, C, D, E) __builtin_ia32_maxps256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_minpd256_mask_round(A, B, C, D, E) __builtin_ia32_minpd256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_minph256_mask_round(A, B, C, D, E) __builtin_ia32_minph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_minps256_mask_round(A, B, C, D, E) __builtin_ia32_minps256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_mulpd256_mask_round(A, B, C, D, E) __builtin_ia32_mulpd256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_mulph256_mask_round(A, B, C, D, E) __builtin_ia32_mulph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_mulps256_mask_round(A, B, C, D, E) __builtin_ia32_mulps256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_rangeps256_mask_round(A, B, C, D, E, F) __builtin_ia32_rangeps256_mask_round(A, B, 1, D, E, 8) -#define __builtin_ia32_rangepd256_mask_round(A, B, C, D, E, F) __builtin_ia32_rangepd256_mask_round(A, B, 1, D, E, 8) -#define __builtin_ia32_reducepd256_mask_round(A, B, C, D, E) __builtin_ia32_reducepd256_mask_round(A, 8, C, D, 8) -#define __builtin_ia32_reduceph256_mask_round(A, B, C, D, E) __builtin_ia32_reduceph256_mask_round(A, 8, C, D, 8) -#define __builtin_ia32_reduceps256_mask_round(A, B, C, D, E) __builtin_ia32_reduceps256_mask_round(A, 8, C, D, 8) -#define __builtin_ia32_rndscalepd256_mask_round(A, B, C, D, E) __builtin_ia32_rndscalepd256_mask_round(A, 1, C, D, 8) -#define __builtin_ia32_rndscaleph256_mask_round(A, B, C, D, E) __builtin_ia32_rndscaleph256_mask_round(A, 1, C, D, 8) -#define __builtin_ia32_rndscaleps256_mask_round(A, B, C, D, E) __builtin_ia32_rndscaleps256_mask_round(A, 1, C, D, 8) -#define __builtin_ia32_scalefpd256_mask_round(A, B, C, D, E) __builtin_ia32_scalefpd256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_scalefph256_mask_round(A, B, C, D, E) __builtin_ia32_scalefph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_scalefps256_mask_round(A, B, C, D, E) __builtin_ia32_scalefps256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_sqrtps256_mask_round(A, B, C, D) __builtin_ia32_sqrtps256_mask_round(A, B, C, 8) -#define __builtin_ia32_sqrtpd256_mask_round(A, B, C, D) __builtin_ia32_sqrtpd256_mask_round(A, B, C, 8) -#define __builtin_ia32_sqrtph256_mask_round(A, B, C, D) __builtin_ia32_sqrtph256_mask_round(A, B, C, 8) -#define __builtin_ia32_sqrtps256_mask_round(A, B, C, D) __builtin_ia32_sqrtps256_mask_round(A, B, C, 8) -#define __builtin_ia32_subpd256_mask_round(A, B, C, D, E) __builtin_ia32_subpd256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_subph256_mask_round(A, B, C, D, E) __builtin_ia32_subph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_subps256_mask_round(A, B, C, D, E) __builtin_ia32_subps256_mask_round(A, B, C, D, 8) - /* avx10_2-512mediaintrin.h */ #define __builtin_ia32_mpsadbw512(A, B, C) __builtin_ia32_mpsadbw512 (A, B, 1) #define __builtin_ia32_mpsadbw512_mask(A, B, C, D, E) __builtin_ia32_mpsadbw512_mask (A, B, 1, D, E) @@ -1018,9 +857,6 @@ #define __builtin_ia32_mpsadbw128_mask(A, B, C, D, E) __builtin_ia32_mpsadbw128_mask (A, B, 1, D, E) #define __builtin_ia32_mpsadbw256_mask(A, B, C, D, E) __builtin_ia32_mpsadbw256_mask (A, B, 1, D, E) -/* avx10_2convertintrin.h */ -#define __builtin_ia32_vcvt2ps2phx256_mask_round(A, B, C, D, E) __builtin_ia32_vcvt2ps2phx256_mask_round(A, B, C, D, 8) - /* avx10_2-512convertintrin.h */ #define __builtin_ia32_vcvt2ps2phx512_mask_round(A, B, C, D, E) __builtin_ia32_vcvt2ps2phx512_mask_round(A, B, C, D, 8) @@ -1062,22 +898,6 @@ #define __builtin_ia32_cvttps2uqqs512_mask_round(A, B, C, D) __builtin_ia32_cvttps2uqqs512_mask_round(A, B, C, 8) /* avx10_2satcvtintrin.h */ -#define __builtin_ia32_cvtph2ibs256_mask_round(A, B, C, D) __builtin_ia32_cvtph2ibs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtph2iubs256_mask_round(A, B, C, D) __builtin_ia32_cvtph2iubs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtps2ibs256_mask_round(A, B, C, D) __builtin_ia32_cvtps2ibs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtps2iubs256_mask_round(A, B, C, D) __builtin_ia32_cvtps2iubs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttph2ibs256_mask_round(A, B, C, D) __builtin_ia32_cvttph2ibs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttph2iubs256_mask_round(A, B, C, D) __builtin_ia32_cvttph2iubs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttps2ibs256_mask_round(A, B, C, D) __builtin_ia32_cvttps2ibs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttps2iubs256_mask_round(A, B, C, D) __builtin_ia32_cvttps2iubs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttpd2dqs256_mask_round(A, B, C, D) __builtin_ia32_cvttpd2dqs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttpd2qqs256_mask_round(A, B, C, D) __builtin_ia32_cvttpd2qqs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttpd2udqs256_mask_round(A, B, C, D) __builtin_ia32_cvttpd2udqs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttpd2uqqs256_mask_round(A, B, C, D) __builtin_ia32_cvttpd2uqqs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttps2dqs256_mask_round(A, B, C, D) __builtin_ia32_cvttps2dqs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttps2qqs256_mask_round(A, B, C, D) __builtin_ia32_cvttps2qqs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttps2udqs256_mask_round(A, B, C, D) __builtin_ia32_cvttps2udqs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttps2uqqs256_mask_round(A, B, C, D) __builtin_ia32_cvttps2uqqs256_mask_round(A, B, C, 8) #define __builtin_ia32_cvttsd2sis32_round(A, B) __builtin_ia32_cvttsd2sis32_round(A, 8) #define __builtin_ia32_cvttsd2usis32_round(A, B) __builtin_ia32_cvttsd2usis32_round(A, 8) #define __builtin_ia32_cvttss2sis32_round(A, B) __builtin_ia32_cvttss2sis32_round(A, 8) @@ -1102,10 +922,10 @@ #define __builtin_ia32_minmaxbf16128_mask(A, B, C, D, E) __builtin_ia32_minmaxbf16128_mask (A, B, 4, D, E) #define __builtin_ia32_minmaxbf16256_mask(A, B, C, D, E) __builtin_ia32_minmaxbf16256_mask (A, B, 4, D, E) #define __builtin_ia32_minmaxpd128_mask(A, B, C, D, E) __builtin_ia32_minmaxpd128_mask (A, B, 4, D, E) -#define __builtin_ia32_minmaxpd256_mask_round(A, B, C, D, E, F) __builtin_ia32_minmaxpd256_mask_round (A, B, 4, D, E, 4) +#define __builtin_ia32_minmaxpd256_mask(A, B, C, D, E) __builtin_ia32_minmaxpd256_mask (A, B, 4, D, E) #define __builtin_ia32_minmaxph128_mask(A, B, C, D, E) __builtin_ia32_minmaxph128_mask (A, B, 4, D, E) -#define __builtin_ia32_minmaxph256_mask_round(A, B, C, D, E, F) __builtin_ia32_minmaxph256_mask_round (A, B, 4, D, E, 4) +#define __builtin_ia32_minmaxph256_mask(A, B, C, D, E) __builtin_ia32_minmaxph256_mask (A, B, 4, D, E) #define __builtin_ia32_minmaxps128_mask(A, B, C, D, E) __builtin_ia32_minmaxps128_mask (A, B, 4, D, E) -#define __builtin_ia32_minmaxps256_mask_round(A, B, C, D, E, F) __builtin_ia32_minmaxps256_mask_round (A, B, 4, D, E, 4) +#define __builtin_ia32_minmaxps256_mask(A, B, C, D, E) __builtin_ia32_minmaxps256_mask (A, B, 4, D, E) #include <x86intrin.h> diff --git a/gcc/testsuite/gcc.target/i386/sse-14.c b/gcc/testsuite/gcc.target/i386/sse-14.c index 1afe408..8ae41c1 100644 --- a/gcc/testsuite/gcc.target/i386/sse-14.c +++ b/gcc/testsuite/gcc.target/i386/sse-14.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O0 -Werror-implicit-function-declaration -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -msha -mxsavec -mxsaves -mclflushopt -mclwb -mmwaitx -mclzero -mpku -msgx -mrdpid -mgfni -mpconfig -mwbnoinvd -menqcmd -mavx512vp2intersect -mserialize -mtsxldtrk -mamx-tile -mamx-int8 -mamx-bf16 -mkl -mwidekl -mavxvnni -mavxifma -mavxvnniint8 -mavxneconvert -mamx-fp16 -mraoint -mamx-complex -mavxvnniint16 -msm3 -msha512 -msm4 -mavx10.2-512 -mamx-avx512 -mamx-tf32 -mamx-transpose -mamx-fp8 -mmovrs -mamx-movrs" } */ +/* { dg-options "-O0 -Werror-implicit-function-declaration -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -msha -mxsavec -mxsaves -mclflushopt -mclwb -mmwaitx -mclzero -mpku -msgx -mrdpid -mgfni -mpconfig -mwbnoinvd -menqcmd -mavx512vp2intersect -mserialize -mtsxldtrk -mamx-tile -mamx-int8 -mamx-bf16 -mkl -mwidekl -mavxvnni -mavxifma -mavxvnniint8 -mavxneconvert -mamx-fp16 -mraoint -mamx-complex -mavxvnniint16 -msm3 -msha512 -msm4 -mavx10.2 -mamx-avx512 -mamx-tf32 -mamx-transpose -mamx-fp8 -mmovrs -mamx-movrs" } */ /* { dg-add-options bind_pic_locally } */ #include <mm_malloc.h> @@ -1020,358 +1020,6 @@ test_2 (_mm512_gf2p8affine_epi64_epi8, __m512i, __m512i, __m512i, 1) /* sm3intrin.h */ test_3 (_mm_sm3rnds2_epi32, __m128i, __m128i, __m128i, __m128i, 1) -/* avx10_2roundingintrin.h */ -test_1 (_mm256_cvt_roundepi32_ph, __m128h, __m256i, 8) -test_1 (_mm256_cvt_roundepi32_ps, __m256, __m256i, 9) -test_1 (_mm256_cvt_roundpd_ph, __m128h, __m256d, 8) -test_1 (_mm256_cvt_roundpd_ps, __m128, __m256d, 9) -test_1 (_mm256_cvt_roundpd_epi32, __m128i, __m256d, 9) -test_1 (_mm256_cvt_roundpd_epi64, __m256i, __m256d, 9) -test_1 (_mm256_cvt_roundpd_epu32, __m128i, __m256d, 9) -test_1 (_mm256_cvt_roundpd_epu64, __m256i, __m256d, 9) -test_1 (_mm256_cvt_roundph_epi32, __m256i, __m128h, 8) -test_1 (_mm256_cvt_roundph_pd, __m256d, __m128h, 8) -test_1 (_mm256_cvt_roundph_ps, __m256, __m128i, 8) -test_1 (_mm256_cvtx_roundph_ps, __m256, __m128h, 8) -test_1 (_mm256_cvt_roundph_epi64, __m256i, __m128h, 8) -test_1 (_mm256_cvt_roundph_epu64, __m256i, __m128h, 8) -test_1 (_mm256_cvt_roundph_epu16, __m256i, __m256h, 8) -test_1 (_mm256_cvt_roundph_epi16, __m256i, __m256h, 8) -test_1 (_mm256_cvt_roundps_pd, __m256d, __m128, 8) -test_1 (_mm256_cvtx_roundps_ph, __m128h, __m256, 8) -test_1 (_mm256_cvt_roundps_epi32, __m256i, __m256, 9) -test_1 (_mm256_cvt_roundps_epu32, __m256i, __m256, 9) -test_1 (_mm256_cvt_roundps_epi64, __m256i, __m128, 8) -test_1 (_mm256_cvt_roundps_epu64, __m256i, __m128, 8) -test_1 (_mm256_cvt_roundepi64_pd, __m256d, __m256i, 8) -test_1 (_mm256_cvt_roundepi64_ph, __m128h, __m256i, 8) -test_1 (_mm256_cvt_roundepi64_ps, __m128, __m256i, 8) -test_1 (_mm256_cvtt_roundpd_epi32, __m128i, __m256d, 8) -test_1 (_mm256_cvtt_roundpd_epi64, __m256i, __m256d, 8) -test_1 (_mm256_cvtt_roundpd_epu32, __m128i, __m256d, 8) -test_1 (_mm256_cvtt_roundpd_epu64, __m256i, __m256d, 8) -test_1 (_mm256_cvtt_roundph_epi32, __m256i, __m128d, 8) -test_1 (_mm256_cvtt_roundph_epi64, __m256i, __m128h, 8) -test_1 (_mm256_cvtt_roundph_epu32, __m256i, __m128d, 8) -test_1 (_mm256_cvtt_roundph_epu64, __m256i, __m128h, 8) -test_1 (_mm256_cvtt_roundph_epu16, __m256i, __m256h, 8) -test_1 (_mm256_cvtt_roundph_epi16, __m256i, __m256h, 8) -test_1 (_mm256_cvtt_roundps_epi32, __m256i, __m256, 8) -test_1 (_mm256_cvtt_roundps_epi64, __m256i, __m128h, 8) -test_1 (_mm256_cvtt_roundps_epu64, __m256i, __m128h, 8) -test_1 (_mm256_cvt_roundepu32_ph, __m128h, __m256i, 8) -test_1 (_mm256_cvt_roundepu32_ps, __m256, __m256i, 9) -test_1 (_mm256_cvt_roundepu64_pd, __m256d, __m256i, 9) -test_1 (_mm256_cvt_roundepu64_ph, __m128h, __m256i, 9) -test_1 (_mm256_cvt_roundepu64_ps, __m128, __m256i, 9) -test_1 (_mm256_cvt_roundepu16_ph, __m256h, __m256i, 8) -test_1 (_mm256_cvt_roundepi16_ph, __m256h, __m256i, 8) -test_1 (_mm256_getexp_round_pd, __m256d, __m256d, 8) -test_1 (_mm256_getexp_round_ph, __m256h, __m256h, 8) -test_1 (_mm256_getexp_round_ps, __m256, __m256, 8) -test_1 (_mm256_sqrt_round_pd, __m256d, __m256d, 9) -test_1 (_mm256_sqrt_round_ph, __m256h, __m256h, 9) -test_1 (_mm256_sqrt_round_ps, __m256, __m256, 9) -test_1x (_mm256_reduce_round_ph, __m256h, __m256h, 123, 8) -test_1x (_mm256_reduce_round_ps, __m256, __m256, 123, 8) -test_1x (_mm256_reduce_round_pd, __m256d, __m256d, 123, 8) -test_1x (_mm256_roundscale_round_ph, __m256h, __m256h, 123, 8) -test_1x (_mm256_roundscale_round_ps, __m256, __m256, 123, 8) -test_1x (_mm256_roundscale_round_pd, __m256d, __m256d, 123, 8) -test_1y (_mm256_getmant_round_ph, __m256h, __m256h, 1, 1, 8) -test_1y (_mm256_getmant_round_ps, __m256, __m256, 1, 1, 8) -test_1y (_mm256_getmant_round_pd, __m256d, __m256d, 1, 1, 8) -test_2 (_mm256_add_round_pd, __m256d, __m256d, __m256d, 9) -test_2 (_mm256_add_round_ph, __m256h, __m256h, __m256h, 8) -test_2 (_mm256_add_round_ps, __m256, __m256, __m256, 9) -test_2 (_mm256_maskz_cvt_roundepi32_ph, __m128h, __mmask8, __m256i, 8) -test_2 (_mm256_maskz_cvt_roundepi32_ps, __m256, __mmask8, __m256i, 9) -test_2 (_mm256_maskz_cvt_roundpd_ph, __m128h, __mmask8, __m256d, 8) -test_2 (_mm256_maskz_cvt_roundpd_ps, __m128, __mmask8, __m256d, 9) -test_2 (_mm256_maskz_cvt_roundpd_epi32, __m128i, __mmask8, __m256d, 9) -test_2 (_mm256_maskz_cvt_roundpd_epi64, __m256i, __mmask8, __m256d, 9) -test_2 (_mm256_maskz_cvt_roundpd_epu32, __m128i, __mmask8, __m256d, 9) -test_2 (_mm256_maskz_cvt_roundpd_epu64, __m256i, __mmask8, __m256d, 9) -test_2 (_mm256_maskz_cvt_roundph_epi32, __m256i, __mmask8, __m128h, 8) -test_2 (_mm256_maskz_cvt_roundph_pd, __m256d, __mmask8, __m128h, 8) -test_2 (_mm256_maskz_cvt_roundph_ps, __m256, __mmask8, __m128i, 8) -test_2 (_mm256_maskz_cvtx_roundph_ps, __m256, __mmask8, __m128h, 8) -test_2 (_mm256_maskz_cvt_roundph_epi64, __m256i, __mmask8, __m128h, 8) -test_2 (_mm256_maskz_cvt_roundph_epu32, __m256i, __mmask8, __m128h, 8) -test_2 (_mm256_maskz_cvt_roundph_epu64, __m256i, __mmask8, __m128h, 8) -test_2 (_mm256_maskz_cvt_roundph_epu16, __m256i, __mmask16, __m256h, 8) -test_2 (_mm256_maskz_cvt_roundph_epi16, __m256i, __mmask16, __m256h, 8) -test_2 (_mm256_maskz_cvt_roundps_pd, __m256d, __mmask8, __m128, 8) -test_2 (_mm256_maskz_cvtx_roundps_ph, __m128h, __mmask8, __m256, 8) -test_2 (_mm256_maskz_cvt_roundps_epi32, __m256i, __mmask8, __m256, 9) -test_2 (_mm256_maskz_cvt_roundps_epu32, __m256i, __mmask8, __m256, 9) -test_2 (_mm256_maskz_cvt_roundps_epi64, __m256i, __mmask8, __m128, 8) -test_2 (_mm256_maskz_cvt_roundps_epu64, __m256i, __mmask8, __m128, 8) -test_2 (_mm256_maskz_cvt_roundepi64_pd, __m256d, __mmask8, __m256i, 8) -test_2 (_mm256_maskz_cvt_roundepi64_ph, __m128h, __mmask8, __m256i, 8) -test_2 (_mm256_maskz_cvt_roundepi64_ps, __m128, __mmask8, __m256i, 8) -test_2 (_mm256_maskz_cvtt_roundpd_epi32, __m128i, __mmask8, __m256d, 8) -test_2 (_mm256_maskz_cvtt_roundpd_epi64, __m256i, __mmask8, __m256d, 8) -test_2 (_mm256_maskz_cvtt_roundpd_epu32, __m128i, __mmask8, __m256d, 8) -test_2 (_mm256_maskz_cvtt_roundpd_epu64, __m256i, __mmask8, __m256d, 8) -test_2 (_mm256_maskz_cvtt_roundph_epi32, __m256i, __mmask8, __m128h, 8) -test_2 (_mm256_maskz_cvtt_roundph_epi64, __m256i, __mmask8, __m128h, 8) -test_2 (_mm256_maskz_cvtt_roundph_epu32, __m256i, __mmask8, __m128h, 8) -test_2 (_mm256_maskz_cvtt_roundph_epu64, __m256i, __mmask8, __m128h, 8) -test_2 (_mm256_maskz_cvtt_roundph_epu16, __m256i, __mmask16, __m256h, 8) -test_2 (_mm256_maskz_cvtt_roundph_epi16, __m256i, __mmask16, __m256h, 8) -test_2 (_mm256_maskz_cvtt_roundps_epi32, __m256i, __mmask8, __m256, 8) -test_2 (_mm256_maskz_cvtt_roundps_epi64, __m256i, __mmask8, __m128h, 8) -test_2 (_mm256_maskz_cvtt_roundps_epu32, __m256i, __mmask8, __m256, 8) -test_2 (_mm256_maskz_cvtt_roundps_epu64, __m256i, __mmask8, __m128h, 8) -test_2 (_mm256_maskz_cvt_roundepu32_ph, __m128h, __mmask8, __m256i, 8) -test_2 (_mm256_maskz_cvt_roundepu32_ps, __m256, __mmask8, __m256i, 9) -test_2 (_mm256_maskz_cvt_roundepu64_pd, __m256d, __mmask8, __m256i, 9) -test_2 (_mm256_maskz_cvt_roundepu64_ph, __m128h, __mmask8, __m256i, 8) -test_2 (_mm256_maskz_cvt_roundepu64_ps, __m128, __mmask8, __m256i, 9) -test_2 (_mm256_maskz_cvt_roundepu16_ph, __m256h, __mmask16, __m256i, 8) -test_2 (_mm256_maskz_cvt_roundepi16_ph, __m256h, __mmask16, __m256i, 8) -test_2 (_mm256_div_round_pd, __m256d, __m256d, __m256d, 9) -test_2 (_mm256_div_round_ph, __m256h, __m256h, __m256h, 9) -test_2 (_mm256_div_round_ps, __m256, __m256, __m256, 9) -test_2 (_mm256_fcmul_round_pch, __m256h, __m256h, __m256h, 8) -test_2 (_mm256_maskz_getexp_round_pd, __m256d, __mmask8, __m256d, 8) -test_2 (_mm256_maskz_getexp_round_ph, __m256h, __mmask16, __m256h, 8) -test_2 (_mm256_maskz_getexp_round_ps, __m256, __mmask8, __m256, 8) -test_2 (_mm256_max_round_pd, __m256d, __m256d, __m256d, 8) -test_2 (_mm256_max_round_ph, __m256h, __m256h, __m256h, 8) -test_2 (_mm256_max_round_ps, __m256, __m256, __m256, 8) -test_2 (_mm256_min_round_pd, __m256d, __m256d, __m256d, 8) -test_2 (_mm256_min_round_ph, __m256h, __m256h, __m256h, 8) -test_2 (_mm256_min_round_ps, __m256, __m256, __m256, 8) -test_2 (_mm256_mul_round_pd, __m256d, __m256d, __m256d, 9) -test_2 (_mm256_mul_round_ph, __m256h, __m256h, __m256h, 9) -test_2 (_mm256_mul_round_ps, __m256, __m256, __m256, 9) -test_2 (_mm256_scalef_round_pd, __m256d, __m256d, __m256d, 9) -test_2 (_mm256_scalef_round_ph, __m256h, __m256h, __m256h, 9) -test_2 (_mm256_scalef_round_ps, __m256, __m256, __m256, 9) -test_2 (_mm256_maskz_sqrt_round_pd, __m256d, __mmask8, __m256d, 9) -test_2 (_mm256_maskz_sqrt_round_ph, __m256h, __mmask16, __m256h, 9) -test_2 (_mm256_maskz_sqrt_round_ps, __m256, __mmask8, __m256, 9) -test_2 (_mm256_sub_round_pd, __m256d, __m256d, __m256d, 9) -test_2 (_mm256_sub_round_ph, __m256h, __m256h, __m256h, 9) -test_2 (_mm256_sub_round_ps, __m256, __m256, __m256, 9) -test_2x (_mm256_cmp_round_pd_mask, __mmask8, __m256d, __m256d, 1, 8) -test_2x (_mm256_cmp_round_ph_mask, __mmask16, __m256h, __m256h, 1, 8) -test_2x (_mm256_cmp_round_ps_mask, __mmask8, __m256, __m256, 1, 8) -test_2x (_mm256_range_round_pd, __m256d, __m256d, __m256d, 15, 8) -test_2x (_mm256_range_round_ps, __m256, __m256, __m256, 15, 8) -test_2x (_mm256_maskz_reduce_round_pd, __m256d, __mmask8, __m256d, 123, 8) -test_2x (_mm256_maskz_reduce_round_ph, __m256h, __mmask8, __m256h, 123, 8) -test_2x (_mm256_maskz_reduce_round_ps, __m256, __mmask16, __m256, 123, 8) -test_2x (_mm256_maskz_roundscale_round_pd, __m256d, __mmask8, __m256d, 123, 8) -test_2x (_mm256_maskz_roundscale_round_ph, __m256h, __mmask8, __m256h, 123, 8) -test_2x (_mm256_maskz_roundscale_round_ps, __m256, __mmask16, __m256, 123, 8) -test_2y (_mm256_maskz_getmant_round_pd, __m256d, __mmask8, __m256d, 1, 1, 8) -test_2y (_mm256_maskz_getmant_round_ph, __m256h, __mmask16, __m256h, 1, 1, 8) -test_2y (_mm256_maskz_getmant_round_ps, __m256, __mmask8, __m256, 1, 1, 8) -test_3 (_mm256_maskz_add_round_pd, __m256d, __mmask8, __m256d, __m256d, 9) -test_3 (_mm256_maskz_add_round_ph, __m256h, __mmask16, __m256h, __m256h, 8) -test_3 (_mm256_maskz_add_round_ps, __m256, __mmask8, __m256, __m256, 9) -test_3 (_mm256_mask_cvt_roundepi32_ph, __m128h, __m128h, __mmask8, __m256i, 8) -test_3 (_mm256_mask_cvt_roundepi32_ps, __m256, __m256, __mmask8, __m256i, 9) -test_3 (_mm256_mask_cvt_roundpd_ph, __m128h, __m128h, __mmask8, __m256d, 8) -test_3 (_mm256_mask_cvt_roundpd_ps, __m128, __m128, __mmask8, __m256d, 9) -test_3 (_mm256_mask_cvt_roundpd_epi32, __m128i, __m128i, __mmask8, __m256d, 9) -test_3 (_mm256_mask_cvt_roundpd_epu32, __m128i, __m128i, __mmask8, __m256d, 9) -test_3 (_mm256_mask_cvt_roundpd_epi64, __m256i, __m256i, __mmask8, __m256d, 9) -test_3 (_mm256_mask_cvt_roundpd_epu64, __m256i, __m256i, __mmask8, __m256d, 9) -test_3 (_mm256_mask_cvt_roundph_epi32, __m256i, __m256i, __mmask8, __m128h, 8) -test_3 (_mm256_mask_cvt_roundph_pd, __m256d, __m256d, __mmask8, __m128h, 8) -test_3 (_mm256_mask_cvt_roundph_ps, __m256, __m256, __mmask8, __m128i, 8) -test_3 (_mm256_mask_cvtx_roundph_ps, __m256, __m256, __mmask8, __m128h, 8) -test_3 (_mm256_mask_cvt_roundph_epi64, __m256i, __m256i, __mmask8, __m128h, 8) -test_3 (_mm256_mask_cvt_roundph_epu32, __m256i, __m256i, __mmask8, __m128h, 8) -test_3 (_mm256_mask_cvt_roundph_epu64, __m256i, __m256i, __mmask8, __m128h, 8) -test_3 (_mm256_mask_cvt_roundph_epu16, __m256i, __m256i, __mmask16, __m256h, 8) -test_3 (_mm256_mask_cvt_roundph_epi16, __m256i, __m256i, __mmask16, __m256h, 8) -test_3 (_mm256_mask_cvt_roundps_pd, __m256d, __m256d, __mmask8, __m128, 8) -test_3 (_mm256_mask_cvtx_roundps_ph, __m128h, __m128h, __mmask8, __m256, 8) -test_3 (_mm256_mask_cvt_roundps_epi32, __m256i, __m256i, __mmask8, __m256, 9) -test_3 (_mm256_mask_cvt_roundps_epu32, __m256i, __m256i, __mmask8, __m256, 9) -test_3 (_mm256_mask_cvt_roundps_epi64, __m256i, __m256i, __mmask8, __m128, 8) -test_3 (_mm256_mask_cvt_roundps_epu64, __m256i, __m256i, __mmask8, __m128, 8) -test_3 (_mm256_mask_cvt_roundepi64_pd, __m256d, __m256d, __mmask8, __m256i, 8) -test_3 (_mm256_mask_cvt_roundepi64_ph, __m128h, __m128h, __mmask8, __m256i, 8) -test_3 (_mm256_mask_cvt_roundepi64_ps, __m128, __m128, __mmask8, __m256i, 8) -test_3 (_mm256_mask_cvtt_roundpd_epi32, __m128i, __m128i, __mmask8, __m256d, 8) -test_3 (_mm256_mask_cvtt_roundpd_epi64, __m256i, __m256i, __mmask8, __m256d, 8) -test_3 (_mm256_mask_cvtt_roundpd_epu32, __m128i, __m128i, __mmask8, __m256d, 8) -test_3 (_mm256_mask_cvtt_roundpd_epu64, __m256i, __m256i, __mmask8, __m256d, 8) -test_3 (_mm256_mask_cvtt_roundph_epi32, __m256i, __m256i, __mmask8, __m128h, 8) -test_3 (_mm256_mask_cvtt_roundph_epi64, __m256i, __m256i, __mmask8, __m128h, 8) -test_3 (_mm256_mask_cvtt_roundph_epu32, __m256i, __m256i, __mmask8, __m128h, 8) -test_3 (_mm256_mask_cvtt_roundph_epu64, __m256i, __m256i, __mmask8, __m128h, 8) -test_3 (_mm256_mask_cvtt_roundph_epu16, __m256i, __m256i, __mmask16, __m256h, 8) -test_3 (_mm256_mask_cvtt_roundph_epi16, __m256i, __m256i, __mmask16, __m256h, 8) -test_3 (_mm256_mask_cvtt_roundps_epi32, __m256i, __m256i, __mmask8, __m256, 8) -test_3 (_mm256_mask_cvtt_roundps_epi64, __m256i, __m256i, __mmask8, __m128h, 8) -test_3 (_mm256_mask_cvtt_roundps_epu32, __m256i, __m256i, __mmask8, __m256, 8) -test_3 (_mm256_mask_cvtt_roundps_epu64, __m256i, __m256i, __mmask8, __m128h, 8) -test_3 (_mm256_mask_cvt_roundepu32_ph, __m128h, __m128h, __mmask8, __m256i, 8) -test_3 (_mm256_mask_cvt_roundepu32_ps, __m256, __m256, __mmask8, __m256i, 9) -test_3 (_mm256_mask_cvt_roundepu64_pd, __m256d, __m256d, __mmask8, __m256i, 9) -test_3 (_mm256_mask_cvt_roundepu64_ph, __m128h, __m128h, __mmask8, __m256i, 8) -test_3 (_mm256_mask_cvt_roundepu64_ps, __m128, __m128, __mmask8, __m256i, 9) -test_3 (_mm256_mask_cvt_roundepu16_ph, __m256h, __m256h, __mmask16, __m256i, 8) -test_3 (_mm256_mask_cvt_roundepi16_ph, __m256h, __m256h, __mmask16, __m256i, 8) -test_3 (_mm256_maskz_div_round_pd, __m256d, __mmask8, __m256d, __m256d, 9) -test_3 (_mm256_maskz_div_round_ph, __m256h, __mmask8, __m256h, __m256h, 9) -test_3 (_mm256_maskz_div_round_ps, __m256, __mmask8, __m256, __m256, 9) -test_3 (_mm256_fcmadd_round_pch, __m256h, __m256h, __m256h, __m256h, 8) -test_3 (_mm256_maskz_fcmul_round_pch, __m256h, __mmask8, __m256h, __m256h, 8) -test_3 (_mm256_fmadd_round_pd, __m256d, __m256d, __m256d, __m256d, 9) -test_3 (_mm256_fmadd_round_ph, __m256h, __m256h, __m256h, __m256h, 9) -test_3 (_mm256_fmadd_round_ps, __m256, __m256, __m256, __m256, 9) -test_3 (_mm256_fmadd_round_pch, __m256h, __m256h, __m256h, __m256h, 8) -test_3 (_mm256_fmaddsub_round_pd, __m256d, __m256d, __m256d, __m256d, 9) -test_3 (_mm256_fmaddsub_round_ph, __m256h, __m256h, __m256h, __m256h, 9) -test_3 (_mm256_fmaddsub_round_ps, __m256, __m256, __m256, __m256, 9) -test_3 (_mm256_fmsub_round_pd, __m256d, __m256d, __m256d, __m256d, 9) -test_3 (_mm256_fmsub_round_ph, __m256h, __m256h, __m256h, __m256h, 9) -test_3 (_mm256_fmsub_round_ps, __m256, __m256, __m256, __m256, 9) -test_3 (_mm256_fmsubadd_round_pd, __m256d, __m256d, __m256d, __m256d, 9) -test_3 (_mm256_fmsubadd_round_ph, __m256h, __m256h, __m256h, __m256h, 9) -test_3 (_mm256_fmsubadd_round_ps, __m256, __m256, __m256, __m256, 9) -test_3 (_mm256_maskz_fmul_round_pch, __m256h, __mmask8, __m256h, __m256h, 8) -test_3 (_mm256_fnmadd_round_pd, __m256d, __m256d, __m256d, __m256d, 9) -test_3 (_mm256_fnmadd_round_ph, __m256h, __m256h, __m256h, __m256h, 9) -test_3 (_mm256_fnmadd_round_ps, __m256, __m256, __m256, __m256, 9) -test_3 (_mm256_fnmsub_round_pd, __m256d, __m256d, __m256d, __m256d, 9) -test_3 (_mm256_fnmsub_round_ph, __m256h, __m256h, __m256h, __m256h, 9) -test_3 (_mm256_fnmsub_round_ps, __m256, __m256, __m256, __m256, 9) -test_3 (_mm256_mask_getexp_round_pd, __m256d, __m256d, __mmask8, __m256d, 8) -test_3 (_mm256_mask_getexp_round_ph, __m256h, __m256h, __mmask16, __m256h, 8) -test_3 (_mm256_mask_getexp_round_ps, __m256, __m256, __mmask8, __m256, 8) -test_3 (_mm256_maskz_max_round_pd, __m256d, __mmask8, __m256d, __m256d, 8) -test_3 (_mm256_maskz_max_round_ph, __m256h, __mmask16, __m256h, __m256h, 8) -test_3 (_mm256_maskz_max_round_ps, __m256, __mmask8, __m256, __m256, 8) -test_3 (_mm256_maskz_min_round_pd, __m256d, __mmask8, __m256d, __m256d, 8) -test_3 (_mm256_maskz_min_round_ph, __m256h, __mmask16, __m256h, __m256h, 8) -test_3 (_mm256_maskz_min_round_ps, __m256, __mmask8, __m256, __m256, 8) -test_3 (_mm256_maskz_mul_round_pd, __m256d, __mmask8, __m256d, __m256d, 9) -test_3 (_mm256_maskz_mul_round_ph, __m256h, __mmask16, __m256h, __m256h, 9) -test_3 (_mm256_maskz_mul_round_ps, __m256, __mmask8, __m256, __m256, 9) -test_3 (_mm256_maskz_scalef_round_pd, __m256d, __mmask8, __m256d, __m256d, 9) -test_3 (_mm256_maskz_scalef_round_ph, __m256h, __mmask16, __m256h, __m256h, 9) -test_3 (_mm256_maskz_scalef_round_ps, __m256, __mmask8, __m256, __m256, 9) -test_3 (_mm256_mask_sqrt_round_pd, __m256d, __m256d, __mmask8, __m256d, 9) -test_3 (_mm256_mask_sqrt_round_ph, __m256h, __m256h, __mmask16, __m256h, 9) -test_3 (_mm256_mask_sqrt_round_ps, __m256, __m256, __mmask8, __m256, 9) -test_3 (_mm256_maskz_sub_round_pd, __m256d, __mmask8, __m256d, __m256d, 9) -test_3 (_mm256_maskz_sub_round_ph, __m256h, __mmask16, __m256h, __m256h, 9) -test_3 (_mm256_maskz_sub_round_ps, __m256, __mmask8, __m256, __m256, 9) -test_3x (_mm256_mask_cmp_round_pd_mask, __mmask8, __mmask8, __m256d, __m256d, 1, 8) -test_3x (_mm256_mask_cmp_round_ph_mask, __mmask16, __mmask16, __m256h, __m256h, 1, 8) -test_3x (_mm256_mask_cmp_round_ps_mask, __mmask8, __mmask8, __m256, __m256, 1, 8) -test_3x (_mm256_fixupimm_round_pd, __m256d, __m256d, __m256d, __m256i, 3, 8) -test_3x (_mm256_fixupimm_round_ps, __m256, __m256, __m256, __m256i, 3, 8) -test_3x (_mm256_maskz_range_round_pd, __m256d, __mmask8, __m256d, __m256d, 15, 8) -test_3x (_mm256_maskz_range_round_ps, __m256, __mmask8, __m256, __m256, 15, 8) -test_3x (_mm256_mask_reduce_round_ph, __m256h, __m256h, __mmask8, __m256h, 123, 8) -test_3x (_mm256_mask_reduce_round_ps, __m256, __m256, __mmask16, __m256, 123, 8) -test_3x (_mm256_mask_reduce_round_pd, __m256d, __m256d, __mmask8, __m256d, 123, 8) -test_3x (_mm256_mask_roundscale_round_ph, __m256h, __m256h, __mmask8, __m256h, 123, 8) -test_3x (_mm256_mask_roundscale_round_ps, __m256, __m256, __mmask16, __m256, 123, 8) -test_3x (_mm256_mask_roundscale_round_pd, __m256d, __m256d, __mmask8, __m256d, 123, 8) -test_3y (_mm256_mask_getmant_round_pd, __m256d, __m256d, __mmask8, __m256d, 1, 1, 8) -test_3y (_mm256_mask_getmant_round_ph, __m256h, __m256h, __mmask16, __m256h, 1, 1, 8) -test_3y (_mm256_mask_getmant_round_ps, __m256, __m256, __mmask8, __m256, 1, 1, 8) -test_4 (_mm256_mask_add_round_pd, __m256d, __m256d, __mmask8, __m256d, __m256d, 9) -test_4 (_mm256_mask_add_round_ph, __m256h, __m256h, __mmask16, __m256h, __m256h, 8) -test_4 (_mm256_mask_add_round_ps, __m256, __m256, __mmask8, __m256, __m256, 9) -test_4 (_mm256_mask_div_round_pd, __m256d, __m256d, __mmask8, __m256d, __m256d, 9) -test_4 (_mm256_mask_div_round_ph, __m256h, __m256h, __mmask8, __m256h, __m256h, 9) -test_4 (_mm256_mask_div_round_ps, __m256, __m256, __mmask8, __m256, __m256, 9) -test_4 (_mm256_mask_fcmadd_round_pch, __m256h, __m256h, __mmask8, __m256h, __m256h, 9) -test_4 (_mm256_mask3_fcmadd_round_pch, __m256h, __m256h, __m256h, __m256h, __mmask8, 9) -test_4 (_mm256_maskz_fcmadd_round_pch, __m256h, __mmask8, __m256h, __m256h, __m256h, 9) -test_4 (_mm256_mask_fcmul_round_pch, __m256h, __m256h, __mmask8, __m256h, __m256h, 8) -test_4 (_mm256_mask_fmadd_round_pd, __m256d, __m256d, __mmask8, __m256d, __m256d, 9) -test_4 (_mm256_mask3_fmadd_round_pd, __m256d, __m256d, __m256d, __m256d, __mmask8, 9) -test_4 (_mm256_maskz_fmadd_round_pd, __m256d, __mmask8, __m256d, __m256d, __m256d, 9) -test_4 (_mm256_mask_fmadd_round_ph, __m256h, __m256h, __mmask16, __m256h, __m256h, 9) -test_4 (_mm256_mask3_fmadd_round_ph, __m256h, __m256h, __m256h, __m256h, __mmask16, 9) -test_4 (_mm256_maskz_fmadd_round_ph, __m256h,__mmask16, __m256h, __m256h, __m256h, 9) -test_4 (_mm256_mask_fmadd_round_ps, __m256, __m256, __mmask8, __m256, __m256, 9) -test_4 (_mm256_mask3_fmadd_round_ps, __m256, __m256, __m256, __m256, __mmask8, 9) -test_4 (_mm256_maskz_fmadd_round_ps, __m256,__mmask8, __m256, __m256, __m256, 9) -test_4 (_mm256_mask_fmadd_round_pch, __m256h, __m256h, __mmask8, __m256h, __m256h, 8) -test_4 (_mm256_mask3_fmadd_round_pch, __m256h, __m256h, __m256h, __m256h, __mmask8, 8) -test_4 (_mm256_maskz_fmadd_round_pch, __m256h, __mmask8, __m256h, __m256h, __m256h, 8) -test_4 (_mm256_mask_fmaddsub_round_pd, __m256d, __m256d, __mmask8, __m256d, __m256d, 9) -test_4 (_mm256_mask3_fmaddsub_round_pd, __m256d, __m256d, __m256d, __m256d, __mmask8, 9) -test_4 (_mm256_maskz_fmaddsub_round_pd, __m256d,__mmask8, __m256d, __m256d, __m256d, 9) -test_4 (_mm256_mask_fmaddsub_round_ph, __m256h, __m256h, __mmask16, __m256h, __m256h, 9) -test_4 (_mm256_mask3_fmaddsub_round_ph, __m256h, __m256h, __m256h, __m256h, __mmask16, 9) -test_4 (_mm256_maskz_fmaddsub_round_ph, __m256h,__mmask16, __m256h, __m256h, __m256h, 9) -test_4 (_mm256_mask_fmaddsub_round_ps, __m256, __m256, __mmask8, __m256, __m256, 9) -test_4 (_mm256_mask3_fmaddsub_round_ps, __m256, __m256, __m256, __m256, __mmask8, 9) -test_4 (_mm256_maskz_fmaddsub_round_ps, __m256,__mmask8, __m256, __m256, __m256, 9) -test_4 (_mm256_mask_fmsub_round_pd, __m256d, __m256d, __mmask8, __m256d, __m256d, 9) -test_4 (_mm256_mask3_fmsub_round_pd, __m256d, __m256d, __m256d, __m256d, __mmask8, 9) -test_4 (_mm256_maskz_fmsub_round_pd, __m256d,__mmask8, __m256d, __m256d, __m256d, 9) -test_4 (_mm256_mask_fmsub_round_ph, __m256h, __m256h, __mmask16, __m256h, __m256h, 9) -test_4 (_mm256_mask3_fmsub_round_ph, __m256h, __m256h, __m256h, __m256h, __mmask16, 9) -test_4 (_mm256_maskz_fmsub_round_ph, __m256h,__mmask16, __m256h, __m256h, __m256h, 9) -test_4 (_mm256_mask_fmsub_round_ps, __m256, __m256, __mmask8, __m256, __m256, 9) -test_4 (_mm256_mask3_fmsub_round_ps, __m256, __m256, __m256, __m256, __mmask8, 9) -test_4 (_mm256_maskz_fmsub_round_ps, __m256,__mmask8, __m256, __m256, __m256, 9) -test_4 (_mm256_mask_fmsubadd_round_pd, __m256d, __m256d, __mmask8, __m256d, __m256d, 9) -test_4 (_mm256_mask3_fmsubadd_round_pd, __m256d, __m256d, __m256d, __m256d, __mmask8, 9) -test_4 (_mm256_maskz_fmsubadd_round_pd, __m256d,__mmask8, __m256d, __m256d, __m256d, 9) -test_4 (_mm256_mask_fmsubadd_round_ph, __m256h, __m256h, __mmask16, __m256h, __m256h, 9) -test_4 (_mm256_mask3_fmsubadd_round_ph, __m256h, __m256h, __m256h, __m256h, __mmask16, 9) -test_4 (_mm256_maskz_fmsubadd_round_ph, __m256h,__mmask16, __m256h, __m256h, __m256h, 9) -test_4 (_mm256_mask_fmsubadd_round_ps, __m256, __m256, __mmask8, __m256, __m256, 9) -test_4 (_mm256_mask3_fmsubadd_round_ps, __m256, __m256, __m256, __m256, __mmask8, 9) -test_4 (_mm256_maskz_fmsubadd_round_ps, __m256,__mmask8, __m256, __m256, __m256, 9) -test_4 (_mm256_mask_fmul_round_pch, __m256h, __m256h, __mmask8, __m256h, __m256h, 8) -test_4 (_mm256_mask_fnmadd_round_pd, __m256d, __m256d, __mmask8, __m256d, __m256d, 9) -test_4 (_mm256_mask3_fnmadd_round_pd, __m256d, __m256d, __m256d, __m256d, __mmask8, 9) -test_4 (_mm256_maskz_fnmadd_round_pd, __m256d,__mmask8, __m256d, __m256d, __m256d, 9) -test_4 (_mm256_mask_fnmadd_round_ph, __m256h, __m256h, __mmask16, __m256h, __m256h, 9) -test_4 (_mm256_mask3_fnmadd_round_ph, __m256h, __m256h, __m256h, __m256h, __mmask16, 9) -test_4 (_mm256_maskz_fnmadd_round_ph, __m256h,__mmask16, __m256h, __m256h, __m256h, 9) -test_4 (_mm256_mask_fnmadd_round_ps, __m256, __m256, __mmask8, __m256, __m256, 9) -test_4 (_mm256_mask3_fnmadd_round_ps, __m256, __m256, __m256, __m256, __mmask8, 9) -test_4 (_mm256_maskz_fnmadd_round_ps, __m256,__mmask8, __m256, __m256, __m256, 9) -test_4 (_mm256_mask_fnmsub_round_pd, __m256d, __m256d, __mmask8, __m256d, __m256d, 9) -test_4 (_mm256_mask3_fnmsub_round_pd, __m256d, __m256d, __m256d, __m256d, __mmask8, 9) -test_4 (_mm256_maskz_fnmsub_round_pd, __m256d,__mmask8, __m256d, __m256d, __m256d, 9) -test_4 (_mm256_mask_fnmsub_round_ph, __m256h, __m256h, __mmask16, __m256h, __m256h, 9) -test_4 (_mm256_mask3_fnmsub_round_ph, __m256h, __m256h, __m256h, __m256h, __mmask16, 9) -test_4 (_mm256_maskz_fnmsub_round_ph, __m256h,__mmask16, __m256h, __m256h, __m256h, 9) -test_4 (_mm256_mask_fnmsub_round_ps, __m256, __m256, __mmask8, __m256, __m256, 9) -test_4 (_mm256_mask3_fnmsub_round_ps, __m256, __m256, __m256, __m256, __mmask8, 9) -test_4 (_mm256_maskz_fnmsub_round_ps, __m256,__mmask8, __m256, __m256, __m256, 9) -test_4 (_mm256_mask_max_round_pd, __m256d, __m256d, __mmask8, __m256d, __m256d, 8) -test_4 (_mm256_mask_max_round_ph, __m256h, __m256h, __mmask16, __m256h, __m256h, 8) -test_4 (_mm256_mask_max_round_ps, __m256, __m256, __mmask8, __m256, __m256, 8) -test_4 (_mm256_mask_min_round_pd, __m256d, __m256d, __mmask8, __m256d, __m256d, 8) -test_4 (_mm256_mask_min_round_ph, __m256h, __m256h, __mmask16, __m256h, __m256h, 8) -test_4 (_mm256_mask_min_round_ps, __m256, __m256, __mmask8, __m256, __m256, 8) -test_4 (_mm256_mask_mul_round_pd, __m256d, __m256d, __mmask8, __m256d, __m256d, 9) -test_4 (_mm256_mask_mul_round_ph, __m256h, __m256h, __mmask16, __m256h, __m256h, 9) -test_4 (_mm256_mask_mul_round_ps, __m256, __m256, __mmask8, __m256, __m256, 9) -test_4 (_mm256_mask_scalef_round_pd, __m256d, __m256d, __mmask8, __m256d, __m256d, 9) -test_4 (_mm256_mask_scalef_round_ph, __m256h, __m256h, __mmask16, __m256h, __m256h, 9) -test_4 (_mm256_mask_scalef_round_ps, __m256, __m256, __mmask8, __m256, __m256, 9) -test_4 (_mm256_mask_sub_round_pd, __m256d, __m256d, __mmask8, __m256d, __m256d, 9) -test_4 (_mm256_mask_sub_round_ph, __m256h, __m256h, __mmask16, __m256h, __m256h, 9) -test_4 (_mm256_mask_sub_round_ps, __m256, __m256, __mmask8, __m256, __m256, 9) -test_4x (_mm256_maskz_fixupimm_round_pd, __m256d, __mmask8, __m256d, __m256d, __m256i, 3, 8) -test_4x (_mm256_maskz_fixupimm_round_ps, __m256, __mmask8, __m256, __m256, __m256i, 3, 8) -test_4x (_mm256_mask_fixupimm_round_pd, __m256d, __m256d, __mmask8, __m256d, __m256i, 3, 8) -test_4x (_mm256_mask_fixupimm_round_ps, __m256, __m256, __mmask8, __m256, __m256i, 3, 8) -test_4x (_mm256_mask_range_round_pd, __m256d, __m256d, __mmask8, __m256d, __m256d, 15, 8) -test_4x (_mm256_mask_range_round_ps, __m256, __m256, __mmask8, __m256, __m256, 15, 8) - /* avx10_2-512mediaintrin.h */ test_2 (_mm512_mpsadbw_epu8, __m512i, __m512i, __m512i, 1) test_3 (_mm512_maskz_mpsadbw_epu8, __m512i, __mmask32, __m512i, __m512i, 1) @@ -1383,9 +1031,6 @@ test_3 (_mm256_maskz_mpsadbw_epu8, __m256i, __mmask16, __m256i, __m256i, 1) test_4 (_mm_mask_mpsadbw_epu8, __m128i, __m128i, __mmask8, __m128i, __m128i, 1) test_4 (_mm256_mask_mpsadbw_epu8, __m256i, __m256i, __mmask16, __m256i, __m256i, 1) -/* avx10_2convertintrin */ -test_2 (_mm256_cvtx_round2ps_ph, __m256h, __m256, __m256, 4) - /* avx10_2-512convertintrin.h */ test_2 (_mm512_cvtx_round2ps_ph, __m512h, __m512, __m512, 4) @@ -1483,54 +1128,6 @@ test_2 (_mm512_maskz_cvtts_roundps_epu64, __m512i, __mmask8, __m256, 8) test_3 (_mm512_mask_cvtts_roundps_epu64, __m512i, __m512i, __mmask8, __m256, 8) /* avx10_2satcvtintrin.h */ -test_1 (_mm256_ipcvts_roundph_epi8, __m256i, __m256h, 8) -test_1 (_mm256_ipcvts_roundph_epu8, __m256i, __m256h, 8) -test_1 (_mm256_ipcvts_roundps_epi8, __m256i, __m256, 8) -test_1 (_mm256_ipcvts_roundps_epu8, __m256i, __m256, 8) -test_1 (_mm256_ipcvtts_roundph_epi8, __m256i, __m256h, 8) -test_1 (_mm256_ipcvtts_roundph_epu8, __m256i, __m256h, 8) -test_1 (_mm256_ipcvtts_roundps_epi8, __m256i, __m256, 8) -test_1 (_mm256_ipcvtts_roundps_epu8, __m256i, __m256, 8) -test_2 (_mm256_maskz_ipcvts_roundph_epi8, __m256i, __mmask16, __m256h, 8) -test_2 (_mm256_maskz_ipcvts_roundph_epu8, __m256i, __mmask16, __m256h, 8) -test_2 (_mm256_maskz_ipcvts_roundps_epi8, __m256i, __mmask8, __m256, 8) -test_2 (_mm256_maskz_ipcvts_roundps_epu8, __m256i, __mmask8, __m256, 8) -test_2 (_mm256_maskz_ipcvtts_roundph_epi8, __m256i, __mmask16, __m256h, 8) -test_2 (_mm256_maskz_ipcvtts_roundph_epu8, __m256i, __mmask16, __m256h, 8) -test_2 (_mm256_maskz_ipcvtts_roundps_epi8, __m256i, __mmask8, __m256, 8) -test_2 (_mm256_maskz_ipcvtts_roundps_epu8, __m256i, __mmask8, __m256, 8) -test_3 (_mm256_mask_ipcvts_roundph_epi8, __m256i, __m256i, __mmask16, __m256h, 8) -test_3 (_mm256_mask_ipcvts_roundph_epu8, __m256i, __m256i, __mmask16, __m256h, 8) -test_3 (_mm256_mask_ipcvts_roundps_epi8, __m256i, __m256i, __mmask8, __m256, 8) -test_3 (_mm256_mask_ipcvts_roundps_epu8, __m256i, __m256i, __mmask8, __m256, 8) -test_3 (_mm256_mask_ipcvtts_roundph_epi8, __m256i, __m256i, __mmask16, __m256h, 8) -test_3 (_mm256_mask_ipcvtts_roundph_epu8, __m256i, __m256i, __mmask16, __m256h, 8) -test_3 (_mm256_mask_ipcvtts_roundps_epi8, __m256i, __m256i, __mmask8, __m256, 8) -test_3 (_mm256_mask_ipcvtts_roundps_epu8, __m256i, __m256i, __mmask8, __m256, 8) -test_1 (_mm256_cvtts_roundpd_epi32, __m128i, __m256d, 8) -test_2 (_mm256_maskz_cvtts_roundpd_epi32, __m128i, __mmask8, __m256d, 8) -test_3 (_mm256_mask_cvtts_roundpd_epi32, __m128i, __m128i, __mmask8, __m256d, 8) -test_1 (_mm256_cvtts_roundpd_epi64, __m256i, __m256d, 8) -test_2 (_mm256_maskz_cvtts_roundpd_epi64, __m256i, __mmask8, __m256d, 8) -test_3 (_mm256_mask_cvtts_roundpd_epi64, __m256i, __m256i, __mmask8, __m256d, 8) -test_1 (_mm256_cvtts_roundpd_epu32, __m128i, __m256d, 8) -test_2 (_mm256_maskz_cvtts_roundpd_epu32, __m128i, __mmask8, __m256d, 8) -test_3 (_mm256_mask_cvtts_roundpd_epu32, __m128i, __m128i, __mmask8, __m256d, 8) -test_1 (_mm256_cvtts_roundpd_epu64, __m256i, __m256d, 8) -test_2 (_mm256_maskz_cvtts_roundpd_epu64, __m256i, __mmask8, __m256d, 8) -test_3 (_mm256_mask_cvtts_roundpd_epu64, __m256i, __m256i, __mmask8, __m256d, 8) -test_1 (_mm256_cvtts_roundps_epi32, __m256i, __m256, 8) -test_2 (_mm256_maskz_cvtts_roundps_epi32, __m256i, __mmask8, __m256, 8) -test_3 (_mm256_mask_cvtts_roundps_epi32, __m256i, __m256i, __mmask8, __m256, 8) -test_1 (_mm256_cvtts_roundps_epi64, __m256i, __m128, 8) -test_2 (_mm256_maskz_cvtts_roundps_epi64, __m256i, __mmask8, __m128, 8) -test_3 (_mm256_mask_cvtts_roundps_epi64, __m256i, __m256i, __mmask8, __m128, 8) -test_1 (_mm256_cvtts_roundps_epu32, __m256i, __m256, 8) -test_2 (_mm256_maskz_cvtts_roundps_epu32, __m256i, __mmask8, __m256, 8) -test_3 (_mm256_mask_cvtts_roundps_epu32, __m256i, __m256i, __mmask8, __m256, 8) -test_1 (_mm256_cvtts_roundps_epu64, __m256i, __m128, 8) -test_2 (_mm256_maskz_cvtts_roundps_epu64, __m256i, __mmask8, __m128, 8) -test_3 (_mm256_mask_cvtts_roundps_epu64, __m256i, __m256i, __mmask8, __m128, 8) test_1 (_mm_cvtts_roundsd_epi32, int, __m128d, 8) test_1 (_mm_cvtts_roundsd_epu32, unsigned int, __m128d, 8) test_1 (_mm_cvtts_roundss_epi32, int, __m128, 8) @@ -1569,15 +1166,6 @@ test_4 (_mm512_mask_minmax_ph, __m512h, __m512h, __mmask32, __m512h, __m512h, 10 test_2 (_mm256_minmax_pbh, __m256bh, __m256bh, __m256bh, 100) test_3 (_mm256_maskz_minmax_pbh, __m256bh, __mmask16, __m256bh, __m256bh, 100) test_4 (_mm256_mask_minmax_pbh, __m256bh, __m256bh, __mmask16, __m256bh, __m256bh, 100) -test_2x (_mm256_minmax_round_pd, __m256d, __m256d, __m256d, 100, 4) -test_3x (_mm256_maskz_minmax_round_pd, __m256d, __mmask8, __m256d, __m256d, 100, 4) -test_4x (_mm256_mask_minmax_round_pd, __m256d, __m256d, __mmask8, __m256d, __m256d, 100, 4) -test_2x (_mm256_minmax_round_ps, __m256, __m256, __m256, 100, 4) -test_3x (_mm256_maskz_minmax_round_ps, __m256, __mmask8, __m256, __m256, 100, 4) -test_4x (_mm256_mask_minmax_round_ps, __m256, __m256, __mmask8, __m256, __m256, 100, 4) -test_2x (_mm256_minmax_round_ph, __m256h, __m256h, __m256h, 100, 4) -test_3x (_mm256_maskz_minmax_round_ph, __m256h, __mmask16, __m256h, __m256h, 100, 4) -test_4x (_mm256_mask_minmax_round_ph, __m256h, __m256h, __mmask16, __m256h, __m256h, 100, 4) test_2 (_mm256_minmax_pd, __m256d, __m256d, __m256d, 100) test_3 (_mm256_maskz_minmax_pd, __m256d, __mmask8, __m256d, __m256d, 100) test_4 (_mm256_mask_minmax_pd, __m256d, __m256d, __mmask8, __m256d, __m256d, 100) diff --git a/gcc/testsuite/gcc.target/i386/sse-22.c b/gcc/testsuite/gcc.target/i386/sse-22.c index 2da3d05..16b059e 100644 --- a/gcc/testsuite/gcc.target/i386/sse-22.c +++ b/gcc/testsuite/gcc.target/i386/sse-22.c @@ -103,7 +103,7 @@ #ifndef DIFFERENT_PRAGMAS -#pragma GCC target ("sse4a,3dnow,avx,avx2,fma4,xop,aes,pclmul,popcnt,abm,lzcnt,bmi,bmi2,tbm,lwp,fsgsbase,rdrnd,f16c,rtm,rdseed,prfchw,adx,fxsr,xsaveopt,sha,gfni,avx512vp2intersect,serialize,tsxldtrk,amx-tile,amx-int8,amx-bf16,kl,widekl,avxvnni,avxifma,avxvnniint8,avxneconvert,amx-fp16,raoint,amx-complex,avxvnniint16,sm3,sha512,sm4,avx10.2-512,amx-avx512,amx-tf32,amx-transpose,amx-fp8,movrs,amx-movrs") +#pragma GCC target ("sse4a,3dnow,avx,avx2,fma4,xop,aes,pclmul,popcnt,abm,lzcnt,bmi,bmi2,tbm,lwp,fsgsbase,rdrnd,f16c,rtm,rdseed,prfchw,adx,fxsr,xsaveopt,sha,gfni,avx512vp2intersect,serialize,tsxldtrk,amx-tile,amx-int8,amx-bf16,kl,widekl,avxvnni,avxifma,avxvnniint8,avxneconvert,amx-fp16,raoint,amx-complex,avxvnniint16,sm3,sha512,sm4,avx10.2,amx-avx512,amx-tf32,amx-transpose,amx-fp8,movrs,amx-movrs") #endif /* Following intrinsics require immediate arguments. They @@ -220,7 +220,7 @@ test_4 (_mm_cmpestrz, int, __m128i, int, __m128i, int, 1) /* immintrin.h (AVX/AVX2/RDRND/FSGSBASE/F16C/RTM/AVX512F/SHA) */ #ifdef DIFFERENT_PRAGMAS -#pragma GCC target ("avx,avx2,rdrnd,fsgsbase,f16c,rtm,sha,gfni,avx512vp2intersect,serialize,tsxldtrk,amx-tile,amx-int8,amx-bf16,kl,widekl,avxvnni,avxifma,avxvnniint8,avxneconvert,amx-fp16,raoint,amx-complex,avxvnniint16,sm3,sha512,sm4,avx10.2-512,amx-avx512,amx-tf32,amx-transpose,amx-fp8,movrs,amx-movrs") +#pragma GCC target ("avx,avx2,rdrnd,fsgsbase,f16c,rtm,sha,gfni,avx512vp2intersect,serialize,tsxldtrk,amx-tile,amx-int8,amx-bf16,kl,widekl,avxvnni,avxifma,avxvnniint8,avxneconvert,amx-fp16,raoint,amx-complex,avxvnniint16,sm3,sha512,sm4,avx10.2,amx-avx512,amx-tf32,amx-transpose,amx-fp8,movrs,amx-movrs") #endif #include <immintrin.h> test_1 (_cvtss_sh, unsigned short, float, 1) @@ -1061,356 +1061,6 @@ test_1 ( __bextri_u64, unsigned long long, unsigned long long, 1) /* sm3intrin.h */ test_3 (_mm_sm3rnds2_epi32, __m128i, __m128i, __m128i, __m128i, 1) -/* avx10_2roundingintrin.h */ -test_1 (_mm256_cvt_roundepi32_ph, __m128h, __m256i, 8) -test_1 (_mm256_cvt_roundepi32_ps, __m256, __m256i, 9) -test_1 (_mm256_cvt_roundpd_ph, __m128h, __m256d, 8) -test_1 (_mm256_cvt_roundpd_ps, __m128, __m256d, 9) -test_1 (_mm256_cvt_roundpd_epi32, __m128i, __m256d, 9) -test_1 (_mm256_cvt_roundpd_epi64, __m256i, __m256d, 9) -test_1 (_mm256_cvt_roundpd_epu32, __m128i, __m256d, 9) -test_1 (_mm256_cvt_roundpd_epu64, __m256i, __m256d, 9) -test_1 (_mm256_cvt_roundph_epi32, __m256i, __m128h, 8) -test_1 (_mm256_cvt_roundph_pd, __m256d, __m128h, 8) -test_1 (_mm256_cvt_roundph_ps, __m256, __m128i, 8) -test_1 (_mm256_cvtx_roundph_ps, __m256, __m128h, 8) -test_1 (_mm256_cvt_roundph_epi64, __m256i, __m128h, 8) -test_1 (_mm256_cvt_roundph_epu32, __m256i, __m128h, 8) -test_1 (_mm256_cvt_roundph_epu64, __m256i, __m128h, 8) -test_1 (_mm256_cvt_roundph_epu16, __m256i, __m256h, 8) -test_1 (_mm256_cvt_roundph_epi16, __m256i, __m256h, 8) -test_1 (_mm256_cvt_roundps_pd, __m256d, __m128, 8) -test_1 (_mm256_cvtx_roundps_ph, __m128h, __m256, 8) -test_1 (_mm256_cvt_roundps_epi32, __m256i, __m256, 9) -test_1 (_mm256_cvt_roundps_epu32, __m256i, __m256, 9) -test_1 (_mm256_cvt_roundps_epi64, __m256i, __m128, 8) -test_1 (_mm256_cvt_roundps_epu64, __m256i, __m128, 8) -test_1 (_mm256_cvt_roundepi64_pd, __m256d, __m256i, 8) -test_1 (_mm256_cvt_roundepi64_ph, __m128h, __m256i, 8) -test_1 (_mm256_cvt_roundepi64_ps, __m128, __m256i, 8) -test_1 (_mm256_cvtt_roundpd_epi32, __m128i, __m256d, 8) -test_1 (_mm256_cvtt_roundpd_epi64, __m256i, __m256d, 8) -test_1 (_mm256_cvtt_roundpd_epu32, __m128i, __m256d, 8) -test_1 (_mm256_cvtt_roundpd_epu64, __m256i, __m256d, 8) -test_1 (_mm256_cvtt_roundph_epi32, __m256i, __m128d, 8) -test_1 (_mm256_cvtt_roundph_epi64, __m256i, __m128h, 8) -test_1 (_mm256_cvtt_roundph_epu32, __m256i, __m128d, 8) -test_1 (_mm256_cvtt_roundph_epu64, __m256i, __m128h, 8) -test_1 (_mm256_cvtt_roundph_epu16, __m256i, __m256h, 8) -test_1 (_mm256_cvtt_roundph_epi16, __m256i, __m256h, 8) -test_1 (_mm256_cvtt_roundps_epi32, __m256i, __m256, 8) -test_1 (_mm256_cvtt_roundps_epi64, __m256i, __m128h, 8) -test_1 (_mm256_cvtt_roundps_epu32, __m256i, __m256, 8) -test_1 (_mm256_cvtt_roundps_epu64, __m256i, __m128h, 8) -test_1 (_mm256_cvt_roundepu32_ph, __m128h, __m256i, 8) -test_1 (_mm256_cvt_roundepu32_ps, __m256, __m256i, 9) -test_1 (_mm256_cvt_roundepu64_pd, __m256d, __m256i, 9) -test_1 (_mm256_cvt_roundepu64_ph, __m128h, __m256i, 9) -test_1 (_mm256_cvt_roundepu64_ps, __m128, __m256i, 9) -test_1 (_mm256_cvt_roundepu16_ph, __m256h, __m256i, 8) -test_1 (_mm256_cvt_roundepi16_ph, __m256h, __m256i, 8) -test_1 (_mm256_getexp_round_pd, __m256d, __m256d, 8) -test_1 (_mm256_getexp_round_ph, __m256h, __m256h, 8) -test_1 (_mm256_getexp_round_ps, __m256, __m256, 8) -test_1 (_mm256_sqrt_round_pd, __m256d, __m256d, 9) -test_1 (_mm256_sqrt_round_ph, __m256h, __m256h, 9) -test_1 (_mm256_sqrt_round_ps, __m256, __m256, 9) -test_1x (_mm256_reduce_round_ph, __m256h, __m256h, 123, 8) -test_1x (_mm256_reduce_round_ps, __m256, __m256, 123, 8) -test_1x (_mm256_reduce_round_pd, __m256d, __m256d, 123, 8) -test_1x (_mm256_roundscale_round_ph, __m256h, __m256h, 123, 8) -test_1x (_mm256_roundscale_round_ps, __m256, __m256, 123, 8) -test_1x (_mm256_roundscale_round_pd, __m256d, __m256d, 123, 8) -test_1y (_mm256_getmant_round_ph, __m256h, __m256h, 1, 1, 8) -test_1y (_mm256_getmant_round_ps, __m256, __m256, 1, 1, 8) -test_1y (_mm256_getmant_round_pd, __m256d, __m256d, 1, 1, 8) -test_2 (_mm256_add_round_pd, __m256d, __m256d, __m256d, 9) -test_2 (_mm256_add_round_ph, __m256h, __m256h, __m256h, 8) -test_2 (_mm256_add_round_ps, __m256, __m256, __m256, 9) -test_2 (_mm256_maskz_cvt_roundepi32_ph, __m128h, __mmask8, __m256i, 8) -test_2 (_mm256_maskz_cvt_roundepi32_ps, __m256, __mmask8, __m256i, 9) -test_2 (_mm256_maskz_cvt_roundpd_ph, __m128h, __mmask8, __m256d, 8) -test_2 (_mm256_maskz_cvt_roundpd_ps, __m128, __mmask8, __m256d, 9) -test_2 (_mm256_maskz_cvt_roundpd_epi32, __m128i, __mmask8, __m256d, 9) -test_2 (_mm256_maskz_cvt_roundpd_epi64, __m256i, __mmask8, __m256d, 9) -test_2 (_mm256_maskz_cvt_roundpd_epu32, __m128i, __mmask8, __m256d, 9) -test_2 (_mm256_maskz_cvt_roundpd_epu64, __m256i, __mmask8, __m256d, 9) -test_2 (_mm256_maskz_cvt_roundph_epi32, __m256i, __mmask8, __m128h, 8) -test_2 (_mm256_maskz_cvt_roundph_pd, __m256d, __mmask8, __m128h, 8) -test_2 (_mm256_maskz_cvt_roundph_ps, __m256, __mmask8, __m128i, 8) -test_2 (_mm256_maskz_cvtx_roundph_ps, __m256, __mmask8, __m128h, 8) -test_2 (_mm256_maskz_cvt_roundph_epi64, __m256i, __mmask8, __m128h, 8) -test_2 (_mm256_maskz_cvt_roundph_epu32, __m256i, __mmask8, __m128h, 8) -test_2 (_mm256_maskz_cvt_roundph_epu64, __m256i, __mmask8, __m128h, 8) -test_2 (_mm256_maskz_cvt_roundph_epu16, __m256i, __mmask16, __m256h, 8) -test_2 (_mm256_maskz_cvt_roundph_epi16, __m256i, __mmask16, __m256h, 8) -test_2 (_mm256_maskz_cvt_roundps_pd, __m256d, __mmask8, __m128, 8) -test_2 (_mm256_maskz_cvtx_roundps_ph, __m128h, __mmask8, __m256, 8) -test_2 (_mm256_maskz_cvt_roundps_epi32, __m256i, __mmask8, __m256, 9) -test_2 (_mm256_maskz_cvt_roundps_epu32, __m256i, __mmask8, __m256, 9) -test_2 (_mm256_maskz_cvt_roundps_epi64, __m256i, __mmask8, __m128, 8) -test_2 (_mm256_maskz_cvt_roundps_epu64, __m256i, __mmask8, __m128, 8) -test_2 (_mm256_maskz_cvt_roundepi64_pd, __m256d, __mmask8, __m256i, 8) -test_2 (_mm256_maskz_cvt_roundepi64_ph, __m128h, __mmask8, __m256i, 8) -test_2 (_mm256_maskz_cvt_roundepi64_ps, __m128, __mmask8, __m256i, 8) -test_2 (_mm256_maskz_cvtt_roundpd_epi32, __m128i, __mmask8, __m256d, 8) -test_2 (_mm256_maskz_cvtt_roundpd_epi64, __m256i, __mmask8, __m256d, 8) -test_2 (_mm256_maskz_cvtt_roundpd_epu32, __m128i, __mmask8, __m256d, 8) -test_2 (_mm256_maskz_cvtt_roundpd_epu64, __m256i, __mmask8, __m256d, 8) -test_2 (_mm256_maskz_cvtt_roundph_epi32, __m256i, __mmask8, __m128h, 8) -test_2 (_mm256_maskz_cvtt_roundph_epi64, __m256i, __mmask8, __m128h, 8) -test_2 (_mm256_maskz_cvtt_roundph_epu32, __m256i, __mmask8, __m128h, 8) -test_2 (_mm256_maskz_cvtt_roundph_epu64, __m256i, __mmask8, __m128h, 8) -test_2 (_mm256_maskz_cvtt_roundph_epu16, __m256i, __mmask16, __m256h, 8) -test_2 (_mm256_maskz_cvtt_roundph_epi16, __m256i, __mmask16, __m256h, 8) -test_2 (_mm256_maskz_cvtt_roundps_epi32, __m256i, __mmask8, __m256, 8) -test_2 (_mm256_maskz_cvtt_roundps_epi64, __m256i, __mmask8, __m128h, 8) -test_2 (_mm256_maskz_cvtt_roundps_epu32, __m256i, __mmask8, __m256, 8) -test_2 (_mm256_maskz_cvtt_roundps_epu64, __m256i, __mmask8, __m128h, 8) -test_2 (_mm256_maskz_cvt_roundepu32_ph, __m128h, __mmask8, __m256i, 8) -test_2 (_mm256_maskz_cvt_roundepu32_ps, __m256, __mmask8, __m256i, 9) -test_2 (_mm256_maskz_cvt_roundepu64_pd, __m256d, __mmask8, __m256i, 9) -test_2 (_mm256_maskz_cvt_roundepu64_ph, __m128h, __mmask8, __m256i, 8) -test_2 (_mm256_maskz_cvt_roundepu64_ps, __m128, __mmask8, __m256i, 9) -test_2 (_mm256_maskz_cvt_roundepu16_ph, __m256h, __mmask16, __m256i, 8) -test_2 (_mm256_maskz_cvt_roundepi16_ph, __m256h, __mmask16, __m256i, 8) -test_2 (_mm256_div_round_pd, __m256d, __m256d, __m256d, 9) -test_2 (_mm256_div_round_ph, __m256h, __m256h, __m256h, 9) -test_2 (_mm256_div_round_ps, __m256, __m256, __m256, 9) -test_2 (_mm256_fcmul_round_pch, __m256h, __m256h, __m256h, 8) -test_2 (_mm256_maskz_getexp_round_pd, __m256d, __mmask8, __m256d, 8) -test_2 (_mm256_maskz_getexp_round_ph, __m256h, __mmask16, __m256h, 8) -test_2 (_mm256_maskz_getexp_round_ps, __m256, __mmask8, __m256, 8) -test_2 (_mm256_max_round_pd, __m256d, __m256d, __m256d, 8) -test_2 (_mm256_max_round_ph, __m256h, __m256h, __m256h, 8) -test_2 (_mm256_max_round_ps, __m256, __m256, __m256, 8) -test_2 (_mm256_min_round_pd, __m256d, __m256d, __m256d, 8) -test_2 (_mm256_min_round_ph, __m256h, __m256h, __m256h, 8) -test_2 (_mm256_min_round_ps, __m256, __m256, __m256, 8) -test_2 (_mm256_mul_round_pd, __m256d, __m256d, __m256d, 9) -test_2 (_mm256_mul_round_ph, __m256h, __m256h, __m256h, 9) -test_2 (_mm256_mul_round_ps, __m256, __m256, __m256, 9) -test_2 (_mm256_scalef_round_pd, __m256d, __m256d, __m256d, 9) -test_2 (_mm256_scalef_round_ph, __m256h, __m256h, __m256h, 9) -test_2 (_mm256_scalef_round_ps, __m256, __m256, __m256, 9) -test_2 (_mm256_maskz_sqrt_round_pd, __m256d, __mmask8, __m256d, 9) -test_2 (_mm256_maskz_sqrt_round_ph, __m256h, __mmask16, __m256h, 9) -test_2 (_mm256_maskz_sqrt_round_ps, __m256, __mmask8, __m256, 9) -test_2 (_mm256_sub_round_pd, __m256d, __m256d, __m256d, 9) -test_2 (_mm256_sub_round_ph, __m256h, __m256h, __m256h, 9) -test_2 (_mm256_sub_round_ps, __m256, __m256, __m256, 9) -test_2x (_mm256_cmp_round_pd_mask, __mmask8, __m256d, __m256d, 1, 8) -test_2x (_mm256_cmp_round_ph_mask, __mmask16, __m256h, __m256h, 1, 8) -test_2x (_mm256_cmp_round_ps_mask, __mmask8, __m256, __m256, 1, 8) -test_2x (_mm256_range_round_pd, __m256d, __m256d, __m256d, 15, 8) -test_2x (_mm256_range_round_ps, __m256, __m256, __m256, 15, 8) -test_2x (_mm256_maskz_reduce_round_pd, __m256d, __mmask8, __m256d, 123, 8) -test_2x (_mm256_maskz_reduce_round_ph, __m256h, __mmask8, __m256h, 123, 8) -test_2x (_mm256_maskz_reduce_round_ps, __m256, __mmask16, __m256, 123, 8) -test_2x (_mm256_maskz_roundscale_round_pd, __m256d, __mmask8, __m256d, 123, 8) -test_2x (_mm256_maskz_roundscale_round_ph, __m256h, __mmask8, __m256h, 123, 8) -test_2x (_mm256_maskz_roundscale_round_ps, __m256, __mmask16, __m256, 123, 8) -test_2y (_mm256_maskz_getmant_round_pd, __m256d, __mmask8, __m256d, 1, 1, 8) -test_2y (_mm256_maskz_getmant_round_ph, __m256h, __mmask16, __m256h, 1, 1, 8) -test_2y (_mm256_maskz_getmant_round_ps, __m256, __mmask8, __m256, 1, 1, 8) -test_3 (_mm256_maskz_add_round_pd, __m256d, __mmask8, __m256d, __m256d, 9) -test_3 (_mm256_maskz_add_round_ph, __m256h, __mmask16, __m256h, __m256h, 8) -test_3 (_mm256_maskz_add_round_ps, __m256, __mmask8, __m256, __m256, 9) -test_3 (_mm256_mask_cvt_roundepi32_ph, __m128h, __m128h, __mmask8, __m256i, 8) -test_3 (_mm256_mask_cvt_roundepi32_ps, __m256, __m256, __mmask8, __m256i, 9) -test_3 (_mm256_mask_cvt_roundpd_ph, __m128h, __m128h, __mmask8, __m256d, 8) -test_3 (_mm256_mask_cvt_roundpd_ps, __m128, __m128, __mmask8, __m256d, 9) -test_3 (_mm256_mask_cvt_roundpd_epi32, __m128i, __m128i, __mmask8, __m256d, 9) -test_3 (_mm256_mask_cvt_roundpd_epu32, __m128i, __m128i, __mmask8, __m256d, 9) -test_3 (_mm256_mask_cvt_roundpd_epi64, __m256i, __m256i, __mmask8, __m256d, 9) -test_3 (_mm256_mask_cvt_roundpd_epu64, __m256i, __m256i, __mmask8, __m256d, 9) -test_3 (_mm256_mask_cvt_roundph_epi32, __m256i, __m256i, __mmask8, __m128h, 8) -test_3 (_mm256_mask_cvt_roundph_pd, __m256d, __m256d, __mmask8, __m128h, 8) -test_3 (_mm256_mask_cvt_roundph_ps, __m256, __m256, __mmask8, __m128i, 8) -test_3 (_mm256_mask_cvtx_roundph_ps, __m256, __m256, __mmask8, __m128h, 8) -test_3 (_mm256_mask_cvt_roundph_epi64, __m256i, __m256i, __mmask8, __m128h, 8) -test_3 (_mm256_mask_cvt_roundph_epu32, __m256i, __m256i, __mmask8, __m128h, 8) -test_3 (_mm256_mask_cvt_roundph_epu64, __m256i, __m256i, __mmask8, __m128h, 8) -test_3 (_mm256_mask_cvt_roundph_epu16, __m256i, __m256i, __mmask16, __m256h, 8) -test_3 (_mm256_mask_cvt_roundph_epi16, __m256i, __m256i, __mmask16, __m256h, 8) -test_3 (_mm256_mask_cvt_roundps_pd, __m256d, __m256d, __mmask8, __m128, 8) -test_3 (_mm256_mask_cvtx_roundps_ph, __m128h, __m128h, __mmask8, __m256, 8) -test_3 (_mm256_mask_cvt_roundps_epi32, __m256i, __m256i, __mmask8, __m256, 9) -test_3 (_mm256_mask_cvt_roundps_epu32, __m256i, __m256i, __mmask8, __m256, 9) -test_3 (_mm256_mask_cvt_roundps_epi64, __m256i, __m256i, __mmask8, __m128, 8) -test_3 (_mm256_mask_cvt_roundps_epu64, __m256i, __m256i, __mmask8, __m128, 8) -test_3 (_mm256_mask_cvt_roundepi64_pd, __m256d, __m256d, __mmask8, __m256i, 8) -test_3 (_mm256_mask_cvt_roundepi64_ph, __m128h, __m128h, __mmask8, __m256i, 8) -test_3 (_mm256_mask_cvt_roundepi64_ps, __m128, __m128, __mmask8, __m256i, 8) -test_3 (_mm256_mask_cvtt_roundpd_epi32, __m128i, __m128i, __mmask8, __m256d, 8) -test_3 (_mm256_mask_cvtt_roundpd_epi64, __m256i, __m256i, __mmask8, __m256d, 8) -test_3 (_mm256_mask_cvtt_roundpd_epu32, __m128i, __m128i, __mmask8, __m256d, 8) -test_3 (_mm256_mask_cvtt_roundpd_epu64, __m256i, __m256i, __mmask8, __m256d, 8) -test_3 (_mm256_mask_cvtt_roundph_epi32, __m256i, __m256i, __mmask8, __m128h, 8) -test_3 (_mm256_mask_cvtt_roundph_epi64, __m256i, __m256i, __mmask8, __m128h, 8) -test_3 (_mm256_mask_cvtt_roundph_epu32, __m256i, __m256i, __mmask8, __m128h, 8) -test_3 (_mm256_mask_cvtt_roundph_epu64, __m256i, __m256i, __mmask8, __m128h, 8) -test_3 (_mm256_mask_cvtt_roundph_epu16, __m256i, __m256i, __mmask16, __m256h, 8) -test_3 (_mm256_mask_cvtt_roundph_epi16, __m256i, __m256i, __mmask16, __m256h, 8) -test_3 (_mm256_mask_cvtt_roundps_epi32, __m256i, __m256i, __mmask8, __m256, 8) -test_3 (_mm256_mask_cvtt_roundps_epi64, __m256i, __m256i, __mmask8, __m128h, 8) -test_3 (_mm256_mask_cvtt_roundps_epu32, __m256i, __m256i, __mmask8, __m256, 8) -test_3 (_mm256_mask_cvtt_roundps_epu64, __m256i, __m256i, __mmask8, __m128h, 8) -test_3 (_mm256_mask_cvt_roundepu32_ph, __m128h, __m128h, __mmask8, __m256i, 8) -test_3 (_mm256_mask_cvt_roundepu32_ps, __m256, __m256, __mmask8, __m256i, 9) -test_3 (_mm256_mask_cvt_roundepu64_pd, __m256d, __m256d, __mmask8, __m256i, 9) -test_3 (_mm256_mask_cvt_roundepu64_ph, __m128h, __m128h, __mmask8, __m256i, 8) -test_3 (_mm256_mask_cvt_roundepu64_ps, __m128, __m128, __mmask8, __m256i, 9) -test_3 (_mm256_mask_cvt_roundepu16_ph, __m256h, __m256h, __mmask16, __m256i, 8) -test_3 (_mm256_mask_cvt_roundepi16_ph, __m256h, __m256h, __mmask16, __m256i, 8) -test_3 (_mm256_maskz_div_round_pd, __m256d, __mmask8, __m256d, __m256d, 9) -test_3 (_mm256_maskz_div_round_ph, __m256h, __mmask8, __m256h, __m256h, 9) -test_3 (_mm256_maskz_div_round_ps, __m256, __mmask8, __m256, __m256, 9) -test_3 (_mm256_fcmadd_round_pch, __m256h, __m256h, __m256h, __m256h, 8) -test_3 (_mm256_maskz_fcmul_round_pch, __m256h, __mmask8, __m256h, __m256h, 8) -test_3 (_mm256_fmadd_round_pd, __m256d, __m256d, __m256d, __m256d, 9) -test_3 (_mm256_fmadd_round_ph, __m256h, __m256h, __m256h, __m256h, 9) -test_3 (_mm256_fmadd_round_ps, __m256, __m256, __m256, __m256, 9) -test_3 (_mm256_fmadd_round_pch, __m256h, __m256h, __m256h, __m256h, 8) -test_3 (_mm256_fmaddsub_round_pd, __m256d, __m256d, __m256d, __m256d, 9) -test_3 (_mm256_fmaddsub_round_ph, __m256h, __m256h, __m256h, __m256h, 9) -test_3 (_mm256_fmsub_round_pd, __m256d, __m256d, __m256d, __m256d, 9) -test_3 (_mm256_fmsub_round_ph, __m256h, __m256h, __m256h, __m256h, 9) -test_3 (_mm256_fmsub_round_ps, __m256, __m256, __m256, __m256, 9) -test_3 (_mm256_fmsubadd_round_pd, __m256d, __m256d, __m256d, __m256d, 9) -test_3 (_mm256_fmsubadd_round_ph, __m256h, __m256h, __m256h, __m256h, 9) -test_3 (_mm256_fmsubadd_round_ps, __m256, __m256, __m256, __m256, 9) -test_3 (_mm256_maskz_fmul_round_pch, __m256h, __mmask8, __m256h, __m256h, 8) -test_3 (_mm256_fnmadd_round_pd, __m256d, __m256d, __m256d, __m256d, 9) -test_3 (_mm256_fnmadd_round_ph, __m256h, __m256h, __m256h, __m256h, 9) -test_3 (_mm256_fnmadd_round_ps, __m256, __m256, __m256, __m256, 9) -test_3 (_mm256_fnmsub_round_pd, __m256d, __m256d, __m256d, __m256d, 9) -test_3 (_mm256_fnmsub_round_ph, __m256h, __m256h, __m256h, __m256h, 9) -test_3 (_mm256_fnmsub_round_ps, __m256, __m256, __m256, __m256, 9) -test_3 (_mm256_mask_getexp_round_pd, __m256d, __m256d, __mmask8, __m256d, 8) -test_3 (_mm256_mask_getexp_round_ph, __m256h, __m256h, __mmask16, __m256h, 8) -test_3 (_mm256_mask_getexp_round_ps, __m256, __m256, __mmask8, __m256, 8) -test_3 (_mm256_maskz_max_round_pd, __m256d, __mmask8, __m256d, __m256d, 8) -test_3 (_mm256_maskz_max_round_ph, __m256h, __mmask16, __m256h, __m256h, 8) -test_3 (_mm256_maskz_max_round_ps, __m256, __mmask8, __m256, __m256, 8) -test_3 (_mm256_maskz_min_round_pd, __m256d, __mmask8, __m256d, __m256d, 8) -test_3 (_mm256_maskz_min_round_ph, __m256h, __mmask16, __m256h, __m256h, 8) -test_3 (_mm256_maskz_min_round_ps, __m256, __mmask8, __m256, __m256, 8) -test_3 (_mm256_maskz_mul_round_pd, __m256d, __mmask8, __m256d, __m256d, 9) -test_3 (_mm256_maskz_mul_round_ph, __m256h, __mmask16, __m256h, __m256h, 9) -test_3 (_mm256_maskz_mul_round_ps, __m256, __mmask8, __m256, __m256, 9) -test_3 (_mm256_maskz_scalef_round_pd, __m256d, __mmask8, __m256d, __m256d, 9) -test_3 (_mm256_maskz_scalef_round_ph, __m256h, __mmask16, __m256h, __m256h, 9) -test_3 (_mm256_maskz_scalef_round_ps, __m256, __mmask8, __m256, __m256, 9) -test_3 (_mm256_maskz_sub_round_pd, __m256d, __mmask8, __m256d, __m256d, 9) -test_3 (_mm256_maskz_sub_round_ph, __m256h, __mmask16, __m256h, __m256h, 9) -test_3 (_mm256_maskz_sub_round_ps, __m256, __mmask8, __m256, __m256, 9) -test_3x (_mm256_mask_cmp_round_pd_mask, __mmask8, __mmask8, __m256d, __m256d, 1, 8) -test_3x (_mm256_mask_cmp_round_ph_mask, __mmask16, __mmask16, __m256h, __m256h, 1, 8) -test_3x (_mm256_mask_cmp_round_ps_mask, __mmask8, __mmask8, __m256, __m256, 1, 8) -test_3x (_mm256_fixupimm_round_pd, __m256d, __m256d, __m256d, __m256i, 3, 8) -test_3x (_mm256_fixupimm_round_ps, __m256, __m256, __m256, __m256i, 3, 8) -test_3x (_mm256_maskz_range_round_pd, __m256d, __mmask8, __m256d, __m256d, 15, 8) -test_3x (_mm256_maskz_range_round_ps, __m256, __mmask16, __m256, __m256, 15, 8) -test_3x (_mm256_mask_reduce_round_ph, __m256h, __m256h, __mmask8, __m256h, 123, 8) -test_3x (_mm256_mask_reduce_round_ps, __m256, __m256, __mmask16, __m256, 123, 8) -test_3x (_mm256_mask_reduce_round_pd, __m256d, __m256d, __mmask8, __m256d, 123, 8) -test_3x (_mm256_mask_roundscale_round_ph, __m256h, __m256h, __mmask8, __m256h, 123, 8) -test_3x (_mm256_mask_roundscale_round_ps, __m256, __m256, __mmask16, __m256, 123, 8) -test_3x (_mm256_mask_roundscale_round_pd, __m256d, __m256d, __mmask8, __m256d, 123, 8) -test_3y (_mm256_mask_getmant_round_pd, __m256d, __m256d, __mmask8, __m256d, 1, 1, 8) -test_3y (_mm256_mask_getmant_round_ph, __m256h, __m256h, __mmask16, __m256h, 1, 1, 8) -test_3y (_mm256_mask_getmant_round_ps, __m256, __m256, __mmask8, __m256, 1, 1, 8) -test_4 (_mm256_mask_add_round_pd, __m256d, __m256d, __mmask8, __m256d, __m256d, 9) -test_4 (_mm256_mask_add_round_ph, __m256h, __m256h, __mmask16, __m256h, __m256h, 8) -test_4 (_mm256_mask_add_round_ps, __m256, __m256, __mmask8, __m256, __m256, 9) -test_4 (_mm256_mask_div_round_pd, __m256d, __m256d, __mmask8, __m256d, __m256d, 9) -test_4 (_mm256_mask_div_round_ph, __m256h, __m256h, __mmask8, __m256h, __m256h, 9) -test_4 (_mm256_mask_div_round_ps, __m256, __m256, __mmask8, __m256, __m256, 9) -test_4 (_mm256_mask_fcmadd_round_pch, __m256h, __m256h, __mmask8, __m256h, __m256h, 9) -test_4 (_mm256_mask3_fcmadd_round_pch, __m256h, __m256h, __m256h, __m256h, __mmask8, 9) -test_4 (_mm256_maskz_fcmadd_round_pch, __m256h, __mmask8, __m256h, __m256h, __m256h, 9) -test_4 (_mm256_mask_fcmul_round_pch, __m256h, __m256h, __mmask8, __m256h, __m256h, 8) -test_4 (_mm256_mask_fmadd_round_pd, __m256d, __m256d, __mmask8, __m256d, __m256d, 9) -test_4 (_mm256_mask3_fmadd_round_pd, __m256d, __m256d, __m256d, __m256d, __mmask8, 9) -test_4 (_mm256_maskz_fmadd_round_pd, __m256d,__mmask8, __m256d, __m256d, __m256d, 9) -test_4 (_mm256_mask_fmadd_round_ph, __m256h, __m256h, __mmask16, __m256h, __m256h, 9) -test_4 (_mm256_mask3_fmadd_round_ph, __m256h, __m256h, __m256h, __m256h, __mmask16, 9) -test_4 (_mm256_maskz_fmadd_round_ph, __m256h,__mmask16, __m256h, __m256h, __m256h, 9) -test_4 (_mm256_mask_fmadd_round_ps, __m256, __m256, __mmask8, __m256, __m256, 9) -test_4 (_mm256_mask3_fmadd_round_ps, __m256, __m256, __m256, __m256, __mmask8, 9) -test_4 (_mm256_maskz_fmadd_round_ps, __m256,__mmask8, __m256, __m256, __m256, 9) -test_4 (_mm256_mask_fmadd_round_pch, __m256h, __m256h, __mmask8, __m256h, __m256h, 8) -test_4 (_mm256_mask3_fmadd_round_pch, __m256h, __m256h, __m256h, __m256h, __mmask8, 8) -test_4 (_mm256_maskz_fmadd_round_pch, __m256h, __mmask8, __m256h, __m256h, __m256h, 8) -test_4 (_mm256_mask_fmaddsub_round_pd, __m256d, __m256d, __mmask8, __m256d, __m256d, 9) -test_4 (_mm256_mask3_fmaddsub_round_pd, __m256d, __m256d, __m256d, __m256d, __mmask8, 9) -test_4 (_mm256_maskz_fmaddsub_round_pd, __m256d,__mmask8, __m256d, __m256d, __m256d, 9) -test_4 (_mm256_mask_fmaddsub_round_ph, __m256h, __m256h, __mmask16, __m256h, __m256h, 9) -test_4 (_mm256_mask3_fmaddsub_round_ph, __m256h, __m256h, __m256h, __m256h, __mmask16, 9) -test_4 (_mm256_maskz_fmaddsub_round_ph, __m256h,__mmask16, __m256h, __m256h, __m256h, 9) -test_4 (_mm256_mask_fmaddsub_round_ps, __m256, __m256, __mmask8, __m256, __m256, 9) -test_4 (_mm256_mask3_fmaddsub_round_ps, __m256, __m256, __m256, __m256, __mmask8, 9) -test_4 (_mm256_maskz_fmaddsub_round_ps, __m256,__mmask8, __m256, __m256, __m256, 9) -test_4 (_mm256_mask_fmsub_round_pd, __m256d, __m256d, __mmask8, __m256d, __m256d, 9) -test_4 (_mm256_mask3_fmsub_round_pd, __m256d, __m256d, __m256d, __m256d, __mmask8, 9) -test_4 (_mm256_maskz_fmsub_round_pd, __m256d,__mmask8, __m256d, __m256d, __m256d, 9) -test_4 (_mm256_mask_fmsub_round_ph, __m256h, __m256h, __mmask16, __m256h, __m256h, 9) -test_4 (_mm256_mask3_fmsub_round_ph, __m256h, __m256h, __m256h, __m256h, __mmask16, 9) -test_4 (_mm256_maskz_fmsub_round_ph, __m256h,__mmask16, __m256h, __m256h, __m256h, 9) -test_4 (_mm256_mask_fmsub_round_ps, __m256, __m256, __mmask8, __m256, __m256, 9) -test_4 (_mm256_mask3_fmsub_round_ps, __m256, __m256, __m256, __m256, __mmask8, 9) -test_4 (_mm256_maskz_fmsub_round_ps, __m256,__mmask8, __m256, __m256, __m256, 9) -test_4 (_mm256_mask_fmsubadd_round_pd, __m256d, __m256d, __mmask8, __m256d, __m256d, 9) -test_4 (_mm256_mask3_fmsubadd_round_pd, __m256d, __m256d, __m256d, __m256d, __mmask8, 9) -test_4 (_mm256_maskz_fmsubadd_round_pd, __m256d,__mmask8, __m256d, __m256d, __m256d, 9) -test_4 (_mm256_mask_fmsubadd_round_ph, __m256h, __m256h, __mmask16, __m256h, __m256h, 9) -test_4 (_mm256_mask3_fmsubadd_round_ph, __m256h, __m256h, __m256h, __m256h, __mmask16, 9) -test_4 (_mm256_maskz_fmsubadd_round_ph, __m256h,__mmask16, __m256h, __m256h, __m256h, 9) -test_4 (_mm256_mask_fmsubadd_round_ps, __m256, __m256, __mmask8, __m256, __m256, 9) -test_4 (_mm256_mask3_fmsubadd_round_ps, __m256, __m256, __m256, __m256, __mmask8, 9) -test_4 (_mm256_maskz_fmsubadd_round_ps, __m256,__mmask8, __m256, __m256, __m256, 9) -test_4 (_mm256_mask_fmul_round_pch, __m256h, __m256h, __mmask8, __m256h, __m256h, 8) -test_4 (_mm256_mask_fnmadd_round_pd, __m256d, __m256d, __mmask8, __m256d, __m256d, 9) -test_4 (_mm256_mask3_fnmadd_round_pd, __m256d, __m256d, __m256d, __m256d, __mmask8, 9) -test_4 (_mm256_maskz_fnmadd_round_pd, __m256d,__mmask8, __m256d, __m256d, __m256d, 9) -test_4 (_mm256_mask_fnmadd_round_ph, __m256h, __m256h, __mmask16, __m256h, __m256h, 9) -test_4 (_mm256_mask3_fnmadd_round_ph, __m256h, __m256h, __m256h, __m256h, __mmask16, 9) -test_4 (_mm256_maskz_fnmadd_round_ph, __m256h,__mmask16, __m256h, __m256h, __m256h, 9) -test_4 (_mm256_mask_fnmadd_round_ps, __m256, __m256, __mmask8, __m256, __m256, 9) -test_4 (_mm256_mask3_fnmadd_round_ps, __m256, __m256, __m256, __m256, __mmask8, 9) -test_4 (_mm256_maskz_fnmadd_round_ps, __m256,__mmask8, __m256, __m256, __m256, 9) -test_4 (_mm256_mask_fnmsub_round_pd, __m256d, __m256d, __mmask8, __m256d, __m256d, 9) -test_4 (_mm256_mask3_fnmsub_round_pd, __m256d, __m256d, __m256d, __m256d, __mmask8, 9) -test_4 (_mm256_maskz_fnmsub_round_pd, __m256d,__mmask8, __m256d, __m256d, __m256d, 9) -test_4 (_mm256_mask_fnmsub_round_ph, __m256h, __m256h, __mmask16, __m256h, __m256h, 9) -test_4 (_mm256_mask3_fnmsub_round_ph, __m256h, __m256h, __m256h, __m256h, __mmask16, 9) -test_4 (_mm256_maskz_fnmsub_round_ph, __m256h,__mmask16, __m256h, __m256h, __m256h, 9) -test_4 (_mm256_mask_fnmsub_round_ps, __m256, __m256, __mmask8, __m256, __m256, 9) -test_4 (_mm256_mask3_fnmsub_round_ps, __m256, __m256, __m256, __m256, __mmask8, 9) -test_4 (_mm256_maskz_fnmsub_round_ps, __m256,__mmask8, __m256, __m256, __m256, 9) -test_4 (_mm256_mask_max_round_pd, __m256d, __m256d, __mmask8, __m256d, __m256d, 8) -test_4 (_mm256_mask_max_round_ph, __m256h, __m256h, __mmask16, __m256h, __m256h, 8) -test_4 (_mm256_mask_max_round_ps, __m256, __m256, __mmask8, __m256, __m256, 8) -test_4 (_mm256_mask_min_round_pd, __m256d, __m256d, __mmask8, __m256d, __m256d, 8) -test_4 (_mm256_mask_min_round_ph, __m256h, __m256h, __mmask16, __m256h, __m256h, 8) -test_4 (_mm256_mask_min_round_ps, __m256, __m256, __mmask8, __m256, __m256, 8) -test_4 (_mm256_mask_mul_round_pd, __m256d, __m256d, __mmask8, __m256d, __m256d, 9) -test_4 (_mm256_mask_mul_round_ph, __m256h, __m256h, __mmask16, __m256h, __m256h, 9) -test_4 (_mm256_mask_mul_round_ps, __m256, __m256, __mmask8, __m256, __m256, 9) -test_4 (_mm256_mask_scalef_round_pd, __m256d, __m256d, __mmask8, __m256d, __m256d, 9) -test_4 (_mm256_mask_scalef_round_ph, __m256h, __m256h, __mmask16, __m256h, __m256h, 9) -test_4 (_mm256_mask_scalef_round_ps, __m256, __m256, __mmask8, __m256, __m256, 9) -test_4 (_mm256_mask_sub_round_pd, __m256d, __m256d, __mmask8, __m256d, __m256d, 9) -test_4 (_mm256_mask_sub_round_ph, __m256h, __m256h, __mmask16, __m256h, __m256h, 9) -test_4 (_mm256_mask_sub_round_ps, __m256, __m256, __mmask8, __m256, __m256, 9) -test_4x (_mm256_maskz_fixupimm_round_pd, __m256d, __mmask8, __m256d, __m256d, __m256i, 3, 8) -test_4x (_mm256_maskz_fixupimm_round_ps, __m256, __mmask8, __m256, __m256, __m256i, 3, 8) -test_4x (_mm256_mask_fixupimm_round_pd, __m256d, __m256d, __mmask8, __m256d, __m256i, 3, 8) -test_4x (_mm256_mask_fixupimm_round_ps, __m256, __m256, __mmask8, __m256, __m256i, 3, 8) -test_4x (_mm256_mask_range_round_pd, __m256d, __m256d, __mmask8, __m256d, __m256d, 15, 8) -test_4x (_mm256_mask_range_round_ps, __m256, __m256, __mmask8, __m256, __m256, 15, 8) - /* avx10_2-512mediaintrin.h */ test_2 (_mm512_mpsadbw_epu8, __m512i, __m512i, __m512i, 1) test_3 (_mm512_maskz_mpsadbw_epu8, __m512i, __mmask32, __m512i, __m512i, 1) @@ -1422,9 +1072,6 @@ test_3 (_mm256_maskz_mpsadbw_epu8, __m256i, __mmask16, __m256i, __m256i, 1) test_4 (_mm_mask_mpsadbw_epu8, __m128i, __m128i, __mmask8, __m128i, __m128i, 1) test_4 (_mm256_mask_mpsadbw_epu8, __m256i, __m256i, __mmask16, __m256i, __m256i, 1) -/* avx10_2convertintrin */ -test_2 (_mm256_cvtx_round2ps_ph, __m256h, __m256, __m256, 4) - /* avx10_2-512convertintrin.h */ test_2 (_mm512_cvtx_round2ps_ph, __m512h, __m512, __m512, 4) @@ -1522,54 +1169,6 @@ test_2 (_mm512_maskz_cvtts_roundps_epu64, __m512i, __mmask8, __m256, 8) test_3 (_mm512_mask_cvtts_roundps_epu64, __m512i, __m512i, __mmask8, __m256, 8) /* avx10_2satcvtintrin.h */ -test_1 (_mm256_ipcvts_roundph_epi8, __m256i, __m256h, 8) -test_1 (_mm256_ipcvts_roundph_epu8, __m256i, __m256h, 8) -test_1 (_mm256_ipcvts_roundps_epi8, __m256i, __m256, 8) -test_1 (_mm256_ipcvts_roundps_epu8, __m256i, __m256, 8) -test_1 (_mm256_ipcvtts_roundph_epi8, __m256i, __m256h, 8) -test_1 (_mm256_ipcvtts_roundph_epu8, __m256i, __m256h, 8) -test_1 (_mm256_ipcvtts_roundps_epi8, __m256i, __m256, 8) -test_1 (_mm256_ipcvtts_roundps_epu8, __m256i, __m256, 8) -test_2 (_mm256_maskz_ipcvts_roundph_epi8, __m256i, __mmask16, __m256h, 8) -test_2 (_mm256_maskz_ipcvts_roundph_epu8, __m256i, __mmask16, __m256h, 8) -test_2 (_mm256_maskz_ipcvts_roundps_epi8, __m256i, __mmask8, __m256, 8) -test_2 (_mm256_maskz_ipcvts_roundps_epu8, __m256i, __mmask8, __m256, 8) -test_2 (_mm256_maskz_ipcvtts_roundph_epi8, __m256i, __mmask16, __m256h, 8) -test_2 (_mm256_maskz_ipcvtts_roundph_epu8, __m256i, __mmask16, __m256h, 8) -test_2 (_mm256_maskz_ipcvtts_roundps_epi8, __m256i, __mmask8, __m256, 8) -test_2 (_mm256_maskz_ipcvtts_roundps_epu8, __m256i, __mmask8, __m256, 8) -test_3 (_mm256_mask_ipcvts_roundph_epi8, __m256i, __m256i, __mmask16, __m256h, 8) -test_3 (_mm256_mask_ipcvts_roundph_epu8, __m256i, __m256i, __mmask16, __m256h, 8) -test_3 (_mm256_mask_ipcvts_roundps_epi8, __m256i, __m256i, __mmask8, __m256, 8) -test_3 (_mm256_mask_ipcvts_roundps_epu8, __m256i, __m256i, __mmask8, __m256, 8) -test_3 (_mm256_mask_ipcvtts_roundph_epi8, __m256i, __m256i, __mmask16, __m256h, 8) -test_3 (_mm256_mask_ipcvtts_roundph_epu8, __m256i, __m256i, __mmask16, __m256h, 8) -test_3 (_mm256_mask_ipcvtts_roundps_epi8, __m256i, __m256i, __mmask8, __m256, 8) -test_3 (_mm256_mask_ipcvtts_roundps_epu8, __m256i, __m256i, __mmask8, __m256, 8) -test_1 (_mm256_cvtts_roundpd_epi32, __m128i, __m256d, 8) -test_2 (_mm256_maskz_cvtts_roundpd_epi32, __m128i, __mmask8, __m256d, 8) -test_3 (_mm256_mask_cvtts_roundpd_epi32, __m128i, __m128i, __mmask8, __m256d, 8) -test_1 (_mm256_cvtts_roundpd_epi64, __m256i, __m256d, 8) -test_2 (_mm256_maskz_cvtts_roundpd_epi64, __m256i, __mmask8, __m256d, 8) -test_3 (_mm256_mask_cvtts_roundpd_epi64, __m256i, __m256i, __mmask8, __m256d, 8) -test_1 (_mm256_cvtts_roundpd_epu32, __m128i, __m256d, 8) -test_2 (_mm256_maskz_cvtts_roundpd_epu32, __m128i, __mmask8, __m256d, 8) -test_3 (_mm256_mask_cvtts_roundpd_epu32, __m128i, __m128i, __mmask8, __m256d, 8) -test_1 (_mm256_cvtts_roundpd_epu64, __m256i, __m256d, 8) -test_2 (_mm256_maskz_cvtts_roundpd_epu64, __m256i, __mmask8, __m256d, 8) -test_3 (_mm256_mask_cvtts_roundpd_epu64, __m256i, __m256i, __mmask8, __m256d, 8) -test_1 (_mm256_cvtts_roundps_epi32, __m256i, __m256, 8) -test_2 (_mm256_maskz_cvtts_roundps_epi32, __m256i, __mmask8, __m256, 8) -test_3 (_mm256_mask_cvtts_roundps_epi32, __m256i, __m256i, __mmask8, __m256, 8) -test_1 (_mm256_cvtts_roundps_epi64, __m256i, __m128, 8) -test_2 (_mm256_maskz_cvtts_roundps_epi64, __m256i, __mmask8, __m128, 8) -test_3 (_mm256_mask_cvtts_roundps_epi64, __m256i, __m256i, __mmask8, __m128, 8) -test_1 (_mm256_cvtts_roundps_epu32, __m256i, __m256, 8) -test_2 (_mm256_maskz_cvtts_roundps_epu32, __m256i, __mmask8, __m256, 8) -test_3 (_mm256_mask_cvtts_roundps_epu32, __m256i, __m256i, __mmask8, __m256, 8) -test_1 (_mm256_cvtts_roundps_epu64, __m256i, __m128, 8) -test_2 (_mm256_maskz_cvtts_roundps_epu64, __m256i, __mmask8, __m128, 8) -test_3 (_mm256_mask_cvtts_roundps_epu64, __m256i, __m256i, __mmask8, __m128, 8) test_1 (_mm_cvtts_roundsd_epi32, int, __m128d, 8) test_1 (_mm_cvtts_roundsd_epu32, unsigned int, __m128d, 8) test_1 (_mm_cvtts_roundss_epi32, int, __m128, 8) @@ -1608,15 +1207,6 @@ test_4 (_mm512_mask_minmax_ph, __m512h, __m512h, __mmask32, __m512h, __m512h, 10 test_2 (_mm256_minmax_pbh, __m256bh, __m256bh, __m256bh, 100) test_3 (_mm256_maskz_minmax_pbh, __m256bh, __mmask16, __m256bh, __m256bh, 100) test_4 (_mm256_mask_minmax_pbh, __m256bh, __m256bh, __mmask16, __m256bh, __m256bh, 100) -test_2x (_mm256_minmax_round_pd, __m256d, __m256d, __m256d, 100, 4) -test_3x (_mm256_maskz_minmax_round_pd, __m256d, __mmask8, __m256d, __m256d, 100, 4) -test_4x (_mm256_mask_minmax_round_pd, __m256d, __m256d, __mmask8, __m256d, __m256d, 100, 4) -test_2x (_mm256_minmax_round_ps, __m256, __m256, __m256, 100, 4) -test_3x (_mm256_maskz_minmax_round_ps, __m256, __mmask8, __m256, __m256, 100, 4) -test_4x (_mm256_mask_minmax_round_ps, __m256, __m256, __mmask8, __m256, __m256, 100, 4) -test_2x (_mm256_minmax_round_ph, __m256h, __m256h, __m256h, 100, 4) -test_3x (_mm256_maskz_minmax_round_ph, __m256h, __mmask16, __m256h, __m256h, 100, 4) -test_4x (_mm256_mask_minmax_round_ph, __m256h, __m256h, __mmask16, __m256h, __m256h, 100, 4) test_2 (_mm256_minmax_pd, __m256d, __m256d, __m256d, 100) test_3 (_mm256_maskz_minmax_pd, __m256d, __mmask8, __m256d, __m256d, 100) test_4 (_mm256_mask_minmax_pd, __m256d, __m256d, __mmask8, __m256d, __m256d, 100) diff --git a/gcc/testsuite/gcc.target/i386/sse-23.c b/gcc/testsuite/gcc.target/i386/sse-23.c index 26a2d01..2cfcf28 100644 --- a/gcc/testsuite/gcc.target/i386/sse-23.c +++ b/gcc/testsuite/gcc.target/i386/sse-23.c @@ -824,166 +824,6 @@ /* sm3intrin.h */ #define __builtin_ia32_vsm3rnds2(A, B, C, D) __builtin_ia32_vsm3rnds2 (A, B, C, 1) -/* avx10_2roundingintrin.h */ -#define __builtin_ia32_addpd256_mask_round(A, B, C, D, E) __builtin_ia32_addpd256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_addph256_mask_round(A, B, C, D, E) __builtin_ia32_addph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_addps256_mask_round(A, B, C, D, E) __builtin_ia32_addps256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_cmppd256_mask_round(A, B, C, D, E) __builtin_ia32_cmppd256_mask_round(A, B, 1, D, 8) -#define __builtin_ia32_cmpph256_mask_round(A, B, C, D, E) __builtin_ia32_cmpph256_mask_round(A, B, 1, D, 8) -#define __builtin_ia32_cmpps256_mask_round(A, B, C, D, E) __builtin_ia32_cmpps256_mask_round(A, B, 1, D, 8) -#define __builtin_ia32_vcvtdq2ph256_mask_round(A, B, C, D) __builtin_ia32_vcvtdq2ph256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtdq2ps256_mask_round(A, B, C, D) __builtin_ia32_cvtdq2ps256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtpd2ph256_mask_round(A, B, C, D) __builtin_ia32_vcvtpd2ph256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtpd2ps256_mask_round(A, B, C, D) __builtin_ia32_cvtpd2ps256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtpd2dq256_mask_round(A, B, C, D) __builtin_ia32_cvtpd2dq256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtpd2qq256_mask_round(A, B, C, D) __builtin_ia32_cvtpd2qq256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtpd2udq256_mask_round(A, B, C, D) __builtin_ia32_cvtpd2udq256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtpd2uqq256_mask_round(A, B, C, D) __builtin_ia32_cvtpd2uqq256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtph2dq256_mask_round(A, B, C, D) __builtin_ia32_vcvtph2dq256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtph2pd256_mask_round(A, B, C, D) __builtin_ia32_vcvtph2pd256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtph2ps256_mask_round(A, B, C, D) __builtin_ia32_vcvtph2ps256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtph2psx256_mask_round(A, B, C, D) __builtin_ia32_vcvtph2psx256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtph2qq256_mask_round(A, B, C, D) __builtin_ia32_vcvtph2qq256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtph2udq256_mask_round(A, B, C, D) __builtin_ia32_vcvtph2udq256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtph2uqq256_mask_round(A, B, C, D) __builtin_ia32_vcvtph2uqq256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtph2uw256_mask_round(A, B, C, D) __builtin_ia32_vcvtph2uw256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtph2w256_mask_round(A, B, C, D) __builtin_ia32_vcvtph2w256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtps2pd256_mask_round(A, B, C, D) __builtin_ia32_vcvtps2pd256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtps2phx256_mask_round(A, B, C, D) __builtin_ia32_vcvtps2phx256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtps2dq256_mask_round(A, B, C, D) __builtin_ia32_vcvtps2dq256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtps2qq256_mask_round(A, B, C, D) __builtin_ia32_cvtps2qq256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtps2udq256_mask_round(A, B, C, D) __builtin_ia32_cvtps2udq256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtps2uqq256_mask_round(A, B, C, D) __builtin_ia32_cvtps2uqq256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtqq2pd256_mask_round(A, B, C, D) __builtin_ia32_cvtqq2pd256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtqq2ph256_mask_round(A, B, C, D) __builtin_ia32_vcvtqq2ph256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtqq2ps256_mask_round(A, B, C, D) __builtin_ia32_cvtqq2ps256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttpd2dq256_mask_round(A, B, C, D) __builtin_ia32_cvttpd2dq256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttpd2qq256_mask_round(A, B, C, D) __builtin_ia32_cvttpd2qq256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttpd2udq256_mask_round(A, B, C, D) __builtin_ia32_cvttpd2udq256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttpd2uqq256_mask_round(A, B, C, D) __builtin_ia32_cvttpd2uqq256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvttph2dq256_mask_round(A, B, C, D) __builtin_ia32_vcvttph2dq256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvttph2qq256_mask_round(A, B, C, D) __builtin_ia32_vcvttph2qq256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvttph2uqq256_mask_round(A, B, C, D) __builtin_ia32_vcvttph2uqq256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvttph2udq256_mask_round(A, B, C, D) __builtin_ia32_vcvttph2udq256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvttph2uw256_mask_round(A, B, C, D) __builtin_ia32_vcvttph2uw256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvttph2w256_mask_round(A, B, C, D) __builtin_ia32_vcvttph2w256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttps2dq256_mask_round(A, B, C, D) __builtin_ia32_cvttps2dq256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttps2qq256_mask_round(A, B, C, D) __builtin_ia32_cvttps2qq256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttps2udq256_mask_round(A, B, C, D) __builtin_ia32_cvttps2udq256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttps2uqq256_mask_round(A, B, C, D) __builtin_ia32_cvttps2uqq256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtudq2ph256_mask_round(A, B, C, D) __builtin_ia32_vcvtudq2ph256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtudq2ps256_mask_round(A, B, C, D) __builtin_ia32_cvtudq2ps256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtuqq2pd256_mask_round(A, B, C, D) __builtin_ia32_cvtuqq2pd256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtuqq2ph256_mask_round(A, B, C, D) __builtin_ia32_vcvtuqq2ph256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtuqq2ps256_mask_round(A, B, C, D) __builtin_ia32_cvtuqq2ps256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtuw2ph256_mask_round(A, B, C, D) __builtin_ia32_vcvtuw2ph256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtw2ph256_mask_round(A, B, C, D) __builtin_ia32_vcvtw2ph256_mask_round(A, B, C, 8) -#define __builtin_ia32_divpd256_mask_round(A, B, C, D, E) __builtin_ia32_divpd256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_divph256_mask_round(A, B, C, D, E) __builtin_ia32_divph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_divps256_mask_round(A, B, C, D, E) __builtin_ia32_divps256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfcmaddcph256_round(A, B, C, D) __builtin_ia32_vfcmaddcph256_round(A, B, C, 8) -#define __builtin_ia32_vfcmaddcph256_mask_round(A, C, D, B, E) __builtin_ia32_vfcmaddcph256_mask_round(A, C, D, B, 8) -#define __builtin_ia32_vfcmaddcph256_mask3_round(A, C, D, B, E) __builtin_ia32_vfcmaddcph256_mask3_round(A, C, D, B, 8) -#define __builtin_ia32_vfcmaddcph256_maskz_round(B, C, D, A, E) __builtin_ia32_vfcmaddcph256_maskz_round(B, C, D, A, 8) -#define __builtin_ia32_vfcmulcph256_round(A, B, C) __builtin_ia32_vfcmulcph256_round(A, B, 8) -#define __builtin_ia32_vfcmulcph256_mask_round(A, B, C, D, E) __builtin_ia32_vfcmulcph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_fixupimmpd256_mask_round(A, B, C, D, E, F) __builtin_ia32_fixupimmpd256_mask_round(A, B, C, 1, E, 8) -#define __builtin_ia32_fixupimmpd256_maskz_round(A, B, C, D, E, F) __builtin_ia32_fixupimmpd256_maskz_round(A, B, C, 1, E, 8) -#define __builtin_ia32_fixupimmps256_mask_round(A, B, C, D, E, F) __builtin_ia32_fixupimmps256_mask_round(A, B, C, 1, E, 8) -#define __builtin_ia32_fixupimmps256_maskz_round(A, B, C, D, E, F) __builtin_ia32_fixupimmps256_maskz_round(A, B, C, 1, E, 8) -#define __builtin_ia32_vfmaddpd256_mask_round(A, B, C, D, E) __builtin_ia32_vfmaddpd256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddpd256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmaddpd256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddpd256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmaddpd256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddph256_mask_round(A, B, C, D, E) __builtin_ia32_vfmaddph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddph256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmaddph256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddph256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmaddph256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddps256_mask_round(A, B, C, D, E) __builtin_ia32_vfmaddps256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddps256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmaddps256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddps256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmaddps256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddcph256_round(A, B, C, D) __builtin_ia32_vfmaddcph256_round(A, B, C, 8) -#define __builtin_ia32_vfmaddcph256_mask_round(A, C, D, B, E) __builtin_ia32_vfmaddcph256_mask_round(A, C, D, B, 8) -#define __builtin_ia32_vfmaddcph256_mask3_round(A, C, D, B, E) __builtin_ia32_vfmaddcph256_mask3_round(A, C, D, B, 8) -#define __builtin_ia32_vfmaddcph256_maskz_round(B, C, D, A, E) __builtin_ia32_vfmaddcph256_maskz_round(B, C, D, A, 8) -#define __builtin_ia32_vfmaddsubpd256_mask_round(A, B, C, D, E) __builtin_ia32_vfmaddsubpd256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddsubpd256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmaddsubpd256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddsubpd256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmaddsubpd256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddsubph256_mask_round(A, B, C, D, E) __builtin_ia32_vfmaddsubph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddsubph256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmaddsubph256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddsubph256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmaddsubph256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddsubps256_mask_round(A, B, C, D, E) __builtin_ia32_vfmaddsubps256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddsubps256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmaddsubps256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddsubps256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmaddsubps256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubpd256_mask_round(A, B, C, D, E) __builtin_ia32_vfmsubpd256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubpd256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmsubpd256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubpd256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmsubpd256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubph256_mask_round(A, B, C, D, E) __builtin_ia32_vfmsubph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubph256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmsubph256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubph256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmsubph256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubps256_mask_round(A, B, C, D, E) __builtin_ia32_vfmsubps256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubps256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmsubps256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubps256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmsubps256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubaddpd256_mask_round(A, B, C, D, E) __builtin_ia32_vfmsubaddpd256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubaddpd256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmsubaddpd256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubaddpd256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmsubaddpd256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubaddph256_mask_round(A, B, C, D, E) __builtin_ia32_vfmsubaddph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubaddph256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmsubaddph256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubaddph256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmsubaddph256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubaddps256_mask_round(A, B, C, D, E) __builtin_ia32_vfmsubaddps256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubaddps256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmsubaddps256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubaddps256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmsubaddps256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfmulcph256_round(A, B, C) __builtin_ia32_vfmulcph256_round(A, B, 8) -#define __builtin_ia32_vfmulcph256_mask_round(A, B, C, D, E) __builtin_ia32_vfmulcph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmaddpd256_mask_round(A, B, C, D, E) __builtin_ia32_vfnmaddpd256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmaddpd256_mask3_round(A, B, C, D, E) __builtin_ia32_vfnmaddpd256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmaddpd256_maskz_round(A, B, C, D, E) __builtin_ia32_vfnmaddpd256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmaddph256_mask_round(A, B, C, D, E) __builtin_ia32_vfnmaddph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmaddph256_mask3_round(A, B, C, D, E) __builtin_ia32_vfnmaddph256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmaddph256_maskz_round(A, B, C, D, E) __builtin_ia32_vfnmaddph256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmaddps256_mask_round(A, B, C, D, E) __builtin_ia32_vfnmaddps256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmaddps256_mask3_round(A, B, C, D, E) __builtin_ia32_vfnmaddps256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmaddps256_maskz_round(A, B, C, D, E) __builtin_ia32_vfnmaddps256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmsubpd256_mask_round(A, B, C, D, E) __builtin_ia32_vfnmsubpd256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmsubpd256_mask3_round(A, B, C, D, E) __builtin_ia32_vfnmsubpd256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmsubpd256_maskz_round(A, B, C, D, E) __builtin_ia32_vfnmsubpd256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmsubph256_mask_round(A, B, C, D, E) __builtin_ia32_vfnmsubph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmsubph256_mask3_round(A, B, C, D, E) __builtin_ia32_vfnmsubph256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmsubph256_maskz_round(A, B, C, D, E) __builtin_ia32_vfnmsubph256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmsubps256_mask_round(A, B, C, D, E) __builtin_ia32_vfnmsubps256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmsubps256_mask3_round(A, B, C, D, E) __builtin_ia32_vfnmsubps256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmsubps256_maskz_round(A, B, C, D, E) __builtin_ia32_vfnmsubps256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_getexppd256_mask_round(A, B, C, D) __builtin_ia32_getexppd256_mask_round(A, B, C, 8) -#define __builtin_ia32_getexpph256_mask_round(A, B, C, D) __builtin_ia32_getexpph256_mask_round(A, B, C, 8) -#define __builtin_ia32_getexpps256_mask_round(A, B, C, D) __builtin_ia32_getexpps256_mask_round(A, B, C, 8) -#define __builtin_ia32_getmantpd256_mask_round(A, F, C, D, E) __builtin_ia32_getmantpd256_mask_round(A, 1, C, D, 8) -#define __builtin_ia32_getmantph256_mask_round(A, F, C, D, E) __builtin_ia32_getmantph256_mask_round(A, 1, C, D, 8) -#define __builtin_ia32_getmantps256_mask_round(A, F, C, D, E) __builtin_ia32_getmantps256_mask_round(A, 1, C, D, 8) -#define __builtin_ia32_maxpd256_mask_round(A, B, C, D, E) __builtin_ia32_maxpd256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_maxph256_mask_round(A, B, C, D, E) __builtin_ia32_maxph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_maxps256_mask_round(A, B, C, D, E) __builtin_ia32_maxps256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_minpd256_mask_round(A, B, C, D, E) __builtin_ia32_minpd256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_minph256_mask_round(A, B, C, D, E) __builtin_ia32_minph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_minps256_mask_round(A, B, C, D, E) __builtin_ia32_minps256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_mulpd256_mask_round(A, B, C, D, E) __builtin_ia32_mulpd256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_mulph256_mask_round(A, B, C, D, E) __builtin_ia32_mulph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_mulps256_mask_round(A, B, C, D, E) __builtin_ia32_mulps256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_rangeps256_mask_round(A, B, C, D, E, F) __builtin_ia32_rangeps256_mask_round(A, B, 1, D, E, 8) -#define __builtin_ia32_rangepd256_mask_round(A, B, C, D, E, F) __builtin_ia32_rangepd256_mask_round(A, B, 1, D, E, 8) -#define __builtin_ia32_reducepd256_mask_round(A, B, C, D, E) __builtin_ia32_reducepd256_mask_round(A, 8, C, D, 8) -#define __builtin_ia32_reduceph256_mask_round(A, B, C, D, E) __builtin_ia32_reduceph256_mask_round(A, 8, C, D, 8) -#define __builtin_ia32_reduceps256_mask_round(A, B, C, D, E) __builtin_ia32_reduceps256_mask_round(A, 8, C, D, 8) -#define __builtin_ia32_rndscalepd256_mask_round(A, B, C, D, E) __builtin_ia32_rndscalepd256_mask_round(A, 1, C, D, 8) -#define __builtin_ia32_rndscaleph256_mask_round(A, B, C, D, E) __builtin_ia32_rndscaleph256_mask_round(A, 1, C, D, 8) -#define __builtin_ia32_rndscaleps256_mask_round(A, B, C, D, E) __builtin_ia32_rndscaleps256_mask_round(A, 1, C, D, 8) -#define __builtin_ia32_scalefpd256_mask_round(A, B, C, D, E) __builtin_ia32_scalefpd256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_scalefph256_mask_round(A, B, C, D, E) __builtin_ia32_scalefph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_scalefps256_mask_round(A, B, C, D, E) __builtin_ia32_scalefps256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_sqrtpd256_mask_round(A, B, C, D) __builtin_ia32_sqrtpd256_mask_round(A, B, C, 8) -#define __builtin_ia32_sqrtph256_mask_round(A, B, C, D) __builtin_ia32_sqrtph256_mask_round(A, B, C, 8) -#define __builtin_ia32_sqrtps256_mask_round(A, B, C, D) __builtin_ia32_sqrtps256_mask_round(A, B, C, 8) -#define __builtin_ia32_subpd256_mask_round(A, B, C, D, E) __builtin_ia32_subpd256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_subph256_mask_round(A, B, C, D, E) __builtin_ia32_subph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_subps256_mask_round(A, B, C, D, E) __builtin_ia32_subps256_mask_round(A, B, C, D, 8) - /* avx10_2-512mediaintrin.h */ #define __builtin_ia32_mpsadbw512(A, B, C) __builtin_ia32_mpsadbw512 (A, B, 1) #define __builtin_ia32_mpsadbw512_mask(A, B, C, D, E) __builtin_ia32_mpsadbw512_mask (A, B, 1, D, E) @@ -992,9 +832,6 @@ #define __builtin_ia32_mpsadbw128_mask(A, B, C, D, E) __builtin_ia32_mpsadbw128_mask (A, B, 1, D, E) #define __builtin_ia32_mpsadbw256_mask(A, B, C, D, E) __builtin_ia32_mpsadbw256_mask (A, B, 1, D, E) -/* avx10_2convertintrin.h */ -#define __builtin_ia32_vcvt2ps2phx256_mask_round(A, B, C, D, E) __builtin_ia32_vcvt2ps2phx256_mask_round(A, B, C, D, 8) - /* avx10_2-512convertintrin.h */ #define __builtin_ia32_vcvt2ps2phx512_mask_round(A, B, C, D, E) __builtin_ia32_vcvt2ps2phx512_mask_round(A, B, C, D, 8) @@ -1036,22 +873,6 @@ #define __builtin_ia32_cvttps2uqqs512_mask_round(A, B, C, D) __builtin_ia32_cvttps2uqqs512_mask_round(A, B, C, 8) /* avx10_2satcvtintrin.h */ -#define __builtin_ia32_cvtph2ibs256_mask_round(A, B, C, D) __builtin_ia32_cvtph2ibs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtph2iubs256_mask_round(A, B, C, D) __builtin_ia32_cvtph2iubs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtps2ibs256_mask_round(A, B, C, D) __builtin_ia32_cvtps2ibs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtps2iubs256_mask_round(A, B, C, D) __builtin_ia32_cvtps2iubs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttph2ibs256_mask_round(A, B, C, D) __builtin_ia32_cvttph2ibs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttph2iubs256_mask_round(A, B, C, D) __builtin_ia32_cvttph2iubs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttps2ibs256_mask_round(A, B, C, D) __builtin_ia32_cvttps2ibs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttps2iubs256_mask_round(A, B, C, D) __builtin_ia32_cvttps2iubs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttpd2dqs256_mask_round(A, B, C, D) __builtin_ia32_cvttpd2dqs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttpd2qqs256_mask_round(A, B, C, D) __builtin_ia32_cvttpd2qqs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttpd2udqs256_mask_round(A, B, C, D) __builtin_ia32_cvttpd2udqs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttpd2uqqs256_mask_round(A, B, C, D) __builtin_ia32_cvttpd2uqqs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttps2dqs256_mask_round(A, B, C, D) __builtin_ia32_cvttps2dqs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttps2qqs256_mask_round(A, B, C, D) __builtin_ia32_cvttps2qqs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttps2udqs256_mask_round(A, B, C, D) __builtin_ia32_cvttps2udqs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttps2uqqs256_mask_round(A, B, C, D) __builtin_ia32_cvttps2uqqs256_mask_round(A, B, C, 8) #define __builtin_ia32_cvttsd2sis32_round(A, B) __builtin_ia32_cvttsd2sis32_round(A, 8) #define __builtin_ia32_cvttsd2usis32_round(A, B) __builtin_ia32_cvttsd2usis32_round(A, 8) #define __builtin_ia32_cvttss2sis32_round(A, B) __builtin_ia32_cvttss2sis32_round(A, 8) @@ -1076,12 +897,12 @@ #define __builtin_ia32_minmaxbf16128_mask(A, B, C, D, E) __builtin_ia32_minmaxbf16128_mask (A, B, 100, D, E) #define __builtin_ia32_minmaxbf16256_mask(A, B, C, D, E) __builtin_ia32_minmaxbf16256_mask (A, B, 100, D, E) #define __builtin_ia32_minmaxpd128_mask(A, B, C, D, E) __builtin_ia32_minmaxpd128_mask (A, B, 100, D, E) -#define __builtin_ia32_minmaxpd256_mask_round(A, B, C, D, E, F) __builtin_ia32_minmaxpd256_mask_round (A, B, 100, D, E, 4) +#define __builtin_ia32_minmaxpd256_mask(A, B, C, D, E) __builtin_ia32_minmaxpd256_mask (A, B, 100, D, E) #define __builtin_ia32_minmaxph128_mask(A, B, C, D, E) __builtin_ia32_minmaxph128_mask (A, B, 100, D, E) -#define __builtin_ia32_minmaxph256_mask_round(A, B, C, D, E, F) __builtin_ia32_minmaxph256_mask_round (A, B, 100, D, E, 4) +#define __builtin_ia32_minmaxph256_mask(A, B, C, D, E) __builtin_ia32_minmaxph256_mask (A, B, 100, D, E) #define __builtin_ia32_minmaxps128_mask(A, B, C, D, E) __builtin_ia32_minmaxps128_mask (A, B, 100, D, E) -#define __builtin_ia32_minmaxps256_mask_round(A, B, C, D, E, F) __builtin_ia32_minmaxps256_mask_round (A, B, 100, D, E, 4) +#define __builtin_ia32_minmaxps256_mask(A, B, C, D, E) __builtin_ia32_minmaxps256_mask (A, B, 100, D, E) -#pragma GCC target ("sse4a,3dnow,avx,avx2,fma4,xop,aes,pclmul,popcnt,abm,lzcnt,bmi,bmi2,tbm,lwp,fsgsbase,rdrnd,f16c,fma,rtm,rdseed,prfchw,adx,fxsr,xsaveopt,sha,xsavec,xsaves,clflushopt,clwb,mwaitx,clzero,pku,sgx,rdpid,gfni,vpclmulqdq,pconfig,wbnoinvd,enqcmd,avx512vp2intersect,serialize,tsxldtrk,amx-tile,amx-int8,amx-bf16,kl,widekl,avxvnni,avxifma,avxvnniint8,avxneconvert,cmpccxadd,amx-fp16,prefetchi,raoint,amx-complex,avxvnniint16,sm3,sha512,sm4,avx10.2-512,amx-avx512,amx-tf32,amx-transpose,amx-fp8,movrs,amx-movrs") +#pragma GCC target ("sse4a,3dnow,avx,avx2,fma4,xop,aes,pclmul,popcnt,abm,lzcnt,bmi,bmi2,tbm,lwp,fsgsbase,rdrnd,f16c,fma,rtm,rdseed,prfchw,adx,fxsr,xsaveopt,sha,xsavec,xsaves,clflushopt,clwb,mwaitx,clzero,pku,sgx,rdpid,gfni,vpclmulqdq,pconfig,wbnoinvd,enqcmd,avx512vp2intersect,serialize,tsxldtrk,amx-tile,amx-int8,amx-bf16,kl,widekl,avxvnni,avxifma,avxvnniint8,avxneconvert,cmpccxadd,amx-fp16,prefetchi,raoint,amx-complex,avxvnniint16,sm3,sha512,sm4,avx10.2,amx-avx512,amx-tf32,amx-transpose,amx-fp8,movrs,amx-movrs") #include <x86intrin.h> diff --git a/gcc/testsuite/gcc.target/i386/sse2-float16-5.c b/gcc/testsuite/gcc.target/i386/sse2-float16-5.c index c3ed23b..8207842 100644 --- a/gcc/testsuite/gcc.target/i386/sse2-float16-5.c +++ b/gcc/testsuite/gcc.target/i386/sse2-float16-5.c @@ -1,4 +1,4 @@ -/* { dg-do compile { target ia32} } */ +/* { dg-do compile { target ia32 } } */ /* { dg-options "-O2 -mno-sse2" } */ _Float16 a; diff --git a/gcc/testsuite/gcc.target/i386/strub-pr118006.c b/gcc/testsuite/gcc.target/i386/strub-pr118006.c index f116790..88f66c1 100644 --- a/gcc/testsuite/gcc.target/i386/strub-pr118006.c +++ b/gcc/testsuite/gcc.target/i386/strub-pr118006.c @@ -1,5 +1,5 @@ -/* { dg-require-effective-target strub } */ /* { dg-do compile } */ +/* { dg-require-effective-target strub } */ /* { dg-options "-fstrub=all -O2 -mno-accumulate-outgoing-args" } */ __attribute__((noipa)) diff --git a/gcc/testsuite/gcc.target/i386/vnniint16-auto-vectorize-3.c b/gcc/testsuite/gcc.target/i386/vnniint16-auto-vectorize-3.c index 18c5397..85dd80e 100644 --- a/gcc/testsuite/gcc.target/i386/vnniint16-auto-vectorize-3.c +++ b/gcc/testsuite/gcc.target/i386/vnniint16-auto-vectorize-3.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-mavx10.2-256 -O2" } */ +/* { dg-options "-mavx10.2 -O2" } */ /* { dg-final { scan-assembler "vpdpwusd\t" } } */ /* { dg-final { scan-assembler "vpdpwuud\t" } } */ diff --git a/gcc/testsuite/gcc.target/i386/vnniint16-auto-vectorize-4.c b/gcc/testsuite/gcc.target/i386/vnniint16-auto-vectorize-4.c index 1bd1400d..06a85a8 100644 --- a/gcc/testsuite/gcc.target/i386/vnniint16-auto-vectorize-4.c +++ b/gcc/testsuite/gcc.target/i386/vnniint16-auto-vectorize-4.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define N 512 diff --git a/gcc/testsuite/gcc.target/i386/vnniint8-auto-vectorize-3.c b/gcc/testsuite/gcc.target/i386/vnniint8-auto-vectorize-3.c index 5a03ff8..bbb49e8 100644 --- a/gcc/testsuite/gcc.target/i386/vnniint8-auto-vectorize-3.c +++ b/gcc/testsuite/gcc.target/i386/vnniint8-auto-vectorize-3.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-mavx10.2-256 -O2" } */ +/* { dg-options "-mavx10.2 -O2" } */ /* { dg-final { scan-assembler "vpdpbssd\t" } } */ /* { dg-final { scan-assembler "vpdpbuud\t" } } */ diff --git a/gcc/testsuite/gcc.target/i386/vnniint8-auto-vectorize-4.c b/gcc/testsuite/gcc.target/i386/vnniint8-auto-vectorize-4.c index dafab34..76cca22 100644 --- a/gcc/testsuite/gcc.target/i386/vnniint8-auto-vectorize-4.c +++ b/gcc/testsuite/gcc.target/i386/vnniint8-auto-vectorize-4.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define N 512 |