diff options
Diffstat (limited to 'gcc/testsuite/gcc.target/arm')
44 files changed, 159 insertions, 145 deletions
diff --git a/gcc/testsuite/gcc.target/arm/cmse/cmse-17.c b/gcc/testsuite/gcc.target/arm/cmse/cmse-17.c index a2cce09..c5be810 100644 --- a/gcc/testsuite/gcc.target/arm/cmse/cmse-17.c +++ b/gcc/testsuite/gcc.target/arm/cmse/cmse-17.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-mcmse"} */ +/* { dg-options "-mcmse" } */ #include <arm_cmse.h> diff --git a/gcc/testsuite/gcc.target/arm/fmaxmin-2.c b/gcc/testsuite/gcc.target/arm/fmaxmin-2.c new file mode 100644 index 0000000..a9990e1 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/fmaxmin-2.c @@ -0,0 +1,12 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target arm_arch_v8a_hard_ok } */ +/* { dg-options "-O2 -fno-inline" } */ +/* { dg-add-options arm_arch_v8a_hard } */ + +#include "fmaxmin.x" + +/* { dg-final { scan-assembler-times "vmaxnm.f32\ts\[0-9\]+, s\[0-9\]+, s\[0-9\]+" 1 } } */ +/* { dg-final { scan-assembler-times "vminnm.f32\ts\[0-9\]+, s\[0-9\]+, s\[0-9\]+" 1 } } */ + +/* { dg-final { scan-assembler-times "vmaxnm.f64\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" 1 } } */ +/* { dg-final { scan-assembler-times "vminnm.f64\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" 1 } } */ diff --git a/gcc/testsuite/gcc.target/arm/fmaxmin.c b/gcc/testsuite/gcc.target/arm/fmaxmin.c index 5a6fb80..7f30c12 100644 --- a/gcc/testsuite/gcc.target/arm/fmaxmin.c +++ b/gcc/testsuite/gcc.target/arm/fmaxmin.c @@ -1,13 +1,6 @@ /* { dg-do run } */ /* { dg-require-effective-target arm_v8_neon_hw } */ -/* { dg-options "-O2 -fno-inline -march=armv8-a -save-temps" } */ +/* { dg-options "-O2 -fno-inline" } */ /* { dg-add-options arm_v8_neon } */ #include "fmaxmin.x" - -/* { dg-final { scan-assembler-times "vmaxnm.f32\ts\[0-9\]+, s\[0-9\]+, s\[0-9\]+" 1 } } */ -/* { dg-final { scan-assembler-times "vminnm.f32\ts\[0-9\]+, s\[0-9\]+, s\[0-9\]+" 1 } } */ - -/* { dg-final { scan-assembler-times "vmaxnm.f64\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" 1 } } */ -/* { dg-final { scan-assembler-times "vminnm.f64\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" 1 } } */ - diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv4-arm.c b/gcc/testsuite/gcc.target/arm/ftest-armv4-arm.c index 447a8ec..63d57d4 100644 --- a/gcc/testsuite/gcc.target/arm/ftest-armv4-arm.c +++ b/gcc/testsuite/gcc.target/arm/ftest-armv4-arm.c @@ -1,6 +1,4 @@ /* { dg-do compile } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv4" } } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-mthumb" } { "" } } */ /* { dg-require-effective-target arm_arch_v4_ok } */ /* { dg-options "-marm" } */ /* { dg-add-options arm_arch_v4 } */ diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv4t-arm.c b/gcc/testsuite/gcc.target/arm/ftest-armv4t-arm.c index 28fd2f7..d33beef 100644 --- a/gcc/testsuite/gcc.target/arm/ftest-armv4t-arm.c +++ b/gcc/testsuite/gcc.target/arm/ftest-armv4t-arm.c @@ -1,6 +1,4 @@ /* { dg-do compile } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv4t" } } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-mthumb" } { "" } } */ /* { dg-require-effective-target arm_arch_v4t_arm_ok } */ /* { dg-options "-marm" } */ /* { dg-add-options arm_arch_v4t } */ diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv4t-thumb.c b/gcc/testsuite/gcc.target/arm/ftest-armv4t-thumb.c index 78878f7..8f43801 100644 --- a/gcc/testsuite/gcc.target/arm/ftest-armv4t-thumb.c +++ b/gcc/testsuite/gcc.target/arm/ftest-armv4t-thumb.c @@ -1,6 +1,4 @@ /* { dg-do compile } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv4t" } } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-marm" } { "" } } */ /* { dg-require-effective-target arm_arch_v4t_thumb_ok } */ /* { dg-options "-mthumb" } */ /* { dg-add-options arm_arch_v4t } */ diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv5t-arm.c b/gcc/testsuite/gcc.target/arm/ftest-armv5t-arm.c index 8191299..cc139f1 100644 --- a/gcc/testsuite/gcc.target/arm/ftest-armv5t-arm.c +++ b/gcc/testsuite/gcc.target/arm/ftest-armv5t-arm.c @@ -1,6 +1,4 @@ /* { dg-do compile } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv5t" } } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-mthumb" } { "" } } */ /* { dg-require-effective-target arm_arch_v5t_arm_ok } */ /* { dg-options "-marm" } */ /* { dg-add-options arm_arch_v5t } */ diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv5t-thumb.c b/gcc/testsuite/gcc.target/arm/ftest-armv5t-thumb.c index b25d17d..1432018 100644 --- a/gcc/testsuite/gcc.target/arm/ftest-armv5t-thumb.c +++ b/gcc/testsuite/gcc.target/arm/ftest-armv5t-thumb.c @@ -1,6 +1,4 @@ /* { dg-do compile } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv5t" } } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-marm" } { "" } } */ /* { dg-require-effective-target arm_arch_v5t_thumb_ok } */ /* { dg-options "-mthumb" } */ /* { dg-add-options arm_arch_v5t } */ @@ -14,4 +12,9 @@ #define NEED_ARM_ARCH_ISA_THUMB #define VALUE_ARM_ARCH_ISA_THUMB 1 +/* Not in the Thumb ISA, but does exist in Arm state. A call to the library + function should result in using that instruction in Arm state. */ +#define NEED_ARM_FEATURE_CLZ +#define VALUE_ARM_FEATURE_CLZ 1 + #include "ftest-support.h" diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv5te-arm.c b/gcc/testsuite/gcc.target/arm/ftest-armv5te-arm.c index e0c0d5c..2917ee6 100644 --- a/gcc/testsuite/gcc.target/arm/ftest-armv5te-arm.c +++ b/gcc/testsuite/gcc.target/arm/ftest-armv5te-arm.c @@ -1,6 +1,4 @@ /* { dg-do compile } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv5te" } } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-mthumb" } { "" } } */ /* { dg-require-effective-target arm_arch_v5te_arm_ok } */ /* { dg-options "-marm" } */ /* { dg-add-options arm_arch_v5te } */ diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv5te-thumb.c b/gcc/testsuite/gcc.target/arm/ftest-armv5te-thumb.c index 27a64a2..768dbaa 100644 --- a/gcc/testsuite/gcc.target/arm/ftest-armv5te-thumb.c +++ b/gcc/testsuite/gcc.target/arm/ftest-armv5te-thumb.c @@ -1,6 +1,4 @@ /* { dg-do compile } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv5te" } } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-marm" } { "" } } */ /* { dg-require-effective-target arm_arch_v5te_thumb_ok } */ /* { dg-options "-mthumb" } */ /* { dg-add-options arm_arch_v5te } */ @@ -14,4 +12,9 @@ #define NEED_ARM_ARCH_ISA_THUMB #define VALUE_ARM_ARCH_ISA_THUMB 1 +/* Not in the Thumb ISA, but does exist in Arm state. A call to the library + function should result in using that instruction in Arm state. */ +#define NEED_ARM_FEATURE_CLZ +#define VALUE_ARM_FEATURE_CLZ 1 + #include "ftest-support.h" diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6-arm.c b/gcc/testsuite/gcc.target/arm/ftest-armv6-arm.c index 5d447c3..648acb1 100644 --- a/gcc/testsuite/gcc.target/arm/ftest-armv6-arm.c +++ b/gcc/testsuite/gcc.target/arm/ftest-armv6-arm.c @@ -1,6 +1,4 @@ /* { dg-do compile } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv6" } } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-mthumb" } { "" } } */ /* { dg-require-effective-target arm_arch_v6_arm_ok } */ /* { dg-options "-marm" } */ /* { dg-add-options arm_arch_v6 } */ diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6-thumb.c b/gcc/testsuite/gcc.target/arm/ftest-armv6-thumb.c index 15a6d75..02360ee 100644 --- a/gcc/testsuite/gcc.target/arm/ftest-armv6-thumb.c +++ b/gcc/testsuite/gcc.target/arm/ftest-armv6-thumb.c @@ -1,6 +1,4 @@ /* { dg-do compile } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv6" } } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-marm" } { "" } } */ /* { dg-require-effective-target arm_arch_v6_thumb_ok } */ /* { dg-options "-mthumb" } */ /* { dg-add-options arm_arch_v6 } */ @@ -14,4 +12,9 @@ #define NEED_ARM_ARCH_ISA_THUMB #define VALUE_ARM_ARCH_ISA_THUMB 1 +/* Not in the Thumb ISA, but does exist in Arm state. A call to the library + function should result in using that instruction in Arm state. */ +#define NEED_ARM_FEATURE_CLZ +#define VALUE_ARM_FEATURE_CLZ 1 + #include "ftest-support.h" diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6k-arm.c b/gcc/testsuite/gcc.target/arm/ftest-armv6k-arm.c index 0656e8f..ccc4e03 100644 --- a/gcc/testsuite/gcc.target/arm/ftest-armv6k-arm.c +++ b/gcc/testsuite/gcc.target/arm/ftest-armv6k-arm.c @@ -1,6 +1,4 @@ /* { dg-do compile } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv6k" } } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-mthumb" } { "" } } */ /* { dg-require-effective-target arm_arch_v6k_arm_ok } */ /* { dg-options "-marm" } */ /* { dg-add-options arm_arch_v6k } */ diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6k-thumb.c b/gcc/testsuite/gcc.target/arm/ftest-armv6k-thumb.c index b3b6ecf..2c5490f 100644 --- a/gcc/testsuite/gcc.target/arm/ftest-armv6k-thumb.c +++ b/gcc/testsuite/gcc.target/arm/ftest-armv6k-thumb.c @@ -1,6 +1,4 @@ /* { dg-do compile } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv6k" } } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-marm" } { "" } } */ /* { dg-require-effective-target arm_arch_v6k_thumb_ok } */ /* { dg-options "-mthumb" } */ /* { dg-add-options arm_arch_v6k } */ @@ -14,4 +12,9 @@ #define NEED_ARM_ARCH_ISA_THUMB #define VALUE_ARM_ARCH_ISA_THUMB 1 +/* Not in the Thumb ISA, but does exist in Arm state. A call to the library + function should result in using that instruction in Arm state. */ +#define NEED_ARM_FEATURE_CLZ +#define VALUE_ARM_FEATURE_CLZ 1 + #include "ftest-support.h" diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6m-thumb.c b/gcc/testsuite/gcc.target/arm/ftest-armv6m-thumb.c index 27f71be..46cf957 100644 --- a/gcc/testsuite/gcc.target/arm/ftest-armv6m-thumb.c +++ b/gcc/testsuite/gcc.target/arm/ftest-armv6m-thumb.c @@ -1,6 +1,4 @@ /* { dg-do compile } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv6-m" } } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-marm" } { "" } } */ /* { dg-require-effective-target arm_arch_v6m_ok } */ /* { dg-options "-mthumb" } */ /* { dg-add-options arm_arch_v6m } */ diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6t2-arm.c b/gcc/testsuite/gcc.target/arm/ftest-armv6t2-arm.c index 259d2b5..d24b08c 100644 --- a/gcc/testsuite/gcc.target/arm/ftest-armv6t2-arm.c +++ b/gcc/testsuite/gcc.target/arm/ftest-armv6t2-arm.c @@ -1,6 +1,4 @@ /* { dg-do compile } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv6t2" } } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-mthumb" } { "" } } */ /* { dg-require-effective-target arm_arch_v6t2_ok } */ /* { dg-options "-marm" } */ /* { dg-add-options arm_arch_v6t2 } */ diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6t2-thumb.c b/gcc/testsuite/gcc.target/arm/ftest-armv6t2-thumb.c index e624ec5..27d2ccb 100644 --- a/gcc/testsuite/gcc.target/arm/ftest-armv6t2-thumb.c +++ b/gcc/testsuite/gcc.target/arm/ftest-armv6t2-thumb.c @@ -1,6 +1,4 @@ /* { dg-do compile } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv6t2" } } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-marm" } { "" } } */ /* { dg-require-effective-target arm_arch_v6t2_ok } */ /* { dg-options "-mthumb" } */ /* { dg-add-options arm_arch_v6t2 } */ diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6z-arm.c b/gcc/testsuite/gcc.target/arm/ftest-armv6z-arm.c index 6e3a966..7de37ee 100644 --- a/gcc/testsuite/gcc.target/arm/ftest-armv6z-arm.c +++ b/gcc/testsuite/gcc.target/arm/ftest-armv6z-arm.c @@ -1,6 +1,4 @@ /* { dg-do compile } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv6z" } } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-mthumb" } { "" } } */ /* { dg-require-effective-target arm_arch_v6z_arm_ok } */ /* { dg-options "-marm" } */ /* { dg-add-options arm_arch_v6z } */ diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6z-thumb.c b/gcc/testsuite/gcc.target/arm/ftest-armv6z-thumb.c index 23a4fcd..d3e0393 100644 --- a/gcc/testsuite/gcc.target/arm/ftest-armv6z-thumb.c +++ b/gcc/testsuite/gcc.target/arm/ftest-armv6z-thumb.c @@ -1,6 +1,4 @@ /* { dg-do compile } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv6z" } } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-marm" } { "" } } */ /* { dg-require-effective-target arm_arch_v6z_thumb_ok } */ /* { dg-options "-mthumb" } */ /* { dg-add-options arm_arch_v6z } */ @@ -14,4 +12,9 @@ #define NEED_ARM_ARCH_ISA_THUMB #define VALUE_ARM_ARCH_ISA_THUMB 1 +/* Not in the Thumb ISA, but does exist in Arm state. A call to the library + function should result in using that instruction in Arm state. */ +#define NEED_ARM_FEATURE_CLZ +#define VALUE_ARM_FEATURE_CLZ 1 + #include "ftest-support.h" diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv7a-arm.c b/gcc/testsuite/gcc.target/arm/ftest-armv7a-arm.c index 43f52fe..ec70bc5 100644 --- a/gcc/testsuite/gcc.target/arm/ftest-armv7a-arm.c +++ b/gcc/testsuite/gcc.target/arm/ftest-armv7a-arm.c @@ -1,7 +1,5 @@ /* { dg-do compile } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv7-a" } } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-mthumb" } { "" } } */ -/* { dg-skip-if "-mpure-code supports M-profile only" { *-*-* } { "-mpure-code" } } */ +/* { dg-require-effective-target arm_arch_v7a_ok } /* { dg-options "-marm" } */ /* { dg-add-options arm_arch_v7a } */ diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv7a-thumb.c b/gcc/testsuite/gcc.target/arm/ftest-armv7a-thumb.c index 717f44c..d0ae786 100644 --- a/gcc/testsuite/gcc.target/arm/ftest-armv7a-thumb.c +++ b/gcc/testsuite/gcc.target/arm/ftest-armv7a-thumb.c @@ -1,7 +1,5 @@ /* { dg-do compile } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv7-a" } } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-marm" } { "" } } */ -/* { dg-skip-if "-mpure-code supports M-profile only" { *-*-* } { "-mpure-code" } } */ +/* { dg-require-effective-target arm_arch_v7a_ok } /* { dg-options "-mthumb" } */ /* { dg-add-options arm_arch_v7a } */ diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv7em-thumb.c b/gcc/testsuite/gcc.target/arm/ftest-armv7em-thumb.c index 688d766..353dbadc 100644 --- a/gcc/testsuite/gcc.target/arm/ftest-armv7em-thumb.c +++ b/gcc/testsuite/gcc.target/arm/ftest-armv7em-thumb.c @@ -1,6 +1,5 @@ /* { dg-do compile } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv7e-m" } } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-marm" } { "" } } */ +/* { dg-require-effective-target arm_arch_v7em_ok } */ /* { dg-options "-mthumb" } */ /* { dg-add-options arm_arch_v7em } */ diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv7r-arm.c b/gcc/testsuite/gcc.target/arm/ftest-armv7r-arm.c index 24b93ea..2809050 100644 --- a/gcc/testsuite/gcc.target/arm/ftest-armv7r-arm.c +++ b/gcc/testsuite/gcc.target/arm/ftest-armv7r-arm.c @@ -1,7 +1,5 @@ /* { dg-do compile } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv7-r" } } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-mthumb" } { "" } } */ -/* { dg-skip-if "-mpure-code supports M-profile only" { *-*-* } { "-mpure-code" } } */ +/* { dg-require-effective-target arm_arch_v7r_ok } /* { dg-options "-marm" } */ /* { dg-add-options arm_arch_v7r } */ diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv7r-thumb.c b/gcc/testsuite/gcc.target/arm/ftest-armv7r-thumb.c index a7c3772..7ee7981 100644 --- a/gcc/testsuite/gcc.target/arm/ftest-armv7r-thumb.c +++ b/gcc/testsuite/gcc.target/arm/ftest-armv7r-thumb.c @@ -1,7 +1,5 @@ /* { dg-do compile } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv7-r" } } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-marm" } { "" } } */ -/* { dg-skip-if "-mpure-code supports M-profile only" { *-*-* } { "-mpure-code" } } */ +/* { dg-require-effective-target arm_arch_v7r_ok } /* { dg-options "-mthumb" } */ /* { dg-add-options arm_arch_v7r } */ diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv7ve-arm.c b/gcc/testsuite/gcc.target/arm/ftest-armv7ve-arm.c index 72c4c1f..e6e6862 100644 --- a/gcc/testsuite/gcc.target/arm/ftest-armv7ve-arm.c +++ b/gcc/testsuite/gcc.target/arm/ftest-armv7ve-arm.c @@ -1,7 +1,5 @@ /* { dg-do compile } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv7ve" } } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-mthumb" } { "" } } */ -/* { dg-skip-if "-mpure-code supports M-profile only" { *-*-* } { "-mpure-code" } } */ +/* { dg-require-effective-target arm_arch_v7ve_ok } /* { dg-options "-marm" } */ /* { dg-add-options arm_arch_v7ve } */ diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv7ve-thumb.c b/gcc/testsuite/gcc.target/arm/ftest-armv7ve-thumb.c index 772405b..5a2ffd8 100644 --- a/gcc/testsuite/gcc.target/arm/ftest-armv7ve-thumb.c +++ b/gcc/testsuite/gcc.target/arm/ftest-armv7ve-thumb.c @@ -1,7 +1,5 @@ /* { dg-do compile } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv7ve" } } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-marm" } { "" } } */ -/* { dg-skip-if "-mpure-code supports M-profile only" { *-*-* } { "-mpure-code" } } */ +/* { dg-require-effective-target arm_arch_v7ve_ok } /* { dg-options "-mthumb" } */ /* { dg-add-options arm_arch_v7ve } */ diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv8a-arm.c b/gcc/testsuite/gcc.target/arm/ftest-armv8a-arm.c index feab5ee..40d2437 100644 --- a/gcc/testsuite/gcc.target/arm/ftest-armv8a-arm.c +++ b/gcc/testsuite/gcc.target/arm/ftest-armv8a-arm.c @@ -1,7 +1,5 @@ /* { dg-do compile } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv8-a" } } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-mthumb" } { "" } } */ -/* { dg-skip-if "-mpure-code supports M-profile only" { *-*-* } { "-mpure-code" } } */ +/* { dg-require-effective-target arm_arch_v8a_ok } /* { dg-options "-marm" } */ /* { dg-add-options arm_arch_v8a } */ diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv8a-thumb.c b/gcc/testsuite/gcc.target/arm/ftest-armv8a-thumb.c index 28d54bf..9f13069 100644 --- a/gcc/testsuite/gcc.target/arm/ftest-armv8a-thumb.c +++ b/gcc/testsuite/gcc.target/arm/ftest-armv8a-thumb.c @@ -1,7 +1,5 @@ /* { dg-do compile } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv8-a" } } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-marm" } { "" } } */ -/* { dg-skip-if "-mpure-code supports M-profile only" { *-*-* } { "-mpure-code" } } */ +/* { dg-require-effective-target arm_arch_v8a_ok } /* { dg-options "-mthumb" } */ /* { dg-add-options arm_arch_v8a } */ diff --git a/gcc/testsuite/gcc.target/arm/lto/pr96939_0.c b/gcc/testsuite/gcc.target/arm/lto/pr96939_0.c index 21d2c1d..8dfbc06 100644 --- a/gcc/testsuite/gcc.target/arm/lto/pr96939_0.c +++ b/gcc/testsuite/gcc.target/arm/lto/pr96939_0.c @@ -1,8 +1,7 @@ /* PR target/96939 */ /* { dg-lto-do link } */ /* { dg-require-effective-target arm_arch_v8a_link } */ -/* { dg-options "-mcpu=unset -march=armv8-a+simd -mfpu=auto" } */ -/* { dg-lto-options { { -flto -O2 } } } */ +/* { dg-lto-options { { -flto -O2 -mcpu=unset -march=armv8-a+simd -mfpu=auto} } } */ extern unsigned crc (unsigned, const void *); typedef unsigned (*fnptr) (unsigned, const void *); diff --git a/gcc/testsuite/gcc.target/arm/memcpy-aligned-1.c b/gcc/testsuite/gcc.target/arm/memcpy-aligned-1.c index 852b391..42e2a6b 100644 --- a/gcc/testsuite/gcc.target/arm/memcpy-aligned-1.c +++ b/gcc/testsuite/gcc.target/arm/memcpy-aligned-1.c @@ -1,4 +1,5 @@ /* { dg-do compile } */ +/* { dg-require-effective-target arm_unaligned } */ /* { dg-options "-O2 -save-temps" } */ void *memcpy (void *dest, const void *src, unsigned int n); diff --git a/gcc/testsuite/gcc.target/arm/mtp_1.c b/gcc/testsuite/gcc.target/arm/mtp_1.c index 678d27d..f78ceb8 100644 --- a/gcc/testsuite/gcc.target/arm/mtp_1.c +++ b/gcc/testsuite/gcc.target/arm/mtp_1.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target tls_native } */ +/* { dg-require-effective-target arm32 } */ /* { dg-options "-O -mtp=cp15" } */ #include "mtp.c" diff --git a/gcc/testsuite/gcc.target/arm/mtp_2.c b/gcc/testsuite/gcc.target/arm/mtp_2.c index bcb308f..1368fe4 100644 --- a/gcc/testsuite/gcc.target/arm/mtp_2.c +++ b/gcc/testsuite/gcc.target/arm/mtp_2.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target tls_native } */ +/* { dg-require-effective-target arm32 } */ /* { dg-options "-O -mtp=tpidrprw" } */ #include "mtp.c" diff --git a/gcc/testsuite/gcc.target/arm/mtp_3.c b/gcc/testsuite/gcc.target/arm/mtp_3.c index 7d5cea3..2ef2e95 100644 --- a/gcc/testsuite/gcc.target/arm/mtp_3.c +++ b/gcc/testsuite/gcc.target/arm/mtp_3.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target tls_native } */ +/* { dg-require-effective-target arm32 } */ /* { dg-options "-O -mtp=tpidruro" } */ #include "mtp.c" diff --git a/gcc/testsuite/gcc.target/arm/mtp_4.c b/gcc/testsuite/gcc.target/arm/mtp_4.c index 068078d..121fc83 100644 --- a/gcc/testsuite/gcc.target/arm/mtp_4.c +++ b/gcc/testsuite/gcc.target/arm/mtp_4.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target tls_native } */ +/* { dg-require-effective-target arm32 } */ /* { dg-options "-O -mtp=tpidrurw" } */ #include "mtp.c" diff --git a/gcc/testsuite/gcc.target/arm/pr42575.c b/gcc/testsuite/gcc.target/arm/pr42575.c index 1998e32..3906c77 100644 --- a/gcc/testsuite/gcc.target/arm/pr42575.c +++ b/gcc/testsuite/gcc.target/arm/pr42575.c @@ -1,4 +1,5 @@ /* { dg-options "-O2" } */ +/* { dg-skip-if "Thumb1 lacks UMULL" { arm_thumb1 } } */ /* Make sure RA does good job allocating registers and avoids unnecessary moves. */ /* { dg-final { scan-assembler-not "mov" } } */ diff --git a/gcc/testsuite/gcc.target/arm/pr65647.c b/gcc/testsuite/gcc.target/arm/pr65647.c index e0c534b..663157c 100644 --- a/gcc/testsuite/gcc.target/arm/pr65647.c +++ b/gcc/testsuite/gcc.target/arm/pr65647.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target arm_arch_v6m_ok } */ -/* { dg-options "-O3 -w -fpermissive" } */ +/* { dg-options "-O3 -w -fpermissive -std=gnu17" } */ /* { dg-add-options arm_arch_v6m } */ a, b, c, e, g = &e, h, i = 7, l = 1, m, n, o, q = &m, r, s = &r, u, w = 9, x, diff --git a/gcc/testsuite/gcc.target/arm/short-vfp-1.c b/gcc/testsuite/gcc.target/arm/short-vfp-1.c index 3ca1ffc..18d38a5 100644 --- a/gcc/testsuite/gcc.target/arm/short-vfp-1.c +++ b/gcc/testsuite/gcc.target/arm/short-vfp-1.c @@ -38,8 +38,8 @@ test_sihi (short x) return (int)x; } -/* {dg-final { scan-assembler-times {vcvt\.s32\.f32\ts[0-9]+,s[0-9]+} 2 }} */ -/* {dg-final { scan-assembler-times {vcvt\.f32\.s32\ts[0-9]+,s[0-9]+} 2 }} */ -/* {dg-final { scan-assembler-times {vmov\tr[0-9]+,s[0-9]+} 2 }} */ -/* {dg-final { scan-assembler-times {vmov\ts[0-9]+,r[0-9]+} 2 }} */ -/* {dg-final { scan-assembler-times {sxth\tr[0-9]+,r[0-9]+} 2 }} */ +/* { dg-final { scan-assembler-times {vcvt\.s32\.f32\ts[0-9]+,s[0-9]+} 2 } } */ +/* { dg-final { scan-assembler-times {vcvt\.f32\.s32\ts[0-9]+,s[0-9]+} 2 } } */ +/* { dg-final { scan-assembler-times {vmov\tr[0-9]+,s[0-9]+} 2 } } */ +/* { dg-final { scan-assembler-times {vmov\ts[0-9]+,r[0-9]+} 2 } } */ +/* { dg-final { scan-assembler-times {sxth\tr[0-9]+,r[0-9]+} 2 } } */ diff --git a/gcc/testsuite/gcc.target/arm/unaligned-memcpy-1.c b/gcc/testsuite/gcc.target/arm/unaligned-memcpy-1.c index c4f5640..0d883e3 100644 --- a/gcc/testsuite/gcc.target/arm/unaligned-memcpy-1.c +++ b/gcc/testsuite/gcc.target/arm/unaligned-memcpy-1.c @@ -1,19 +1,31 @@ -/* { dg-do compile } */ -/* { dg-require-effective-target arm_unaligned } */ -/* { dg-options "-O2" } */ +/* { dg-do run } */ +/* { dg-options "-O2 -save-temps" } */ #include <string.h> -void unknown_alignment (char *dest, char *src) +char src[17] __attribute__ ((aligned(8))) = "abcdefghijklmnopq"; +char result[17] __attribute__ ((aligned(8))) = {0}; + +void __attribute__ ((noinline,noclone)) +unknown_alignment (char *dest, char *src) { memcpy (dest, src, 15); } -/* We should see three unaligned word loads and store pairs, one unaligned - ldrh/strh pair, and an ldrb/strb pair. Sanity check that. */ +int main () +{ + int i; + unknown_alignment (result+1, src+2); + for (i = 0; i < 15; i++) + if (result[i+1] != src[i+2]) + __builtin_abort (); + if (result[16] != 0) + __builtin_abort (); + return 0; +} + +/* Check that we don't use any instructions that assume an aligned source. */ +/* { dg-final { scan-assembler-not {(ldm(ia)?\tr[0-9]|ldrd\t.*\[r[0-9]|vldr)} } } */ -/* { dg-final { scan-assembler-times "@ unaligned" 8 } } */ -/* { dg-final { scan-assembler-times "ldrh" 1 } } */ -/* { dg-final { scan-assembler-times "strh" 1 } } */ -/* { dg-final { scan-assembler-times "ldrb" 1 } } */ -/* { dg-final { scan-assembler-times "strb" 1 } } */ +/* Check that we don't use any instructions that assume an aligned dest. */ +/* { dg-final { scan-assembler-not {(stm(ia)?\tr[0-9]|strd\t.*\[r[0-9]|vstr)} } } */ diff --git a/gcc/testsuite/gcc.target/arm/unaligned-memcpy-2.c b/gcc/testsuite/gcc.target/arm/unaligned-memcpy-2.c index 1ad730d..0da0bcd 100644 --- a/gcc/testsuite/gcc.target/arm/unaligned-memcpy-2.c +++ b/gcc/testsuite/gcc.target/arm/unaligned-memcpy-2.c @@ -1,24 +1,27 @@ -/* { dg-do compile } */ -/* { dg-require-effective-target arm_unaligned } */ -/* { dg-options "-O2" } */ +/* { dg-do run } */ +/* { dg-options "-O2 -save-temps" } */ #include <string.h> -char dest[16] = { 0 }; +char dest[16] __attribute__((aligned(8))) = { 0 } ; +char input[17] __attribute__ ((aligned(8))) = "abcdefghijklmnop"; -void aligned_dest (char *src) +void __attribute__ ((noinline,noclone)) aligned_dest (char *src) { memcpy (dest, src, 15); } -/* Expect a multi-word store for the main part of the copy, but subword - loads/stores for the remainder. */ +int main () +{ + int i; + aligned_dest (input+1); + for (i = 0; i < 15; i++) + if (dest[i] != input[i+1]) + __builtin_abort (); + if (dest[15] != 0) + __builtin_abort (); + return 0; +} -/* { dg-final { scan-assembler-times "ldmia" 0 } } */ -/* { dg-final { scan-assembler-times "ldrd" 0 } } */ -/* { dg-final { scan-assembler-times "stmia" 1 { target { ! { arm_prefer_ldrd_strd } } } } } */ -/* { dg-final { scan-assembler-times "strd" 1 { target { arm_prefer_ldrd_strd } } } } */ -/* { dg-final { scan-assembler-times "ldrh" 1 } } */ -/* { dg-final { scan-assembler-times "strh" 1 } } */ -/* { dg-final { scan-assembler-times "ldrb" 1 } } */ -/* { dg-final { scan-assembler-times "strb" 1 } } */ +/* Check that we don't use any instructions that assume an aligned source. */ +/* { dg-final { scan-assembler-not {(ldm(ia)?\tr[0-9]|ldrd\t.*\[r[0-9]|vldr)} } } */ diff --git a/gcc/testsuite/gcc.target/arm/unaligned-memcpy-3.c b/gcc/testsuite/gcc.target/arm/unaligned-memcpy-3.c index d0b09bd..2cfe8b9 100644 --- a/gcc/testsuite/gcc.target/arm/unaligned-memcpy-3.c +++ b/gcc/testsuite/gcc.target/arm/unaligned-memcpy-3.c @@ -1,24 +1,27 @@ -/* { dg-do compile } */ -/* { dg-require-effective-target arm_unaligned } */ -/* { dg-options "-O2" } */ +/* { dg-do run } */ +/* { dg-options "-O2 -save-temps" } */ #include <string.h> -char src[16] = {0}; +char src[17] __attribute__ ((aligned(8))) = "abcdefghijklmnop"; +char result[17] __attribute__ ((aligned(8))) = {0}; -void aligned_src (char *dest) +void __attribute__ ((noinline,noclone)) aligned_src (char *dest) { memcpy (dest, src, 15); } -/* Expect a multi-word load for the main part of the copy, but subword - loads/stores for the remainder. */ +int main () +{ + int i; + aligned_src (result+1); + for (i = 0; i < 15; i++) + if (result[i+1] != src[i]) + __builtin_abort (); + if (result[16] != 0) + __builtin_abort (); + return 0; +} -/* { dg-final { scan-assembler-times "ldmia" 1 { target { ! { arm_prefer_ldrd_strd } } } } } */ -/* { dg-final { scan-assembler-times "ldrd" 1 { target { arm_prefer_ldrd_strd } } } } */ -/* { dg-final { scan-assembler-times "strd" 0 } } */ -/* { dg-final { scan-assembler-times "stm" 0 } } */ -/* { dg-final { scan-assembler-times "ldrh" 1 { target { ! { arm_prefer_ldrd_strd } } } } } */ -/* { dg-final { scan-assembler-times "strh" 1 } } */ -/* { dg-final { scan-assembler-times "ldrb" 1 { target { ! { arm_prefer_ldrd_strd } } } } } */ -/* { dg-final { scan-assembler-times "strb" 1 } } */ +/* Check that we don't use any instructions that assume an aligned dest. */ +/* { dg-final { scan-assembler-not {(stm(ia)?\tr[0-9]|strd\t.*\[r[0-9]|vstr)} } } */ diff --git a/gcc/testsuite/gcc.target/arm/unaligned-memcpy-4.c b/gcc/testsuite/gcc.target/arm/unaligned-memcpy-4.c index d236513..1c79f3b 100644 --- a/gcc/testsuite/gcc.target/arm/unaligned-memcpy-4.c +++ b/gcc/testsuite/gcc.target/arm/unaligned-memcpy-4.c @@ -1,22 +1,26 @@ -/* { dg-do compile } */ -/* { dg-require-effective-target arm_unaligned } */ -/* { dg-options "-O2" } */ +/* { dg-do run } */ +/* { dg-options "-O2 -save-temps" } */ #include <string.h> -char src[16] = { 0 }; -char dest[16] = { 0 }; +char src[16] __attribute__ ((aligned(8))) = "abcdefghijklmnop"; +char dest[16] __attribute__ ((aligned(8))) = { 0 }; -void aligned_both (void) +void __attribute__ ((noinline,noclone)) +aligned_both (void) { - memcpy (dest, src, 15); + memcpy (dest, src, 16); } -/* We know both src and dest to be aligned: expect multiword loads/stores. */ +int main () +{ + int i; + aligned_both (); + for (i = 0; i < 16; i++) + if (dest[i] != src[i]) + __builtin_abort (); + return 0; +} -/* { dg-final { scan-assembler-times "ldm" 1 { target { ! { arm_prefer_ldrd_strd } } } } } */ -/* { dg-final { scan-assembler-times "stmia" 1 { target { ! { arm_prefer_ldrd_strd } } } } } */ -/* { dg-final { scan-assembler "ldrd" { target { arm_prefer_ldrd_strd } } } } */ -/* { dg-final { scan-assembler-times "ldm" 0 { target { arm_prefer_ldrd_strd } } } } */ -/* { dg-final { scan-assembler "strd" { target { arm_prefer_ldrd_strd } } } } */ -/* { dg-final { scan-assembler-times "stm" 0 { target { arm_prefer_ldrd_strd } } } } */ +/* There should be no 'unaligned' comments. */ +/* { dg-final { scan-assembler-not "@ unaligned" } } */ diff --git a/gcc/testsuite/gcc.target/arm/vect-early-break-cbranch.c b/gcc/testsuite/gcc.target/arm/vect-early-break-cbranch.c index 4dc0edd..045f143 100644 --- a/gcc/testsuite/gcc.target/arm/vect-early-break-cbranch.c +++ b/gcc/testsuite/gcc.target/arm/vect-early-break-cbranch.c @@ -18,7 +18,7 @@ int b[N] = {0}; ** vmov r[0-9]+, s[0-9]+ @ int ** ( ** cmp r[0-9]+, #0 -** bne \.L[0-9]+ +** b(ne|eq) \.L[0-9]+ ** | ** cbn?z r[0-9]+, \.L.+ ** ) @@ -43,7 +43,7 @@ void f1 () ** vmov r[0-9]+, s[0-9]+ @ int ** ( ** cmp r[0-9]+, #0 -** bne \.L[0-9]+ +** b(ne|eq) \.L[0-9]+ ** | ** cbn?z r[0-9]+, \.L.+ ** ) @@ -68,7 +68,7 @@ void f2 () ** vmov r[0-9]+, s[0-9]+ @ int ** ( ** cmp r[0-9]+, #0 -** bne \.L[0-9]+ +** b(ne|eq) \.L[0-9]+ ** | ** cbn?z r[0-9]+, \.L.+ ** ) @@ -94,7 +94,7 @@ void f3 () ** vmov r[0-9]+, s[0-9]+ @ int ** ( ** cmp r[0-9]+, #0 -** bne \.L[0-9]+ +** b(ne|eq) \.L[0-9]+ ** | ** cbn?z r[0-9]+, \.L.+ ** ) @@ -119,7 +119,7 @@ void f4 () ** vmov r[0-9]+, s[0-9]+ @ int ** ( ** cmp r[0-9]+, #0 -** bne \.L[0-9]+ +** b(ne|eq) \.L[0-9]+ ** | ** cbn?z r[0-9]+, \.L.+ ** ) @@ -144,7 +144,7 @@ void f5 () ** vmov r[0-9]+, s[0-9]+ @ int ** ( ** cmp r[0-9]+, #0 -** bne \.L[0-9]+ +** b(ne|eq) \.L[0-9]+ ** | ** cbn?z r[0-9]+, \.L.+ ** ) diff --git a/gcc/testsuite/gcc.target/arm/vect-fmaxmin-2.c b/gcc/testsuite/gcc.target/arm/vect-fmaxmin-2.c new file mode 100644 index 0000000..57b0a3a --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/vect-fmaxmin-2.c @@ -0,0 +1,14 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target arm_arch_v8a_hard_ok } */ +/* { dg-options "-O2 -ftree-vectorize -funsafe-math-optimizations -fno-inline -save-temps" } */ +/* { dg-add-options arm_arch_v8a_hard } */ + +#include "fmaxmin.x" + +/* { dg-final { scan-assembler-times "vmaxnm.f32\tq\[0-9\]+, q\[0-9\]+, q\[0-9\]+" 1 } } */ +/* { dg-final { scan-assembler-times "vminnm.f32\tq\[0-9\]+, q\[0-9\]+, q\[0-9\]+" 1 } } */ + +/* NOTE: There are no double precision vector versions of vmaxnm/vminnm. */ +/* { dg-final { scan-assembler-times "vmaxnm.f64\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" 1 } } */ +/* { dg-final { scan-assembler-times "vminnm.f64\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" 1 } } */ + diff --git a/gcc/testsuite/gcc.target/arm/vect-fmaxmin.c b/gcc/testsuite/gcc.target/arm/vect-fmaxmin.c index ba45c4d..89dc14b 100644 --- a/gcc/testsuite/gcc.target/arm/vect-fmaxmin.c +++ b/gcc/testsuite/gcc.target/arm/vect-fmaxmin.c @@ -1,14 +1,6 @@ /* { dg-do run } */ /* { dg-require-effective-target arm_v8_neon_hw } */ -/* { dg-options "-O2 -ftree-vectorize -fno-inline -march=armv8-a -save-temps" } */ +/* { dg-options "-O2 -ftree-vectorize -fno-inline -funsafe-math-optimizations" } */ /* { dg-add-options arm_v8_neon } */ #include "fmaxmin.x" - -/* { dg-final { scan-assembler-times "vmaxnm.f32\tq\[0-9\]+, q\[0-9\]+, q\[0-9\]+" 1 } } */ -/* { dg-final { scan-assembler-times "vminnm.f32\tq\[0-9\]+, q\[0-9\]+, q\[0-9\]+" 1 } } */ - -/* NOTE: There are no double precision vector versions of vmaxnm/vminnm. */ -/* { dg-final { scan-assembler-times "vmaxnm.f64\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" 1 } } */ -/* { dg-final { scan-assembler-times "vminnm.f64\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" 1 } } */ - |