1 files changed, 314 insertions, 0 deletions
diff --git a/gcc/testsuite/g++.target/riscv/rvv/base/vaaddu_vv-2.C b/gcc/testsuite/g++.target/riscv/rvv/base/vaaddu_vv-2.C
new file mode 100644
index 0000000..d28213d
--- /dev/null
+++ b/gcc/testsuite/g++.target/riscv/rvv/base/vaaddu_vv-2.C
@@ -0,0 +1,314 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2" } */
+
+#include "riscv_vector.h"
+
+vuint8mf8_t test___riscv_vaaddu(vuint8mf8_t op1,vuint8mf8_t op2,size_t vl)
+{
+    return __riscv_vaaddu(op1,op2,31);
+}
+
+
+vuint8mf4_t test___riscv_vaaddu(vuint8mf4_t op1,vuint8mf4_t op2,size_t vl)
+{
+    return __riscv_vaaddu(op1,op2,31);
+}
+
+
+vuint8mf2_t test___riscv_vaaddu(vuint8mf2_t op1,vuint8mf2_t op2,size_t vl)
+{
+    return __riscv_vaaddu(op1,op2,31);
+}
+
+
+vuint8m1_t test___riscv_vaaddu(vuint8m1_t op1,vuint8m1_t op2,size_t vl)
+{
+    return __riscv_vaaddu(op1,op2,31);
+}
+
+
+vuint8m2_t test___riscv_vaaddu(vuint8m2_t op1,vuint8m2_t op2,size_t vl)
+{
+    return __riscv_vaaddu(op1,op2,31);
+}
+
+
+vuint8m4_t test___riscv_vaaddu(vuint8m4_t op1,vuint8m4_t op2,size_t vl)
+{
+    return __riscv_vaaddu(op1,op2,31);
+}
+
+
+vuint8m8_t test___riscv_vaaddu(vuint8m8_t op1,vuint8m8_t op2,size_t vl)
+{
+    return __riscv_vaaddu(op1,op2,31);
+}
+
+
+vuint16mf4_t test___riscv_vaaddu(vuint16mf4_t op1,vuint16mf4_t op2,size_t vl)
+{
+    return __riscv_vaaddu(op1,op2,31);
+}
+
+
+vuint16mf2_t test___riscv_vaaddu(vuint16mf2_t op1,vuint16mf2_t op2,size_t vl)
+{
+    return __riscv_vaaddu(op1,op2,31);
+}
+
+
+vuint16m1_t test___riscv_vaaddu(vuint16m1_t op1,vuint16m1_t op2,size_t vl)
+{
+    return __riscv_vaaddu(op1,op2,31);
+}
+
+
+vuint16m2_t test___riscv_vaaddu(vuint16m2_t op1,vuint16m2_t op2,size_t vl)
+{
+    return __riscv_vaaddu(op1,op2,31);
+}
+
+
+vuint16m4_t test___riscv_vaaddu(vuint16m4_t op1,vuint16m4_t op2,size_t vl)
+{
+    return __riscv_vaaddu(op1,op2,31);
+}
+
+
+vuint16m8_t test___riscv_vaaddu(vuint16m8_t op1,vuint16m8_t op2,size_t vl)
+{
+    return __riscv_vaaddu(op1,op2,31);
+}
+
+
+vuint32mf2_t test___riscv_vaaddu(vuint32mf2_t op1,vuint32mf2_t op2,size_t vl)
+{
+    return __riscv_vaaddu(op1,op2,31);
+}
+
+
+vuint32m1_t test___riscv_vaaddu(vuint32m1_t op1,vuint32m1_t op2,size_t vl)
+{
+    return __riscv_vaaddu(op1,op2,31);
+}
+
+
+vuint32m2_t test___riscv_vaaddu(vuint32m2_t op1,vuint32m2_t op2,size_t vl)
+{
+    return __riscv_vaaddu(op1,op2,31);
+}
+
+
+vuint32m4_t test___riscv_vaaddu(vuint32m4_t op1,vuint32m4_t op2,size_t vl)
+{
+    return __riscv_vaaddu(op1,op2,31);
+}
+
+
+vuint32m8_t test___riscv_vaaddu(vuint32m8_t op1,vuint32m8_t op2,size_t vl)
+{
+    return __riscv_vaaddu(op1,op2,31);
+}
+
+
+vuint64m1_t test___riscv_vaaddu(vuint64m1_t op1,vuint64m1_t op2,size_t vl)
+{
+    return __riscv_vaaddu(op1,op2,31);
+}
+
+
+vuint64m2_t test___riscv_vaaddu(vuint64m2_t op1,vuint64m2_t op2,size_t vl)
+{
+    return __riscv_vaaddu(op1,op2,31);
+}
+
+
+vuint64m4_t test___riscv_vaaddu(vuint64m4_t op1,vuint64m4_t op2,size_t vl)
+{
+    return __riscv_vaaddu(op1,op2,31);
+}
+
+
+vuint64m8_t test___riscv_vaaddu(vuint64m8_t op1,vuint64m8_t op2,size_t vl)
+{
+    return __riscv_vaaddu(op1,op2,31);
+}
+
+
+vuint8mf8_t test___riscv_vaaddu(vbool64_t mask,vuint8mf8_t op1,vuint8mf8_t op2,size_t vl)
+{
+    return __riscv_vaaddu(mask,op1,op2,31);
+}
+
+
+vuint8mf4_t test___riscv_vaaddu(vbool32_t mask,vuint8mf4_t op1,vuint8mf4_t op2,size_t vl)
+{
+    return __riscv_vaaddu(mask,op1,op2,31);
+}
+
+
+vuint8mf2_t test___riscv_vaaddu(vbool16_t mask,vuint8mf2_t op1,vuint8mf2_t op2,size_t vl)
+{
+    return __riscv_vaaddu(mask,op1,op2,31);
+}
+
+
+vuint8m1_t test___riscv_vaaddu(vbool8_t mask,vuint8m1_t op1,vuint8m1_t op2,size_t vl)
+{
+    return __riscv_vaaddu(mask,op1,op2,31);
+}
+
+
+vuint8m2_t test___riscv_vaaddu(vbool4_t mask,vuint8m2_t op1,vuint8m2_t op2,size_t vl)
+{
+    return __riscv_vaaddu(mask,op1,op2,31);
+}
+
+
+vuint8m4_t test___riscv_vaaddu(vbool2_t mask,vuint8m4_t op1,vuint8m4_t op2,size_t vl)
+{
+    return __riscv_vaaddu(mask,op1,op2,31);
+}
+
+
+vuint8m8_t test___riscv_vaaddu(vbool1_t mask,vuint8m8_t op1,vuint8m8_t op2,size_t vl)
+{
+    return __riscv_vaaddu(mask,op1,op2,31);
+}
+
+
+vuint16mf4_t test___riscv_vaaddu(vbool64_t mask,vuint16mf4_t op1,vuint16mf4_t op2,size_t vl)
+{
+    return __riscv_vaaddu(mask,op1,op2,31);
+}
+
+
+vuint16mf2_t test___riscv_vaaddu(vbool32_t mask,vuint16mf2_t op1,vuint16mf2_t op2,size_t vl)
+{
+    return __riscv_vaaddu(mask,op1,op2,31);
+}
+
+
+vuint16m1_t test___riscv_vaaddu(vbool16_t mask,vuint16m1_t op1,vuint16m1_t op2,size_t vl)
+{
+    return __riscv_vaaddu(mask,op1,op2,31);
+}
+
+
+vuint16m2_t test___riscv_vaaddu(vbool8_t mask,vuint16m2_t op1,vuint16m2_t op2,size_t vl)
+{
+    return __riscv_vaaddu(mask,op1,op2,31);
+}
+
+
+vuint16m4_t test___riscv_vaaddu(vbool4_t mask,vuint16m4_t op1,vuint16m4_t op2,size_t vl)
+{
+    return __riscv_vaaddu(mask,op1,op2,31);
+}
+
+
+vuint16m8_t test___riscv_vaaddu(vbool2_t mask,vuint16m8_t op1,vuint16m8_t op2,size_t vl)
+{
+    return __riscv_vaaddu(mask,op1,op2,31);
+}
+
+
+vuint32mf2_t test___riscv_vaaddu(vbool64_t mask,vuint32mf2_t op1,vuint32mf2_t op2,size_t vl)
+{
+    return __riscv_vaaddu(mask,op1,op2,31);
+}
+
+
+vuint32m1_t test___riscv_vaaddu(vbool32_t mask,vuint32m1_t op1,vuint32m1_t op2,size_t vl)
+{
+    return __riscv_vaaddu(mask,op1,op2,31);
+}
+
+
+vuint32m2_t test___riscv_vaaddu(vbool16_t mask,vuint32m2_t op1,vuint32m2_t op2,size_t vl)
+{
+    return __riscv_vaaddu(mask,op1,op2,31);
+}
+
+
+vuint32m4_t test___riscv_vaaddu(vbool8_t mask,vuint32m4_t op1,vuint32m4_t op2,size_t vl)
+{
+    return __riscv_vaaddu(mask,op1,op2,31);
+}
+
+
+vuint32m8_t test___riscv_vaaddu(vbool4_t mask,vuint32m8_t op1,vuint32m8_t op2,size_t vl)
+{
+    return __riscv_vaaddu(mask,op1,op2,31);
+}
+
+
+vuint64m1_t test___riscv_vaaddu(vbool64_t mask,vuint64m1_t op1,vuint64m1_t op2,size_t vl)
+{
+    return __riscv_vaaddu(mask,op1,op2,31);
+}
+
+
+vuint64m2_t test___riscv_vaaddu(vbool32_t mask,vuint64m2_t op1,vuint64m2_t op2,size_t vl)
+{
+    return __riscv_vaaddu(mask,op1,op2,31);
+}
+
+
+vuint64m4_t test___riscv_vaaddu(vbool16_t mask,vuint64m4_t op1,vuint64m4_t op2,size_t vl)
+{
+    return __riscv_vaaddu(mask,op1,op2,31);
+}
+
+
+vuint64m8_t test___riscv_vaaddu(vbool8_t mask,vuint64m8_t op1,vuint64m8_t op2,size_t vl)
+{
+    return __riscv_vaaddu(mask,op1,op2,31);
+}
+
+
+
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf8,\s*t[au],\s*m[au]\s+vaaddu\.vv\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 1 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf4,\s*t[au],\s*m[au]\s+vaaddu\.vv\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 1 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf2,\s*t[au],\s*m[au]\s+vaaddu\.vv\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 1 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*m1,\s*t[au],\s*m[au]\s+vaaddu\.vv\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 1 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*m2,\s*t[au],\s*m[au]\s+vaaddu\.vv\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 1 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*m4,\s*t[au],\s*m[au]\s+vaaddu\.vv\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 1 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*m8,\s*t[au],\s*m[au]\s+vaaddu\.vv\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 1 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*mf4,\s*t[au],\s*m[au]\s+vaaddu\.vv\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 1 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*mf2,\s*t[au],\s*m[au]\s+vaaddu\.vv\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 1 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m1,\s*t[au],\s*m[au]\s+vaaddu\.vv\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 1 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m2,\s*t[au],\s*m[au]\s+vaaddu\.vv\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 1 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m4,\s*t[au],\s*m[au]\s+vaaddu\.vv\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 1 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m8,\s*t[au],\s*m[au]\s+vaaddu\.vv\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 1 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*mf2,\s*t[au],\s*m[au]\s+vaaddu\.vv\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 1 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m1,\s*t[au],\s*m[au]\s+vaaddu\.vv\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 1 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m2,\s*t[au],\s*m[au]\s+vaaddu\.vv\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 1 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m4,\s*t[au],\s*m[au]\s+vaaddu\.vv\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 1 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m8,\s*t[au],\s*m[au]\s+vaaddu\.vv\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 1 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m1,\s*t[au],\s*m[au]\s+vaaddu\.vv\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 1 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m2,\s*t[au],\s*m[au]\s+vaaddu\.vv\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 1 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m4,\s*t[au],\s*m[au]\s+vaaddu\.vv\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 1 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m8,\s*t[au],\s*m[au]\s+vaaddu\.vv\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+\s+} 1 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf8,\s*t[au],\s*m[au]\s+vaaddu\.vv\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v0.t\s+} 1 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf4,\s*t[au],\s*m[au]\s+vaaddu\.vv\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v0.t\s+} 1 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf2,\s*t[au],\s*m[au]\s+vaaddu\.vv\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v0.t\s+} 1 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*m1,\s*t[au],\s*m[au]\s+vaaddu\.vv\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v0.t\s+} 1 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*m2,\s*t[au],\s*m[au]\s+vaaddu\.vv\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v0.t\s+} 1 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*m4,\s*t[au],\s*m[au]\s+vaaddu\.vv\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v0.t\s+} 1 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*m8,\s*t[au],\s*m[au]\s+vaaddu\.vv\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v0.t\s+} 1 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*mf4,\s*t[au],\s*m[au]\s+vaaddu\.vv\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v0.t\s+} 1 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*mf2,\s*t[au],\s*m[au]\s+vaaddu\.vv\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v0.t\s+} 1 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m1,\s*t[au],\s*m[au]\s+vaaddu\.vv\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v0.t\s+} 1 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m2,\s*t[au],\s*m[au]\s+vaaddu\.vv\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v0.t\s+} 1 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m4,\s*t[au],\s*m[au]\s+vaaddu\.vv\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v0.t\s+} 1 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m8,\s*t[au],\s*m[au]\s+vaaddu\.vv\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v0.t\s+} 1 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*mf2,\s*t[au],\s*m[au]\s+vaaddu\.vv\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v0.t\s+} 1 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m1,\s*t[au],\s*m[au]\s+vaaddu\.vv\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v0.t\s+} 1 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m2,\s*t[au],\s*m[au]\s+vaaddu\.vv\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v0.t\s+} 1 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m4,\s*t[au],\s*m[au]\s+vaaddu\.vv\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v0.t\s+} 1 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m8,\s*t[au],\s*m[au]\s+vaaddu\.vv\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v0.t\s+} 1 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m1,\s*t[au],\s*m[au]\s+vaaddu\.vv\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v0.t\s+} 1 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m2,\s*t[au],\s*m[au]\s+vaaddu\.vv\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v0.t\s+} 1 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m4,\s*t[au],\s*m[au]\s+vaaddu\.vv\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v0.t\s+} 1 } } */
+/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m8,\s*t[au],\s*m[au]\s+vaaddu\.vv\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v0.t\s+} 1 } } */