diff options
Diffstat (limited to 'gcc/doc')
| -rw-r--r-- | gcc/doc/invoke.texi | 44 |
1 files changed, 28 insertions, 16 deletions
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 6bd5128..9c64acb 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -659,7 +659,7 @@ Objective-C and Objective-C++ Dialects}. -ftree-phiprop -ftree-loop-distribution -ftree-loop-distribute-patterns -ftree-loop-ivcanon -ftree-loop-linear -ftree-loop-optimize -ftree-loop-vectorize --ftree-parallelize-loops=@var{n} -ftree-pre -ftree-partial-pre -ftree-pta +-ftree-parallelize-loops[=@var{n}] -ftree-pre -ftree-partial-pre -ftree-pta -ftree-reassoc -ftree-scev-cprop -ftree-sink -ftree-slsr -ftree-sra -ftree-switch-conversion -ftree-tail-merge -ftree-ter -ftree-vectorize -ftree-vrp -ftrivial-auto-var-init @@ -6296,16 +6296,16 @@ These are visible by pressing ``j'' and ``k'' to single-step forward and backward through events. Enabling this option will slow down HTML generation. -@item show-state-diagrams-dot-src=@r{[}yes@r{|}no@r{]} +@item show-graph-dot-src=@r{[}yes@r{|}no@r{]} This is a debugging feature and defaults to @code{no}. -If @code{show-state-diagrams-dot-src=yes} +If @code{show-graph-dot-src=yes} then if @code{show-state-diagrams=yes}, the generated state diagrams will also show the .dot source input to GraphViz used for the diagram. -@item show-state-diagrams-sarif=@r{[}yes@r{|}no@r{]} +@item show-graph-sarif=@r{[}yes@r{|}no@r{]} This is a debugging feature and defaults to @code{no}. -If @code{show-state-diagrams-sarif=yes} +If @code{show-graph-sarif=yes} then if @code{show-state-diagrams=yes}, the generated state diagrams will also show a SARIF representation of the state. @@ -14691,8 +14691,9 @@ variable merging and induction variable elimination) on trees. Enabled by default at @option{-O1} and higher. @opindex ftree-parallelize-loops -@item -ftree-parallelize-loops=n -Parallelize loops, i.e., split their iteration space to run in n threads. +@item -ftree-parallelize-loops +@itemx -ftree-parallelize-loops=@var{n} +Parallelize loops, i.e., split their iteration space to run in multiple threads. This is only possible for loops whose iterations are independent and can be arbitrarily reordered. The optimization is only profitable on multiprocessor machines, for loops that are CPU-intensive, @@ -14700,6 +14701,17 @@ rather than constrained e.g.@: by memory bandwidth. This option implies @option{-pthread}, and thus is only supported on targets that have support for @option{-pthread}. +When a positive value @var{n} is specified, the number of threads is fixed +at compile time and cannot be changed after compilation. The compiler +generates ``#pragma omp parallel num_threads(@var{n})''. + +When used without @code{=@var{n}} (i.e., @option{-ftree-parallelize-loops}), +the number of threads is determined at program execution time via the +@env{OMP_NUM_THREADS} environment variable. If @env{OMP_NUM_THREADS} is not +set, the OpenMP runtime automatically detects the number of available +processors and uses that value. This enables creating binaries that +adapt to different hardware configurations without recompilation. + @opindex ftree-pta @item -ftree-pta Perform function-local points-to analysis on trees. This flag is @@ -35143,13 +35155,14 @@ AVXIFMA, AVXVNNIINT8, AVXNECONVERT, CMPCCXADD, AVXVNNIINT16, SHA512, SM3 and SM4 instruction set support. @item pantherlake -Intel Panther Lake CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3, -SSSE3, SSE4.1, SSE4.2, POPCNT, AES, PREFETCHW, PCLMUL, RDRND, XSAVE, XSAVEC, -XSAVES, XSAVEOPT, FSGSBASE, PTWRITE, RDPID, SGX, GFNI-SSE, CLWB, MOVDIRI, -MOVDIR64B, WAITPKG, ADCX, AVX, AVX2, BMI, BMI2, F16C, FMA, LZCNT, PCONFIG, PKU, -VAES, VPCLMULQDQ, SERIALIZE, HRESET, AVX-VNNI, UINTR, AVXIFMA, AVXVNNIINT8, -AVXNECONVERT, CMPCCXADD, AVXVNNIINT16, SHA512, SM3, SM4 and PREFETCHI -instruction set support. +@itemx wildcatlake +Intel Panther Lake/Wildcat Lake CPU with 64-bit extensions, MOVBE, MMX, SSE, +SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, POPCNT, AES, PREFETCHW, PCLMUL, RDRND, +XSAVE, XSAVEC, XSAVES, XSAVEOPT, FSGSBASE, PTWRITE, RDPID, SGX, GFNI-SSE, +CLWB, MOVDIRI, MOVDIR64B, WAITPKG, ADCX, AVX, AVX2, BMI, BMI2, F16C, FMA, +LZCNT, PCONFIG, PKU, VAES, VPCLMULQDQ, SERIALIZE, HRESET, AVX-VNNI, UINTR, +AVXIFMA, AVXVNNIINT8, AVXNECONVERT, CMPCCXADD, AVXVNNIINT16, SHA512, SM3 and +SM4 instruction set support. @item sapphirerapids @itemx emeraldrapids @@ -35196,8 +35209,7 @@ MOVDIRI, MOVDIR64B, ENQCMD, CLDEMOTE, PTWRITE, WAITPKG, SERIALIZE, TSXLDTRK, UINTR, AMX-BF16, AMX-TILE, AMX-INT8, AVX-VNNI, AVX512FP16, AVX512BF16, AMX-FP16, PREFETCHI, AMX-COMPLEX, AVX10.1-512, AVX-IFMA, AVX-NE-CONVERT, AVX-VNNI-INT16, AVX-VNNI-INT8, CMPccXADD, SHA512, SM3, SM4, AVX10.2-512, APX_F, AMX-AVX512, -AMX-FP8, AMX-TF32, AMX-TRANSPOSE, MOVRS, AMX-MOVRS and USER_MSR instruction set -support. +AMX-FP8, AMX-TF32, MOVRS and AMX-MOVRS instruction set support. @item bonnell @itemx atom |