diff options
Diffstat (limited to 'gcc/doc/md.texi')
| -rw-r--r-- | gcc/doc/md.texi | 15 |
1 files changed, 6 insertions, 9 deletions
diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi index ae7a601..2a1f991 100644 --- a/gcc/doc/md.texi +++ b/gcc/doc/md.texi @@ -2171,12 +2171,6 @@ VFP floating-point registers @code{d0}-@code{d31} and the appropriate subset @code{d0}-@code{d15} based on command line options. Used for 64 bit values only. Not valid for Thumb1. -@item y -The iWMMX co-processor registers. - -@item z -The iWMMX GR registers. - @item G The floating-point constant 0.0 @@ -2210,9 +2204,6 @@ A symbol in the text segment of the current file @item Uv A memory reference suitable for VFP load/store insns (reg+constant offset) -@item Uy -A memory reference suitable for iWMMXt load/store instructions. - @item Uq A memory reference suitable for the ARMv4 ldrsb instruction. @end table @@ -2927,6 +2918,9 @@ A signed 16-bit constant. A memory operand whose address is formed by a base register and offset that is suitable for use in instructions with the same addressing mode as @code{st.w} and @code{ld.w}. +@item q +A general-purpose register except for $r0 and $r1 (for the csrxchg +instruction) @item I A signed 12-bit constant (for arithmetic instructions). @item K @@ -3703,6 +3697,9 @@ RVC general purpose register (x8-x15). RVC floating-point registers (f8-f15), if available, reuse GPR as FPR when use zfinx. +@item cR +Even-odd RVC general purpose register pair. + @item R Even-odd general purpose register pair. |