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Diffstat (limited to 'gcc/config/sparc')
-rw-r--r--gcc/config/sparc/sparc.cc15
-rw-r--r--gcc/config/sparc/sparc.md87
2 files changed, 52 insertions, 50 deletions
diff --git a/gcc/config/sparc/sparc.cc b/gcc/config/sparc/sparc.cc
index 2196a0c..ffd1fb9 100644
--- a/gcc/config/sparc/sparc.cc
+++ b/gcc/config/sparc/sparc.cc
@@ -4762,8 +4762,7 @@ sparc_legitimize_tls_address (rtx addr)
addr, const1_rtx));
use_reg (&CALL_INSN_FUNCTION_USAGE (insn), o0);
RTL_CONST_CALL_P (insn) = 1;
- insn = get_insns ();
- end_sequence ();
+ insn = end_sequence ();
emit_libcall_block (insn, ret, o0, addr);
break;
@@ -4782,8 +4781,7 @@ sparc_legitimize_tls_address (rtx addr)
const1_rtx));
use_reg (&CALL_INSN_FUNCTION_USAGE (insn), o0);
RTL_CONST_CALL_P (insn) = 1;
- insn = get_insns ();
- end_sequence ();
+ insn = end_sequence ();
/* Attach a unique REG_EQUAL, to allow the RTL optimizers to
share the LD_BASE result with other LD model accesses. */
emit_libcall_block (insn, temp3, o0,
@@ -12530,8 +12528,7 @@ sparc_output_mi_thunk (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED,
if (!TARGET_VXWORKS_RTP)
pic_offset_table_rtx = got_register_rtx;
scratch = sparc_legitimize_pic_address (funexp, scratch);
- seq = get_insns ();
- end_sequence ();
+ seq = end_sequence ();
emit_and_preserve (seq, spill_reg, pic_offset_table_rtx);
}
else if (TARGET_ARCH32)
@@ -12557,8 +12554,7 @@ sparc_output_mi_thunk (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED,
spill_reg = gen_rtx_REG (DImode, 15); /* %o7 */
start_sequence ();
sparc_emit_set_symbolic_const64 (scratch, funexp, spill_reg);
- seq = get_insns ();
- end_sequence ();
+ seq = end_sequence ();
emit_and_preserve (seq, spill_reg, 0);
break;
@@ -13242,8 +13238,7 @@ sparc_init_pic_reg (void)
load_got_register ();
if (!TARGET_VXWORKS_RTP)
emit_move_insn (pic_offset_table_rtx, got_register_rtx);
- seq = get_insns ();
- end_sequence ();
+ seq = end_sequence ();
entry_edge = single_succ_edge (ENTRY_BLOCK_PTR_FOR_FN (cfun));
insert_insn_on_edge (seq, entry_edge);
diff --git a/gcc/config/sparc/sparc.md b/gcc/config/sparc/sparc.md
index 4d46cfd..c6e06b4 100644
--- a/gcc/config/sparc/sparc.md
+++ b/gcc/config/sparc/sparc.md
@@ -3014,17 +3014,18 @@
rtx shift_16 = GEN_INT (16);
int op1_subbyte = 0;
- if (GET_CODE (operand1) == SUBREG)
+ if (GET_CODE (operands[1]) == SUBREG)
{
- op1_subbyte = SUBREG_BYTE (operand1);
+ op1_subbyte = SUBREG_BYTE (operands[1]);
op1_subbyte /= GET_MODE_SIZE (SImode);
op1_subbyte *= GET_MODE_SIZE (SImode);
- operand1 = XEXP (operand1, 0);
+ operands[1] = XEXP (operands[1], 0);
}
- emit_insn (gen_ashlsi3 (temp, gen_rtx_SUBREG (SImode, operand1, op1_subbyte),
+ emit_insn (gen_ashlsi3 (temp, gen_rtx_SUBREG (SImode, operands[1],
+ op1_subbyte),
shift_16));
- emit_insn (gen_lshrsi3 (operand0, temp, shift_16));
+ emit_insn (gen_lshrsi3 (operands[0], temp, shift_16));
DONE;
})
@@ -3097,17 +3098,18 @@
rtx shift_48 = GEN_INT (48);
int op1_subbyte = 0;
- if (GET_CODE (operand1) == SUBREG)
+ if (GET_CODE (operands[1]) == SUBREG)
{
- op1_subbyte = SUBREG_BYTE (operand1);
+ op1_subbyte = SUBREG_BYTE (operands[1]);
op1_subbyte /= GET_MODE_SIZE (DImode);
op1_subbyte *= GET_MODE_SIZE (DImode);
- operand1 = XEXP (operand1, 0);
+ operands[1] = XEXP (operands[1], 0);
}
- emit_insn (gen_ashldi3 (temp, gen_rtx_SUBREG (DImode, operand1, op1_subbyte),
+ emit_insn (gen_ashldi3 (temp, gen_rtx_SUBREG (DImode, operands[1],
+ op1_subbyte),
shift_48));
- emit_insn (gen_lshrdi3 (operand0, temp, shift_48));
+ emit_insn (gen_lshrdi3 (operands[0], temp, shift_48));
DONE;
})
@@ -3283,17 +3285,18 @@
rtx shift_16 = GEN_INT (16);
int op1_subbyte = 0;
- if (GET_CODE (operand1) == SUBREG)
+ if (GET_CODE (operands[1]) == SUBREG)
{
- op1_subbyte = SUBREG_BYTE (operand1);
+ op1_subbyte = SUBREG_BYTE (operands[1]);
op1_subbyte /= GET_MODE_SIZE (SImode);
op1_subbyte *= GET_MODE_SIZE (SImode);
- operand1 = XEXP (operand1, 0);
+ operands[1] = XEXP (operands[1], 0);
}
- emit_insn (gen_ashlsi3 (temp, gen_rtx_SUBREG (SImode, operand1, op1_subbyte),
+ emit_insn (gen_ashlsi3 (temp, gen_rtx_SUBREG (SImode, operands[1],
+ op1_subbyte),
shift_16));
- emit_insn (gen_ashrsi3 (operand0, temp, shift_16));
+ emit_insn (gen_ashrsi3 (operands[0], temp, shift_16));
DONE;
})
@@ -3315,25 +3318,26 @@
int op1_subbyte = 0;
int op0_subbyte = 0;
- if (GET_CODE (operand1) == SUBREG)
+ if (GET_CODE (operands[1]) == SUBREG)
{
- op1_subbyte = SUBREG_BYTE (operand1);
+ op1_subbyte = SUBREG_BYTE (operands[1]);
op1_subbyte /= GET_MODE_SIZE (SImode);
op1_subbyte *= GET_MODE_SIZE (SImode);
- operand1 = XEXP (operand1, 0);
+ operands[1] = XEXP (operands[1], 0);
}
- if (GET_CODE (operand0) == SUBREG)
+ if (GET_CODE (operands[0]) == SUBREG)
{
- op0_subbyte = SUBREG_BYTE (operand0);
+ op0_subbyte = SUBREG_BYTE (operands[0]);
op0_subbyte /= GET_MODE_SIZE (SImode);
op0_subbyte *= GET_MODE_SIZE (SImode);
- operand0 = XEXP (operand0, 0);
+ operands[0] = XEXP (operands[0], 0);
}
- emit_insn (gen_ashlsi3 (temp, gen_rtx_SUBREG (SImode, operand1, op1_subbyte),
+ emit_insn (gen_ashlsi3 (temp, gen_rtx_SUBREG (SImode, operands[1],
+ op1_subbyte),
shift_24));
- if (GET_MODE (operand0) != SImode)
- operand0 = gen_rtx_SUBREG (SImode, operand0, op0_subbyte);
- emit_insn (gen_ashrsi3 (operand0, temp, shift_24));
+ if (GET_MODE (operands[0]) != SImode)
+ operands[0] = gen_rtx_SUBREG (SImode, operands[0], op0_subbyte);
+ emit_insn (gen_ashrsi3 (operands[0], temp, shift_24));
DONE;
})
@@ -3354,17 +3358,18 @@
rtx shift_24 = GEN_INT (24);
int op1_subbyte = 0;
- if (GET_CODE (operand1) == SUBREG)
+ if (GET_CODE (operands[1]) == SUBREG)
{
- op1_subbyte = SUBREG_BYTE (operand1);
+ op1_subbyte = SUBREG_BYTE (operands[1]);
op1_subbyte /= GET_MODE_SIZE (SImode);
op1_subbyte *= GET_MODE_SIZE (SImode);
- operand1 = XEXP (operand1, 0);
+ operands[1] = XEXP (operands[1], 0);
}
- emit_insn (gen_ashlsi3 (temp, gen_rtx_SUBREG (SImode, operand1, op1_subbyte),
+ emit_insn (gen_ashlsi3 (temp, gen_rtx_SUBREG (SImode, operands[1],
+ op1_subbyte),
shift_24));
- emit_insn (gen_ashrsi3 (operand0, temp, shift_24));
+ emit_insn (gen_ashrsi3 (operands[0], temp, shift_24));
DONE;
})
@@ -3385,17 +3390,18 @@
rtx shift_56 = GEN_INT (56);
int op1_subbyte = 0;
- if (GET_CODE (operand1) == SUBREG)
+ if (GET_CODE (operands[1]) == SUBREG)
{
- op1_subbyte = SUBREG_BYTE (operand1);
+ op1_subbyte = SUBREG_BYTE (operands[1]);
op1_subbyte /= GET_MODE_SIZE (DImode);
op1_subbyte *= GET_MODE_SIZE (DImode);
- operand1 = XEXP (operand1, 0);
+ operands[1] = XEXP (operands[1], 0);
}
- emit_insn (gen_ashldi3 (temp, gen_rtx_SUBREG (DImode, operand1, op1_subbyte),
+ emit_insn (gen_ashldi3 (temp, gen_rtx_SUBREG (DImode, operands[1],
+ op1_subbyte),
shift_56));
- emit_insn (gen_ashrdi3 (operand0, temp, shift_56));
+ emit_insn (gen_ashrdi3 (operands[0], temp, shift_56));
DONE;
})
@@ -3416,17 +3422,18 @@
rtx shift_48 = GEN_INT (48);
int op1_subbyte = 0;
- if (GET_CODE (operand1) == SUBREG)
+ if (GET_CODE (operands[1]) == SUBREG)
{
- op1_subbyte = SUBREG_BYTE (operand1);
+ op1_subbyte = SUBREG_BYTE (operands[1]);
op1_subbyte /= GET_MODE_SIZE (DImode);
op1_subbyte *= GET_MODE_SIZE (DImode);
- operand1 = XEXP (operand1, 0);
+ operands[1] = XEXP (operands[1], 0);
}
- emit_insn (gen_ashldi3 (temp, gen_rtx_SUBREG (DImode, operand1, op1_subbyte),
+ emit_insn (gen_ashldi3 (temp, gen_rtx_SUBREG (DImode, operands[1],
+ op1_subbyte),
shift_48));
- emit_insn (gen_ashrdi3 (operand0, temp, shift_48));
+ emit_insn (gen_ashrdi3 (operands[0], temp, shift_48));
DONE;
})
generated by cgit v1.1 at 2025-07-03 03:45:18 +0000