diff options
Diffstat (limited to 'gcc/config/rs6000/rs6000.md')
| -rw-r--r-- | gcc/config/rs6000/rs6000.md | 50 |
1 files changed, 24 insertions, 26 deletions
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 6efc113..0a5a652 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -4938,13 +4938,11 @@ (match_operator 1 "scc_comparison_operator" [(match_operand:CC 4 "cc_reg_operand" "y,y") (const_int 0)]) - (match_operand:GPR 2 "reg_or_cint_operand" "O,b") + (match_operand:GPR 2 "reg_or_zero_operand" "O,b") (match_operand:GPR 3 "gpc_reg_operand" "r,r")))] "TARGET_ISEL<sel>" - "* -{ return output_isel (operands); }" - [(set_attr "type" "isel") - (set_attr "length" "4")]) + "isel %0,%2,%3,%j1" + [(set_attr "type" "isel")]) (define_insn "isel_unsigned_<mode>" [(set (match_operand:GPR 0 "gpc_reg_operand" "=r,r") @@ -4952,45 +4950,45 @@ (match_operator 1 "scc_comparison_operator" [(match_operand:CCUNS 4 "cc_reg_operand" "y,y") (const_int 0)]) - (match_operand:GPR 2 "reg_or_cint_operand" "O,b") + (match_operand:GPR 2 "reg_or_zero_operand" "O,b") (match_operand:GPR 3 "gpc_reg_operand" "r,r")))] "TARGET_ISEL<sel>" - "* -{ return output_isel (operands); }" - [(set_attr "type" "isel") - (set_attr "length" "4")]) + "isel %0,%2,%3,%j1" + [(set_attr "type" "isel")]) ;; These patterns can be useful for combine; they let combine know that ;; isel can handle reversed comparisons so long as the operands are ;; registers. (define_insn "*isel_reversed_signed_<mode>" - [(set (match_operand:GPR 0 "gpc_reg_operand" "=r") + [(set (match_operand:GPR 0 "gpc_reg_operand" "=r,r") (if_then_else:GPR (match_operator 1 "scc_rev_comparison_operator" - [(match_operand:CC 4 "cc_reg_operand" "y") + [(match_operand:CC 4 "cc_reg_operand" "y,y") (const_int 0)]) - (match_operand:GPR 2 "gpc_reg_operand" "b") - (match_operand:GPR 3 "gpc_reg_operand" "b")))] + (match_operand:GPR 2 "gpc_reg_operand" "r,r") + (match_operand:GPR 3 "reg_or_zero_operand" "O,b")))] "TARGET_ISEL<sel>" - "* -{ return output_isel (operands); }" - [(set_attr "type" "isel") - (set_attr "length" "4")]) +{ + PUT_CODE (operands[1], reverse_condition (GET_CODE (operands[1]))); + return "isel %0,%3,%2,%j1"; +} + [(set_attr "type" "isel")]) (define_insn "*isel_reversed_unsigned_<mode>" - [(set (match_operand:GPR 0 "gpc_reg_operand" "=r") + [(set (match_operand:GPR 0 "gpc_reg_operand" "=r,r") (if_then_else:GPR (match_operator 1 "scc_rev_comparison_operator" - [(match_operand:CCUNS 4 "cc_reg_operand" "y") + [(match_operand:CCUNS 4 "cc_reg_operand" "y,y") (const_int 0)]) - (match_operand:GPR 2 "gpc_reg_operand" "b") - (match_operand:GPR 3 "gpc_reg_operand" "b")))] + (match_operand:GPR 2 "gpc_reg_operand" "r,r") + (match_operand:GPR 3 "reg_or_zero_operand" "O,b")))] "TARGET_ISEL<sel>" - "* -{ return output_isel (operands); }" - [(set_attr "type" "isel") - (set_attr "length" "4")]) +{ + PUT_CODE (operands[1], reverse_condition (GET_CODE (operands[1]))); + return "isel %0,%3,%2,%j1"; +} + [(set_attr "type" "isel")]) ;; Floating point conditional move (define_expand "mov<mode>cc" |