diff options
Diffstat (limited to 'gcc/config/rs6000/rs6000.h')
| -rw-r--r-- | gcc/config/rs6000/rs6000.h | 30 |
1 files changed, 23 insertions, 7 deletions
diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h index 1edb097..c9856d1 100644 --- a/gcc/config/rs6000/rs6000.h +++ b/gcc/config/rs6000/rs6000.h @@ -75,6 +75,7 @@ %{mcpu=power5: -mpower4} \ %{mcpu=power5+: -mpower4} \ %{mcpu=power6: -mpower4 -maltivec} \ +%{mcpu=power6x: -mpower4 -maltivec} \ %{mcpu=powerpc: -mppc} \ %{mcpu=rios: -mpwr} \ %{mcpu=rios1: -mpwr} \ @@ -162,6 +163,14 @@ #define TARGET_FPRND 0 #endif +/* Define TARGET_MFPGPR if the target assembler does not support the + mffpr and mftgpr instructions. */ + +#ifndef HAVE_AS_MFPGPR +#undef TARGET_MFPGPR +#define TARGET_MFPGPR 0 +#endif + #ifndef TARGET_SECURE_PLT #define TARGET_SECURE_PLT 0 #endif @@ -212,7 +221,8 @@ enum processor_type PROCESSOR_PPC7450, PROCESSOR_PPC8540, PROCESSOR_POWER4, - PROCESSOR_POWER5 + PROCESSOR_POWER5, + PROCESSOR_POWER6 }; extern enum processor_type rs6000_cpu; @@ -1109,12 +1119,18 @@ enum reg_class rs6000_secondary_reload_class (CLASS, MODE, IN) /* If we are copying between FP or AltiVec registers and anything - else, we need a memory location. */ - -#define SECONDARY_MEMORY_NEEDED(CLASS1,CLASS2,MODE) \ - ((CLASS1) != (CLASS2) && ((CLASS1) == FLOAT_REGS \ - || (CLASS2) == FLOAT_REGS \ - || (CLASS1) == ALTIVEC_REGS \ + else, we need a memory location. The exception is when we are + targeting ppc64 and the move to/from fpr to gpr instructions + are available.*/ + +#define SECONDARY_MEMORY_NEEDED(CLASS1,CLASS2,MODE) \ + ((CLASS1) != (CLASS2) && (((CLASS1) == FLOAT_REGS \ + && (!TARGET_MFPGPR || !TARGET_POWERPC64 \ + || ((MODE != DFmode) && (MODE != DImode)))) \ + || ((CLASS2) == FLOAT_REGS \ + && (!TARGET_MFPGPR || !TARGET_POWERPC64 \ + || ((MODE != DFmode) && (MODE != DImode)))) \ + || (CLASS1) == ALTIVEC_REGS \ || (CLASS2) == ALTIVEC_REGS)) /* Return the maximum number of consecutive registers |