diff options
Diffstat (limited to 'gcc/config/mips/loongson2ef.md')
| -rw-r--r-- | gcc/config/mips/loongson2ef.md | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/gcc/config/mips/loongson2ef.md b/gcc/config/mips/loongson2ef.md index 8d29482..df3de33 100644 --- a/gcc/config/mips/loongson2ef.md +++ b/gcc/config/mips/loongson2ef.md @@ -160,14 +160,14 @@ ;; Reservation for integer multiplication instructions. (define_insn_reservation "ls2_imult" 5 (and (eq_attr "cpu" "loongson_2e,loongson_2f") - (eq_attr "type" "imul,imul3")) + (eq_attr "type" "imul,imul3nc")) "ls2_alu2,ls2_alu2_core") ;; Reservation for integer division / remainder instructions. ;; These instructions use the SRT algorithm and hence take 2-38 cycles. (define_insn_reservation "ls2_idiv" 20 (and (eq_attr "cpu" "loongson_2e,loongson_2f") - (eq_attr "type" "idiv")) + (eq_attr "type" "idiv,idiv3")) "ls2_alu2,ls2_alu2_core*18") ;; Reservation for memory load instructions. @@ -176,6 +176,11 @@ (eq_attr "type" "load,fpload,mfc,mtc")) "ls2_mem") +(define_insn_reservation "ls2_prefetch" 0 + (and (eq_attr "cpu" "loongson_2e,loongson_2f") + (eq_attr "type" "prefetch,prefetchx")) + "ls2_mem") + ;; Reservation for memory store instructions. ;; With stores we assume they don't alias with dependent loads. ;; Therefore we set the latency to zero. |