diff options
Diffstat (limited to 'gcc/config/loongarch/loongarch-builtins.cc')
-rw-r--r-- | gcc/config/loongarch/loongarch-builtins.cc | 32 |
1 files changed, 16 insertions, 16 deletions
diff --git a/gcc/config/loongarch/loongarch-builtins.cc b/gcc/config/loongarch/loongarch-builtins.cc index cbd833a..a6fcc1c 100644 --- a/gcc/config/loongarch/loongarch-builtins.cc +++ b/gcc/config/loongarch/loongarch-builtins.cc @@ -319,6 +319,14 @@ AVAIL_ALL (lasx, ISA_HAS_LASX) #define CODE_FOR_lsx_vmod_hu CODE_FOR_umodv8hi3 #define CODE_FOR_lsx_vmod_wu CODE_FOR_umodv4si3 #define CODE_FOR_lsx_vmod_du CODE_FOR_umodv2di3 +#define CODE_FOR_lsx_vmuh_b CODE_FOR_smulv16qi3_highpart +#define CODE_FOR_lsx_vmuh_h CODE_FOR_smulv8hi3_highpart +#define CODE_FOR_lsx_vmuh_w CODE_FOR_smulv4si3_highpart +#define CODE_FOR_lsx_vmuh_d CODE_FOR_smulv2di3_highpart +#define CODE_FOR_lsx_vmuh_bu CODE_FOR_umulv16qi3_highpart +#define CODE_FOR_lsx_vmuh_hu CODE_FOR_umulv8hi3_highpart +#define CODE_FOR_lsx_vmuh_wu CODE_FOR_umulv4si3_highpart +#define CODE_FOR_lsx_vmuh_du CODE_FOR_umulv2di3_highpart #define CODE_FOR_lsx_vmul_b CODE_FOR_mulv16qi3 #define CODE_FOR_lsx_vmul_h CODE_FOR_mulv8hi3 #define CODE_FOR_lsx_vmul_w CODE_FOR_mulv4si3 @@ -439,14 +447,6 @@ AVAIL_ALL (lasx, ISA_HAS_LASX) #define CODE_FOR_lsx_vfnmsub_s CODE_FOR_vfnmsubv4sf4_nmsub4 #define CODE_FOR_lsx_vfnmsub_d CODE_FOR_vfnmsubv2df4_nmsub4 -#define CODE_FOR_lsx_vmuh_b CODE_FOR_lsx_vmuh_s_b -#define CODE_FOR_lsx_vmuh_h CODE_FOR_lsx_vmuh_s_h -#define CODE_FOR_lsx_vmuh_w CODE_FOR_lsx_vmuh_s_w -#define CODE_FOR_lsx_vmuh_d CODE_FOR_lsx_vmuh_s_d -#define CODE_FOR_lsx_vmuh_bu CODE_FOR_lsx_vmuh_u_bu -#define CODE_FOR_lsx_vmuh_hu CODE_FOR_lsx_vmuh_u_hu -#define CODE_FOR_lsx_vmuh_wu CODE_FOR_lsx_vmuh_u_wu -#define CODE_FOR_lsx_vmuh_du CODE_FOR_lsx_vmuh_u_du #define CODE_FOR_lsx_vsllwil_h_b CODE_FOR_lsx_vsllwil_s_h_b #define CODE_FOR_lsx_vsllwil_w_h CODE_FOR_lsx_vsllwil_s_w_h #define CODE_FOR_lsx_vsllwil_d_w CODE_FOR_lsx_vsllwil_s_d_w @@ -588,6 +588,14 @@ AVAIL_ALL (lasx, ISA_HAS_LASX) #define CODE_FOR_lasx_xvmul_h CODE_FOR_mulv16hi3 #define CODE_FOR_lasx_xvmul_w CODE_FOR_mulv8si3 #define CODE_FOR_lasx_xvmul_d CODE_FOR_mulv4di3 +#define CODE_FOR_lasx_xvmuh_b CODE_FOR_smulv32qi3_highpart +#define CODE_FOR_lasx_xvmuh_h CODE_FOR_smulv16hi3_highpart +#define CODE_FOR_lasx_xvmuh_w CODE_FOR_smulv8si3_highpart +#define CODE_FOR_lasx_xvmuh_d CODE_FOR_smulv4di3_highpart +#define CODE_FOR_lasx_xvmuh_bu CODE_FOR_umulv32qi3_highpart +#define CODE_FOR_lasx_xvmuh_hu CODE_FOR_umulv16hi3_highpart +#define CODE_FOR_lasx_xvmuh_wu CODE_FOR_umulv8si3_highpart +#define CODE_FOR_lasx_xvmuh_du CODE_FOR_umulv4di3_highpart #define CODE_FOR_lasx_xvclz_b CODE_FOR_clzv32qi2 #define CODE_FOR_lasx_xvclz_h CODE_FOR_clzv16hi2 #define CODE_FOR_lasx_xvclz_w CODE_FOR_clzv8si2 @@ -697,14 +705,6 @@ AVAIL_ALL (lasx, ISA_HAS_LASX) #define CODE_FOR_lasx_xvavgr_hu CODE_FOR_lasx_xvavgr_u_hu #define CODE_FOR_lasx_xvavgr_wu CODE_FOR_lasx_xvavgr_u_wu #define CODE_FOR_lasx_xvavgr_du CODE_FOR_lasx_xvavgr_u_du -#define CODE_FOR_lasx_xvmuh_b CODE_FOR_lasx_xvmuh_s_b -#define CODE_FOR_lasx_xvmuh_h CODE_FOR_lasx_xvmuh_s_h -#define CODE_FOR_lasx_xvmuh_w CODE_FOR_lasx_xvmuh_s_w -#define CODE_FOR_lasx_xvmuh_d CODE_FOR_lasx_xvmuh_s_d -#define CODE_FOR_lasx_xvmuh_bu CODE_FOR_lasx_xvmuh_u_bu -#define CODE_FOR_lasx_xvmuh_hu CODE_FOR_lasx_xvmuh_u_hu -#define CODE_FOR_lasx_xvmuh_wu CODE_FOR_lasx_xvmuh_u_wu -#define CODE_FOR_lasx_xvmuh_du CODE_FOR_lasx_xvmuh_u_du #define CODE_FOR_lasx_xvssran_b_h CODE_FOR_lasx_xvssran_s_b_h #define CODE_FOR_lasx_xvssran_h_w CODE_FOR_lasx_xvssran_s_h_w #define CODE_FOR_lasx_xvssran_w_d CODE_FOR_lasx_xvssran_s_w_d |