3 files changed, 28 insertions, 8 deletions
diff --git a/gcc/config/i386/i386-features.c b/gcc/config/i386/i386-features.c
index 14f816f..43bb676 100644
--- a/gcc/config/i386/i386-features.c
+++ b/gcc/config/i386/i386-features.c
@@ -2258,15 +2258,22 @@ remove_partial_avx_dependency (void)
 
 	  rtx zero;
 	  machine_mode dest_vecmode;
-	  if (dest_mode == E_SFmode)
+	  switch (dest_mode)
 	    {
+	    case E_HFmode:
+	      dest_vecmode = V8HFmode;
+	      zero = gen_rtx_SUBREG (V8HFmode, v4sf_const0, 0);
+	      break;
+	    case E_SFmode:
 	      dest_vecmode = V4SFmode;
 	      zero = v4sf_const0;
-	    }
-	  else
-	    {
+	      break;
+	    case E_DFmode:
 	      dest_vecmode = V2DFmode;
 	      zero = gen_rtx_SUBREG (V2DFmode, v4sf_const0, 0);
+	      break;
+	    default:
+	      gcc_unreachable ();
 	    }
 
 	  /* Change source to vector mode.  */
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 188f431..ae1a81c 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -17041,6 +17041,19 @@
   DONE;
 })
 
+(define_insn "sqrthf2"
+  [(set (match_operand:HF 0 "register_operand" "=v,v")
+	(sqrt:HF
+	  (match_operand:HF 1 "nonimmediate_operand" "v,m")))]
+  "TARGET_AVX512FP16"
+  "@
+   vsqrtsh\t{%d1, %0|%0, %d1}
+   vsqrtsh\t{%1, %d0|%d0, %1}"
+  [(set_attr "type" "sse")
+   (set_attr "prefix" "evex")
+   (set_attr "avx_partial_xmm_update" "false,true")
+   (set_attr "mode" "HF")])
+
 (define_insn "*sqrt<mode>2_sse"
   [(set (match_operand:MODEF 0 "register_operand" "=v,v,v")
 	(sqrt:MODEF
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index b08a9d3..e8aef0d 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -2522,12 +2522,12 @@
    (set_attr "mode" "<ssescalarmode>")])
 
 (define_insn "*<sse>_vmsqrt<mode>2<mask_scalar_name><round_scalar_name>"
-  [(set (match_operand:VF_128 0 "register_operand" "=x,v")
-	(vec_merge:VF_128
-	  (vec_duplicate:VF_128
+  [(set (match_operand:VFH_128 0 "register_operand" "=x,v")
+	(vec_merge:VFH_128
+	  (vec_duplicate:VFH_128
 	    (sqrt:<ssescalarmode>
 	      (match_operand:<ssescalarmode> 1 "nonimmediate_operand" "xm,<round_scalar_constraint>")))
-	  (match_operand:VF_128 2 "register_operand" "0,v")
+	  (match_operand:VFH_128 2 "register_operand" "0,v")
 	  (const_int 1)))]
   "TARGET_SSE"
   "@