diff options
Diffstat (limited to 'gcc/config/i386/subst.md')
| -rw-r--r-- | gcc/config/i386/subst.md | 43 |
1 files changed, 10 insertions, 33 deletions
diff --git a/gcc/config/i386/subst.md b/gcc/config/i386/subst.md index c47c5d5..c30b274 100644 --- a/gcc/config/i386/subst.md +++ b/gcc/config/i386/subst.md @@ -197,32 +197,19 @@ (define_subst_attr "round_sd_mask_op4" "round" "" "<round_sd_mask_operand4>") (define_subst_attr "round_sdc_mask_op4" "round" "" "<round_sdc_mask_operand4>") (define_subst_attr "round_constraint" "round" "vm" "v") -(define_subst_attr "round_suff" "round" "{y}" "") (define_subst_attr "round_qq2phsuff" "round" "<qq2phsuff>" "") -(define_subst_attr "round_qq2pssuff" "round" "<qq2pssuff>" "") -(define_subst_attr "round_pd2udqsuff" "round" "<pd2udqsuff>" "") (define_subst_attr "bcst_round_constraint" "round" "vmBr" "v") (define_subst_attr "round_constraint2" "round" "m" "v") (define_subst_attr "round_constraint3" "round" "rm" "r") -(define_subst_attr "round_constraint4" "round" "vBm" "v") (define_subst_attr "round_nimm_predicate" "round" "vector_operand" "register_operand") (define_subst_attr "bcst_round_nimm_predicate" "round" "bcst_vector_operand" "register_operand") (define_subst_attr "round_nimm_scalar_predicate" "round" "nonimmediate_operand" "register_operand") (define_subst_attr "round_prefix" "round" "vex" "evex") -(define_subst_attr "round_mode_condition" "round" "1" "((<MODE>mode == V16SFmode - || <MODE>mode == V8DFmode - || <MODE>mode == V8DImode - || <MODE>mode == V16SImode - || <MODE>mode == V32HImode - || <MODE>mode == V32HFmode) - || (TARGET_AVX10_2_256 - && (<MODE>mode == V8SFmode - || <MODE>mode == V4DFmode - || <MODE>mode == V4DImode - || <MODE>mode == V8SImode - || <MODE>mode == V16HImode - || <MODE>mode == V16HFmode)))") -(define_subst_attr "round_applied" "round" "false" "true") +(define_subst_attr "round_mode512bit_condition" "round" "1" "(<MODE>mode == V16SFmode + || <MODE>mode == V8DFmode + || <MODE>mode == V8DImode + || <MODE>mode == V16SImode + || <MODE>mode == V32HFmode)") (define_subst_attr "round_modev4sf_condition" "round" "1" "(<MODE>mode == V4SFmode)") (define_subst_attr "round_codefor" "round" "*" "") @@ -263,21 +250,11 @@ (define_subst_attr "round_saeonly_constraint2" "round_saeonly" "m" "v") (define_subst_attr "round_saeonly_nimm_predicate" "round_saeonly" "vector_operand" "register_operand") (define_subst_attr "round_saeonly_nimm_scalar_predicate" "round_saeonly" "nonimmediate_operand" "register_operand") -(define_subst_attr "round_saeonly_suff" "round_saeonly" "{y}" "") -(define_subst_attr "round_saeonly_mode_condition" "round_saeonly" "1" "((<MODE>mode == V16SFmode - || <MODE>mode == V8DFmode - || <MODE>mode == V8DImode - || <MODE>mode == V16SImode - || <MODE>mode == V32HImode - || <MODE>mode == V32HFmode) - || (TARGET_AVX10_2_256 - && (<MODE>mode == V8SFmode - || <MODE>mode == V4DFmode - || <MODE>mode == V4DImode - || <MODE>mode == V8SImode - || <MODE>mode == V16HImode - || <MODE>mode == V16HFmode)))") -(define_subst_attr "round_saeonly_applied" "round_saeonly" "false" "true") +(define_subst_attr "round_saeonly_mode512bit_condition" "round_saeonly" "1" "(<MODE>mode == V16SFmode + || <MODE>mode == V8DFmode + || <MODE>mode == V8DImode + || <MODE>mode == V16SImode + || <MODE>mode == V32HFmode)") (define_subst "round_saeonly" |