diff options
Diffstat (limited to 'gcc/config/arm')
| -rw-r--r-- | gcc/config/arm/arm.c | 8 | ||||
| -rw-r--r-- | gcc/config/arm/arm.h | 7 |
2 files changed, 13 insertions, 2 deletions
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index 617e0d3..99a6166 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -574,6 +574,8 @@ static int thumb_call_reg_needed; #define FL_DIV (1 << 18) /* Hardware divide. */ #define FL_VFPV3 (1 << 19) /* Vector Floating Point V3. */ #define FL_NEON (1 << 20) /* Neon instructions. */ +#define FL_ARCH7EM (1 << 21) /* Instructions present in the ARMv7E-M + architecture. */ #define FL_IWMMXT (1 << 29) /* XScale v2 or "Intel Wireless MMX technology". */ @@ -598,6 +600,7 @@ static int thumb_call_reg_needed; #define FL_FOR_ARCH7A (FL_FOR_ARCH7 | FL_NOTM) #define FL_FOR_ARCH7R (FL_FOR_ARCH7A | FL_DIV) #define FL_FOR_ARCH7M (FL_FOR_ARCH7 | FL_DIV) +#define FL_FOR_ARCH7EM (FL_FOR_ARCH7M | FL_ARCH7EM) /* The bits in this mask specify which instructions we are allowed to generate. */ @@ -634,6 +637,9 @@ int arm_arch6k = 0; /* Nonzero if instructions not present in the 'M' profile can be used. */ int arm_arch_notm = 0; +/* Nonzero if instructions present in ARMv7E-M can be used. */ +int arm_arch7em = 0; + /* Nonzero if this chip can benefit from load scheduling. */ int arm_ld_sched = 0; @@ -772,6 +778,7 @@ static const struct processors all_architectures[] = {"armv7-a", cortexa8, "7A", FL_CO_PROC | FL_FOR_ARCH7A, NULL}, {"armv7-r", cortexr4, "7R", FL_CO_PROC | FL_FOR_ARCH7R, NULL}, {"armv7-m", cortexm3, "7M", FL_CO_PROC | FL_FOR_ARCH7M, NULL}, + {"armv7e-m", cortexm3, "7EM", FL_CO_PROC | FL_FOR_ARCH7EM, NULL}, {"ep9312", ep9312, "4T", FL_LDSCHED | FL_CIRRUS | FL_FOR_ARCH4, NULL}, {"iwmmxt", iwmmxt, "5TE", FL_LDSCHED | FL_STRONG | FL_FOR_ARCH5TE | FL_XSCALE | FL_IWMMXT , NULL}, {"iwmmxt2", iwmmxt2, "5TE", FL_LDSCHED | FL_STRONG | FL_FOR_ARCH5TE | FL_XSCALE | FL_IWMMXT , NULL}, @@ -1543,6 +1550,7 @@ arm_override_options (void) arm_arch6 = (insn_flags & FL_ARCH6) != 0; arm_arch6k = (insn_flags & FL_ARCH6K) != 0; arm_arch_notm = (insn_flags & FL_NOTM) != 0; + arm_arch7em = (insn_flags & FL_ARCH7EM) != 0; arm_arch_thumb2 = (insn_flags & FL_THUMB2) != 0; arm_arch_xscale = (insn_flags & FL_XSCALE) != 0; arm_arch_cirrus = (insn_flags & FL_CIRRUS) != 0; diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h index 65d6708..663f07e 100644 --- a/gcc/config/arm/arm.h +++ b/gcc/config/arm/arm.h @@ -252,10 +252,10 @@ extern void (*arm_lang_output_object_attributes_hook)(void); /* "DSP" multiply instructions, eg. SMULxy. */ #define TARGET_DSP_MULTIPLY \ - (TARGET_32BIT && arm_arch5e && arm_arch_notm) + (TARGET_32BIT && arm_arch5e && (arm_arch_notm || arm_arch7em)) /* Integer SIMD instructions, and extend-accumulate instructions. */ #define TARGET_INT_SIMD \ - (TARGET_32BIT && arm_arch6 && arm_arch_notm) + (TARGET_32BIT && arm_arch6 && (arm_arch_notm || arm_arch7em)) /* Should MOVW/MOVT be used in preference to a constant pool. */ #define TARGET_USE_MOVT (arm_arch_thumb2 && !optimize_size) @@ -399,6 +399,9 @@ extern int arm_arch6; /* Nonzero if instructions not present in the 'M' profile can be used. */ extern int arm_arch_notm; +/* Nonzero if instructions present in ARMv7E-M can be used. */ +extern int arm_arch7em; + /* Nonzero if this chip can benefit from load scheduling. */ extern int arm_ld_sched; |