diff options
Diffstat (limited to 'gcc/config/arm/arm.md')
| -rw-r--r-- | gcc/config/arm/arm.md | 38 |
1 files changed, 38 insertions, 0 deletions
diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index 9aa0d35..8a949b9 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -12690,6 +12690,44 @@ (set_attr "type" "rev")] ) +;; There are no canonicalisation rules for the position of the lshiftrt, ashift +;; operations within an IOR/AND RTX, therefore we have two patterns matching +;; each valid permutation. + +(define_insn "arm_rev16si2" + [(set (match_operand:SI 0 "register_operand" "=l,l,r") + (ior:SI (and:SI (ashift:SI (match_operand:SI 1 "register_operand" "l,l,r") + (const_int 8)) + (match_operand:SI 3 "const_int_operand" "n,n,n")) + (and:SI (lshiftrt:SI (match_dup 1) + (const_int 8)) + (match_operand:SI 2 "const_int_operand" "n,n,n"))))] + "arm_arch6 + && aarch_rev16_shleft_mask_imm_p (operands[3], SImode) + && aarch_rev16_shright_mask_imm_p (operands[2], SImode)" + "rev16\\t%0, %1" + [(set_attr "arch" "t1,t2,32") + (set_attr "length" "2,2,4") + (set_attr "type" "rev")] +) + +(define_insn "arm_rev16si2_alt" + [(set (match_operand:SI 0 "register_operand" "=l,l,r") + (ior:SI (and:SI (lshiftrt:SI (match_operand:SI 1 "register_operand" "l,l,r") + (const_int 8)) + (match_operand:SI 2 "const_int_operand" "n,n,n")) + (and:SI (ashift:SI (match_dup 1) + (const_int 8)) + (match_operand:SI 3 "const_int_operand" "n,n,n"))))] + "arm_arch6 + && aarch_rev16_shleft_mask_imm_p (operands[3], SImode) + && aarch_rev16_shright_mask_imm_p (operands[2], SImode)" + "rev16\\t%0, %1" + [(set_attr "arch" "t1,t2,32") + (set_attr "length" "2,2,4") + (set_attr "type" "rev")] +) + (define_expand "bswaphi2" [(set (match_operand:HI 0 "s_register_operand" "=r") (bswap:HI (match_operand:HI 1 "s_register_operand" "r")))] |