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-rw-r--r--gcc/common/config/avr/avr-common.cc1
-rw-r--r--gcc/common/config/i386/cpuinfo.h40
-rw-r--r--gcc/common/config/i386/i386-common.cc46
-rw-r--r--gcc/common/config/i386/i386-cpuinfo.h9
-rw-r--r--gcc/common/config/i386/i386-isas.h7
5 files changed, 39 insertions, 64 deletions
diff --git a/gcc/common/config/avr/avr-common.cc b/gcc/common/config/avr/avr-common.cc
index 06c6cc8..203a965 100644
--- a/gcc/common/config/avr/avr-common.cc
+++ b/gcc/common/config/avr/avr-common.cc
@@ -42,6 +42,7 @@ static const struct default_options avr_option_optimization_table[] =
{ OPT_LEVELS_2_PLUS, OPT_mfuse_move_, NULL, 23 },
{ OPT_LEVELS_2_PLUS, OPT_msplit_bit_shift, NULL, 1 },
{ OPT_LEVELS_2_PLUS, OPT_msplit_ldst, NULL, 1 },
+ { OPT_LEVELS_2_PLUS, OPT_muse_nonzero_bits, NULL, 1 },
// Stick to the "old" placement of the subreg lowering pass.
{ OPT_LEVELS_1_PLUS, OPT_fsplit_wide_types_early, NULL, 1 },
/* Allow optimizer to introduce store data races. This used to be the
diff --git a/gcc/common/config/i386/cpuinfo.h b/gcc/common/config/i386/cpuinfo.h
index a6ede14..e7e575c 100644
--- a/gcc/common/config/i386/cpuinfo.h
+++ b/gcc/common/config/i386/cpuinfo.h
@@ -1037,32 +1037,20 @@ get_available_features (struct __processor_model *cpu_model,
{
__cpuid_count (0x24, 0, eax, ebx, ecx, edx);
version = ebx & 0xff;
- if (ebx & bit_AVX10_256)
- switch (version)
- {
- case 2:
- set_feature (FEATURE_AVX10_2_256);
- /* Fall through. */
- case 1:
- set_feature (FEATURE_AVX10_1_256);
- break;
- default:
- set_feature (FEATURE_AVX10_1_256);
- break;
- }
- if (ebx & bit_AVX10_512)
- switch (version)
- {
- case 2:
- set_feature (FEATURE_AVX10_2_512);
- /* Fall through. */
- case 1:
- set_feature (FEATURE_AVX10_1_512);
- break;
- default:
- set_feature (FEATURE_AVX10_1_512);
- break;
- }
+ switch (version)
+ {
+ case 2:
+ set_feature (FEATURE_AVX10_2);
+ /* Fall through. */
+ case 1:
+ set_feature (FEATURE_AVX10_1);
+ set_feature (FEATURE_AVX10_1_256);
+ break;
+ default:
+ set_feature (FEATURE_AVX10_1);
+ set_feature (FEATURE_AVX10_1_256);
+ break;
+ }
}
/* Check cpuid level of extended features. */
diff --git a/gcc/common/config/i386/i386-common.cc b/gcc/common/config/i386/i386-common.cc
index 1788b57..4815fbc 100644
--- a/gcc/common/config/i386/i386-common.cc
+++ b/gcc/common/config/i386/i386-common.cc
@@ -120,15 +120,12 @@ along with GCC; see the file COPYING3. If not see
#define OPTION_MASK_ISA2_EVEX512_SET OPTION_MASK_ISA2_EVEX512
#define OPTION_MASK_ISA2_USER_MSR_SET OPTION_MASK_ISA2_USER_MSR
#define OPTION_MASK_ISA2_AVX10_1_256_SET OPTION_MASK_ISA2_AVX10_1_256
-#define OPTION_MASK_ISA2_AVX10_1_512_SET \
- (OPTION_MASK_ISA2_AVX10_1_256_SET | OPTION_MASK_ISA2_AVX10_1_512)
-#define OPTION_MASK_ISA2_AVX10_2_256_SET \
- (OPTION_MASK_ISA2_AVX10_1_256_SET | OPTION_MASK_ISA2_AVX10_2_256)
-#define OPTION_MASK_ISA2_AVX10_2_512_SET \
- (OPTION_MASK_ISA2_AVX10_1_512_SET | OPTION_MASK_ISA2_AVX10_2_256_SET \
- | OPTION_MASK_ISA2_AVX10_2_512)
+#define OPTION_MASK_ISA2_AVX10_1_SET \
+ (OPTION_MASK_ISA2_AVX10_1_256_SET | OPTION_MASK_ISA2_AVX10_1)
+#define OPTION_MASK_ISA2_AVX10_2_SET \
+ (OPTION_MASK_ISA2_AVX10_1_SET | OPTION_MASK_ISA2_AVX10_2)
#define OPTION_MASK_ISA2_AMX_AVX512_SET \
- (OPTION_MASK_ISA2_AMX_TILE_SET | OPTION_MASK_ISA2_AVX10_2_512_SET \
+ (OPTION_MASK_ISA2_AMX_TILE_SET | OPTION_MASK_ISA2_AVX10_2_SET \
| OPTION_MASK_ISA2_AMX_AVX512)
#define OPTION_MASK_ISA2_AMX_TF32_SET \
(OPTION_MASK_ISA2_AMX_TILE_SET | OPTION_MASK_ISA2_AMX_TF32)
@@ -326,11 +323,10 @@ along with GCC; see the file COPYING3. If not see
#define OPTION_MASK_ISA2_EVEX512_UNSET OPTION_MASK_ISA2_EVEX512
#define OPTION_MASK_ISA2_USER_MSR_UNSET OPTION_MASK_ISA2_USER_MSR
#define OPTION_MASK_ISA2_AVX10_1_UNSET \
- (OPTION_MASK_ISA2_AVX10_1_256 | OPTION_MASK_ISA2_AVX10_1_512 \
+ (OPTION_MASK_ISA2_AVX10_1_256 | OPTION_MASK_ISA2_AVX10_1 \
| OPTION_MASK_ISA2_AVX10_2_UNSET)
#define OPTION_MASK_ISA2_AVX10_2_UNSET \
- (OPTION_MASK_ISA2_AVX10_2_256 | OPTION_MASK_ISA2_AVX10_2_512 \
- | OPTION_MASK_ISA2_AMX_AVX512_UNSET)
+ (OPTION_MASK_ISA2_AVX10_2 | OPTION_MASK_ISA2_AMX_AVX512_UNSET)
#define OPTION_MASK_ISA2_AMX_AVX512_UNSET OPTION_MASK_ISA2_AMX_AVX512
#define OPTION_MASK_ISA2_AMX_TF32_UNSET OPTION_MASK_ISA2_AMX_TF32
#define OPTION_MASK_ISA2_AMX_TRANSPOSE_UNSET OPTION_MASK_ISA2_AMX_TRANSPOSE
@@ -1382,11 +1378,11 @@ ix86_handle_option (struct gcc_options *opts,
}
return true;
- case OPT_mavx10_1_512:
+ case OPT_mavx10_1:
if (value)
{
- opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_AVX10_1_512_SET;
- opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA2_AVX10_1_512_SET;
+ opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_AVX10_1_SET;
+ opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA2_AVX10_1_SET;
opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX2_SET;
opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX2_SET;
}
@@ -1398,21 +1394,11 @@ ix86_handle_option (struct gcc_options *opts,
}
return true;
- case OPT_mavx10_2_256:
- if (value)
- {
- opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_AVX10_2_256_SET;
- opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA2_AVX10_2_256_SET;
- opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX2_SET;
- opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX2_SET;
- }
- return true;
-
case OPT_mavx10_2:
if (value)
{
- opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_AVX10_2_512_SET;
- opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA2_AVX10_2_512_SET;
+ opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_AVX10_2_SET;
+ opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA2_AVX10_2_SET;
opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX2_SET;
opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX2_SET;
}
@@ -1533,11 +1519,13 @@ ix86_handle_option (struct gcc_options *opts,
return true;
case OPT_msse4:
+ gcc_assert (value != 0);
opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SSE4_SET;
opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSE4_SET;
return true;
case OPT_mno_sse4:
+ gcc_assert (value != 0);
opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_SSE4_UNSET;
opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSE4_UNSET;
opts->x_ix86_isa_flags2 &= ~OPTION_MASK_ISA2_SSE4_UNSET;
@@ -2325,10 +2313,10 @@ const pta processor_alias_table[] =
{"meteorlake", PROCESSOR_ALDERLAKE, CPU_HASWELL, PTA_ALDERLAKE,
M_CPU_SUBTYPE (INTEL_COREI7_ALDERLAKE), P_PROC_AVX2},
{"graniterapids", PROCESSOR_GRANITERAPIDS, CPU_HASWELL, PTA_GRANITERAPIDS,
- M_CPU_SUBTYPE (INTEL_COREI7_GRANITERAPIDS), P_PROC_AVX10_1_512},
+ M_CPU_SUBTYPE (INTEL_COREI7_GRANITERAPIDS), P_PROC_AVX10_1},
{"graniterapids-d", PROCESSOR_GRANITERAPIDS_D, CPU_HASWELL,
PTA_GRANITERAPIDS_D, M_CPU_SUBTYPE (INTEL_COREI7_GRANITERAPIDS_D),
- P_PROC_AVX10_1_512},
+ P_PROC_AVX10_1},
{"arrowlake", PROCESSOR_ARROWLAKE, CPU_HASWELL, PTA_ARROWLAKE,
M_CPU_SUBTYPE (INTEL_COREI7_ARROWLAKE), P_PROC_AVX2},
{"arrowlake-s", PROCESSOR_ARROWLAKE_S, CPU_HASWELL, PTA_ARROWLAKE_S,
@@ -2338,7 +2326,7 @@ const pta processor_alias_table[] =
{"pantherlake", PROCESSOR_PANTHERLAKE, CPU_HASWELL, PTA_PANTHERLAKE,
M_CPU_SUBTYPE (INTEL_COREI7_PANTHERLAKE), P_PROC_AVX2},
{"diamondrapids", PROCESSOR_DIAMONDRAPIDS, CPU_HASWELL, PTA_DIAMONDRAPIDS,
- M_CPU_SUBTYPE (INTEL_COREI7_DIAMONDRAPIDS), P_PROC_AVX512F},
+ M_CPU_SUBTYPE (INTEL_COREI7_DIAMONDRAPIDS), P_PROC_AVX10_1},
{"bonnell", PROCESSOR_BONNELL, CPU_ATOM, PTA_BONNELL,
M_CPU_TYPE (INTEL_BONNELL), P_PROC_SSSE3},
{"atom", PROCESSOR_BONNELL, CPU_ATOM, PTA_BONNELL,
diff --git a/gcc/common/config/i386/i386-cpuinfo.h b/gcc/common/config/i386/i386-cpuinfo.h
index 996eff2..6b2ab0a 100644
--- a/gcc/common/config/i386/i386-cpuinfo.h
+++ b/gcc/common/config/i386/i386-cpuinfo.h
@@ -149,8 +149,8 @@ enum feature_priority
P_PROC_AVX512F,
P_X86_64_V4,
P_AVX10_1_256,
- P_AVX10_1_512,
- P_PROC_AVX10_1_512,
+ P_AVX10_1,
+ P_PROC_AVX10_1,
P_PROC_DYNAMIC
};
@@ -267,9 +267,8 @@ enum processor_features
FEATURE_APX_F,
FEATURE_USER_MSR,
FEATURE_AVX10_1_256,
- FEATURE_AVX10_1_512,
- FEATURE_AVX10_2_256,
- FEATURE_AVX10_2_512,
+ FEATURE_AVX10_1,
+ FEATURE_AVX10_2 = 116,
FEATURE_AMX_AVX512,
FEATURE_AMX_TF32,
FEATURE_AMX_TRANSPOSE,
diff --git a/gcc/common/config/i386/i386-isas.h b/gcc/common/config/i386/i386-isas.h
index 9dbbc6a..55af985 100644
--- a/gcc/common/config/i386/i386-isas.h
+++ b/gcc/common/config/i386/i386-isas.h
@@ -184,10 +184,9 @@ ISA_NAMES_TABLE_START
ISA_NAMES_TABLE_ENTRY("apxf", FEATURE_APX_F, P_NONE, "-mapxf")
ISA_NAMES_TABLE_ENTRY("usermsr", FEATURE_USER_MSR, P_NONE, "-musermsr")
ISA_NAMES_TABLE_ENTRY("avx10.1-256", FEATURE_AVX10_1_256, P_AVX10_1_256, "-mavx10.1-256")
- ISA_NAMES_TABLE_ENTRY("avx10.1-512", FEATURE_AVX10_1_512, P_AVX10_1_512, "-mavx10.1-512")
- ISA_NAMES_TABLE_ENTRY("avx10.2", FEATURE_AVX10_2_512, P_NONE, "-mavx10.2")
- ISA_NAMES_TABLE_ENTRY("avx10.2-256", FEATURE_AVX10_2_256, P_NONE, "-mavx10.2-256")
- ISA_NAMES_TABLE_ENTRY("avx10.2-512", FEATURE_AVX10_2_512, P_NONE, NULL)
+ ISA_NAMES_TABLE_ENTRY("avx10.1", FEATURE_AVX10_1, P_AVX10_1, "-mavx10.1")
+ ISA_NAMES_TABLE_ENTRY("avx10.1-512", FEATURE_AVX10_1, P_AVX10_1, "-mavx10.1-512")
+ ISA_NAMES_TABLE_ENTRY("avx10.2", FEATURE_AVX10_2, P_NONE, "-mavx10.2")
ISA_NAMES_TABLE_ENTRY("amx-avx512", FEATURE_AMX_AVX512, P_NONE,
"-mamx-avx512")
ISA_NAMES_TABLE_ENTRY("amx-tf32", FEATURE_AMX_TF32, P_NONE, "-mamx-tf32")
generated by cgit v1.1 at 2025-04-04 18:49:58 +0000