diff options
| -rw-r--r-- | gcc/config/i386/sse.md | 65 |
1 files changed, 50 insertions, 15 deletions
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 9ad8cc4..51d4eac 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -24955,7 +24955,10 @@ (const_int 13) (const_int 15)])))))] "TARGET_XOP" "vphadd<u>bw\t{%1, %0|%0, %1}" - [(set_attr "type" "sseiadd1")]) + [(set_attr "type" "sseiadd1") + (set_attr "prefix" "vex") + (set_attr "prefix_extra" "1") + (set_attr "mode" "TI")]) (define_insn "xop_phadd<u>bd" [(set (match_operand:V4SI 0 "register_operand" "=x") @@ -24984,7 +24987,10 @@ (const_int 11) (const_int 15)]))))))] "TARGET_XOP" "vphadd<u>bd\t{%1, %0|%0, %1}" - [(set_attr "type" "sseiadd1")]) + [(set_attr "type" "sseiadd1") + (set_attr "prefix" "vex") + (set_attr "prefix_extra" "1") + (set_attr "mode" "TI")]) (define_insn "xop_phadd<u>bq" [(set (match_operand:V2DI 0 "register_operand" "=x") @@ -25029,7 +25035,10 @@ (parallel [(const_int 7) (const_int 15)])))))))] "TARGET_XOP" "vphadd<u>bq\t{%1, %0|%0, %1}" - [(set_attr "type" "sseiadd1")]) + [(set_attr "type" "sseiadd1") + (set_attr "prefix" "vex") + (set_attr "prefix_extra" "1") + (set_attr "mode" "TI")]) (define_insn "xop_phadd<u>wd" [(set (match_operand:V4SI 0 "register_operand" "=x") @@ -25046,7 +25055,10 @@ (const_int 5) (const_int 7)])))))] "TARGET_XOP" "vphadd<u>wd\t{%1, %0|%0, %1}" - [(set_attr "type" "sseiadd1")]) + [(set_attr "type" "sseiadd1") + (set_attr "prefix" "vex") + (set_attr "prefix_extra" "1") + (set_attr "mode" "TI")]) (define_insn "xop_phadd<u>wq" [(set (match_operand:V2DI 0 "register_operand" "=x") @@ -25071,7 +25083,10 @@ (parallel [(const_int 3) (const_int 7)]))))))] "TARGET_XOP" "vphadd<u>wq\t{%1, %0|%0, %1}" - [(set_attr "type" "sseiadd1")]) + [(set_attr "type" "sseiadd1") + (set_attr "prefix" "vex") + (set_attr "prefix_extra" "1") + (set_attr "mode" "TI")]) (define_insn "xop_phadd<u>dq" [(set (match_operand:V2DI 0 "register_operand" "=x") @@ -25086,7 +25101,10 @@ (parallel [(const_int 1) (const_int 3)])))))] "TARGET_XOP" "vphadd<u>dq\t{%1, %0|%0, %1}" - [(set_attr "type" "sseiadd1")]) + [(set_attr "type" "sseiadd1") + (set_attr "prefix" "vex") + (set_attr "prefix_extra" "1") + (set_attr "mode" "TI")]) (define_insn "xop_phsubbw" [(set (match_operand:V8HI 0 "register_operand" "=x") @@ -25107,7 +25125,10 @@ (const_int 13) (const_int 15)])))))] "TARGET_XOP" "vphsubbw\t{%1, %0|%0, %1}" - [(set_attr "type" "sseiadd1")]) + [(set_attr "type" "sseiadd1") + (set_attr "prefix" "vex") + (set_attr "prefix_extra" "1") + (set_attr "mode" "TI")]) (define_insn "xop_phsubwd" [(set (match_operand:V4SI 0 "register_operand" "=x") @@ -25124,7 +25145,10 @@ (const_int 5) (const_int 7)])))))] "TARGET_XOP" "vphsubwd\t{%1, %0|%0, %1}" - [(set_attr "type" "sseiadd1")]) + [(set_attr "type" "sseiadd1") + (set_attr "prefix" "vex") + (set_attr "prefix_extra" "1") + (set_attr "mode" "TI")]) (define_insn "xop_phsubdq" [(set (match_operand:V2DI 0 "register_operand" "=x") @@ -25139,7 +25163,10 @@ (parallel [(const_int 1) (const_int 3)])))))] "TARGET_XOP" "vphsubdq\t{%1, %0|%0, %1}" - [(set_attr "type" "sseiadd1")]) + [(set_attr "type" "sseiadd1") + (set_attr "prefix" "vex") + (set_attr "prefix_extra" "1") + (set_attr "mode" "TI")]) ;; XOP permute instructions (define_insn "xop_pperm" @@ -25267,6 +25294,8 @@ "TARGET_XOP" "vprot<ssemodesuffix>\t{%2, %1, %0|%0, %1, %2}" [(set_attr "type" "sseishft") + (set_attr "prefix" "vex") + (set_attr "prefix_extra" "1") (set_attr "length_immediate" "1") (set_attr "mode" "TI")]) @@ -25282,6 +25311,8 @@ return \"vprot<ssemodesuffix>\t{%3, %1, %0|%0, %1, %3}\"; } [(set_attr "type" "sseishft") + (set_attr "prefix" "vex") + (set_attr "prefix_extra" "1") (set_attr "length_immediate" "1") (set_attr "mode" "TI")]) @@ -25322,8 +25353,8 @@ "TARGET_XOP && !(MEM_P (operands[1]) && MEM_P (operands[2]))" "vprot<ssemodesuffix>\t{%2, %1, %0|%0, %1, %2}" [(set_attr "type" "sseishft") - (set_attr "prefix_data16" "0") - (set_attr "prefix_extra" "2") + (set_attr "prefix" "vex") + (set_attr "prefix_extra" "1") (set_attr "mode" "TI")]) ;; XOP packed shift instructions. @@ -25559,8 +25590,8 @@ "TARGET_XOP && !(MEM_P (operands[1]) && MEM_P (operands[2]))" "vpsha<ssemodesuffix>\t{%2, %1, %0|%0, %1, %2}" [(set_attr "type" "sseishft") - (set_attr "prefix_data16" "0") - (set_attr "prefix_extra" "2") + (set_attr "prefix" "vex") + (set_attr "prefix_extra" "1") (set_attr "mode" "TI")]) (define_insn "xop_shl<mode>3" @@ -25578,8 +25609,8 @@ "TARGET_XOP && !(MEM_P (operands[1]) && MEM_P (operands[2]))" "vpshl<ssemodesuffix>\t{%2, %1, %0|%0, %1, %2}" [(set_attr "type" "sseishft") - (set_attr "prefix_data16" "0") - (set_attr "prefix_extra" "2") + (set_attr "prefix" "vex") + (set_attr "prefix_extra" "1") (set_attr "mode" "TI")]) (define_expand "<insn><mode>3" @@ -25791,6 +25822,8 @@ "TARGET_XOP" "vfrcz<ssemodesuffix>\t{%1, %0|%0, %1}" [(set_attr "type" "ssecvt1") + (set_attr "prefix" "vex") + (set_attr "prefix_extra" "1") (set_attr "mode" "<MODE>")]) (define_expand "xop_vmfrcz<mode>2" @@ -25815,6 +25848,8 @@ "TARGET_XOP" "vfrcz<ssescalarmodesuffix>\t{%1, %0|%0, %<iptr>1}" [(set_attr "type" "ssecvt1") + (set_attr "prefix" "vex") + (set_attr "prefix_extra" "1") (set_attr "mode" "<MODE>")]) (define_insn "xop_maskcmp<mode>3" |