diff options
| -rw-r--r-- | gcc/ChangeLog | 9 | ||||
| -rw-r--r-- | gcc/c-family/ChangeLog | 4 | ||||
| -rw-r--r-- | gcc/c-family/c.opt | 4 | ||||
| -rw-r--r-- | gcc/common.opt | 14 | ||||
| -rw-r--r-- | gcc/config/i386/i386.opt | 60 | ||||
| -rw-r--r-- | gcc/config/linux.opt | 4 | ||||
| -rw-r--r-- | gcc/config/rs6000/rs6000.opt | 6 | ||||
| -rw-r--r-- | gcc/config/sh/sh.opt | 11 | ||||
| -rw-r--r-- | gcc/config/spu/spu.opt | 4 | ||||
| -rw-r--r-- | gcc/doc/options.texi | 27 | ||||
| -rw-r--r-- | gcc/fortran/ChangeLog | 4 | ||||
| -rw-r--r-- | gcc/fortran/lang.opt | 2 | ||||
| -rw-r--r-- | gcc/java/ChangeLog | 4 | ||||
| -rw-r--r-- | gcc/java/lang.opt | 2 |
14 files changed, 85 insertions, 70 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index bcfabb6..50d67de 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,14 @@ 2010-09-29 Joseph Myers <joseph@codesourcery.com> + * doc/options.texi (Variable, Var, Init): Update documentation + without reference to VarExists. + (VarExists): Remove. + * common.opt, config/i386/i386.opt, config/linux.opt, + config/rs6000/rs6000.opt, config/sh/sh.opt, config/spu/spu.opt: + Don't use VarExists. + +2010-09-29 Joseph Myers <joseph@codesourcery.com> + * optc-gen.awk: Generate global_options initializer instead of individual variables. Add x_ prefix to names of structure members. diff --git a/gcc/c-family/ChangeLog b/gcc/c-family/ChangeLog index 41b585f..d51728b 100644 --- a/gcc/c-family/ChangeLog +++ b/gcc/c-family/ChangeLog @@ -1,5 +1,9 @@ 2010-09-29 Joseph Myers <joseph@codesourcery.com> + * c.opt: Don't use VarExists. + +2010-09-29 Joseph Myers <joseph@codesourcery.com> + * c-common.c (c_cpp_error): Update names of diagnostic_context members. * c-cppbuiltin.c (c_cpp_builtins_optimize_pragma): Update names of diff --git a/gcc/c-family/c.opt b/gcc/c-family/c.opt index f91eeef..a7ef3ea 100644 --- a/gcc/c-family/c.opt +++ b/gcc/c-family/c.opt @@ -966,11 +966,11 @@ C++ ObjC++ Optimization Var(flag_threadsafe_statics) Init(1) -fno-threadsafe-statics Do not generate thread-safe code for initializing local statics funsigned-bitfields -C ObjC C++ ObjC++ Var(flag_signed_bitfields, 0) VarExists +C ObjC C++ ObjC++ Var(flag_signed_bitfields, 0) When \"signed\" or \"unsigned\" is not given make the bitfield unsigned funsigned-char -C ObjC C++ ObjC++ LTO Var(flag_signed_char, 0) VarExists +C ObjC C++ ObjC++ LTO Var(flag_signed_char, 0) Make \"char\" unsigned by default fuse-cxa-atexit diff --git a/gcc/common.opt b/gcc/common.opt index 8a65b93..37c43fd 100644 --- a/gcc/common.opt +++ b/gcc/common.opt @@ -1064,7 +1064,7 @@ Common Report Var(flag_merge_constants,2) Init(1) Optimization Attempt to merge identical constants and constant variables fmerge-constants -Common Report Var(flag_merge_constants,1) VarExists Optimization +Common Report Var(flag_merge_constants,1) Optimization Attempt to merge identical constants across compilation units fmerge-debug-strings @@ -1092,7 +1092,7 @@ Common RejectNegative Report Var(flag_mudflap) Add mudflap bounds-checking instrumentation for single-threaded program fmudflapth -Common RejectNegative Report VarExists Var(flag_mudflap,2) +Common RejectNegative Report Var(flag_mudflap,2) Add mudflap bounds-checking instrumentation for multi-threaded program fmudflapir @@ -1172,11 +1172,11 @@ Common Report Var(flag_pie,2) Generate position-independent code for executables if possible (large mode) fpic -Common Report Var(flag_pic,1) VarExists +Common Report Var(flag_pic,1) Generate position-independent code if possible (small mode) fpie -Common Report Var(flag_pie,1) VarExists +Common Report Var(flag_pie,1) Generate position-independent code for executables if possible (small mode) fplugin= @@ -1250,7 +1250,7 @@ Common Report Var(flag_record_gcc_switches) Record gcc command line switches in the object file. freg-struct-return -Common Report Var(flag_pcc_struct_return,0) VarExists Optimization +Common Report Var(flag_pcc_struct_return,0) Optimization Return small aggregates in registers fregmove @@ -1462,7 +1462,7 @@ Common Report Var(flag_stack_protect, 1) Use propolice as a stack protection method fstack-protector-all -Common Report RejectNegative Var(flag_stack_protect, 2) VarExists +Common Report RejectNegative Var(flag_stack_protect, 2) Use a stack protection method for every function fstack-usage @@ -1822,7 +1822,7 @@ Common RejectNegative Var(dwarf_strict,0) Init(-1) Emit DWARF additions beyond selected version gstrict-dwarf -Common Report RejectNegative Var(dwarf_strict,1) VarExists +Common Report RejectNegative Var(dwarf_strict,1) Don't emit DWARF additions beyond selected version gtoggle diff --git a/gcc/config/i386/i386.opt b/gcc/config/i386/i386.opt index 09a4e06..6850944 100644 --- a/gcc/config/i386/i386.opt +++ b/gcc/config/i386/i386.opt @@ -270,111 +270,111 @@ is selected. ;; ISA support m32 -Target RejectNegative Negative(m64) Report InverseMask(ISA_64BIT) Var(ix86_isa_flags) VarExists Save +Target RejectNegative Negative(m64) Report InverseMask(ISA_64BIT) Var(ix86_isa_flags) Save Generate 32bit i386 code m64 -Target RejectNegative Negative(m32) Report Mask(ISA_64BIT) Var(ix86_isa_flags) VarExists Save +Target RejectNegative Negative(m32) Report Mask(ISA_64BIT) Var(ix86_isa_flags) Save Generate 64bit x86-64 code mmmx -Target Report Mask(ISA_MMX) Var(ix86_isa_flags) VarExists Save +Target Report Mask(ISA_MMX) Var(ix86_isa_flags) Save Support MMX built-in functions m3dnow -Target Report Mask(ISA_3DNOW) Var(ix86_isa_flags) VarExists Save +Target Report Mask(ISA_3DNOW) Var(ix86_isa_flags) Save Support 3DNow! built-in functions m3dnowa -Target Undocumented Mask(ISA_3DNOW_A) Var(ix86_isa_flags) VarExists Save +Target Undocumented Mask(ISA_3DNOW_A) Var(ix86_isa_flags) Save Support Athlon 3Dnow! built-in functions msse -Target Report Mask(ISA_SSE) Var(ix86_isa_flags) VarExists Save +Target Report Mask(ISA_SSE) Var(ix86_isa_flags) Save Support MMX and SSE built-in functions and code generation msse2 -Target Report Mask(ISA_SSE2) Var(ix86_isa_flags) VarExists Save +Target Report Mask(ISA_SSE2) Var(ix86_isa_flags) Save Support MMX, SSE and SSE2 built-in functions and code generation msse3 -Target Report Mask(ISA_SSE3) Var(ix86_isa_flags) VarExists Save +Target Report Mask(ISA_SSE3) Var(ix86_isa_flags) Save Support MMX, SSE, SSE2 and SSE3 built-in functions and code generation mssse3 -Target Report Mask(ISA_SSSE3) Var(ix86_isa_flags) VarExists Save +Target Report Mask(ISA_SSSE3) Var(ix86_isa_flags) Save Support MMX, SSE, SSE2, SSE3 and SSSE3 built-in functions and code generation msse4.1 -Target Report Mask(ISA_SSE4_1) Var(ix86_isa_flags) VarExists Save +Target Report Mask(ISA_SSE4_1) Var(ix86_isa_flags) Save Support MMX, SSE, SSE2, SSE3, SSSE3 and SSE4.1 built-in functions and code generation msse4.2 -Target Report Mask(ISA_SSE4_2) Var(ix86_isa_flags) VarExists Save +Target Report Mask(ISA_SSE4_2) Var(ix86_isa_flags) Save Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1 and SSE4.2 built-in functions and code generation msse4 -Target RejectNegative Report Mask(ISA_SSE4_2) MaskExists Var(ix86_isa_flags) VarExists Save +Target RejectNegative Report Mask(ISA_SSE4_2) MaskExists Var(ix86_isa_flags) Save Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1 and SSE4.2 built-in functions and code generation mno-sse4 -Target RejectNegative Report InverseMask(ISA_SSE4_1) MaskExists Var(ix86_isa_flags) VarExists Save +Target RejectNegative Report InverseMask(ISA_SSE4_1) MaskExists Var(ix86_isa_flags) Save Do not support SSE4.1 and SSE4.2 built-in functions and code generation mavx -Target Report Mask(ISA_AVX) Var(ix86_isa_flags) VarExists +Target Report Mask(ISA_AVX) Var(ix86_isa_flags) Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2 and AVX built-in functions and code generation mfma -Target Report Mask(ISA_FMA) Var(ix86_isa_flags) VarExists +Target Report Mask(ISA_FMA) Var(ix86_isa_flags) Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX and FMA built-in functions and code generation msse4a -Target Report Mask(ISA_SSE4A) Var(ix86_isa_flags) VarExists Save +Target Report Mask(ISA_SSE4A) Var(ix86_isa_flags) Save Support MMX, SSE, SSE2, SSE3 and SSE4A built-in functions and code generation mfma4 -Target Report Mask(ISA_FMA4) Var(ix86_isa_flags) VarExists Save +Target Report Mask(ISA_FMA4) Var(ix86_isa_flags) Save Support FMA4 built-in functions and code generation mxop -Target Report Mask(ISA_XOP) Var(ix86_isa_flags) VarExists Save +Target Report Mask(ISA_XOP) Var(ix86_isa_flags) Save Support XOP built-in functions and code generation mlwp -Target Report Mask(ISA_LWP) Var(ix86_isa_flags) VarExists Save +Target Report Mask(ISA_LWP) Var(ix86_isa_flags) Save Support LWP built-in functions and code generation mabm -Target Report Mask(ISA_ABM) Var(ix86_isa_flags) VarExists Save +Target Report Mask(ISA_ABM) Var(ix86_isa_flags) Save Support code generation of Advanced Bit Manipulation (ABM) instructions. mpopcnt -Target Report Mask(ISA_POPCNT) Var(ix86_isa_flags) VarExists Save +Target Report Mask(ISA_POPCNT) Var(ix86_isa_flags) Save Support code generation of popcnt instruction. mcx16 -Target Report Mask(ISA_CX16) Var(ix86_isa_flags) VarExists Save +Target Report Mask(ISA_CX16) Var(ix86_isa_flags) Save Support code generation of cmpxchg16b instruction. msahf -Target Report Mask(ISA_SAHF) Var(ix86_isa_flags) VarExists Save +Target Report Mask(ISA_SAHF) Var(ix86_isa_flags) Save Support code generation of sahf instruction in 64bit x86-64 code. mmovbe -Target Report Mask(ISA_MOVBE) Var(ix86_isa_flags) VarExists Save +Target Report Mask(ISA_MOVBE) Var(ix86_isa_flags) Save Support code generation of movbe instruction. mcrc32 -Target Report Mask(ISA_CRC32) Var(ix86_isa_flags) VarExists Save +Target Report Mask(ISA_CRC32) Var(ix86_isa_flags) Save Support code generation of crc32 instruction. maes -Target Report Mask(ISA_AES) Var(ix86_isa_flags) VarExists Save +Target Report Mask(ISA_AES) Var(ix86_isa_flags) Save Support AES built-in functions and code generation mpclmul -Target Report Mask(ISA_PCLMUL) Var(ix86_isa_flags) VarExists Save +Target Report Mask(ISA_PCLMUL) Var(ix86_isa_flags) Save Support PCLMUL built-in functions and code generation msse2avx @@ -382,15 +382,15 @@ Target Report Var(ix86_sse2avx) Encode SSE instructions with VEX prefix mfsgsbase -Target Report Mask(ISA_FSGSBASE) Var(ix86_isa_flags) VarExists Save +Target Report Mask(ISA_FSGSBASE) Var(ix86_isa_flags) Save Support FSGSBASE built-in functions and code generation mrdrnd -Target Report Mask(ISA_RDRND) Var(ix86_isa_flags) VarExists Save +Target Report Mask(ISA_RDRND) Var(ix86_isa_flags) Save Support RDRND built-in functions and code generation mf16c -Target Report Mask(ISA_F16C) Var(ix86_isa_flags) VarExists Save +Target Report Mask(ISA_F16C) Var(ix86_isa_flags) Save Support F16C built-in functions and code generation mfentry diff --git a/gcc/config/linux.opt b/gcc/config/linux.opt index 9ace3e3..ba6b9f83 100644 --- a/gcc/config/linux.opt +++ b/gcc/config/linux.opt @@ -24,9 +24,9 @@ Target Report RejectNegative Var(linux_libc,LIBC_BIONIC) Init(DEFAULT_LIBC) Nega Use Bionic C library mglibc -Target Report RejectNegative Var(linux_libc,LIBC_GLIBC) VarExists Negative(muclibc) +Target Report RejectNegative Var(linux_libc,LIBC_GLIBC) Negative(muclibc) Use GNU C library muclibc -Target Report RejectNegative Var(linux_libc,LIBC_UCLIBC) VarExists Negative(mbionic) +Target Report RejectNegative Var(linux_libc,LIBC_UCLIBC) Negative(mbionic) Use uClibc C library diff --git a/gcc/config/rs6000/rs6000.opt b/gcc/config/rs6000/rs6000.opt index 659bcb6..bdfbf78 100644 --- a/gcc/config/rs6000/rs6000.opt +++ b/gcc/config/rs6000/rs6000.opt @@ -188,7 +188,7 @@ msched-epilog Target Undocumented Var(TARGET_SCHED_PROLOG) Init(1) msched-prolog -Target Report Var(TARGET_SCHED_PROLOG) VarExists +Target Report Var(TARGET_SCHED_PROLOG) Schedule the start and end of the procedure maix-struct-return @@ -196,7 +196,7 @@ Target Report RejectNegative Var(aix_struct_return) Return all structures in memory (AIX default) msvr4-struct-return -Target Report RejectNegative Var(aix_struct_return,0) VarExists +Target Report RejectNegative Var(aix_struct_return,0) Return small structures in registers (SVR4 default) mxl-compat @@ -228,7 +228,7 @@ Target RejectNegative Var(TARGET_NO_SUM_IN_TOC) Do not place symbol+offset constants in TOC msum-in-toc -Target RejectNegative Var(TARGET_NO_SUM_IN_TOC,0) VarExists +Target RejectNegative Var(TARGET_NO_SUM_IN_TOC,0) Place symbol+offset constants in TOC ; Output only one TOC entry per module. Normally linking fails if diff --git a/gcc/config/sh/sh.opt b/gcc/config/sh/sh.opt index 95e2ca4..f10408f 100644 --- a/gcc/config/sh/sh.opt +++ b/gcc/config/sh/sh.opt @@ -1,6 +1,7 @@ ; Options for the SH port of the compiler. -; Copyright (C) 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc. +; Copyright (C) 2005, 2006, 2007, 2008, 2009, 2010 +; Free Software Foundation, Inc. ; ; This file is part of GCC. ; @@ -106,11 +107,11 @@ Target RejectNegative Condition(SUPPORT_SH4_NOFPU) Generate SH4-200 FPU-less code m4-300-nofpu -Target RejectNegative Condition(SUPPORT_SH4_NOFPU) Var(TARGET_SH4_300) VarExists +Target RejectNegative Condition(SUPPORT_SH4_NOFPU) Var(TARGET_SH4_300) Generate SH4-300 FPU-less code m4-340 -Target RejectNegative Condition(SUPPORT_SH4_NOFPU) Var(TARGET_SH4_300) VarExists +Target RejectNegative Condition(SUPPORT_SH4_NOFPU) Var(TARGET_SH4_300) Generate code for SH4 340 series (MMU/FPU-less) ;; passes -isa=sh4-nommu-nofpu to the assembler. @@ -137,7 +138,7 @@ Target RejectNegative Condition(SUPPORT_SH4_SINGLE) Generate default single-precision SH4-200 code m4-300-single -Target RejectNegative Condition(SUPPORT_SH4_SINGLE) Var(TARGET_SH4_300) VarExists +Target RejectNegative Condition(SUPPORT_SH4_SINGLE) Var(TARGET_SH4_300) Generate default single-precision SH4-300 code m4-single-only @@ -153,7 +154,7 @@ Target RejectNegative Condition(SUPPORT_SH4_SINGLE_ONLY) Generate only single-precision SH4-200 code m4-300-single-only -Target RejectNegative Condition(SUPPORT_SH4_SINGLE_ONLY) Var(TARGET_SH4_300) VarExists +Target RejectNegative Condition(SUPPORT_SH4_SINGLE_ONLY) Var(TARGET_SH4_300) Generate only single-precision SH4-300 code m4a diff --git a/gcc/config/spu/spu.opt b/gcc/config/spu/spu.opt index 4ad7128..75cf8c3 100644 --- a/gcc/config/spu/spu.opt +++ b/gcc/config/spu/spu.opt @@ -1,5 +1,5 @@ ; Options for the SPU port of the compiler -; Copyright (C) 2006, 2007, 2008 Free Software Foundation, Inc. +; Copyright (C) 2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc. ; This file is free software; you can redistribute it and/or modify it under ; the terms of the GNU General Public License as published by the Free @@ -88,7 +88,7 @@ Target Report RejectNegative Var(spu_ea_model,32) Init(32) Access variables in 32-bit PPU objects (default) mea64 -Target Report RejectNegative Var(spu_ea_model,64) VarExists +Target Report RejectNegative Var(spu_ea_model,64) Access variables in 64-bit PPU objects maddress-space-conversion diff --git a/gcc/doc/options.texi b/gcc/doc/options.texi index 924ac17..d774b36 100644 --- a/gcc/doc/options.texi +++ b/gcc/doc/options.texi @@ -46,10 +46,10 @@ information. These records have two fields: the string @samp{Variable}, and a declaration of the type and name of the variable, optionally with an initializer (but without any trailing @samp{;}). These records may be used for variables used for many -options where declaring the variable and its initializer by omitting -@code{VarExists} from a single option definition record would be -inappropriate, or for variables set in option handlers rather than -referenced by @code{Var} properties. +options where declaring the initializer in a single option definition +record, or duplicating it in many records, would be inappropriate, or +for variables set in option handlers rather than referenced by +@code{Var} properties. @item An option definition record. These records have the following fields: @@ -177,7 +177,8 @@ compatibility with existing options that are used both directly and via @option{-Wp,}; new options should not have this property. @item Var(@var{var}) -The state of this option should be stored in variable @var{var}. +The state of this option should be stored in variable @var{var} +(actually a macro for @code{global_options.x_@var{var}}). The way that the state is stored depends on the type of option: @itemize @bullet @@ -201,9 +202,8 @@ the argument string. The pointer will be null if the argument is optional and wasn't given. @end itemize -The option-processing script will usually declare @var{var} in -@file{options.c} and leave it to be zero-initialized at start-up time. -You can modify this behavior using @code{VarExists} and @code{Init}. +The option-processing script will usually zero-initialize @var{var}. +You can modify this behavior using @code{Init}. @item Var(@var{var}, @var{set}) The option controls an integer variable @var{var} and is active when @@ -214,17 +214,10 @@ when the ``no-'' form is used. @var{var} is declared in the same way as for the single-argument form described above. -@item VarExists -The variable specified by the @code{Var} property already exists. -No definition should be added to @file{options.c} in response to -this option record. - -You should use this property only if the variable is declared outside -@file{options.c}. - @item Init(@var{value}) The variable specified by the @code{Var} property should be statically -initialized to @var{value}. +initialized to @var{value}. If more than one option using the same +variable specifies @code{Init}, all must specify the same initializer. @item Mask(@var{name}) The option is associated with a bit in the @code{target_flags} diff --git a/gcc/fortran/ChangeLog b/gcc/fortran/ChangeLog index 9114f1c..cb7e4e9 100644 --- a/gcc/fortran/ChangeLog +++ b/gcc/fortran/ChangeLog @@ -1,5 +1,9 @@ 2010-09-29 Joseph Myers <joseph@codesourcery.com> + * lang.opt: Don't use VarExists. + +2010-09-29 Joseph Myers <joseph@codesourcery.com> + * cpp.c (cpp_define_builtins): Update names of gfc_option_t members. (gfc_cpp_post_options): Update names of cpp_options members. diff --git a/gcc/fortran/lang.opt b/gcc/fortran/lang.opt index d523bdf..f60eaabe 100644 --- a/gcc/fortran/lang.opt +++ b/gcc/fortran/lang.opt @@ -499,7 +499,7 @@ Fortran Append a second underscore if the name already contains an underscore fshort-enums -Fortran Var(flag_short_enums) VarExists +Fortran Var(flag_short_enums) ; Documented in C fsign-zero diff --git a/gcc/java/ChangeLog b/gcc/java/ChangeLog index 9c9b103..4dab150 100644 --- a/gcc/java/ChangeLog +++ b/gcc/java/ChangeLog @@ -1,5 +1,9 @@ 2010-09-29 Joseph Myers <joseph@codesourcery.com> + * lang.opt: Don't use VarExists. + +2010-09-29 Joseph Myers <joseph@codesourcery.com> + * java-tree.h (flag_filelist_file, flag_assert, flag_jni, flag_force_classes_archive_check, flag_redundant, flag_newer, flag_use_divide_subroutine, flag_use_atomic_builtins, diff --git a/gcc/java/lang.opt b/gcc/java/lang.opt index 8f52978..4e888b7 100644 --- a/gcc/java/lang.opt +++ b/gcc/java/lang.opt @@ -114,7 +114,7 @@ Java ; Documented for C Wdeprecated -Java Var(warn_deprecated) VarExists +Java Var(warn_deprecated) ; Documented for C Wextraneous-semicolon |