diff options
| -rw-r--r-- | ChangeLog | 4 | ||||
| -rw-r--r-- | gcc/ChangeLog | 261 | ||||
| -rw-r--r-- | gcc/DATESTAMP | 2 | ||||
| -rw-r--r-- | gcc/ada/ChangeLog | 180 | ||||
| -rw-r--r-- | gcc/c/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/cp/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/testsuite/ChangeLog | 100 | ||||
| -rw-r--r-- | libstdc++-v3/ChangeLog | 29 |
8 files changed, 587 insertions, 1 deletions
@@ -1,3 +1,7 @@ +2023-05-30 Jeevitha Palanisamy <jeevitha@linux.ibm.com> + + * MAINTAINERS (Write After Approval): Add myself. + 2023-05-29 Martin Jambor <mjambor@suse.cz> * MAINTAINERS: Replace spaces with tabs. diff --git a/gcc/ChangeLog b/gcc/ChangeLog index e4a4ed4..394e12d 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,264 @@ +2023-05-30 liuhongt <hongtao.liu@intel.com> + + PR tree-optimization/108804 + * tree-vect-patterns.cc (vect_get_range_info): Remove static. + * tree-vect-stmts.cc (vect_create_vectorized_demotion_stmts): + Add new parameter narrow_src_p. + (vectorizable_conversion): Enhance NARROW FLOAT_EXPR + vectorization by truncating to lower precision. + * tree-vectorizer.h (vect_get_range_info): New declare. + +2023-05-30 Vladimir N. Makarov <vmakarov@redhat.com> + + * lra-int.h (lra_update_sp_offset): Add the prototype. + * lra.cc (setup_sp_offset): Change the return type. Use + lra_update_sp_offset. + * lra-eliminations.cc (lra_update_sp_offset): New function. + (lra_process_new_insns): Push the current insn to reprocess if the + input reload changes sp offset. + +2023-05-30 Uros Bizjak <ubizjak@gmail.com> + + PR target/110041 + * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2): + Fix misleading identation. + +2023-05-30 Uros Bizjak <ubizjak@gmail.com> + + * rtl.h (comparison_dominates_p): Change return type from int to bool. + (condjump_p): Ditto. + (any_condjump_p): Ditto. + (any_uncondjump_p): Ditto. + (simplejump_p): Ditto. + (returnjump_p): Ditto. + (eh_returnjump_p): Ditto. + (onlyjump_p): Ditto. + (invert_jump_1): Ditto. + (invert_jump): Ditto. + (rtx_renumbered_equal_p): Ditto. + (redirect_jump_1): Ditto. + (redirect_jump): Ditto. + (condjump_in_parallel_p): Ditto. + * jump.cc (invert_exp_1): Adjust forward declaration. + (comparison_dominates_p): Change return type from int to bool + and adjust function body accordingly. + (simplejump_p): Ditto. + (condjump_p): Ditto. + (condjump_in_parallel_p): Ditto. + (any_uncondjump_p): Ditto. + (any_condjump_p): Ditto. + (returnjump_p): Ditto. + (eh_returnjump_p): Ditto. + (onlyjump_p): Ditto. + (redirect_jump_1): Ditto. + (redirect_jump): Ditto. + (invert_exp_1): Ditto. + (invert_jump_1): Ditto. + (invert_jump): Ditto. + (rtx_renumbered_equal_p): Ditto. + +2023-05-30 Andrew Pinski <apinski@marvell.com> + + * fold-const.cc (minmax_from_comparison): Add support for NE_EXPR. + * match.pd ((cond (cmp (convert1? x) c1) (convert2? x) c2) pattern): + Add ne as a possible cmp. + ((a CMP b) ? minmax<a, c> : minmax<b, c> pattern): Likewise. + +2023-05-30 Andrew Pinski <apinski@marvell.com> + + * match.pd (`(a CMP CST1) ? max<a,CST2> : a`): New + pattern. + +2023-05-30 Roger Sayle <roger@nextmovesoftware.com> + + * simplify-rtx.cc (simplify_binary_operation_1) <AND>: Use wide-int + instead of HWI_COMPUTABLE_MODE_P and UINTVAL in transformation of + (and (extend X) C) as (zero_extend (and X C)), to also optimize + modes wider than HOST_WIDE_INT. + +2023-05-30 Roger Sayle <roger@nextmovesoftware.com> + + PR target/107172 + * simplify-rtx.cc (simplify_const_relational_operation): Return + early if we have a MODE_CC comparison that isn't a COMPARE against + const0_rtx. + +2023-05-30 Robin Dapp <rdapp@ventanamicro.com> + + * config/riscv/riscv.cc (riscv_const_insns): Allow + const_vec_duplicates. + +2023-05-30 liuhongt <hongtao.liu@intel.com> + + PR middle-end/108938 + * gimple-ssa-store-merging.cc (is_bswap_or_nop_p): New + function, cut from original find_bswap_or_nop function. + (find_bswap_or_nop): Add a new parameter, detect bswap + + rotate and save rotate result in the new parameter. + (bswap_replace): Add a new parameter to indicate rotate and + generate rotate stmt if needed. + (maybe_optimize_vector_constructor): Adjust for new rotate + parameter in the upper 2 functions. + (pass_optimize_bswap::execute): Ditto. + (imm_store_chain_info::output_merged_store): Ditto. + +2023-05-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/aarch64/aarch64-simd.md (aarch64_<sur>adalp<mode>): Delete. + (aarch64_<su>adalp<mode>): New define_expand. + (*aarch64_<su>adalp<mode><vczle><vczbe>_insn): New define_insn. + (aarch64_<su>addlp<mode>): Convert to define_expand. + (*aarch64_<su>addlp<mode><vczle><vczbe>_insn): New define_insn. + * config/aarch64/iterators.md (UNSPEC_SADDLP, UNSPEC_UADDLP): Delete. + (ADALP): Likewise. + (USADDLP): Likewise. + * config/aarch64/predicates.md (vect_par_cnst_even_or_odd_half): Define. + +2023-05-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/aarch64/aarch64-builtins.cc (VAR1): Move to after inclusion of + aarch64-builtin-iterators.h. Add definition to remap shadd, uhadd, + srhadd, urhadd builtin codes for standard optab ones. + * config/aarch64/aarch64-simd.md (<u>avg<mode>3_floor): Rename to... + (<su_optab>avg<mode>3_floor): ... This. Expand to RTL codes rather than + unspec. + (<u>avg<mode>3_ceil): Rename to... + (<su_optab>avg<mode>3_ceil): ... This. Expand to RTL codes rather than + unspec. + (aarch64_<su>hsub<mode>): New define_expand. + (aarch64_<sur>h<addsub><mode><vczle><vczbe>): Split into... + (*aarch64_<su>h<ADDSUB:optab><mode><vczle><vczbe>_insn): ... This... + (*aarch64_<su>rhadd<mode><vczle><vczbe>_insn): ... And this. + +2023-05-30 Andreas Schwab <schwab@suse.de> + + PR target/110036 + * config/riscv/riscv.cc (riscv_asan_shadow_offset): Update to + match libsanitizer. + +2023-05-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/aarch64/aarch64-modes.def (V16HI, V8SI, V4DI, V2TI): New modes. + * config/aarch64/aarch64-protos.h (aarch64_const_vec_rnd_cst_p): + Declare prototype. + (aarch64_const_vec_rsra_rnd_imm_p): Likewise. + * config/aarch64/aarch64-simd.md (*aarch64_simd_sra<mode>): Rename to... + (aarch64_<sra_op>sra_n<mode>_insn): ... This. + (aarch64_<sra_op>rsra_n<mode>_insn): New define_insn. + (aarch64_<sra_op>sra_n<mode>): New define_expand. + (aarch64_<sra_op>rsra_n<mode>): Likewise. + (aarch64_<sur>sra_n<mode>): Rename to... + (aarch64_<sur>sra_ndi): ... This. + * config/aarch64/aarch64.cc (aarch64_classify_vector_mode): Add + any_target_p argument. + (aarch64_extract_vec_duplicate_wide_int): Define. + (aarch64_const_vec_rsra_rnd_imm_p): Likewise. + (aarch64_const_vec_rnd_cst_p): Likewise. + (aarch64_vector_mode_supported_any_target_p): Likewise. + (TARGET_VECTOR_MODE_SUPPORTED_ANY_TARGET_P): Likewise. + * config/aarch64/iterators.md (UNSPEC_SRSRA, UNSPEC_URSRA): Delete. + (VSRA): Adjust for the above. + (sur): Likewise. + (V2XWIDE): New mode_attr. + (vec_or_offset): Likewise. + (SHIFTEXTEND): Likewise. + * config/aarch64/predicates.md (aarch64_simd_rsra_rnd_imm_vec): New + predicate. + * doc/tm.texi (TARGET_VECTOR_MODE_SUPPORTED_P): Adjust description to + clarify that it applies to current target options. + (TARGET_VECTOR_MODE_SUPPORTED_ANY_TARGET_P): Document. + * doc/tm.texi.in: Regenerate. + * stor-layout.cc (mode_for_vector): Check + vector_mode_supported_any_target_p when iterating through vector modes. + * target.def (TARGET_VECTOR_MODE_SUPPORTED_P): Adjust description to + clarify that it applies to current target options. + (TARGET_VECTOR_MODE_SUPPORTED_ANY_TARGET_P): Define. + +2023-05-30 Lili Cui <lili.cui@intel.com> + + PR tree-optimization/98350 + * tree-ssa-reassoc.cc + (rewrite_expr_tree_parallel): Rewrite this function. + (rank_ops_for_fma): New. + (reassociate_bb): Handle new function. + +2023-05-30 Uros Bizjak <ubizjak@gmail.com> + + * rtl.h (rtx_addr_can_trap_p): Change return type from int to bool. + (rtx_unstable_p): Ditto. + (reg_mentioned_p): Ditto. + (reg_referenced_p): Ditto. + (reg_used_between_p): Ditto. + (reg_set_between_p): Ditto. + (modified_between_p): Ditto. + (no_labels_between_p): Ditto. + (modified_in_p): Ditto. + (reg_set_p): Ditto. + (multiple_sets): Ditto. + (set_noop_p): Ditto. + (noop_move_p): Ditto. + (reg_overlap_mentioned_p): Ditto. + (dead_or_set_p): Ditto. + (dead_or_set_regno_p): Ditto. + (find_reg_fusage): Ditto. + (find_regno_fusage): Ditto. + (side_effects_p): Ditto. + (volatile_refs_p): Ditto. + (volatile_insn_p): Ditto. + (may_trap_p_1): Ditto. + (may_trap_p): Ditto. + (may_trap_or_fault_p): Ditto. + (computed_jump_p): Ditto. + (auto_inc_p): Ditto. + (loc_mentioned_in_p): Ditto. + * rtlanal.cc (computed_jump_p_1): Adjust forward declaration. + (rtx_unstable_p): Change return type from int to bool + and adjust function body accordingly. + (rtx_addr_can_trap_p): Ditto. + (reg_mentioned_p): Ditto. + (no_labels_between_p): Ditto. + (reg_used_between_p): Ditto. + (reg_referenced_p): Ditto. + (reg_set_between_p): Ditto. + (reg_set_p): Ditto. + (modified_between_p): Ditto. + (modified_in_p): Ditto. + (multiple_sets): Ditto. + (set_noop_p): Ditto. + (noop_move_p): Ditto. + (reg_overlap_mentioned_p): Ditto. + (dead_or_set_p): Ditto. + (dead_or_set_regno_p): Ditto. + (find_reg_fusage): Ditto. + (find_regno_fusage): Ditto. + (remove_node_from_insn_list): Ditto. + (volatile_insn_p): Ditto. + (volatile_refs_p): Ditto. + (side_effects_p): Ditto. + (may_trap_p_1): Ditto. + (may_trap_p): Ditto. + (may_trap_or_fault_p): Ditto. + (computed_jump_p): Ditto. + (auto_inc_p): Ditto. + (loc_mentioned_in_p): Ditto. + * combine.cc (can_combine_p): Update indirect function. + +2023-05-30 Juzhe-Zhong <juzhe.zhong@rivai.ai> + + * config/riscv/autovec.md (<optab><mode><vconvert>2): New pattern. + * config/riscv/iterators.md: New attribute. + * config/riscv/vector-iterators.md: New attribute. + +2023-05-30 From: Juzhe-Zhong <juzhe.zhong@rivai.ai> + + * config/riscv/riscv.md: Fix signed and unsigned comparison + warning. + +2023-05-30 Juzhe-Zhong <juzhe.zhong@rivai.ai> + + * config/riscv/autovec.md (fnma<mode>4): New pattern. + (*fnma<mode>): Ditto. + 2023-05-29 Die Li <lidie@eswincomputing.com> * config/riscv/riscv.cc (riscv_expand_conditional_move_onesided): diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP index 9de50ce..748e702 100644 --- a/gcc/DATESTAMP +++ b/gcc/DATESTAMP @@ -1 +1 @@ -20230530 +20230531 diff --git a/gcc/ada/ChangeLog b/gcc/ada/ChangeLog index eab8f00..fe1d77d 100644 --- a/gcc/ada/ChangeLog +++ b/gcc/ada/ChangeLog @@ -1,3 +1,183 @@ +2023-05-30 Eric Botcazou <ebotcazou@adacore.com> + + * gcc-interface/trans.cc (get_storage_model_access): Also strip any + type conversion in the node when unwinding the components. + +2023-05-30 Eric Botcazou <ebotcazou@adacore.com> + + * gcc-interface/trans.cc (node_is_component): Remove parentheses. + (node_is_type_conversion): New predicate. + (get_atomic_access): Use it. + (get_storage_model_access): Likewise and look into the parent to + find a component if it returns true. + (present_in_lhs_or_actual_p): Likewise. + +2023-05-30 Eric Botcazou <ebotcazou@adacore.com> + + * gcc-interface/trans.cc (Attribute_to_gnu) <Attr_Size>: Check that + the storage model has Copy_From before instantiating loads for it. + <Attr_Length>: Likewise. + <Attr_Bit_Position>: Likewise. + (gnat_to_gnu) <N_Indexed_Component>: Likewise. + <N_Slice>: Likewise. + +2023-05-30 Marc Poulhiès <poulhies@adacore.com> + + * gcc-interface/trans.cc (Attribute_to_gnu): Also strip conversion + in case of DECL. + +2023-05-30 Eric Botcazou <ebotcazou@adacore.com> + + * gcc-interface/decl.cc (gnat_to_gnu_entity) <E_Array_Type>: Use a + local variable for the GNAT index type. + <E_Array_Subtype>: Likewise. Call Is_Null_Range on the bounds and + force the zero on TYPE_SIZE and TYPE_SIZE_UNIT if it returns true. + +2023-05-30 Eric Botcazou <ebotcazou@adacore.com> + + * gcc-interface/trans.cc (gnat_to_gnu) <N_Op_Mod>: Test the + precision of the operation rather than that of the result type. + +2023-05-30 Eric Botcazou <ebotcazou@adacore.com> + + * gcc-interface/decl.cc (gnat_to_gnu_entity) <E_Variable>: Replace + integer_zero_node with null_pointer_node for pointer types. + * gcc-interface/trans.cc (gnat_gimplify_expr) <NULL_EXPR>: Likewise. + * gcc-interface/utils.cc (maybe_pad_type): Do not attempt to make a + packable type from a fat pointer type. + * gcc-interface/utils2.cc (build_atomic_load): Use a local variable. + (build_atomic_store): Likewise. + +2023-05-30 Eric Botcazou <ebotcazou@adacore.com> + + * gcc-interface/misc.cc (internal_error_function): Be prepared for + an input_location set to UNKNOWN_LOCATION. + +2023-05-30 Eric Botcazou <ebotcazou@adacore.com> + + * gcc-interface/trans.cc (Attribute_to_gnu) <Attr_Size>: Tweak. + (gnat_to_gnu) <N_Assignment_Statement>: Declare a local variable. + For a target with a storage model, use the Actual_Designated_Subtype + to compute the size if it is present. + +2023-05-30 Eric Botcazou <ebotcazou@adacore.com> + + * gcc-interface/trans.cc (Call_to_gnu): Remove code implementing the + by-copy semantics for actuals with nonnative storage models. + (gnat_to_gnu) <N_Assignment_Statement>: Remove code instantiating a + temporary for assignments between nonnative storage models. + +2023-05-30 Eric Botcazou <ebotcazou@adacore.com> + + * gcc-interface/decl.cc (range_cannot_be_superflat): Return true + immediately if Cannot_Be_Superflat is set. + * gcc-interface/misc.cc (gnat_post_options): Do not override the + -Wstringop-overflow setting. + +2023-05-30 Eric Botcazou <ebotcazou@adacore.com> + + * gcc-interface/Make-lang.in (ADA_CFLAGS): Move up. + (ALL_ADAFLAGS): Add $(NO_PIE_CFLAGS). + (ada/mdll.o): Remove. + (ada/mdll-fil.o): Likewise. + (ada/mdll-utl.o): Likewise. + +2023-05-30 Marc Poulhiès <poulhies@adacore.com> + + * gcc-interface/trans.cc (get_storage_model_access): Don't require + storage model access for dereference used as lvalue or renamings. + +2023-05-30 Eric Botcazou <ebotcazou@adacore.com> + + * exp_aggr.adb (Build_Array_Aggr_Code): Move the declaration of Typ + to the beginning. + (Initialize_Array_Component): Test the unqualified version of the + expression for the nested array case. + (Initialize_Ctrl_Array_Component): Do not duplicate the expression + here. Do the pattern matching of the unqualified version of it. + (Gen_Assign): Call Unqualify to compute Expr_Q and use Expr_Q in + subsequent pattern matching. + (Initialize_Ctrl_Record_Component): Do the pattern matching of the + unqualified version of the aggregate. + (Build_Record_Aggr_Code): Call Unqualify. + (Convert_Aggr_In_Assignment): Likewise. + (Convert_Aggr_In_Object_Decl): Likewise. + (Component_OK_For_Backend): Likewise. + (Is_Delayed_Aggregate): Likewise. + +2023-05-30 Eric Botcazou <ebotcazou@adacore.com> + + * exp_aggr.adb (Build_Array_Aggr_Code.Get_Assoc_Expr): Duplicate the + expression here instead of... + (Build_Array_Aggr_Code): ...here. + +2023-05-30 Eric Botcazou <ebotcazou@adacore.com> + + * freeze.adb (Check_Large_Modular_Array): Fix head comment, use + Standard_Long_Long_Integer_Size directly and generate a reference + just before the raise statement if the Etype of the object is an + itype declared in an open scope. + +2023-05-30 Eric Botcazou <ebotcazou@adacore.com> + + * exp_ch7.adb (Find_Enclosing_Transient_Scope): Return the index in + the scope table instead of the scope's entity. + (Establish_Transient_Scope): If an enclosing scope already exists, + do not set the Uses_Sec_Stack flag on it if the node to be wrapped + is a return statement which requires secondary stack management. + +2023-05-30 Joel Brobecker <brobecker@adacore.com> + + * Makefile.rtl: Use libgnat/s-tsmona__linux.adb on + aarch64-linux. Link libgnat with -ldl, as the use of + s-tsmona__linux.adb requires it. + +2023-05-30 Piotr Trojanek <trojanek@adacore.com> + + * exp_ch3.adb + (Build_Access_Subprogram_Wrapper_Body): Build wrapper body if requested + by routine that builds wrapper spec. + * sem_ch3.adb + (Analyze_Full_Type_Declaration): Only build wrapper when expander is + active. + (Build_Access_Subprogram_Wrapper): + Remove special-case for GNATprove. + +2023-05-30 Ronan Desplanques <desplanques@adacore.com> + + * doc/gnat_ugn/building_executable_programs_with_gnat.rst: Fix minor issues. + * doc/gnat_ugn/the_gnat_compilation_model.rst: Fix minor issues. + * gnat_ugn.texi: Regenerate. + +2023-05-30 Johannes Kliemann <kliemann@adacore.com> + + * libgnat/s-parame.adb: Check that Default_Stack_Size >= + Minimum_Stack_size. + * libgnat/s-parame__rtems.adb: Ditto. + * libgnat/s-parame__vxworks.adb: Check that Default_Stack_Size >= + Minimum_Stack_size and use the proper Minimum_Stack_Size if + Stack_Check_Limits is enabled. + +2023-05-30 Eric Botcazou <ebotcazou@adacore.com> + + * sem_res.adb (Resolve_Call): Restrict previous change to calls that + return on the same stack as the enclosing function. Tidy up. + +2023-05-30 Eric Botcazou <ebotcazou@adacore.com> + + * libgnat/a-cidlli.adb (Put_Image): Simplify. + * libgnat/a-coinve.adb (Put_Image): Likewise. + +2023-05-30 Eric Botcazou <ebotcazou@adacore.com> + + * exp_util.adb (Build_DIC_Procedure_Body.Add_Own_DIC): When inside + a generic unit, preanalyze the expression directly. + (Build_Invariant_Procedure_Body.Add_Own_Invariants): Likewise. + +2023-05-30 Cedric Landet <landet@adacore.com> + + * init.c: Replace FIXME by ??? + 2023-05-29 Cedric Landet <landet@adacore.com> * s-oscons-tmplt.c: move the definition of sigset out of the diff --git a/gcc/c/ChangeLog b/gcc/c/ChangeLog index 09e561e..7e01681 100644 --- a/gcc/c/ChangeLog +++ b/gcc/c/ChangeLog @@ -1,3 +1,9 @@ +2023-05-30 Tobias Burnus <tobias@codesourcery.com> + + PR c/109999 + * c-parser.cc (c_parser_oacc_all_clauses, + c_parser_omp_all_clauses): Improve error wording. + 2023-05-23 Martin Uecker <uecker@tugraz.at> PR c/109450 diff --git a/gcc/cp/ChangeLog b/gcc/cp/ChangeLog index 999daf2..916171b 100644 --- a/gcc/cp/ChangeLog +++ b/gcc/cp/ChangeLog @@ -1,3 +1,9 @@ +2023-05-30 Tobias Burnus <tobias@codesourcery.com> + + PR c/109999 + * parser.cc (cp_parser_oacc_all_clauses, + cp_parser_omp_all_clauses): Improve error wording. + 2023-05-19 Andrew Pinski <apinski@marvell.com> PR driver/33980 diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 281b91c..a5a5bd1 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,103 @@ +2023-05-30 liuhongt <hongtao.liu@intel.com> + + * gcc.target/i386/pr108804.c: New test. + +2023-05-30 David Malcolm <dmalcolm@redhat.com> + + * gcc.dg/analyzer/malloc-sarif-1.c: Add missing verify-sarif-file + directive. + * gcc.dg/analyzer/sarif-pr107366.c: Likewise. + +2023-05-30 Georg-Johann Lay <avr@gjlay.de> + + PR testsuite/52641 + * gcc.dg/torture/pr107451.c: Require int32plus. + * gcc.dg/torture/pr108574-3.c: Use __INT32_TYPE__ instead of int. + * gcc.dg/torture/pr109940.c: Use __INTPTR_TYPE__ instead of long. + * gcc.dg/torture/pr95248.c: Require size24plus. + * gcc.dg/torture/pr95295-3.c: Use var_* with at least 32 bits int. + * gcc.dg/torture/pr98640.c: Cast to __INT32_TYPE__ instead of int. + * gcc.dg/tree-ssa/pr103771.c: Use int with at least 32 bits. + +2023-05-30 Christophe Lyon <christophe.lyon@linaro.org> + + * gcc.target/arm/mve/intrinsics/mve_intrinsic_type_overloads-int.c: + Support both definitions of int32_t. + +2023-05-30 Andrew Pinski <apinski@marvell.com> + + * gcc.dg/tree-ssa/minmax-22.c: New test. + +2023-05-30 Andrew Pinski <apinski@marvell.com> + + * gcc.dg/tree-ssa/phi-opt-5.c: Remove last xfail. + * gcc.dg/tree-ssa/pr66726-4.c: Change how scanning + works. + * gcc.dg/tree-ssa/pr66726-5.c: New test. + * gcc.dg/tree-ssa/pr66726-6.c: New test. + +2023-05-30 Christophe Lyon <christophe.lyon@linaro.org> + + * gcc.target/arm/acle/data-intrinsics-armv6.c: Fix typo. + * gcc.target/arm/acle/data-intrinsics-assembly.c: Require + arm_softfp_ok. + +2023-05-30 Tobias Burnus <tobias@codesourcery.com> + + PR c/109999 + * c-c++-common/goacc/asyncwait-1.c: Update dg-error. + * c-c++-common/goacc/clauses-fail.c: Likewise. + * c-c++-common/goacc/data-2.c: Likewise. + * c-c++-common/gomp/declare-target-2.c: Likewise. + * c-c++-common/gomp/directive-1.c: Likewise. + * g++.dg/goacc/data-1.C: Likewise. + +2023-05-30 Robin Dapp <rdapp@ventanamicro.com> + + * gcc.target/riscv/rvv/autovec/vmv-imm-fixed-rv32.c: Add vmv.v.x + tests. + * gcc.target/riscv/rvv/autovec/vmv-imm-fixed-rv64.c: Dito. + * gcc.target/riscv/rvv/autovec/vmv-imm-run.c: Dito. + * gcc.target/riscv/rvv/autovec/vmv-imm-rv32.c: Dito. + * gcc.target/riscv/rvv/autovec/vmv-imm-rv64.c: Dito. + * gcc.target/riscv/rvv/autovec/vmv-imm-template.h: Dito. + +2023-05-30 liuhongt <hongtao.liu@intel.com> + + * gcc.target/i386/pr108938-1.c: New test. + * gcc.target/i386/pr108938-2.c: New test. + * gcc.target/i386/pr108938-3.c: New test. + * gcc.target/i386/pr108938-load-1.c: New test. + * gcc.target/i386/pr108938-load-2.c: New test. + +2023-05-30 Andreas Schwab <schwab@suse.de> + + PR sanitizer/82501 + * c-c++-common/asan/pointer-compare-1.c: Disable use of small data + on RISC-V. + +2023-05-30 Lili Cui <lili.cui@intel.com> + + PR tree-optimization/98350 + * gcc.dg/pr98350-1.c: New test. + * gcc.dg/pr98350-2.c: Ditto. + +2023-05-30 Juzhe-Zhong <juzhe.zhong@rivai.ai> + + * gcc.target/riscv/rvv/autovec/conversions/vfcvt_rtz-run.c: New test. + * gcc.target/riscv/rvv/autovec/conversions/vfcvt_rtz-rv32gcv.c: New test. + * gcc.target/riscv/rvv/autovec/conversions/vfcvt_rtz-rv64gcv.c: New test. + * gcc.target/riscv/rvv/autovec/conversions/vfcvt_rtz-template.h: New test. + +2023-05-30 Juzhe-Zhong <juzhe.zhong@rivai.ai> + + * gcc.target/riscv/rvv/autovec/ternop/ternop-4.c: New test. + * gcc.target/riscv/rvv/autovec/ternop/ternop-5.c: New test. + * gcc.target/riscv/rvv/autovec/ternop/ternop-6.c: New test. + * gcc.target/riscv/rvv/autovec/ternop/ternop_run-4.c: New test. + * gcc.target/riscv/rvv/autovec/ternop/ternop_run-5.c: New test. + * gcc.target/riscv/rvv/autovec/ternop/ternop_run-6.c: New test. + 2023-05-29 Die Li <lidie@eswincomputing.com> * gcc.target/riscv/xtheadcondmov-indirect-rv32.c: Update the output. diff --git a/libstdc++-v3/ChangeLog b/libstdc++-v3/ChangeLog index 8df9f89..63c9a4e 100644 --- a/libstdc++-v3/ChangeLog +++ b/libstdc++-v3/ChangeLog @@ -1,3 +1,32 @@ +2023-05-30 Alexandre Oliva <oliva@adacore.com> + + * testsuite/20_util/from_chars/4.cc: Skip long double test06 + on x86_64-vxworks. + * testsuite/20_util/to_chars/long_double.cc: Xfail run on + x86_64-vxworks. + +2023-05-30 Matthias Kretz <m.kretz@gsi.de> + + PR libstdc++/109822 + * include/experimental/bits/simd.h (to_native): Use int NTTP + as specified in PTS2. + (to_compatible): Likewise. Add missing tag to call mask + generator ctor. + * testsuite/experimental/simd/pr109822_cast_functions.cc: New + test. + +2023-05-30 Matthias Kretz <m.kretz@gsi.de> + + * testsuite/experimental/simd/tests/integer_operators.cc: + Compute expected value differently to avoid getting turned into + a vector shift. + +2023-05-30 Matthias Kretz <m.kretz@gsi.de> + + * testsuite/experimental/simd/tests/operator_cvt.cc: Make long + double <-> (u)long conversion tests conditional on sizeof(long + double) and sizeof(long). + 2023-05-26 Matthias Kretz <m.kretz@gsi.de> * include/experimental/bits/simd_ppc.h (_S_bit_shift_left): |