diff options
| -rw-r--r-- | gcc/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/config/aarch64/aarch64.md | 40 |
2 files changed, 45 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index d37cc78..dc83c38 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2018-01-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/aarch64/aarch64.md: Add peepholes for CMP + SUB -> SUBS + and CMP + SUB-immediate -> SUBS. + 2018-01-26 Martin Sebor <msebor@redhat.com> PR tree-optimization/83896 diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md index a6ecb39..49095f8 100644 --- a/gcc/config/aarch64/aarch64.md +++ b/gcc/config/aarch64/aarch64.md @@ -2430,6 +2430,26 @@ } ) +;; Same as the above peephole but with the compare and minus in +;; swapped order. The restriction on overlap between operand 0 +;; and operands 1 and 2 doesn't apply here. +(define_peephole2 + [(set (reg:CC CC_REGNUM) + (compare:CC + (match_operand:GPI 1 "aarch64_reg_or_zero") + (match_operand:GPI 2 "aarch64_reg_or_zero"))) + (set (match_operand:GPI 0 "register_operand") + (minus:GPI (match_dup 1) + (match_dup 2)))] + "" + [(const_int 0)] + { + emit_insn (gen_sub<mode>3_compare1 (operands[0], operands[1], + operands[2])); + DONE; + } +) + (define_peephole2 [(set (match_operand:GPI 0 "register_operand") (plus:GPI (match_operand:GPI 1 "register_operand") @@ -2448,6 +2468,26 @@ } ) +;; Same as the above peephole but with the compare and minus in +;; swapped order. The restriction on overlap between operand 0 +;; and operands 1 doesn't apply here. +(define_peephole2 + [(set (reg:CC CC_REGNUM) + (compare:CC + (match_operand:GPI 1 "register_operand") + (match_operand:GPI 3 "const_int_operand"))) + (set (match_operand:GPI 0 "register_operand") + (plus:GPI (match_dup 1) + (match_operand:GPI 2 "aarch64_sub_immediate")))] + "INTVAL (operands[3]) == -INTVAL (operands[2])" + [(const_int 0)] + { + emit_insn (gen_sub<mode>3_compare1_imm (operands[0], operands[1], + operands[2], operands[3])); + DONE; + } +) + (define_insn "*sub_<shift>_<mode>" [(set (match_operand:GPI 0 "register_operand" "=r") (minus:GPI (match_operand:GPI 3 "register_operand" "r") |