diff options
| -rw-r--r-- | gcc/testsuite/ChangeLog | 4 | ||||
| -rw-r--r-- | gcc/testsuite/g++.target/aarch64/sve/vcond_1_run.C | 2 |
2 files changed, 5 insertions, 1 deletions
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 93e26de..1830b4d 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,5 +1,9 @@ 2019-10-31 Richard Sandiford <richard.sandiford@arm.com> + * g++.target/aarch64/sve/vcond_1_run.C: Update test name. + +2019-10-31 Richard Sandiford <richard.sandiford@arm.com> + * gcc.target/aarch64/sve/vcond_4.c: Split parts out into... * gcc.target/aarch64/sve/vcond_4_costly.c, * gcc.target/aarch64/sve/vcond_4_sel.c, diff --git a/gcc/testsuite/g++.target/aarch64/sve/vcond_1_run.C b/gcc/testsuite/g++.target/aarch64/sve/vcond_1_run.C index d01745e..2df3371 100644 --- a/gcc/testsuite/g++.target/aarch64/sve/vcond_1_run.C +++ b/gcc/testsuite/g++.target/aarch64/sve/vcond_1_run.C @@ -2,7 +2,7 @@ /* { dg-options "-O" } */ /* { dg-options "-O -msve-vector-bits=256" { target aarch64_sve256_hw } } */ -#include "sve_vcond_1.c" +#include "vcond_1.C" #define NUM_ELEMS(X) (sizeof (X) / sizeof (X[0])) |