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-rw-r--r--gcc/ChangeLog4
-rw-r--r--gcc/config/mips/mips.c6
2 files changed, 10 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index e58836c..e63b334 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,4 +1,8 @@
2007-07-03 David Ung <davidu@mips.com>
+
+ * config/mips/mips.c (mips_issue_rate): Return 4 for 74K processors.
+
+2007-07-03 David Ung <davidu@mips.com>
Richard Sandiford <richard@codesourcery.com>
* doc/invoke.texi: Document -march=74kf3_2.
diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
index 3331b9e..0cb1d1a 100644
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
@@ -10813,6 +10813,12 @@ mips_issue_rate (void)
case PROCESSOR_74KF2_1:
case PROCESSOR_74KF1_1:
case PROCESSOR_74KF3_2:
+ /* The 74k is not strictly quad-issue cpu, but can be seen as one
+ by the scheduler. It can issue 1 ALU, 1 AGEN and 2 FPU insns,
+ but in reality only a maximum of 3 insns can be issued as the
+ floating point load/stores also require a slot in the AGEN pipe. */
+ return 4;
+
case PROCESSOR_R4130:
case PROCESSOR_R5400:
case PROCESSOR_R5500: