diff options
| -rw-r--r-- | gcc/config/rs6000/smmintrin.h | 14 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/powerpc/sse4_1-blendvps.c | 65 |
2 files changed, 78 insertions, 1 deletions
diff --git a/gcc/config/rs6000/smmintrin.h b/gcc/config/rs6000/smmintrin.h index 1fda048..b9cb46b 100644 --- a/gcc/config/rs6000/smmintrin.h +++ b/gcc/config/rs6000/smmintrin.h @@ -113,9 +113,13 @@ _mm_blend_epi16 (__m128i __A, __m128i __B, const int __imm8) extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm_blendv_epi8 (__m128i __A, __m128i __B, __m128i __mask) { +#ifdef _ARCH_PWR10 + return (__m128i) vec_blendv ((__v16qi) __A, (__v16qi) __B, (__v16qu) __mask); +#else const __v16qu __seven = vec_splats ((unsigned char) 0x07); __v16qu __lmask = vec_sra ((__v16qu) __mask, __seven); - return (__m128i) vec_sel ((__v16qu) __A, (__v16qu) __B, __lmask); + return (__m128i) vec_sel ((__v16qi) __A, (__v16qi) __B, __lmask); +#endif } extern __inline __m128 @@ -149,9 +153,13 @@ extern __inline __m128 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm_blendv_ps (__m128 __A, __m128 __B, __m128 __mask) { +#ifdef _ARCH_PWR10 + return (__m128) vec_blendv ((__v4sf) __A, (__v4sf) __B, (__v4su) __mask); +#else const __v4si __zero = {0}; const __vector __bool int __boolmask = vec_cmplt ((__v4si) __mask, __zero); return (__m128) vec_sel ((__v4su) __A, (__v4su) __B, (__v4su) __boolmask); +#endif } extern __inline __m128d @@ -174,9 +182,13 @@ extern __inline __m128d __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm_blendv_pd (__m128d __A, __m128d __B, __m128d __mask) { +#ifdef _ARCH_PWR10 + return (__m128d) vec_blendv ((__v2df) __A, (__v2df) __B, (__v2du) __mask); +#else const __v2di __zero = {0}; const __vector __bool long long __boolmask = vec_cmplt ((__v2di) __mask, __zero); return (__m128d) vec_sel ((__v2du) __A, (__v2du) __B, (__v2du) __boolmask); +#endif } #endif diff --git a/gcc/testsuite/gcc.target/powerpc/sse4_1-blendvps.c b/gcc/testsuite/gcc.target/powerpc/sse4_1-blendvps.c new file mode 100644 index 0000000..8fcb553 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/sse4_1-blendvps.c @@ -0,0 +1,65 @@ +/* { dg-do run } */ +/* { dg-require-effective-target p8vector_hw } */ +/* { dg-options "-O2 -mpower8-vector -Wno-psabi" } */ + +#include "sse4_1-check.h" + +#include <smmintrin.h> +#include <string.h> + +#define NUM 20 + +static void +init_blendvps (float *src1, float *src2, float *mask) +{ + int i, msk, sign = 1; + + msk = -1; + for (i = 0; i < NUM * 4; i++) + { + if((i % 4) == 0) + msk++; + src1[i] = i* (i + 1) * sign; + src2[i] = (i + 20) * sign; + mask[i] = (i + 120) * i; + if( (msk & (1 << (i % 4)))) + mask[i] = -mask[i]; + sign = -sign; + } +} + +static int +check_blendvps (__m128 *dst, float *src1, float *src2, + float *mask) +{ + float tmp[4]; + int j; + + memcpy (&tmp[0], src1, sizeof (tmp)); + for (j = 0; j < 4; j++) + if (mask [j] < 0.0) + tmp[j] = src2[j]; + + return memcmp (dst, &tmp[0], sizeof (tmp)); +} + +static void +sse4_1_test (void) +{ + union + { + __m128 x[NUM]; + float f[NUM * 4]; + } dst, src1, src2, mask; + int i; + + init_blendvps (src1.f, src2.f, mask.f); + + for (i = 0; i < NUM; i++) + { + dst.x[i] = _mm_blendv_ps (src1.x[i], src2.x[i], mask.x[i]); + if (check_blendvps (&dst.x[i], &src1.f[i * 4], &src2.f[i * 4], + &mask.f[i * 4])) + abort (); + } +} |