diff options
-rw-r--r-- | gcc/ChangeLog | 7 | ||||
-rw-r--r-- | gcc/config/aarch64/aarch64-modes.def | 1 | ||||
-rw-r--r-- | gcc/config/aarch64/aarch64.c | 3 | ||||
-rw-r--r-- | gcc/testsuite/ChangeLog | 5 | ||||
-rw-r--r-- | gcc/testsuite/gcc.dg/vect/vect-singleton_1.c | 76 |
5 files changed, 91 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 8bbef16..10af9a5 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2014-06-10 Alan Lawrence <alan.lawrence@arm.com> + + PR target/59843 + * config/aarch64/aarch64-modes.def: Add V1DFmode. + * config/aarch64/aarch64.c (aarch64_vector_mode_supported_p): + Support V1DFmode. + 2014-06-12 Eric Botcazou <ebotcazou@adacore.com> * tree-core.h (DECL_NONALIASED): Use proper spelling in comment. diff --git a/gcc/config/aarch64/aarch64-modes.def b/gcc/config/aarch64/aarch64-modes.def index 1d2cc76..f9c4369 100644 --- a/gcc/config/aarch64/aarch64-modes.def +++ b/gcc/config/aarch64/aarch64-modes.def @@ -31,6 +31,7 @@ VECTOR_MODES (INT, 8); /* V8QI V4HI V2SI. */ VECTOR_MODES (INT, 16); /* V16QI V8HI V4SI V2DI. */ VECTOR_MODES (FLOAT, 8); /* V2SF. */ VECTOR_MODES (FLOAT, 16); /* V4SF V2DF. */ +VECTOR_MODE (FLOAT, DF, 1); /* V1DF. */ /* Oct Int: 256-bit integer mode needed for 32-byte vector arguments. */ INT_MODE (OI, 32); diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c index f2968ff..10fb7de 100644 --- a/gcc/config/aarch64/aarch64.c +++ b/gcc/config/aarch64/aarch64.c @@ -7251,7 +7251,8 @@ aarch64_vector_mode_supported_p (enum machine_mode mode) || mode == V16QImode || mode == V2DImode || mode == V2SImode || mode == V4HImode || mode == V8QImode || mode == V2SFmode - || mode == V4SFmode || mode == V2DFmode)) + || mode == V4SFmode || mode == V2DFmode + || mode == V1DFmode)) return true; return false; diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 094241a..464c823 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2014-06-10 Alan Lawrence <alan.lawrence@arm.com> + + PR target/59843 + * gcc.dg/vect/vect-singleton_1.c: New file. + 2014-06-12 Georg-Johann Lay <avr@gjlay.de> PR target/61443 diff --git a/gcc/testsuite/gcc.dg/vect/vect-singleton_1.c b/gcc/testsuite/gcc.dg/vect/vect-singleton_1.c new file mode 100644 index 0000000..8a4dc81 --- /dev/null +++ b/gcc/testsuite/gcc.dg/vect/vect-singleton_1.c @@ -0,0 +1,76 @@ +/* PR target/59843 ICE on function taking/returning vector of one float64_t. */ + +/* { dg-do compile } */ +/* { dg-options "-Warray-bounds -O2 -fno-inline -std=c99" } */ + +#define TEST(BASETYPE, VECTYPE, SUFFIX) \ + typedef BASETYPE VECTYPE \ + __attribute__ ((__vector_size__ (sizeof (BASETYPE)))); \ + VECTYPE \ + test_vadd_##SUFFIX (VECTYPE a, VECTYPE b) \ + { \ + return a + b; \ + } \ + \ + void \ + test_##SUFFIX (BASETYPE val) \ + { \ + VECTYPE var = { val }; \ + BASETYPE v0 = var[0]; \ + BASETYPE v1 = var[1]; /* { dg-warning "index value is out of bound" } */ \ + } + +TEST (double, float64x1_t, f64) + +/* Original bug was for above type; + in a nod to completeness, test other types too. */ + +TEST (long long, int64x1_t, s64) + +TEST (float, float32x1_t, f32) + +TEST (long, longx1_t, l) + +TEST (int, intx1_t, i) + +TEST (short, int16x1_t, s16) + +TEST (char, int8x1_t, s8) +/* PR target/59843 ICE on function taking/returning vector of one float64_t. */ + +/* { dg-do compile } */ +/* { dg-options "-Warray-bounds -O2 -fno-inline -std=c99" } */ + +#define TEST(BASETYPE, VECTYPE, SUFFIX) \ + typedef BASETYPE VECTYPE \ + __attribute__ ((__vector_size__ (sizeof (BASETYPE)))); \ + VECTYPE \ + test_vadd_##SUFFIX (VECTYPE a, VECTYPE b) \ + { \ + return a + b; \ + } \ + \ + void \ + test_##SUFFIX (BASETYPE val) \ + { \ + VECTYPE var = { val }; \ + BASETYPE v0 = var[0]; \ + BASETYPE v1 = var[1]; /* { dg-warning "index value is out of bound" } */ \ + } + +TEST (double, float64x1_t, f64) + +/* Original bug was for above type; + in a nod to completeness, test other types too. */ + +TEST (long long, int64x1_t, s64) + +TEST (float, float32x1_t, f32) + +TEST (long, longx1_t, l) + +TEST (int, intx1_t, i) + +TEST (short, int16x1_t, s16) + +TEST (char, int8x1_t, s8) |