diff options
| -rw-r--r-- | gcc/ChangeLog | 3 | ||||
| -rw-r--r-- | gcc/config/i386/i386.md | 24 |
2 files changed, 15 insertions, 12 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 50109a1..722a951 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,8 @@ 2004-12-22 Richard Henderson <rth@redhat.com> + * config/i386/i386.md (btsq, btrq, btcq): Fix modes. + (bt peepholes): Likewise. + * varasm.c (force_const_mem): Call set_mem_align. 2004-12-22 Richard Henderson <rth@redhat.com> diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 156e65f..648748c 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -12218,9 +12218,9 @@ ;; negdf respectively, so they can never be disabled entirely. (define_insn "*btsq" - [(set (zero_extract:DI (match_operand 0 "register_operand" "+r") + [(set (zero_extract:DI (match_operand:DI 0 "register_operand" "+r") (const_int 1) - (match_operand 1 "const_0_to_63_operand" "")) + (match_operand:DI 1 "const_0_to_63_operand" "")) (const_int 1)) (clobber (reg:CC FLAGS_REG))] "TARGET_64BIT && (TARGET_USE_BT || reload_completed)" @@ -12228,9 +12228,9 @@ [(set_attr "type" "alu1")]) (define_insn "*btrq" - [(set (zero_extract:DI (match_operand 0 "register_operand" "+r") + [(set (zero_extract:DI (match_operand:DI 0 "register_operand" "+r") (const_int 1) - (match_operand 1 "const_0_to_63_operand" "")) + (match_operand:DI 1 "const_0_to_63_operand" "")) (const_int 0)) (clobber (reg:CC FLAGS_REG))] "TARGET_64BIT && (TARGET_USE_BT || reload_completed)" @@ -12238,9 +12238,9 @@ [(set_attr "type" "alu1")]) (define_insn "*btcq" - [(set (zero_extract:DI (match_operand 0 "register_operand" "+r") + [(set (zero_extract:DI (match_operand:DI 0 "register_operand" "+r") (const_int 1) - (match_operand 1 "const_0_to_63_operand" "")) + (match_operand:DI 1 "const_0_to_63_operand" "")) (not:DI (zero_extract:DI (match_dup 0) (const_int 1) (match_dup 1)))) (clobber (reg:CC FLAGS_REG))] "TARGET_64BIT && (TARGET_USE_BT || reload_completed)" @@ -12252,9 +12252,9 @@ (define_peephole2 [(match_scratch:DI 2 "r") (parallel [(set (zero_extract:DI - (match_operand 0 "register_operand" "") + (match_operand:DI 0 "register_operand" "") (const_int 1) - (match_operand 1 "const_0_to_63_operand" "")) + (match_operand:DI 1 "const_0_to_63_operand" "")) (const_int 1)) (clobber (reg:CC FLAGS_REG))])] "TARGET_64BIT && !TARGET_USE_BT" @@ -12284,9 +12284,9 @@ (define_peephole2 [(match_scratch:DI 2 "r") (parallel [(set (zero_extract:DI - (match_operand 0 "register_operand" "") + (match_operand:DI 0 "register_operand" "") (const_int 1) - (match_operand 1 "const_0_to_63_operand" "")) + (match_operand:DI 1 "const_0_to_63_operand" "")) (const_int 0)) (clobber (reg:CC FLAGS_REG))])] "TARGET_64BIT && !TARGET_USE_BT" @@ -12316,9 +12316,9 @@ (define_peephole2 [(match_scratch:DI 2 "r") (parallel [(set (zero_extract:DI - (match_operand 0 "register_operand" "") + (match_operand:DI 0 "register_operand" "") (const_int 1) - (match_operand 1 "const_0_to_63_operand" "")) + (match_operand:DI 1 "const_0_to_63_operand" "")) (not:DI (zero_extract:DI (match_dup 0) (const_int 1) (match_dup 1)))) (clobber (reg:CC FLAGS_REG))])] |