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-rw-r--r--gcc/ChangeLog26
-rw-r--r--gcc/config/m32r/m32r.c10
-rw-r--r--gcc/config/m32r/m32r.h6
-rw-r--r--gcc/config/m32r/m32r.md2
-rw-r--r--gcc/config/m68k/m68k.c4
-rw-r--r--gcc/config/m88k/m88k.c2
-rw-r--r--gcc/config/mcore/mcore.c6
-rw-r--r--gcc/config/mips/mips.c26
-rw-r--r--gcc/config/mips/mips.h4
-rw-r--r--gcc/config/mmix/mmix.c2
-rw-r--r--gcc/config/mn10200/mn10200.c2
-rw-r--r--gcc/config/ns32k/ns32k.h2
-rw-r--r--gcc/config/pa/pa.c4
-rw-r--r--gcc/config/pa/pa64-linux.h2
-rw-r--r--gcc/config/pdp11/pdp11.h2
-rw-r--r--gcc/config/romp/romp.c12
-rw-r--r--gcc/config/romp/romp.h2
-rw-r--r--gcc/config/rs6000/eabi.asm4
-rw-r--r--gcc/config/rs6000/linux64.h2
-rw-r--r--gcc/config/rs6000/rs6000.c6
-rw-r--r--gcc/config/rs6000/rs6000.h14
-rw-r--r--gcc/config/rs6000/rs6000.md4
-rw-r--r--gcc/config/rs6000/sysv4.h4
-rw-r--r--gcc/config/rs6000/xcoff.h2
24 files changed, 88 insertions, 62 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index bc33b2f..31a3dc8 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,29 @@
+2002-09-20 Kazu Hirata <kazu@cs.umass.edu>
+
+ * config/m32r/m32r.c: Follow spelling conventions.
+ * config/m32r/m32r.h: Likewise.
+ * config/m32r/m32r.md: Likewise.
+ * config/m68k/m68k.c: Likewise.
+ * config/m88k/m88k.c: Likewise.
+ * config/mcore/mcore.c: Likewise.
+ * config/mips/mips.c: Likewise.
+ * config/mips/mips.h: Likewise.
+ * config/mmix/mmix.c: Likewise.
+ * config/mn10200/mn10200.c: Likewise.
+ * config/ns32k/ns32k.h: Likewise.
+ * config/pa/pa.c: Likewise.
+ * config/pa/pa64-linux.h: Likewise.
+ * config/pdp11/pdp11.h: Likewise.
+ * config/romp/romp.c: Likewise.
+ * config/romp/romp.h: Likewise.
+ * config/rs6000/eabi.asm: Likewise.
+ * config/rs6000/linux64.h: Likewise.
+ * config/rs6000/rs6000.c: Likewise.
+ * config/rs6000/rs6000.h: Likewise.
+ * config/rs6000/rs6000.md: Likewise.
+ * config/rs6000/sysv4.h: Likewise.
+ * config/rs6000/xcoff.h: Likewise.
+
2002-09-20 Jim Wilson <wilson@redhat.com>
* config/v850/v850/lib1funcs.asm (__muldi3): Change r5 to r28.
diff --git a/gcc/config/m32r/m32r.c b/gcc/config/m32r/m32r.c
index c3bd1a0..b3c0767 100644
--- a/gcc/config/m32r/m32r.c
+++ b/gcc/config/m32r/m32r.c
@@ -1029,7 +1029,7 @@ extend_operand (op, mode)
}
}
-/* Return non-zero if the operand is an insn that is a small insn.
+/* Return nonzero if the operand is an insn that is a small insn.
Allow const_int 0 as well, which is a placeholder for NOP slots. */
int
@@ -1046,7 +1046,7 @@ small_insn_p (op, mode)
return get_attr_length (op) == 2;
}
-/* Return non-zero if the operand is an insn that is a large insn. */
+/* Return nonzero if the operand is an insn that is a large insn. */
int
large_insn_p (op, mode)
@@ -2181,7 +2181,7 @@ m32r_output_function_epilogue (file, size)
m32r_compute_function_type (NULL_TREE);
}
-/* Return non-zero if this function is known to have a null or 1 instruction
+/* Return nonzero if this function is known to have a null or 1 instruction
epilogue. */
int
@@ -2590,7 +2590,7 @@ zero_and_one (operand1, operand2)
||((INTVAL (operand1) == 1) && (INTVAL (operand2) == 0)));
}
-/* Return non-zero if the operand is suitable for use in a conditional move sequence. */
+/* Return nonzero if the operand is suitable for use in a conditional move sequence. */
int
conditional_move_operand (operand, mode)
rtx operand;
@@ -2862,7 +2862,7 @@ m32r_output_block_move (insn, operands)
stores are done without any increment, then the remaining ones can use
the pre-increment addressing mode.
- Note: expand_block_move() also relies upon this behaviour when building
+ Note: expand_block_move() also relies upon this behavior when building
loops to copy large blocks. */
first_time = 1;
diff --git a/gcc/config/m32r/m32r.h b/gcc/config/m32r/m32r.h
index 5b7762a..80dffd1 100644
--- a/gcc/config/m32r/m32r.h
+++ b/gcc/config/m32r/m32r.h
@@ -185,7 +185,7 @@ Boston, MA 02111-1307, USA. */
extern int target_flags;
-/* If non-zero, tell the linker to do relaxing.
+/* If nonzero, tell the linker to do relaxing.
We don't do anything with the option, other than recognize it.
LINK_SPEC handles passing -relax to the linker.
This can cause incorrect debugging information as line numbers may
@@ -972,7 +972,7 @@ M32R_STACK_ALIGN (current_function_outgoing_args_size)
{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM }, \
{ ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM }}
-/* A C expression that returns non-zero if the compiler is allowed to
+/* A C expression that returns nonzero if the compiler is allowed to
try to replace register number FROM-REG with register number
TO-REG. This macro need only be defined if `ELIMINABLE_REGS' is
defined, and will usually be the constant 1, since most of the
@@ -1414,7 +1414,7 @@ do { \
/* Condition code usage. */
-/* Return non-zero if SELECT_CC_MODE will never return MODE for a
+/* Return nonzero if SELECT_CC_MODE will never return MODE for a
floating point inequality comparison. */
#define REVERSIBLE_CC_MODE(MODE) 1 /*???*/
diff --git a/gcc/config/m32r/m32r.md b/gcc/config/m32r/m32r.md
index 4de64b0..83976a8 100644
--- a/gcc/config/m32r/m32r.md
+++ b/gcc/config/m32r/m32r.md
@@ -1242,7 +1242,7 @@
;; reg == small constant comparisons are best handled by putting the result
;; of the comparison in a tmp reg and then using beqz/bnez.
;; ??? The result register doesn't contain 0/STORE_FLAG_VALUE,
-;; it contains 0/non-zero.
+;; it contains 0/nonzero.
(define_insn "cmp_ne_small_const_insn"
[(set (match_operand:SI 0 "register_operand" "=r,r")
diff --git a/gcc/config/m68k/m68k.c b/gcc/config/m68k/m68k.c
index acc61bd..cc03879 100644
--- a/gcc/config/m68k/m68k.c
+++ b/gcc/config/m68k/m68k.c
@@ -1119,7 +1119,7 @@ valid_dbcc_comparison_p (x, mode)
}
}
-/* Return non-zero if flags are currently in the 68881 flag register. */
+/* Return nonzero if flags are currently in the 68881 flag register. */
int
flags_in_68881 ()
{
@@ -3115,7 +3115,7 @@ print_operand (file, op, letter)
macro. See m68k/sgs.h for an example; for versions without the bug.
Some assemblers refuse all the above solutions. The workaround is to
emit "K(pc,d0.l*2)" with K being a small constant known to give the
- right behaviour.
+ right behavior.
They also do not like things like "pea 1.w", so we simple leave off
the .w on small constants.
diff --git a/gcc/config/m88k/m88k.c b/gcc/config/m88k/m88k.c
index a9692e8..a6eae5e 100644
--- a/gcc/config/m88k/m88k.c
+++ b/gcc/config/m88k/m88k.c
@@ -1906,7 +1906,7 @@ m88k_layout_frame ()
m88k_stack_size = m88k_fp_offset + STARTING_FRAME_OFFSET;
/* First, combine m88k_stack_size and size. If m88k_stack_size is
- non-zero, align the frame size to 8 mod 16; otherwise align the
+ nonzero, align the frame size to 8 mod 16; otherwise align the
frame size to 0 mod 16. (If stacks are 8 byte aligned, this ends
up as a NOP. */
{
diff --git a/gcc/config/mcore/mcore.c b/gcc/config/mcore/mcore.c
index be68d66..fa14654 100644
--- a/gcc/config/mcore/mcore.c
+++ b/gcc/config/mcore/mcore.c
@@ -1296,7 +1296,7 @@ mcore_output_inline_const_forced (insn, operands, mode)
/* Now, work our way backwards emitting the constant. */
- /* Emit the value that remains -- it will be non-zero. */
+ /* Emit the value that remains -- it will be nonzero. */
operands[1] = GEN_INT (value);
output_asm_insn (output_inline_const (SImode, operands), operands);
@@ -3268,7 +3268,7 @@ mcore_function_arg_partial_nregs (cum, mode, type, named)
return reg;
}
-/* Return non-zero if SYMBOL is marked as being dllexport'd. */
+/* Return nonzero if SYMBOL is marked as being dllexport'd. */
int
mcore_dllexport_name_p (symbol)
const char * symbol;
@@ -3276,7 +3276,7 @@ mcore_dllexport_name_p (symbol)
return symbol[0] == '@' && symbol[1] == 'e' && symbol[2] == '.';
}
-/* Return non-zero if SYMBOL is marked as being dllimport'd. */
+/* Return nonzero if SYMBOL is marked as being dllimport'd. */
int
mcore_dllimport_name_p (symbol)
const char * symbol;
diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
index 1d7157d..610beb7 100644
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
@@ -216,7 +216,7 @@ struct mips_arg_info
unsigned int stack_words;
/* The offset from the start of the stack overflow area of the argument's
- first stack word. Only meaningful when STACK_WORDS is non-zero. */
+ first stack word. Only meaningful when STACK_WORDS is nonzero. */
unsigned int stack_offset;
};
@@ -238,7 +238,7 @@ int sdb_label_count = 0;
/* Next label # for each statement for Silicon Graphics IRIS systems. */
int sym_lineno = 0;
-/* Non-zero if inside of a function, because the stupid MIPS asm can't
+/* Nonzero if inside of a function, because the stupid MIPS asm can't
handle .files inside of functions. */
int inside_function = 0;
@@ -1455,7 +1455,7 @@ mips_reg_mode_ok_for_base_p (reg, mode, strict)
/* This function is used to implement GO_IF_LEGITIMATE_ADDRESS. It
returns a nonzero value if XINSN is a legitimate address for a
- memory operand of the indicated MODE. STRICT is non-zero if this
+ memory operand of the indicated MODE. STRICT is nonzero if this
function is called during reload. */
int
@@ -3103,7 +3103,7 @@ map_test_to_internal_test (test_code)
??? This is called with result nonzero by the Scond patterns in
mips.md. These patterns are called with a target in the mode of
the Scond instruction pattern. Since this must be a constant, we
- must use SImode. This means that if RESULT is non-zero, it will
+ must use SImode. This means that if RESULT is nonzero, it will
always be an SImode register, even if TARGET_64BIT is true. We
cope with this by calling convert_move rather than emit_move_insn.
This will sometimes lead to an unnecessary extension of the result;
@@ -3345,7 +3345,7 @@ gen_conditional_branch (operands, test_code)
test_code = NE;
}
else if (GET_CODE (cmp1) == CONST_INT && INTVAL (cmp1) != 0)
- /* We don't want to build a comparison against a non-zero
+ /* We don't want to build a comparison against a nonzero
constant. */
cmp1 = force_reg (mode, cmp1);
@@ -6013,7 +6013,7 @@ mips_assemble_integer (x, size, aligned_p)
If we have -G 0, or the extern size is unknown, or the object is in a user
specified section that is not .sbss/.sdata, don't bother emitting the
- .externs. In the case of user specified sections this behaviour is
+ .externs. In the case of user specified sections this behavior is
required as otherwise GAS will think the object lives in .sbss/.sdata. */
int
@@ -7889,7 +7889,7 @@ mips_can_use_return_insn ()
return compute_frame_size (get_frame_size ()) == 0;
}
-/* Returns non-zero if X contains a SYMBOL_REF. */
+/* Returns nonzero if X contains a SYMBOL_REF. */
static int
symbolic_expression_p (x)
@@ -8722,7 +8722,7 @@ mips16_constant (x, mode, addr, addend)
/* Write out code to move floating point arguments in or out of
general registers. Output the instructions to FILE. FP_CODE is
the code describing which arguments are present (see the comment at
- the definition of CUMULATIVE_ARGS in mips.h). FROM_FP_P is non-zero if
+ the definition of CUMULATIVE_ARGS in mips.h). FROM_FP_P is nonzero if
we are copying from the floating point registers. */
static void
@@ -9919,11 +9919,11 @@ mips_adjust_insn_length (insn, length)
INSN is the branch instruction. OPERANDS[0] is the condition.
OPERANDS[1] is the target of the branch. OPERANDS[2] is the target
of the first operand to the condition. If TWO_OPERANDS_P is
- non-zero the comparison takes two operands; OPERANDS[3] will be the
+ nonzero the comparison takes two operands; OPERANDS[3] will be the
second operand.
- If INVERTED_P is non-zero we are to branch if the condition does
- not hold. If FLOAT_P is non-zero this is a floating-point comparison.
+ If INVERTED_P is nonzero we are to branch if the condition does
+ not hold. If FLOAT_P is nonzero this is a floating-point comparison.
LENGTH is the length (in bytes) of the sequence we are to generate.
That tells us whether to generate a simple conditional branch, or a
@@ -9945,7 +9945,7 @@ mips_output_conditional_branch (insn,
static char buffer[200];
/* The kind of comparison we are doing. */
enum rtx_code code = GET_CODE (operands[0]);
- /* Non-zero if the opcode for the comparison needs a `z' indicating
+ /* Nonzero if the opcode for the comparison needs a `z' indicating
that it is a comparision against zero. */
int need_z_p;
/* A string to use in the assembly output to represent the first
@@ -9972,7 +9972,7 @@ mips_output_conditional_branch (insn,
subtract B from A and then look at the sign bit. But, if we
are doing an unsigned comparison, and B is zero, we don't
have to do the subtraction. Instead, we can just check to
- see if A is non-zero. Thus, we change the CODE here to
+ see if A is nonzero. Thus, we change the CODE here to
reflect the simpler comparison operation. */
switch (code)
{
diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h
index f254f8c..9239707 100644
--- a/gcc/config/mips/mips.h
+++ b/gcc/config/mips/mips.h
@@ -2299,7 +2299,7 @@ extern enum reg_class mips_char_to_class[256];
/* Certain machines have the property that some registers cannot be
copied to some other registers without using memory. Define this
- macro on those machines to be a C expression that is non-zero if
+ macro on those machines to be a C expression that is nonzero if
objects of mode MODE in registers of CLASS1 can only be copied to
registers of class CLASS2 by storing a register of CLASS1 into
memory and loading that memory location into a register of CLASS2.
@@ -2471,7 +2471,7 @@ extern enum reg_class mips_char_to_class[256];
{ FRAME_POINTER_REGNUM, GP_REG_FIRST + 30}, \
{ FRAME_POINTER_REGNUM, GP_REG_FIRST + 17}}
-/* A C expression that returns non-zero if the compiler is allowed to
+/* A C expression that returns nonzero if the compiler is allowed to
try to replace register number FROM-REG with register number
TO-REG. This macro need only be defined if `ELIMINABLE_REGS' is
defined, and will usually be the constant 1, since most of the
diff --git a/gcc/config/mmix/mmix.c b/gcc/config/mmix/mmix.c
index deb6b1e..61af93a 100644
--- a/gcc/config/mmix/mmix.c
+++ b/gcc/config/mmix/mmix.c
@@ -1985,7 +1985,7 @@ mmix_get_hard_reg_initial_val (mode, regno)
return get_hard_reg_initial_val (mode, regno);
}
-/* Non-zero when the function epilogue is simple enough that a single
+/* Nonzero when the function epilogue is simple enough that a single
"POP %d,0" should be used even within the function. */
int
diff --git a/gcc/config/mn10200/mn10200.c b/gcc/config/mn10200/mn10200.c
index 66ee9ad..b41c61f 100644
--- a/gcc/config/mn10200/mn10200.c
+++ b/gcc/config/mn10200/mn10200.c
@@ -943,7 +943,7 @@ secondary_reload_class (class, mode, in, input)
The basic shift methods:
- * loop shifts -- emit a loop using one (or two on H8/S) bit shifts;
+ * loop shifts -- emit a loop using one (or two on H8S) bit shifts;
this is the default. SHIFT_LOOP
* inlined shifts -- emit straight line code for the shift; this is
diff --git a/gcc/config/ns32k/ns32k.h b/gcc/config/ns32k/ns32k.h
index 7b12d1a..4ecb47b 100644
--- a/gcc/config/ns32k/ns32k.h
+++ b/gcc/config/ns32k/ns32k.h
@@ -863,7 +863,7 @@ __transfer_from_trampoline () \
/* Certain machines have the property that some registers cannot be
copied to some other registers without using memory. Define this
- macro on those machines to be a C expression that is non-zero if
+ macro on those machines to be a C expression that is nonzero if
objects of mode M in registers of CLASS1 can only be copied to
registers of class CLASS2 by storing a register of CLASS1 into
memory and loading that memory location into a register of CLASS2.
diff --git a/gcc/config/pa/pa.c b/gcc/config/pa/pa.c
index e9679a7..98944da 100644
--- a/gcc/config/pa/pa.c
+++ b/gcc/config/pa/pa.c
@@ -305,7 +305,7 @@ override_options ()
}
}
-/* Return non-zero only if OP is a register of mode MODE,
+/* Return nonzero only if OP is a register of mode MODE,
or CONST0_RTX. */
int
reg_or_0_operand (op, mode)
@@ -315,7 +315,7 @@ reg_or_0_operand (op, mode)
return (op == CONST0_RTX (mode) || register_operand (op, mode));
}
-/* Return non-zero if OP is suitable for use in a call to a named
+/* Return nonzero if OP is suitable for use in a call to a named
function.
For 2.5 try to eliminate either call_operand_address or
diff --git a/gcc/config/pa/pa64-linux.h b/gcc/config/pa/pa64-linux.h
index e4abfe6..1691633 100644
--- a/gcc/config/pa/pa64-linux.h
+++ b/gcc/config/pa/pa64-linux.h
@@ -32,7 +32,7 @@ Boston, MA 02111-1307, USA. */
{ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
}
-/* A C expression that returns non-zero if the compiler is allowed to try to
+/* A C expression that returns nonzero if the compiler is allowed to try to
replace register number FROM with register number TO. The frame pointer
is automatically handled. */
diff --git a/gcc/config/pdp11/pdp11.h b/gcc/config/pdp11/pdp11.h
index f4e40b3..d01621c 100644
--- a/gcc/config/pdp11/pdp11.h
+++ b/gcc/config/pdp11/pdp11.h
@@ -508,7 +508,7 @@ loading is easier into LOAD_FPU_REGS than FPU_REGS! */
extern int current_first_parm_offset;
/* Offset of first parameter from the argument pointer register value.
- For the pdp11, this is non-zero to account for the return address.
+ For the pdp11, this is nonzero to account for the return address.
1 - return address
2 - frame pointer (always saved, even when not used!!!!)
-- chnage some day !!!:q!
diff --git a/gcc/config/romp/romp.c b/gcc/config/romp/romp.c
index c01ab05..44d422a 100644
--- a/gcc/config/romp/romp.c
+++ b/gcc/config/romp/romp.c
@@ -229,7 +229,7 @@ update_cc (body, insn)
break;
case CC_TBIT:
- /* Insn sets T bit if result is non-zero. Next insn must be branch. */
+ /* Insn sets T bit if result is nonzero. Next insn must be branch. */
CC_STATUS_INIT;
cc_status.flags = CC_IN_TB | CC_NOT_NEGATIVE;
break;
@@ -389,7 +389,7 @@ current_function_operand (op, mode)
&& ! strcmp (current_function_name, XSTR (op, 0)));
}
-/* Return non-zero if this function is known to have a null epilogue. */
+/* Return nonzero if this function is known to have a null epilogue. */
int
null_epilogue ()
@@ -786,7 +786,7 @@ print_operand (file, x, code)
break;
case 'Z':
- /* Upper or lower half, depending on which is non-zero or not
+ /* Upper or lower half, depending on which is nonzero or not
all ones. Must be consistent with 'z' above. */
if (GET_CODE (x) != CONST_INT)
output_operand_lossage ("invalid %%Z value");
@@ -1032,7 +1032,7 @@ romp_sa_size ()
return size * 4;
}
-/* Return non-zero if this function makes calls or has fp operations
+/* Return nonzero if this function makes calls or has fp operations
(which are really calls). */
int
@@ -1059,7 +1059,7 @@ romp_makes_calls ()
return 0;
}
-/* Return non-zero if this function will use r14 as a pointer to its
+/* Return nonzero if this function will use r14 as a pointer to its
constant pool. */
int
@@ -1071,7 +1071,7 @@ romp_using_r14 ()
|| get_pool_size () != 0 || romp_makes_calls ());
}
-/* Return non-zero if this function needs to push space on the stack. */
+/* Return nonzero if this function needs to push space on the stack. */
int
romp_pushes_stack ()
diff --git a/gcc/config/romp/romp.h b/gcc/config/romp/romp.h
index c5ca82b..c2d1505 100644
--- a/gcc/config/romp/romp.h
+++ b/gcc/config/romp/romp.h
@@ -1085,7 +1085,7 @@ struct rt_cargs {int gregs, fregs; };
#define MOVE_MAX 4
/* Nonzero if access to memory by bytes is no faster than for words.
- Also non-zero if doing byte operations (specifically shifts) in registers
+ Also nonzero if doing byte operations (specifically shifts) in registers
is undesirable. */
#define SLOW_BYTE_ACCESS 1
diff --git a/gcc/config/rs6000/eabi.asm b/gcc/config/rs6000/eabi.asm
index 0808e9c..058f9b9 100644
--- a/gcc/config/rs6000/eabi.asm
+++ b/gcc/config/rs6000/eabi.asm
@@ -139,7 +139,7 @@ FUNC_START(__eabi)
addi 11,11,.LCTOC1@l
cmplwi 2,9,0 /* init flag != 0? */
bnelr 2 /* return now, if we've been called already */
- stw 1,.Linit_p@l(10) /* store a non-zero value in the done flag */
+ stw 1,.Linit_p@l(10) /* store a nonzero value in the done flag */
#else /* -mrelocatable */
mflr 0
@@ -155,7 +155,7 @@ FUNC_START(__eabi)
cmplwi 2,9,0 /* init flag != 0? */
mtlr 0 /* restore in case branch was taken */
bnelr 2 /* return now, if we've been called already */
- stwx 1,10,12 /* store a non-zero value in the done flag */
+ stwx 1,10,12 /* store a nonzero value in the done flag */
beq+ 0,.Lsdata /* skip if we don't need to relocate */
/* We need to relocate the .got2 pointers. */
diff --git a/gcc/config/rs6000/linux64.h b/gcc/config/rs6000/linux64.h
index b617a6d..77902c8 100644
--- a/gcc/config/rs6000/linux64.h
+++ b/gcc/config/rs6000/linux64.h
@@ -286,7 +286,7 @@ do { \
} \
while (0)
-/* Return non-zero if this entry is to be written into the constant
+/* Return nonzero if this entry is to be written into the constant
pool in a special way. We do so if this is a SYMBOL_REF, LABEL_REF
or a CONST containing one of them. If -mfp-in-toc (the default),
we also do this for floating-point constants. We actually can only
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index 909dc6b..4cb67f6 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -92,7 +92,7 @@ int rs6000_fprs = 1;
/* String from -misel=. */
const char *rs6000_isel_string;
-/* Set to non-zero once AIX common-mode calls have been defined. */
+/* Set to nonzero once AIX common-mode calls have been defined. */
static int common_mode_defined;
/* Private copy of original value of flag_pic for ABI_AIX. */
@@ -822,7 +822,7 @@ rs6000_file_start (file, default_cpu)
}
}
-/* Return non-zero if this function is known to have a null epilogue. */
+/* Return nonzero if this function is known to have a null epilogue. */
int
direct_return ()
@@ -8348,7 +8348,7 @@ rs6000_emit_cbranch (code, loc)
condition code register and its mode specifies what kind of
comparison we made.
- REVERSED is non-zero if we should reverse the sense of the comparison.
+ REVERSED is nonzero if we should reverse the sense of the comparison.
INSN is the insn. */
diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h
index b3f1faa..b913ff6 100644
--- a/gcc/config/rs6000/rs6000.h
+++ b/gcc/config/rs6000/rs6000.h
@@ -651,7 +651,7 @@ extern int rs6000_default_long_calls;
&& TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
&& (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
-/* Non-zero if move instructions will actually fail to work
+/* Nonzero if move instructions will actually fail to work
when given unaligned data. */
#define STRICT_ALIGNMENT 0
@@ -1226,8 +1226,8 @@ enum reg_class
Return 1 if VALUE is in the range specified by C.
`I' is a signed 16-bit constant
- `J' is a constant with only the high-order 16 bits non-zero
- `K' is a constant with only the low-order 16 bits non-zero
+ `J' is a constant with only the high-order 16 bits nonzero
+ `K' is a constant with only the low-order 16 bits nonzero
`L' is a signed 16-bit constant shifted left 16 bits
`M' is a constant that is greater than 31
`N' is a positive constant that is an exact power of two
@@ -1694,13 +1694,13 @@ typedef struct rs6000_args
#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
function_arg_advance (&CUM, MODE, TYPE, NAMED)
-/* Non-zero if we can use a floating-point register to pass this arg. */
+/* Nonzero if we can use a floating-point register to pass this arg. */
#define USE_FP_FOR_ARG_P(CUM,MODE,TYPE) \
(GET_MODE_CLASS (MODE) == MODE_FLOAT \
&& (CUM).fregno <= FP_ARG_MAX_REG \
&& TARGET_HARD_FLOAT && TARGET_FPRS)
-/* Non-zero if we can use an AltiVec register to pass this arg. */
+/* Nonzero if we can use an AltiVec register to pass this arg. */
#define USE_ALTIVEC_FOR_ARG_P(CUM,MODE,TYPE) \
(ALTIVEC_VECTOR_MODE (MODE) \
&& (CUM).vregno <= ALTIVEC_ARG_MAX_REG \
@@ -1817,7 +1817,7 @@ typedef struct rs6000_args
the stack pointer does not matter. No definition is equivalent to
always zero.
- On the RS/6000, this is non-zero because we can restore the stack from
+ On the RS/6000, this is nonzero because we can restore the stack from
its backpointer, which we maintain. */
#define EXIT_IGNORE_STACK 1
@@ -2261,7 +2261,7 @@ do { \
#define MAX_MOVE_MAX 8
/* Nonzero if access to memory by bytes is no faster than for words.
- Also non-zero if doing byte operations (specifically shifts) in registers
+ Also nonzero if doing byte operations (specifically shifts) in registers
is undesirable. */
#define SLOW_BYTE_ACCESS 1
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index e85dc53..c1a8478 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -10465,7 +10465,7 @@
}")
;; Call to function in current module. No TOC pointer reload needed.
-;; Operand2 is non-zero if we are using the V.4 calling sequence and
+;; Operand2 is nonzero if we are using the V.4 calling sequence and
;; either the function was not prototyped, or it was prototyped as a
;; variable argument function. It is > 0 if FP registers were passed
;; and < 0 if they were not.
@@ -10551,7 +10551,7 @@
;; Call to function which may be in another module. Restore the TOC
;; pointer (r2) after the call unless this is System V.
-;; Operand2 is non-zero if we are using the V.4 calling sequence and
+;; Operand2 is nonzero if we are using the V.4 calling sequence and
;; either the function was not prototyped, or it was prototyped as a
;; variable argument function. It is > 0 if FP registers were passed
;; and < 0 if they were not.
diff --git a/gcc/config/rs6000/sysv4.h b/gcc/config/rs6000/sysv4.h
index 89b12a5..56aa702 100644
--- a/gcc/config/rs6000/sysv4.h
+++ b/gcc/config/rs6000/sysv4.h
@@ -551,7 +551,7 @@ fini_section () \
#define TARGET_ASM_SELECT_SECTION rs6000_elf_select_section
#define TARGET_ASM_UNIQUE_SECTION rs6000_elf_unique_section
-/* Return non-zero if this entry is to be written into the constant pool
+/* Return nonzero if this entry is to be written into the constant pool
in a special way. We do so if this is a SYMBOL_REF, LABEL_REF or a CONST
containing one of them. If -mfp-in-toc (the default), we also do
this for floating-point constants. We actually can only do this
@@ -1401,7 +1401,7 @@ ncrtn.o%s"
pack(pop)'. The pack(push,<n>) pragma specifies the maximum
alignment (in bytes) of fields within a structure, in much the
same way as the __aligned__' and __packed__' __attribute__'s
- do. A pack value of zero resets the behaviour to the default.
+ do. A pack value of zero resets the behavior to the default.
Successive invocations of this pragma cause the previous values to
be stacked, so that invocations of #pragma pack(pop)' will return
to the previous value. */
diff --git a/gcc/config/rs6000/xcoff.h b/gcc/config/rs6000/xcoff.h
index 820e71b..cad3981 100644
--- a/gcc/config/rs6000/xcoff.h
+++ b/gcc/config/rs6000/xcoff.h
@@ -135,7 +135,7 @@ toc_section () \
#define READONLY_DATA_SECTION read_only_data_section
-/* Return non-zero if this entry is to be written into the constant
+/* Return nonzero if this entry is to be written into the constant
pool in a special way. We do so if this is a SYMBOL_REF, LABEL_REF
or a CONST containing one of them. If -mfp-in-toc (the default),
we also do this for floating-point constants. We actually can only
generated by cgit v1.1 at 2024-08-22 17:01:30 +0000