diff options
| -rw-r--r-- | gcc/config/rs6000/rs6000-builtin.def | 3350 | ||||
| -rw-r--r-- | gcc/config/rs6000/rs6000-call.c | 712 | ||||
| -rw-r--r-- | gcc/config/rs6000/rs6000-protos.h | 3 | ||||
| -rw-r--r-- | gcc/config/rs6000/rs6000.c | 3 | ||||
| -rw-r--r-- | gcc/config/rs6000/rs6000.h | 57 | ||||
| -rw-r--r-- | gcc/config/rs6000/t-rs6000 | 1 |
6 files changed, 0 insertions, 4126 deletions
diff --git a/gcc/config/rs6000/rs6000-builtin.def b/gcc/config/rs6000/rs6000-builtin.def deleted file mode 100644 index 9dbf16f..0000000 --- a/gcc/config/rs6000/rs6000-builtin.def +++ /dev/null @@ -1,3350 +0,0 @@ -/* Builtin functions for rs6000/powerpc. - Copyright (C) 2009-2021 Free Software Foundation, Inc. - Contributed by Michael Meissner (meissner@linux.vnet.ibm.com) - - This file is part of GCC. - - GCC is free software; you can redistribute it and/or modify it - under the terms of the GNU General Public License as published - by the Free Software Foundation; either version 3, or (at your - option) any later version. - - GCC is distributed in the hope that it will be useful, but WITHOUT - ANY WARRANTY; without even the implied warranty of MERCHANTABILITY - or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public - License for more details. - - Under Section 7 of GPL version 3, you are granted additional - permissions described in the GCC Runtime Library Exception, version - 3.1, as published by the Free Software Foundation. - - You should have received a copy of the GNU General Public License and - a copy of the GCC Runtime Library Exception along with this program; - see the files COPYING3 and COPYING.RUNTIME respectively. If not, see - <http://www.gnu.org/licenses/>. */ - -/* Before including this file, some macros must be defined: - RS6000_BUILTIN_0 -- 0 arg builtins - RS6000_BUILTIN_1 -- 1 arg builtins - RS6000_BUILTIN_2 -- 2 arg builtins - RS6000_BUILTIN_3 -- 3 arg builtins - RS6000_BUILTIN_4 -- 4 arg builtins - RS6000_BUILTIN_A -- ABS builtins - RS6000_BUILTIN_D -- DST builtins - RS6000_BUILTIN_H -- HTM builtins - RS6000_BUILTIN_M -- MMA builtins - RS6000_BUILTIN_P -- Altivec, VSX, ISA 2.07 vector predicate builtins - RS6000_BUILTIN_X -- special builtins - - Each of the above macros takes 4 arguments: - ENUM Enumeration name - NAME String literal for the name - MASK Mask of bits that indicate which options enables the builtin - ATTR builtin attribute information. - ICODE Insn code of the function that implements the builtin. */ - -#ifndef RS6000_BUILTIN_COMPAT - #undef BU_COMPAT - #define BU_COMPAT(ENUM, COMPAT_NAME) - -#ifndef RS6000_BUILTIN_0 - #error "RS6000_BUILTIN_0 is not defined." -#endif - -#ifndef RS6000_BUILTIN_1 - #error "RS6000_BUILTIN_1 is not defined." -#endif - -#ifndef RS6000_BUILTIN_2 - #error "RS6000_BUILTIN_2 is not defined." -#endif - -#ifndef RS6000_BUILTIN_3 - #error "RS6000_BUILTIN_3 is not defined." -#endif - -#ifndef RS6000_BUILTIN_4 - #error "RS6000_BUILTIN_4 is not defined." -#endif - -#ifndef RS6000_BUILTIN_A - #error "RS6000_BUILTIN_A is not defined." -#endif - -#ifndef RS6000_BUILTIN_D - #error "RS6000_BUILTIN_D is not defined." -#endif - -#ifndef RS6000_BUILTIN_H - #error "RS6000_BUILTIN_H is not defined." -#endif - -#ifndef RS6000_BUILTIN_M - #error "RS6000_BUILTIN_M is not defined." -#endif - -#ifndef RS6000_BUILTIN_P - #error "RS6000_BUILTIN_P is not defined." -#endif - -#ifndef RS6000_BUILTIN_X - #error "RS6000_BUILTIN_X is not defined." -#endif - -#else - /* Compatibility builtins. These builtins are simply mapped into - their compatible builtin function identified by ENUM. */ - #undef BU_COMPAT - #define BU_COMPAT(ENUM, COMPAT_NAME) { ENUM, "__builtin_" COMPAT_NAME }, - - #undef RS6000_BUILTIN_0 - #undef RS6000_BUILTIN_1 - #undef RS6000_BUILTIN_2 - #undef RS6000_BUILTIN_3 - #undef RS6000_BUILTIN_4 - #undef RS6000_BUILTIN_A - #undef RS6000_BUILTIN_D - #undef RS6000_BUILTIN_H - #undef RS6000_BUILTIN_M - #undef RS6000_BUILTIN_P - #undef RS6000_BUILTIN_X - #define RS6000_BUILTIN_0(ENUM, NAME, MASK, ATTR, ICODE) - #define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE) - #define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE) - #define RS6000_BUILTIN_3(ENUM, NAME, MASK, ATTR, ICODE) - #define RS6000_BUILTIN_4(ENUM, NAME, MASK, ATTR, ICODE) - #define RS6000_BUILTIN_A(ENUM, NAME, MASK, ATTR, ICODE) - #define RS6000_BUILTIN_D(ENUM, NAME, MASK, ATTR, ICODE) - #define RS6000_BUILTIN_H(ENUM, NAME, MASK, ATTR, ICODE) - #define RS6000_BUILTIN_M(ENUM, NAME, MASK, ATTR, ICODE) - #define RS6000_BUILTIN_P(ENUM, NAME, MASK, ATTR, ICODE) - #define RS6000_BUILTIN_X(ENUM, NAME, MASK, ATTR, ICODE) -#endif - -#ifndef BU_AV_1 -/* Define convenience macros using token pasting to allow fitting everything in - one line. */ - -/* Altivec convenience macros. */ -#define BU_ALTIVEC_1(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_1 (ALTIVEC_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_altivec_" NAME, /* NAME */ \ - RS6000_BTM_ALTIVEC, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_UNARY), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -#define BU_ALTIVEC_2(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_2 (ALTIVEC_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_altivec_" NAME, /* NAME */ \ - RS6000_BTM_ALTIVEC, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_BINARY), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -#define BU_ALTIVEC_3(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_3 (ALTIVEC_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_altivec_" NAME, /* NAME */ \ - RS6000_BTM_ALTIVEC, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_TERNARY), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -#define BU_ALTIVEC_A(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_A (ALTIVEC_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_altivec_" NAME, /* NAME */ \ - RS6000_BTM_ALTIVEC, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_ABS), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -#define BU_ALTIVEC_D(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_D (ALTIVEC_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_altivec_" NAME, /* NAME */ \ - RS6000_BTM_ALTIVEC, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_DST), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -/* All builtins defined with the RS6000_BUILTIN_P macro expect three - arguments, the first of which is an integer constant that clarifies - the implementation's use of CR6 flags. The integer constant - argument may have four values: __CR6_EQ (0) means the predicate is - considered true if the equality-test flag of the CR6 condition - register is true following execution of the code identified by the - ICODE pattern, __CR_EQ_REV (1) means the predicate is considered - true if the equality-test flag is false, __CR6_LT (2) means the - predicate is considered true if the less-than-test flag is true, and - __CR6_LT_REV (3) means the predicate is considered true if the - less-than-test flag is false. For all builtins defined by this - macro, the pattern selected by ICODE expects three operands, a - target and two inputs and is presumed to overwrite the flags of - condition register CR6 as a side effect of computing a result into - the target register. However, the built-in invocation provides - four operands, a target, an integer constant mode, and two inputs. - The second and third operands of the built-in function's invocation - are automatically mapped into operands 1 and 2 of the pattern - identifed by the ICODE argument and additional code is emitted, - depending on the value of the constant integer first argument. - This special processing happens within the implementation of - altivec_expand_predicate_builtin(), which is defined within - rs6000.c. The implementation of altivec_expand_predicate_builtin() - allocates a scratch register having the same mode as operand 0 to hold - the result produced by evaluating ICODE. */ - -#define BU_ALTIVEC_P(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_P (ALTIVEC_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_altivec_" NAME, /* NAME */ \ - RS6000_BTM_ALTIVEC, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_PREDICATE), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -#define BU_ALTIVEC_X(ENUM, NAME, ATTR) \ - RS6000_BUILTIN_X (ALTIVEC_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_altivec_" NAME, /* NAME */ \ - RS6000_BTM_ALTIVEC, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_SPECIAL), \ - CODE_FOR_nothing) /* ICODE */ - -#define BU_ALTIVEC_C(ENUM, NAME, ATTR) \ - RS6000_BUILTIN_X (ALTIVEC_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_altivec_" NAME, /* NAME */ \ - (RS6000_BTM_ALTIVEC /* MASK */ \ - | RS6000_BTM_CELL), \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_SPECIAL), \ - CODE_FOR_nothing) /* ICODE */ - -/* Altivec overloaded builtin function macros. */ -#define BU_ALTIVEC_OVERLOAD_1(ENUM, NAME) \ - RS6000_BUILTIN_1 (ALTIVEC_BUILTIN_VEC_ ## ENUM, /* ENUM */ \ - "__builtin_vec_" NAME, /* NAME */ \ - RS6000_BTM_ALTIVEC, /* MASK */ \ - (RS6000_BTC_OVERLOADED /* ATTR */ \ - | RS6000_BTC_UNARY), \ - CODE_FOR_nothing) /* ICODE */ - -#define BU_ALTIVEC_OVERLOAD_2(ENUM, NAME) \ - RS6000_BUILTIN_2 (ALTIVEC_BUILTIN_VEC_ ## ENUM, /* ENUM */ \ - "__builtin_vec_" NAME, /* NAME */ \ - RS6000_BTM_ALTIVEC, /* MASK */ \ - (RS6000_BTC_OVERLOADED /* ATTR */ \ - | RS6000_BTC_BINARY), \ - CODE_FOR_nothing) /* ICODE */ - -#define BU_ALTIVEC_OVERLOAD_3(ENUM, NAME) \ - RS6000_BUILTIN_3 (ALTIVEC_BUILTIN_VEC_ ## ENUM, /* ENUM */ \ - "__builtin_vec_" NAME, /* NAME */ \ - RS6000_BTM_ALTIVEC, /* MASK */ \ - (RS6000_BTC_OVERLOADED /* ATTR */ \ - | RS6000_BTC_TERNARY), \ - CODE_FOR_nothing) /* ICODE */ - -#define BU_ALTIVEC_OVERLOAD_A(ENUM, NAME) \ - RS6000_BUILTIN_A (ALTIVEC_BUILTIN_VEC_ ## ENUM, /* ENUM */ \ - "__builtin_vec_" NAME, /* NAME */ \ - RS6000_BTM_ALTIVEC, /* MASK */ \ - (RS6000_BTC_OVERLOADED /* ATTR */ \ - | RS6000_BTC_ABS), \ - CODE_FOR_nothing) /* ICODE */ - -#define BU_ALTIVEC_OVERLOAD_D(ENUM, NAME) \ - RS6000_BUILTIN_D (ALTIVEC_BUILTIN_VEC_ ## ENUM, /* ENUM */ \ - "__builtin_vec_" NAME, /* NAME */ \ - RS6000_BTM_ALTIVEC, /* MASK */ \ - (RS6000_BTC_OVERLOADED /* ATTR */ \ - | RS6000_BTC_DST), \ - CODE_FOR_nothing) /* ICODE */ - -/* See the comment on BU_ALTIVEC_P. */ -#define BU_ALTIVEC_OVERLOAD_P(ENUM, NAME) \ - RS6000_BUILTIN_P (ALTIVEC_BUILTIN_VEC_ ## ENUM, /* ENUM */ \ - "__builtin_vec_" NAME, /* NAME */ \ - RS6000_BTM_ALTIVEC, /* MASK */ \ - (RS6000_BTC_OVERLOADED /* ATTR */ \ - | RS6000_BTC_PREDICATE), \ - CODE_FOR_nothing) /* ICODE */ - -#define BU_ALTIVEC_OVERLOAD_X(ENUM, NAME) \ - RS6000_BUILTIN_X (ALTIVEC_BUILTIN_VEC_ ## ENUM, /* ENUM */ \ - "__builtin_vec_" NAME, /* NAME */ \ - RS6000_BTM_ALTIVEC, /* MASK */ \ - (RS6000_BTC_OVERLOADED /* ATTR */ \ - | RS6000_BTC_SPECIAL), \ - CODE_FOR_nothing) /* ICODE */ - -/* VSX convenience macros. */ -#define BU_VSX_1(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_1 (VSX_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_vsx_" NAME, /* NAME */ \ - RS6000_BTM_VSX, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_UNARY), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -#define BU_VSX_2(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_2 (VSX_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_vsx_" NAME, /* NAME */ \ - RS6000_BTM_VSX, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_BINARY), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -#define BU_VSX_3(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_3 (VSX_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_vsx_" NAME, /* NAME */ \ - RS6000_BTM_VSX, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_TERNARY), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -#define BU_VSX_A(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_A (VSX_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_vsx_" NAME, /* NAME */ \ - RS6000_BTM_VSX, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_ABS), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -/* See the comment on BU_ALTIVEC_P. */ -#define BU_VSX_P(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_P (VSX_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_vsx_" NAME, /* NAME */ \ - RS6000_BTM_VSX, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_PREDICATE), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -#define BU_VSX_X(ENUM, NAME, ATTR) \ - RS6000_BUILTIN_X (VSX_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_vsx_" NAME, /* NAME */ \ - RS6000_BTM_VSX, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_SPECIAL), \ - CODE_FOR_nothing) /* ICODE */ - -/* VSX overloaded builtin function macros. */ -#define BU_VSX_OVERLOAD_1(ENUM, NAME) \ - RS6000_BUILTIN_1 (VSX_BUILTIN_VEC_ ## ENUM, /* ENUM */ \ - "__builtin_vec_" NAME, /* NAME */ \ - RS6000_BTM_VSX, /* MASK */ \ - (RS6000_BTC_OVERLOADED /* ATTR */ \ - | RS6000_BTC_UNARY), \ - CODE_FOR_nothing) /* ICODE */ - -#define BU_VSX_OVERLOAD_2(ENUM, NAME) \ - RS6000_BUILTIN_2 (VSX_BUILTIN_VEC_ ## ENUM, /* ENUM */ \ - "__builtin_vec_" NAME, /* NAME */ \ - RS6000_BTM_VSX, /* MASK */ \ - (RS6000_BTC_OVERLOADED /* ATTR */ \ - | RS6000_BTC_BINARY), \ - CODE_FOR_nothing) /* ICODE */ - -#define BU_VSX_OVERLOAD_3(ENUM, NAME) \ - RS6000_BUILTIN_3 (VSX_BUILTIN_VEC_ ## ENUM, /* ENUM */ \ - "__builtin_vec_" NAME, /* NAME */ \ - RS6000_BTM_VSX, /* MASK */ \ - (RS6000_BTC_OVERLOADED /* ATTR */ \ - | RS6000_BTC_TERNARY), \ - CODE_FOR_nothing) /* ICODE */ - -/* xxpermdi and xxsldwi are overloaded functions, but had __builtin_vsx names - instead of __builtin_vec. */ -#define BU_VSX_OVERLOAD_3V(ENUM, NAME) \ - RS6000_BUILTIN_3 (VSX_BUILTIN_VEC_ ## ENUM, /* ENUM */ \ - "__builtin_vsx_" NAME, /* NAME */ \ - RS6000_BTM_VSX, /* MASK */ \ - (RS6000_BTC_OVERLOADED /* ATTR */ \ - | RS6000_BTC_TERNARY), \ - CODE_FOR_nothing) /* ICODE */ - -#define BU_VSX_OVERLOAD_X(ENUM, NAME) \ - RS6000_BUILTIN_X (VSX_BUILTIN_VEC_ ## ENUM, /* ENUM */ \ - "__builtin_vec_" NAME, /* NAME */ \ - RS6000_BTM_VSX, /* MASK */ \ - (RS6000_BTC_OVERLOADED /* ATTR */ \ - | RS6000_BTC_SPECIAL), \ - CODE_FOR_nothing) /* ICODE */ - -/* MMA convenience macros. */ - -#define BU_MMA_1(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_M (MMA_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_mma_" NAME, /* NAME */ \ - RS6000_BTM_MMA, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_UNARY \ - | RS6000_BTC_VOID \ - | RS6000_BTC_GIMPLE), \ - CODE_FOR_nothing) /* ICODE */ \ - RS6000_BUILTIN_M (MMA_BUILTIN_ ## ENUM ## _INTERNAL, /* ENUM */ \ - "__builtin_mma_" NAME "_internal", /* NAME */ \ - RS6000_BTM_MMA, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_UNARY), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -#define BU_MMA_2(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_M (MMA_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_mma_" NAME, /* NAME */ \ - RS6000_BTM_MMA, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_BINARY \ - | RS6000_BTC_VOID \ - | RS6000_BTC_GIMPLE), \ - CODE_FOR_nothing) /* ICODE */ \ - RS6000_BUILTIN_M (MMA_BUILTIN_ ## ENUM ## _INTERNAL, /* ENUM */ \ - "__builtin_mma_" NAME "_internal", /* NAME */ \ - RS6000_BTM_MMA, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_BINARY), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -/* Like BU_MMA_2, but uses "vsx" rather than "mma" naming. */ -#define BU_MMA_V2(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_M (VSX_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_vsx_" NAME, /* NAME */ \ - RS6000_BTM_MMA, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_BINARY \ - | RS6000_BTC_VOID \ - | RS6000_BTC_GIMPLE), \ - CODE_FOR_nothing) /* ICODE */ \ - RS6000_BUILTIN_M (VSX_BUILTIN_ ## ENUM ## _INTERNAL, /* ENUM */ \ - "__builtin_vsx_" NAME "_internal", /* NAME */ \ - RS6000_BTM_MMA, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_BINARY), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -#define BU_MMA_3(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_M (MMA_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_mma_" NAME, /* NAME */ \ - RS6000_BTM_MMA, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_TERNARY \ - | RS6000_BTC_VOID \ - | RS6000_BTC_GIMPLE), \ - CODE_FOR_nothing) /* ICODE */ \ - RS6000_BUILTIN_M (MMA_BUILTIN_ ## ENUM ## _INTERNAL, /* ENUM */ \ - "__builtin_mma_" NAME "_internal", /* NAME */ \ - RS6000_BTM_MMA, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_TERNARY), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -/* Like BU_MMA_3, but uses "vsx" rather than "mma" naming. */ -#define BU_MMA_V3(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_M (VSX_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_vsx_" NAME, /* NAME */ \ - RS6000_BTM_MMA, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_TERNARY \ - | RS6000_BTC_VOID \ - | RS6000_BTC_GIMPLE), \ - CODE_FOR_nothing) /* ICODE */ \ - RS6000_BUILTIN_M (VSX_BUILTIN_ ## ENUM ## _INTERNAL, /* ENUM */ \ - "__builtin_vsx_" NAME "_internal", /* NAME */ \ - RS6000_BTM_MMA, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_TERNARY), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -#define BU_MMA_5(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_M (MMA_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_mma_" NAME, /* NAME */ \ - RS6000_BTM_MMA, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_QUINARY \ - | RS6000_BTC_VOID \ - | RS6000_BTC_GIMPLE), \ - CODE_FOR_nothing) /* ICODE */ \ - RS6000_BUILTIN_M (MMA_BUILTIN_ ## ENUM ## _INTERNAL, /* ENUM */ \ - "__builtin_mma_" NAME "_internal", /* NAME */ \ - RS6000_BTM_MMA, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_QUINARY), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -#define BU_MMA_6(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_M (MMA_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_mma_" NAME, /* NAME */ \ - RS6000_BTM_MMA, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_SENARY \ - | RS6000_BTC_VOID \ - | RS6000_BTC_GIMPLE), \ - CODE_FOR_nothing) /* ICODE */ \ - RS6000_BUILTIN_M (MMA_BUILTIN_ ## ENUM ## _INTERNAL, /* ENUM */ \ - "__builtin_mma_" NAME "_internal", /* NAME */ \ - RS6000_BTM_MMA, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_SENARY), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -#define BU_MMA_PAIR_LD(ENUM, NAME, ATTR) \ - RS6000_BUILTIN_M (VSX_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_vsx_" NAME, /* NAME */ \ - RS6000_BTM_MMA, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_BINARY \ - | RS6000_BTC_GIMPLE), \ - CODE_FOR_nothing) /* ICODE */ - -#define BU_MMA_PAIR_ST(ENUM, NAME, ATTR) \ - RS6000_BUILTIN_M (VSX_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_vsx_" NAME, /* NAME */ \ - RS6000_BTM_MMA, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_TERNARY \ - | RS6000_BTC_VOID \ - | RS6000_BTC_GIMPLE), \ - CODE_FOR_nothing) /* ICODE */ - -/* ISA 2.05 (power6) convenience macros. */ -/* For functions that depend on the CMPB instruction */ -#define BU_P6_2(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_2 (P6_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_p6_" NAME, /* NAME */ \ - RS6000_BTM_CMPB, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_BINARY), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -/* For functions that depend on 64-BIT support and on the CMPB instruction */ -#define BU_P6_64BIT_2(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_2 (P6_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_p6_" NAME, /* NAME */ \ - RS6000_BTM_CMPB \ - | RS6000_BTM_64BIT, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_BINARY), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -#define BU_P6_OVERLOAD_2(ENUM, NAME) \ - RS6000_BUILTIN_2 (P6_OV_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_" NAME, /* NAME */ \ - RS6000_BTM_CMPB, /* MASK */ \ - (RS6000_BTC_OVERLOADED /* ATTR */ \ - | RS6000_BTC_BINARY), \ - CODE_FOR_nothing) /* ICODE */ - -/* ISA 2.07 (power8) vector convenience macros. */ -/* For the instructions that are encoded as altivec instructions use - __builtin_altivec_ as the builtin name. */ -#define BU_P8V_AV_1(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_1 (P8V_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_altivec_" NAME, /* NAME */ \ - RS6000_BTM_P8_VECTOR, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_UNARY), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -#define BU_P8V_AV_2(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_2 (P8V_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_altivec_" NAME, /* NAME */ \ - RS6000_BTM_P8_VECTOR, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_BINARY), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -#define BU_P8V_AV_3(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_3 (P8V_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_altivec_" NAME, /* NAME */ \ - RS6000_BTM_P8_VECTOR, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_TERNARY), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -/* See the comment on BU_ALTIVEC_P. */ -#define BU_P8V_AV_P(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_P (P8V_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_altivec_" NAME, /* NAME */ \ - RS6000_BTM_P8_VECTOR, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_PREDICATE), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -/* For the instructions encoded as VSX instructions use __builtin_vsx as the - builtin name. */ -#define BU_P8V_VSX_1(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_1 (P8V_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_vsx_" NAME, /* NAME */ \ - RS6000_BTM_P8_VECTOR, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_UNARY), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -#define BU_P8V_VSX_2(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_2 (P8V_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_vsx_" NAME, /* NAME */ \ - RS6000_BTM_P8_VECTOR, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_BINARY), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -#define BU_P8V_OVERLOAD_1(ENUM, NAME) \ - RS6000_BUILTIN_1 (P8V_BUILTIN_VEC_ ## ENUM, /* ENUM */ \ - "__builtin_vec_" NAME, /* NAME */ \ - RS6000_BTM_P8_VECTOR, /* MASK */ \ - (RS6000_BTC_OVERLOADED /* ATTR */ \ - | RS6000_BTC_UNARY), \ - CODE_FOR_nothing) /* ICODE */ - -#define BU_P8V_OVERLOAD_2(ENUM, NAME) \ - RS6000_BUILTIN_2 (P8V_BUILTIN_VEC_ ## ENUM, /* ENUM */ \ - "__builtin_vec_" NAME, /* NAME */ \ - RS6000_BTM_P8_VECTOR, /* MASK */ \ - (RS6000_BTC_OVERLOADED /* ATTR */ \ - | RS6000_BTC_BINARY), \ - CODE_FOR_nothing) /* ICODE */ - -#define BU_P8V_OVERLOAD_3(ENUM, NAME) \ - RS6000_BUILTIN_3 (P8V_BUILTIN_VEC_ ## ENUM, /* ENUM */ \ - "__builtin_vec_" NAME, /* NAME */ \ - RS6000_BTM_P8_VECTOR, /* MASK */ \ - (RS6000_BTC_OVERLOADED /* ATTR */ \ - | RS6000_BTC_TERNARY), \ - CODE_FOR_nothing) /* ICODE */ - -/* Crypto convenience macros. */ -#define BU_CRYPTO_1(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_1 (CRYPTO_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_crypto_" NAME, /* NAME */ \ - RS6000_BTM_CRYPTO, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_UNARY), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -#define BU_CRYPTO_2(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_2 (CRYPTO_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_crypto_" NAME, /* NAME */ \ - RS6000_BTM_CRYPTO, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_BINARY), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -#define BU_CRYPTO_2A(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_2 (CRYPTO_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_crypto_" NAME, /* NAME */ \ - RS6000_BTM_P8_VECTOR, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_BINARY), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -#define BU_CRYPTO_3(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_3 (CRYPTO_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_crypto_" NAME, /* NAME */ \ - RS6000_BTM_CRYPTO, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_TERNARY), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -#define BU_CRYPTO_3A(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_3 (CRYPTO_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_crypto_" NAME, /* NAME */ \ - RS6000_BTM_P8_VECTOR, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_TERNARY), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -#define BU_CRYPTO_OVERLOAD_1(ENUM, NAME) \ - RS6000_BUILTIN_1 (CRYPTO_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_crypto_" NAME, /* NAME */ \ - RS6000_BTM_CRYPTO, /* MASK */ \ - (RS6000_BTC_OVERLOADED /* ATTR */ \ - | RS6000_BTC_UNARY), \ - CODE_FOR_nothing) /* ICODE */ - -#define BU_CRYPTO_OVERLOAD_2A(ENUM, NAME) \ - RS6000_BUILTIN_2 (CRYPTO_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_crypto_" NAME, /* NAME */ \ - RS6000_BTM_P8_VECTOR, /* MASK */ \ - (RS6000_BTC_OVERLOADED /* ATTR */ \ - | RS6000_BTC_BINARY), \ - CODE_FOR_nothing) /* ICODE */ - -#define BU_CRYPTO_OVERLOAD_3(ENUM, NAME) \ - RS6000_BUILTIN_3 (CRYPTO_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_crypto_" NAME, /* NAME */ \ - RS6000_BTM_CRYPTO, /* MASK */ \ - (RS6000_BTC_OVERLOADED /* ATTR */ \ - | RS6000_BTC_TERNARY), \ - CODE_FOR_nothing) /* ICODE */ - -#define BU_CRYPTO_OVERLOAD_3A(ENUM, NAME) \ - RS6000_BUILTIN_3 (CRYPTO_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_crypto_" NAME, /* NAME */ \ - RS6000_BTM_P8_VECTOR, /* MASK */ \ - (RS6000_BTC_OVERLOADED /* ATTR */ \ - | RS6000_BTC_TERNARY), \ - CODE_FOR_nothing) /* ICODE */ - -/* HTM convenience macros. */ -#define BU_HTM_0(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_H (HTM_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_" NAME, /* NAME */ \ - RS6000_BTM_HTM, /* MASK */ \ - RS6000_BTC_ ## ATTR, /* ATTR */ \ - CODE_FOR_ ## ICODE) /* ICODE */ - -#define BU_HTM_1(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_H (HTM_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_" NAME, /* NAME */ \ - RS6000_BTM_HTM, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_UNARY), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -#define BU_HTM_2(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_H (HTM_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_" NAME, /* NAME */ \ - RS6000_BTM_HTM, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_BINARY), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -#define BU_HTM_3(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_H (HTM_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_" NAME, /* NAME */ \ - RS6000_BTM_HTM, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_TERNARY), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -#define BU_HTM_V1(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_H (HTM_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_" NAME, /* NAME */ \ - RS6000_BTM_HTM, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_UNARY \ - | RS6000_BTC_VOID), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -#define BU_SPECIAL_X(ENUM, NAME, MASK, ATTR) \ - RS6000_BUILTIN_X (ENUM, /* ENUM */ \ - NAME, /* NAME */ \ - MASK, /* MASK */ \ - (ATTR | RS6000_BTC_SPECIAL), /* ATTR */ \ - CODE_FOR_nothing) /* ICODE */ - - -/* Decimal floating point builtins for instructions. */ -#define BU_DFP_MISC_1(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_1 (MISC_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_" NAME, /* NAME */ \ - RS6000_BTM_DFP, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_UNARY), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -#define BU_DFP_MISC_2(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_2 (MISC_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_" NAME, /* NAME */ \ - RS6000_BTM_DFP, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_BINARY), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -/* Miscellaneous builtins for instructions added in ISA 2.06. These - instructions don't require either the DFP or VSX options, just the basic ISA - 2.06 (popcntd) enablement since they operate on general purpose - registers. */ -#define BU_P7_MISC_1(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_1 (MISC_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_" NAME, /* NAME */ \ - RS6000_BTM_POPCNTD, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_UNARY), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -#define BU_P7_MISC_2(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_2 (MISC_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_" NAME, /* NAME */ \ - RS6000_BTM_POPCNTD, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_BINARY), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -#define BU_P7_POWERPC64_MISC_2(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_2 (MISC_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_" NAME, /* NAME */ \ - RS6000_BTM_POPCNTD \ - | RS6000_BTM_POWERPC64, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_BINARY), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -#define BU_P7_MISC_X(ENUM, NAME, ATTR) \ - RS6000_BUILTIN_X (MISC_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_" NAME, /* NAME */ \ - RS6000_BTM_POPCNTD, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_SPECIAL), \ - CODE_FOR_nothing) /* ICODE */ - - -/* Miscellaneous builtins for instructions added in ISA 2.07. These - instructions do require the ISA 2.07 vector support, but they aren't vector - instructions. */ -#define BU_P8V_MISC_1(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_1 (MISC_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_" NAME, /* NAME */ \ - RS6000_BTM_P8_VECTOR, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_UNARY), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -#define BU_P8V_MISC_3(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_3 (MISC_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_" NAME, /* NAME */ \ - RS6000_BTM_P8_VECTOR, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_TERNARY), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -/* 128-bit long double floating point builtins. */ -#define BU_LDBL128_2(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_2 (MISC_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_" NAME, /* NAME */ \ - (RS6000_BTM_HARD_FLOAT /* MASK */ \ - | RS6000_BTM_LDBL128), \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_BINARY), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -/* 128-bit __ibm128 floating point builtins (use -mfloat128 to indicate that - __ibm128 is available). */ -#define BU_IBM128_2(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_2 (MISC_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_" NAME, /* NAME */ \ - (RS6000_BTM_HARD_FLOAT /* MASK */ \ - | RS6000_BTM_FLOAT128), \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_BINARY), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -/* Miscellaneous builtins for instructions added in ISA 3.0. These - instructions don't require either the DFP or VSX options, just the basic - ISA 3.0 enablement since they operate on general purpose registers. */ -#define BU_P9_MISC_0(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_0 (MISC_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_" NAME, /* NAME */ \ - RS6000_BTM_P9_MISC, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_SPECIAL), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -#define BU_P9_MISC_1(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_1 (MISC_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_" NAME, /* NAME */ \ - RS6000_BTM_P9_MISC, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_UNARY), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -/* Miscellaneous builtins for instructions added in ISA 3.0. These - instructions don't require either the DFP or VSX options, just the basic - ISA 3.0 enablement since they operate on general purpose registers, - and they require 64-bit addressing. */ -#define BU_P9_64BIT_MISC_0(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_0 (MISC_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_" NAME, /* NAME */ \ - RS6000_BTM_P9_MISC \ - | RS6000_BTM_64BIT, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_SPECIAL), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -/* Miscellaneous builtins for decimal floating point instructions - added in ISA 3.0. These instructions don't require the VSX - options, just the basic ISA 3.0 enablement since they operate on - general purpose registers. */ -#define BU_P9_DFP_MISC_0(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_0 (MISC_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_" NAME, /* NAME */ \ - RS6000_BTM_P9_MISC, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_SPECIAL), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -#define BU_P9_DFP_MISC_1(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_1 (MISC_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_" NAME, /* NAME */ \ - RS6000_BTM_P9_MISC, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_SPECIAL), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -#define BU_P9_DFP_MISC_2(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_2 (MISC_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_" NAME, /* NAME */ \ - RS6000_BTM_P9_MISC, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_SPECIAL), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -/* Decimal floating point overloaded functions added in ISA 3.0 */ -#define BU_P9_DFP_OVERLOAD_1(ENUM, NAME) \ - RS6000_BUILTIN_1 (P9_BUILTIN_DFP_ ## ENUM, /* ENUM */ \ - "__builtin_dfp_" NAME, /* NAME */ \ - RS6000_BTM_P9_MISC, /* MASK */ \ - (RS6000_BTC_OVERLOADED /* ATTR */ \ - | RS6000_BTC_UNARY), \ - CODE_FOR_nothing) /* ICODE */ - -#define BU_P9_DFP_OVERLOAD_2(ENUM, NAME) \ - RS6000_BUILTIN_2 (P9_BUILTIN_DFP_ ## ENUM, /* ENUM */ \ - "__builtin_dfp_" NAME, /* NAME */ \ - RS6000_BTM_P9_MISC, /* MASK */ \ - (RS6000_BTC_OVERLOADED /* ATTR */ \ - | RS6000_BTC_BINARY), \ - CODE_FOR_nothing) /* ICODE */ - -#define BU_P9_DFP_OVERLOAD_3(ENUM, NAME) \ - RS6000_BUILTIN_3 (P9_BUILTIN_DFP_ ## ENUM, /* ENUM */ \ - "__builtin_dfp_" NAME, /* NAME */ \ - RS6000_BTM_P9_MISC, /* MASK */ \ - (RS6000_BTC_OVERLOADED /* ATTR */ \ - | RS6000_BTC_TERNARY), \ - CODE_FOR_nothing) /* ICODE */ - -/* ISA 3.0 (power9) vector convenience macros. */ -/* For the instructions that are encoded as altivec instructions use - __builtin_altivec_ as the builtin name. */ -#define BU_P9V_AV_1(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_1 (P9V_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_altivec_" NAME, /* NAME */ \ - RS6000_BTM_P9_VECTOR, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_UNARY), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -#define BU_P9V_AV_2(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_2 (P9V_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_altivec_" NAME, /* NAME */ \ - RS6000_BTM_P9_VECTOR, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_BINARY), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -#define BU_P9V_AV_3(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_3 (P9V_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_altivec_" NAME, /* NAME */ \ - RS6000_BTM_P9_VECTOR, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_TERNARY), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -/* See the comment on BU_ALTIVEC_P. */ -#define BU_P9V_AV_P(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_P (P9V_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_altivec_" NAME, /* NAME */ \ - RS6000_BTM_P9_VECTOR, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_PREDICATE), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -#define BU_P9V_AV_X(ENUM, NAME, ATTR) \ - RS6000_BUILTIN_X (P9V_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_altivec_" NAME, /* NAME */ \ - RS6000_BTM_P9_VECTOR, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_SPECIAL), \ - CODE_FOR_nothing) /* ICODE */ - -#define BU_P9V_64BIT_AV_X(ENUM, NAME, ATTR) \ - RS6000_BUILTIN_X (P9V_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_altivec_" NAME, /* NAME */ \ - (RS6000_BTM_P9_VECTOR \ - | RS6000_BTM_64BIT), /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_SPECIAL), \ - CODE_FOR_nothing) /* ICODE */ - -/* For the instructions encoded as VSX instructions use __builtin_vsx as the - builtin name. */ -#define BU_P9V_VSX_1(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_1 (P9V_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_vsx_" NAME, /* NAME */ \ - RS6000_BTM_P9_VECTOR, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_UNARY), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -#define BU_P9V_64BIT_VSX_1(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_1 (P9V_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_vsx_" NAME, /* NAME */ \ - (RS6000_BTM_64BIT \ - | RS6000_BTM_P9_VECTOR), /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_UNARY), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -#define BU_P9V_VSX_2(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_2 (P9V_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_vsx_" NAME, /* NAME */ \ - RS6000_BTM_P9_VECTOR, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_BINARY), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -#define BU_P9V_64BIT_VSX_2(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_2 (P9V_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_vsx_" NAME, /* NAME */ \ - (RS6000_BTM_64BIT \ - | RS6000_BTM_P9_VECTOR), /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_BINARY), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -#define BU_P9V_VSX_3(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_3 (P9V_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_vsx_" NAME, /* NAME */ \ - RS6000_BTM_P9_VECTOR, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_TERNARY), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -#define BU_P9V_64BIT_VSX_3(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_2 (P9V_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_vsx_" NAME, /* NAME */ \ - (RS6000_BTM_64BIT \ - | RS6000_BTM_P9_VECTOR), /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_TERNARY), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -/* See the comment on BU_ALTIVEC_P. */ -#define BU_P9V_OVERLOAD_P(ENUM, NAME) \ - RS6000_BUILTIN_P (P9V_BUILTIN_VEC_ ## ENUM, /* ENUM */ \ - "__builtin_vec_" NAME, /* NAME */ \ - RS6000_BTM_ALTIVEC, /* MASK */ \ - (RS6000_BTC_OVERLOADED /* ATTR */ \ - | RS6000_BTC_PREDICATE), \ - CODE_FOR_nothing) /* ICODE */ - -#define BU_P9_2(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_2 (P9_BUILTIN_SCALAR_ ## ENUM, /* ENUM */ \ - "__builtin_scalar_" NAME, /* NAME */ \ - RS6000_BTM_P9_VECTOR, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_BINARY), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -#define BU_P9_64BIT_2(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_2 (P9_BUILTIN_SCALAR_ ## ENUM, /* ENUM */ \ - "__builtin_scalar_" NAME, /* NAME */ \ - RS6000_BTM_P9_VECTOR \ - | RS6000_BTM_64BIT, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_BINARY), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -#define BU_P9V_OVERLOAD_1(ENUM, NAME) \ - RS6000_BUILTIN_1 (P9V_BUILTIN_VEC_ ## ENUM, /* ENUM */ \ - "__builtin_vec_" NAME, /* NAME */ \ - RS6000_BTM_P9_VECTOR, /* MASK */ \ - (RS6000_BTC_OVERLOADED /* ATTR */ \ - | RS6000_BTC_UNARY), \ - CODE_FOR_nothing) /* ICODE */ - -#define BU_P9V_OVERLOAD_2(ENUM, NAME) \ - RS6000_BUILTIN_2 (P9V_BUILTIN_VEC_ ## ENUM, /* ENUM */ \ - "__builtin_vec_" NAME, /* NAME */ \ - RS6000_BTM_P9_VECTOR, /* MASK */ \ - (RS6000_BTC_OVERLOADED /* ATTR */ \ - | RS6000_BTC_BINARY), \ - CODE_FOR_nothing) /* ICODE */ - -#define BU_P9V_OVERLOAD_3(ENUM, NAME) \ - RS6000_BUILTIN_3 (P9V_BUILTIN_VEC_ ## ENUM, /* ENUM */ \ - "__builtin_vec_" NAME, /* NAME */ \ - RS6000_BTM_P9_VECTOR, /* MASK */ \ - (RS6000_BTC_OVERLOADED /* ATTR */ \ - | RS6000_BTC_TERNARY), \ - CODE_FOR_nothing) /* ICODE */ - -#define BU_P9_OVERLOAD_2(ENUM, NAME) \ - RS6000_BUILTIN_2 (P9_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_" NAME, /* NAME */ \ - RS6000_BTM_P9_VECTOR, /* MASK */ \ - (RS6000_BTC_OVERLOADED /* ATTR */ \ - | RS6000_BTC_BINARY), \ - CODE_FOR_nothing) /* ICODE */ - -/* Built-in functions for IEEE 128-bit hardware floating point. IEEE 128-bit - hardware requires p9-vector and 64-bit operation. These functions use just - __builtin_ as the prefix. */ -#define BU_FLOAT128_HW_1(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_1 (FLOAT128_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_" NAME, /* NAME */ \ - RS6000_BTM_FLOAT128_HW, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_UNARY), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -#define BU_FLOAT128_HW_2(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_2 (FLOAT128_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_" NAME, /* NAME */ \ - RS6000_BTM_FLOAT128_HW, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_BINARY), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -#define BU_FLOAT128_HW_3(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_3 (FLOAT128_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_" NAME, /* NAME */ \ - RS6000_BTM_FLOAT128_HW, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_TERNARY), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -/* Built-in functions for IEEE 128-bit hardware floating point. These - functions use __builtin_vsx_ as the prefix. */ -#define BU_FLOAT128_HW_VSX_1(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_1 (P9V_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_vsx_" NAME, /* NAME */ \ - RS6000_BTM_FLOAT128_HW, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_UNARY), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -#define BU_FLOAT128_HW_VSX_2(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_2 (P9V_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_vsx_" NAME, /* NAME */ \ - RS6000_BTM_FLOAT128_HW, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_BINARY), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -/* Power 10 VSX builtins */ - -#define BU_P10V_VSX_0(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_0 (P10V_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_vsx_" NAME, /* NAME */ \ - RS6000_BTM_P10, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_SPECIAL), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -#define BU_P10V_VSX_1(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_1 (P10V_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_vsx_" NAME, /* NAME */ \ - RS6000_BTM_P10, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_UNARY), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -#define BU_P10V_VSX_2(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_2 (P10V_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_vsx_" NAME, /* NAME */ \ - RS6000_BTM_P10, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_BINARY), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -#define BU_P10V_VSX_3(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_3 (P10V_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_vsx_" NAME, /* NAME */ \ - RS6000_BTM_P10, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_TERNARY), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -#define BU_P10V_VSX_4(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_4 (P10V_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_vsx_" NAME, /* NAME */ \ - RS6000_BTM_P10, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_QUATERNARY), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -#define BU_P10_OVERLOAD_1(ENUM, NAME) \ - RS6000_BUILTIN_1 (P10_BUILTIN_VEC_ ## ENUM, /* ENUM */ \ - "__builtin_vec_" NAME, /* NAME */ \ - RS6000_BTM_P10, /* MASK */ \ - (RS6000_BTC_OVERLOADED /* ATTR */ \ - | RS6000_BTC_UNARY), \ - CODE_FOR_nothing) /* ICODE */ - -#define BU_P10_OVERLOAD_2(ENUM, NAME) \ - RS6000_BUILTIN_2 (P10_BUILTIN_VEC_ ## ENUM, /* ENUM */ \ - "__builtin_vec_" NAME, /* NAME */ \ - RS6000_BTM_P10, /* MASK */ \ - (RS6000_BTC_OVERLOADED /* ATTR */ \ - | RS6000_BTC_BINARY), \ - CODE_FOR_nothing) /* ICODE */ - -#define BU_P10_OVERLOAD_3(ENUM, NAME) \ - RS6000_BUILTIN_3 (P10_BUILTIN_VEC_ ## ENUM, /* ENUM */ \ - "__builtin_vec_" NAME, /* NAME */ \ - RS6000_BTM_P10, /* MASK */ \ - (RS6000_BTC_OVERLOADED /* ATTR */ \ - | RS6000_BTC_TERNARY), \ - CODE_FOR_nothing) /* ICODE */ - -#define BU_P10_OVERLOAD_4(ENUM, NAME) \ - RS6000_BUILTIN_4 (P10_BUILTIN_VEC_ ## ENUM, /* ENUM */ \ - "__builtin_vec_" NAME, /* NAME */ \ - RS6000_BTM_P10, /* MASK */ \ - (RS6000_BTC_OVERLOADED /* ATTR */ \ - | RS6000_BTC_QUATERNARY), \ - CODE_FOR_nothing) /* ICODE */ - -/* Miscellaneous (non-vector) builtins for power10 instructions. */ - -#define BU_P10_MISC_0(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_0 (P10_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_" NAME, /* NAME */ \ - RS6000_BTM_P10, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_SPECIAL), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -#define BU_P10_MISC_1(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_1 (P10_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_" NAME, /* NAME */ \ - RS6000_BTM_P10, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_UNARY), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -#define BU_P10_POWERPC64_MISC_2(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_2 (P10_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_" NAME, /* NAME */ \ - RS6000_BTM_P10 \ - | RS6000_BTM_POWERPC64, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_BINARY), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -#define BU_P10_MISC_3(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_3 (P10_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_" NAME, /* NAME */ \ - RS6000_BTM_P10, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_TERNARY), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -#define BU_P10_1(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_1 (P10_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_vec" NAME, /* NAME */ \ - RS6000_BTM_P10, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_UNARY), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -#define BU_P10_2(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_2 (P10_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_vec" NAME, /* NAME */ \ - RS6000_BTM_P10, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_BINARY), \ - CODE_FOR_ ## ICODE) /* ICODE */ -#endif - -#define BU_P10V_OVERLOAD_X(ENUM, NAME) \ - RS6000_BUILTIN_X (P10_BUILTIN_VEC_ ## ENUM, /* ENUM */ \ - "__builtin_vec_" NAME, /* NAME */ \ - RS6000_BTM_P10, /* MASK */ \ - (RS6000_BTC_OVERLOADED /* ATTR */ \ - | RS6000_BTC_SPECIAL), \ - CODE_FOR_nothing) /* ICODE */ - -/* Power 10 Altivec builtins */ - -#define BU_P10V_AV_0(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_0 (P10V_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_altivec_" NAME, /* NAME */ \ - RS6000_BTM_P10, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_SPECIAL), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -#define BU_P10V_AV_1(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_1 (P10V_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_altivec_" NAME, /* NAME */ \ - RS6000_BTM_P10, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_UNARY), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -#define BU_P10V_AV_2(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_2 (P10V_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_altivec_" NAME, /* NAME */ \ - RS6000_BTM_P10, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_BINARY), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -#define BU_P10V_AV_3(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_3 (P10V_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_altivec_" NAME, /* NAME */ \ - RS6000_BTM_P10, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_TERNARY), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -/* See the comment on BU_ALTIVEC_P. */ -#define BU_P10V_AV_P(ENUM, NAME, ATTR, ICODE) \ - RS6000_BUILTIN_P (P10V_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_altivec_" NAME, /* NAME */ \ - RS6000_BTM_P10, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_PREDICATE), \ - CODE_FOR_ ## ICODE) /* ICODE */ - -#define BU_P10V_AV_X(ENUM, NAME, ATTR) \ - RS6000_BUILTIN_X (P10_BUILTIN_ ## ENUM, /* ENUM */ \ - "__builtin_altivec_" NAME, /* NAME */ \ - RS6000_BTM_P10, /* MASK */ \ - (RS6000_BTC_ ## ATTR /* ATTR */ \ - | RS6000_BTC_SPECIAL), \ - CODE_FOR_nothing) /* ICODE */ - - - -/* Insure 0 is not a legitimate index. */ -BU_SPECIAL_X (RS6000_BUILTIN_NONE, NULL, 0, RS6000_BTC_MISC) - -/* 3 argument Altivec builtins. */ -BU_ALTIVEC_3 (VMADDFP, "vmaddfp", FP, fmav4sf4) -BU_ALTIVEC_3 (VMHADDSHS, "vmhaddshs", SAT, altivec_vmhaddshs) -BU_ALTIVEC_3 (VMHRADDSHS, "vmhraddshs", SAT, altivec_vmhraddshs) -BU_ALTIVEC_3 (VMLADDUHM, "vmladduhm", CONST, fmav8hi4) -BU_ALTIVEC_3 (VMSUMUBM, "vmsumubm", CONST, altivec_vmsumubm) -BU_ALTIVEC_3 (VMSUMMBM, "vmsummbm", CONST, altivec_vmsummbm) -BU_ALTIVEC_3 (VMSUMUHM, "vmsumuhm", CONST, altivec_vmsumuhm) -BU_ALTIVEC_3 (VMSUMUDM, "vmsumudm", CONST, altivec_vmsumudm) -BU_ALTIVEC_3 (VMSUMSHM, "vmsumshm", CONST, altivec_vmsumshm) -BU_ALTIVEC_3 (VMSUMUHS, "vmsumuhs", SAT, altivec_vmsumuhs) -BU_ALTIVEC_3 (VMSUMSHS, "vmsumshs", SAT, altivec_vmsumshs) -BU_ALTIVEC_3 (VNMSUBFP, "vnmsubfp", FP, nfmsv4sf4) -BU_ALTIVEC_3 (VPERM_1TI, "vperm_1ti", CONST, altivec_vperm_v1ti) -BU_ALTIVEC_3 (VPERM_2DF, "vperm_2df", CONST, altivec_vperm_v2df) -BU_ALTIVEC_3 (VPERM_2DI, "vperm_2di", CONST, altivec_vperm_v2di) -BU_ALTIVEC_3 (VPERM_4SF, "vperm_4sf", CONST, altivec_vperm_v4sf) -BU_ALTIVEC_3 (VPERM_4SI, "vperm_4si", CONST, altivec_vperm_v4si) -BU_ALTIVEC_3 (VPERM_8HI, "vperm_8hi", CONST, altivec_vperm_v8hi) -BU_ALTIVEC_3 (VPERM_16QI, "vperm_16qi", CONST, altivec_vperm_v16qi_uns) -BU_ALTIVEC_3 (VPERM_1TI_UNS, "vperm_1ti_uns", CONST, altivec_vperm_v1ti_uns) -BU_ALTIVEC_3 (VPERM_2DI_UNS, "vperm_2di_uns", CONST, altivec_vperm_v2di_uns) -BU_ALTIVEC_3 (VPERM_4SI_UNS, "vperm_4si_uns", CONST, altivec_vperm_v4si_uns) -BU_ALTIVEC_3 (VPERM_8HI_UNS, "vperm_8hi_uns", CONST, altivec_vperm_v8hi_uns) -BU_ALTIVEC_3 (VPERM_16QI_UNS, "vperm_16qi_uns", CONST, altivec_vperm_v16qi_uns) -BU_ALTIVEC_3 (VSEL_4SF, "vsel_4sf", CONST, vector_select_v4sf) -BU_ALTIVEC_3 (VSEL_4SI, "vsel_4si", CONST, vector_select_v4si) -BU_ALTIVEC_3 (VSEL_8HI, "vsel_8hi", CONST, vector_select_v8hi) -BU_ALTIVEC_3 (VSEL_16QI, "vsel_16qi", CONST, vector_select_v16qi) -BU_ALTIVEC_3 (VSEL_2DF, "vsel_2df", CONST, vector_select_v2df) -BU_ALTIVEC_3 (VSEL_2DI, "vsel_2di", CONST, vector_select_v2di) -BU_ALTIVEC_3 (VSEL_1TI, "vsel_1ti", CONST, vector_select_v1ti) -BU_ALTIVEC_3 (VSEL_4SI_UNS, "vsel_4si_uns", CONST, vector_select_v4si_uns) -BU_ALTIVEC_3 (VSEL_8HI_UNS, "vsel_8hi_uns", CONST, vector_select_v8hi_uns) -BU_ALTIVEC_3 (VSEL_16QI_UNS, "vsel_16qi_uns", CONST, vector_select_v16qi_uns) -BU_ALTIVEC_3 (VSEL_2DI_UNS, "vsel_2di_uns", CONST, vector_select_v2di_uns) -BU_ALTIVEC_3 (VSEL_1TI_UNS, "vsel_1ti_uns", CONST, vector_select_v1ti_uns) -BU_ALTIVEC_3 (VSLDOI_16QI, "vsldoi_16qi", CONST, altivec_vsldoi_v16qi) -BU_ALTIVEC_3 (VSLDOI_8HI, "vsldoi_8hi", CONST, altivec_vsldoi_v8hi) -BU_ALTIVEC_3 (VSLDOI_4SI, "vsldoi_4si", CONST, altivec_vsldoi_v4si) -BU_ALTIVEC_3 (VSLDOI_2DI, "vsldoi_2di", CONST, altivec_vsldoi_v2di) -BU_ALTIVEC_3 (VSLDOI_4SF, "vsldoi_4sf", CONST, altivec_vsldoi_v4sf) -BU_ALTIVEC_3 (VSLDOI_2DF, "vsldoi_2df", CONST, altivec_vsldoi_v2df) - -/* Altivec DST builtins. */ -BU_ALTIVEC_D (DST, "dst", MISC, altivec_dst) -BU_ALTIVEC_D (DSTT, "dstt", MISC, altivec_dstt) -BU_ALTIVEC_D (DSTST, "dstst", MISC, altivec_dstst) -BU_ALTIVEC_D (DSTSTT, "dststt", MISC, altivec_dststt) - -/* Altivec 2 argument builtin functions. */ -BU_ALTIVEC_2 (VADDUBM, "vaddubm", CONST, addv16qi3) -BU_ALTIVEC_2 (VADDUHM, "vadduhm", CONST, addv8hi3) -BU_ALTIVEC_2 (VADDUWM, "vadduwm", CONST, addv4si3) -BU_ALTIVEC_2 (VADDFP, "vaddfp", CONST, addv4sf3) -BU_ALTIVEC_2 (VADDCUW, "vaddcuw", CONST, altivec_vaddcuw) -BU_ALTIVEC_2 (VADDUBS, "vaddubs", CONST, altivec_vaddubs) -BU_ALTIVEC_2 (VADDSBS, "vaddsbs", CONST, altivec_vaddsbs) -BU_ALTIVEC_2 (VADDUHS, "vadduhs", CONST, altivec_vadduhs) -BU_ALTIVEC_2 (VADDSHS, "vaddshs", CONST, altivec_vaddshs) -BU_ALTIVEC_2 (VADDUWS, "vadduws", CONST, altivec_vadduws) -BU_ALTIVEC_2 (VADDSWS, "vaddsws", CONST, altivec_vaddsws) -BU_ALTIVEC_2 (VAND_V16QI_UNS, "vand_v16qi_uns", CONST, andv16qi3) -BU_ALTIVEC_2 (VAND_V16QI, "vand_v16qi", CONST, andv16qi3) -BU_ALTIVEC_2 (VAND_V8HI_UNS, "vand_v8hi_uns", CONST, andv8hi3) -BU_ALTIVEC_2 (VAND_V8HI, "vand_v8hi", CONST, andv8hi3) -BU_ALTIVEC_2 (VAND_V4SI_UNS, "vand_v4si_uns", CONST, andv4si3) -BU_ALTIVEC_2 (VAND_V4SI, "vand_v4si", CONST, andv4si3) -BU_ALTIVEC_2 (VAND_V2DI_UNS, "vand_v2di_uns", CONST, andv2di3) -BU_ALTIVEC_2 (VAND_V2DI, "vand_v2di", CONST, andv2di3) -BU_ALTIVEC_2 (VAND_V4SF, "vand_v4sf", CONST, andv4sf3) -BU_ALTIVEC_2 (VAND_V2DF, "vand_v2df", CONST, andv2df3) -BU_ALTIVEC_2 (VANDC_V16QI_UNS,"vandc_v16qi_uns",CONST, andcv16qi3) -BU_ALTIVEC_2 (VANDC_V16QI, "vandc_v16qi", CONST, andcv16qi3) -BU_ALTIVEC_2 (VANDC_V8HI_UNS, "vandc_v8hi_uns", CONST, andcv8hi3) -BU_ALTIVEC_2 (VANDC_V8HI, "vandc_v8hi", CONST, andcv8hi3) -BU_ALTIVEC_2 (VANDC_V4SI_UNS, "vandc_v4si_uns", CONST, andcv4si3) -BU_ALTIVEC_2 (VANDC_V4SI, "vandc_v4si", CONST, andcv4si3) -BU_ALTIVEC_2 (VANDC_V2DI_UNS, "vandc_v2di_uns", CONST, andcv2di3) -BU_ALTIVEC_2 (VANDC_V2DI, "vandc_v2di", CONST, andcv2di3) -BU_ALTIVEC_2 (VANDC_V4SF, "vandc_v4sf", CONST, andcv4sf3) -BU_ALTIVEC_2 (VANDC_V2DF, "vandc_v2df", CONST, andcv2df3) -BU_ALTIVEC_2 (VAVGUB, "vavgub", CONST, uavgv16qi3_ceil) -BU_ALTIVEC_2 (VAVGSB, "vavgsb", CONST, avgv16qi3_ceil) -BU_ALTIVEC_2 (VAVGUH, "vavguh", CONST, uavgv8hi3_ceil) -BU_ALTIVEC_2 (VAVGSH, "vavgsh", CONST, avgv8hi3_ceil) -BU_ALTIVEC_2 (VAVGUW, "vavguw", CONST, uavgv4si3_ceil) -BU_ALTIVEC_2 (VAVGSW, "vavgsw", CONST, avgv4si3_ceil) -BU_ALTIVEC_2 (VCFUX, "vcfux", CONST, altivec_vcfux) -BU_ALTIVEC_2 (VCFSX, "vcfsx", CONST, altivec_vcfsx) -BU_ALTIVEC_2 (VCMPBFP, "vcmpbfp", CONST, altivec_vcmpbfp) -BU_ALTIVEC_2 (VCMPEQUB, "vcmpequb", CONST, vector_eqv16qi) -BU_ALTIVEC_2 (VCMPEQUH, "vcmpequh", CONST, vector_eqv8hi) -BU_ALTIVEC_2 (VCMPEQUW, "vcmpequw", CONST, vector_eqv4si) -BU_ALTIVEC_2 (VCMPEQFP, "vcmpeqfp", CONST, vector_eqv4sf) -BU_ALTIVEC_2 (VCMPGEFP, "vcmpgefp", CONST, vector_gev4sf) -BU_ALTIVEC_2 (VCMPGTUB, "vcmpgtub", CONST, vector_gtuv16qi) -BU_ALTIVEC_2 (VCMPGTSB, "vcmpgtsb", CONST, vector_gtv16qi) -BU_ALTIVEC_2 (VCMPGTUH, "vcmpgtuh", CONST, vector_gtuv8hi) -BU_ALTIVEC_2 (VCMPGTSH, "vcmpgtsh", CONST, vector_gtv8hi) -BU_ALTIVEC_2 (VCMPGTUW, "vcmpgtuw", CONST, vector_gtuv4si) -BU_ALTIVEC_2 (VCMPGTSW, "vcmpgtsw", CONST, vector_gtv4si) -BU_ALTIVEC_2 (VCMPGTFP, "vcmpgtfp", CONST, vector_gtv4sf) -BU_ALTIVEC_2 (VCTSXS, "vctsxs", CONST, altivec_vctsxs) -BU_ALTIVEC_2 (VCTUXS, "vctuxs", CONST, altivec_vctuxs) -BU_ALTIVEC_2 (VMAXUB, "vmaxub", CONST, umaxv16qi3) -BU_ALTIVEC_2 (VMAXSB, "vmaxsb", CONST, smaxv16qi3) -BU_ALTIVEC_2 (VMAXUH, "vmaxuh", CONST, umaxv8hi3) -BU_ALTIVEC_2 (VMAXSH, "vmaxsh", CONST, smaxv8hi3) -BU_ALTIVEC_2 (VMAXUW, "vmaxuw", CONST, umaxv4si3) -BU_ALTIVEC_2 (VMAXSW, "vmaxsw", CONST, smaxv4si3) -BU_ALTIVEC_2 (VMAXFP, "vmaxfp", CONST, smaxv4sf3) -BU_ALTIVEC_2 (VMRGHB, "vmrghb", CONST, altivec_vmrghb) -BU_ALTIVEC_2 (VMRGHH, "vmrghh", CONST, altivec_vmrghh) -BU_ALTIVEC_2 (VMRGHW, "vmrghw", CONST, altivec_vmrghw) -BU_ALTIVEC_2 (VMRGLB, "vmrglb", CONST, altivec_vmrglb) -BU_ALTIVEC_2 (VMRGLH, "vmrglh", CONST, altivec_vmrglh) -BU_ALTIVEC_2 (VMRGLW, "vmrglw", CONST, altivec_vmrglw) -BU_ALTIVEC_2 (VMINUB, "vminub", CONST, uminv16qi3) -BU_ALTIVEC_2 (VMINSB, "vminsb", CONST, sminv16qi3) -BU_ALTIVEC_2 (VMINUH, "vminuh", CONST, uminv8hi3) -BU_ALTIVEC_2 (VMINSH, "vminsh", CONST, sminv8hi3) -BU_ALTIVEC_2 (VMINUW, "vminuw", CONST, uminv4si3) -BU_ALTIVEC_2 (VMINSW, "vminsw", CONST, sminv4si3) -BU_ALTIVEC_2 (VMINFP, "vminfp", CONST, sminv4sf3) -BU_ALTIVEC_2 (VMULEUB, "vmuleub", CONST, vec_widen_umult_even_v16qi) -BU_ALTIVEC_2 (VMULESB, "vmulesb", CONST, vec_widen_smult_even_v16qi) -BU_ALTIVEC_2 (VMULEUH, "vmuleuh", CONST, vec_widen_umult_even_v8hi) -BU_ALTIVEC_2 (VMULESH, "vmulesh", CONST, vec_widen_smult_even_v8hi) -BU_P8V_AV_2 (VMULEUW, "vmuleuw", CONST, vec_widen_umult_even_v4si) -BU_P8V_AV_2 (VMULESW, "vmulesw", CONST, vec_widen_smult_even_v4si) -BU_ALTIVEC_2 (VMULOUB, "vmuloub", CONST, vec_widen_umult_odd_v16qi) -BU_ALTIVEC_2 (VMULOSB, "vmulosb", CONST, vec_widen_smult_odd_v16qi) -BU_ALTIVEC_2 (VMULOUH, "vmulouh", CONST, vec_widen_umult_odd_v8hi) -BU_ALTIVEC_2 (VMULOSH, "vmulosh", CONST, vec_widen_smult_odd_v8hi) -BU_P8V_AV_2 (VMULOUW, "vmulouw", CONST, vec_widen_umult_odd_v4si) -BU_P8V_AV_2 (VMULOSW, "vmulosw", CONST, vec_widen_smult_odd_v4si) -BU_ALTIVEC_2 (VNOR_V16QI_UNS, "vnor_v16qi_uns", CONST, norv16qi3) -BU_ALTIVEC_2 (VNOR_V16QI, "vnor_v16qi", CONST, norv16qi3) -BU_ALTIVEC_2 (VNOR_V8HI_UNS, "vnor_v8hi_uns", CONST, norv8hi3) -BU_ALTIVEC_2 (VNOR_V8HI, "vnor_v8hi", CONST, norv8hi3) -BU_ALTIVEC_2 (VNOR_V4SI_UNS, "vnor_v4si_uns", CONST, norv4si3) -BU_ALTIVEC_2 (VNOR_V4SI, "vnor_v4si", CONST, norv4si3) -BU_ALTIVEC_2 (VNOR_V2DI_UNS, "vnor_v2di_uns", CONST, norv2di3) -BU_ALTIVEC_2 (VNOR_V2DI, "vnor_v2di", CONST, norv2di3) -BU_ALTIVEC_2 (VNOR_V4SF, "vnor_v4sf", CONST, norv4sf3) -BU_ALTIVEC_2 (VNOR_V2DF, "vnor_v2df", CONST, norv2df3) -BU_ALTIVEC_2 (VOR_V16QI_UNS, "vor_v16qi_uns", CONST, iorv16qi3) -BU_ALTIVEC_2 (VOR_V16QI, "vor_v16qi", CONST, iorv16qi3) -BU_ALTIVEC_2 (VOR_V8HI_UNS, "vor_v8hi_uns", CONST, iorv8hi3) -BU_ALTIVEC_2 (VOR_V8HI, "vor_v8hi", CONST, iorv8hi3) -BU_ALTIVEC_2 (VOR_V4SI_UNS, "vor_v4si_uns", CONST, iorv4si3) -BU_ALTIVEC_2 (VOR_V4SI, "vor_v4si", CONST, iorv4si3) -BU_ALTIVEC_2 (VOR_V2DI_UNS, "vor_v2di_uns", CONST, iorv2di3) -BU_ALTIVEC_2 (VOR_V2DI, "vor_v2di", CONST, iorv2di3) -BU_ALTIVEC_2 (VOR_V4SF, "vor_v4sf", CONST, iorv4sf3) -BU_ALTIVEC_2 (VOR_V2DF, "vor_v2df", CONST, iorv2df3) - -BU_ALTIVEC_2 (VPKUHUM, "vpkuhum", CONST, altivec_vpkuhum) -BU_ALTIVEC_2 (VPKUWUM, "vpkuwum", CONST, altivec_vpkuwum) -BU_ALTIVEC_2 (VPKPX, "vpkpx", CONST, altivec_vpkpx) -BU_ALTIVEC_2 (VPKSHSS, "vpkshss", CONST, altivec_vpkshss) -BU_ALTIVEC_2 (VPKSWSS, "vpkswss", CONST, altivec_vpkswss) -BU_ALTIVEC_2 (VPKUHUS, "vpkuhus", CONST, altivec_vpkuhus) -BU_ALTIVEC_2 (VPKSHUS, "vpkshus", CONST, altivec_vpkshus) -BU_ALTIVEC_2 (VPKUWUS, "vpkuwus", CONST, altivec_vpkuwus) -BU_ALTIVEC_2 (VPKSWUS, "vpkswus", CONST, altivec_vpkswus) -BU_ALTIVEC_2 (VRECIPFP, "vrecipdivfp", CONST, recipv4sf3) -BU_ALTIVEC_2 (VRLB, "vrlb", CONST, vrotlv16qi3) -BU_ALTIVEC_2 (VRLH, "vrlh", CONST, vrotlv8hi3) -BU_ALTIVEC_2 (VRLW, "vrlw", CONST, vrotlv4si3) -BU_ALTIVEC_2 (VSLB, "vslb", CONST, vashlv16qi3) -BU_ALTIVEC_2 (VSLH, "vslh", CONST, vashlv8hi3) -BU_ALTIVEC_2 (VSLW, "vslw", CONST, vashlv4si3) -BU_ALTIVEC_2 (VSL, "vsl", CONST, altivec_vsl) -BU_ALTIVEC_2 (VSLO, "vslo", CONST, altivec_vslo) -BU_ALTIVEC_2 (VSPLTB, "vspltb", CONST, altivec_vspltb) -BU_ALTIVEC_2 (VSPLTH, "vsplth", CONST, altivec_vsplth) -BU_ALTIVEC_2 (VSPLTW, "vspltw", CONST, altivec_vspltw) -BU_ALTIVEC_2 (VSRB, "vsrb", CONST, vlshrv16qi3) -BU_ALTIVEC_2 (VSRH, "vsrh", CONST, vlshrv8hi3) -BU_ALTIVEC_2 (VSRW, "vsrw", CONST, vlshrv4si3) -BU_ALTIVEC_2 (VSRAB, "vsrab", CONST, vashrv16qi3) -BU_ALTIVEC_2 (VSRAH, "vsrah", CONST, vashrv8hi3) -BU_ALTIVEC_2 (VSRAW, "vsraw", CONST, vashrv4si3) -BU_ALTIVEC_2 (VSR, "vsr", CONST, altivec_vsr) -BU_ALTIVEC_2 (VSRO, "vsro", CONST, altivec_vsro) -BU_ALTIVEC_2 (VSUBUBM, "vsububm", CONST, subv16qi3) -BU_ALTIVEC_2 (VSUBUHM, "vsubuhm", CONST, subv8hi3) -BU_ALTIVEC_2 (VSUBUWM, "vsubuwm", CONST, subv4si3) -BU_ALTIVEC_2 (VSUBFP, "vsubfp", CONST, subv4sf3) -BU_ALTIVEC_2 (VSUBCUW, "vsubcuw", CONST, altivec_vsubcuw) -BU_ALTIVEC_2 (VSUBUBS, "vsububs", CONST, altivec_vsububs) -BU_ALTIVEC_2 (VSUBSBS, "vsubsbs", CONST, altivec_vsubsbs) -BU_ALTIVEC_2 (VSUBUHS, "vsubuhs", CONST, altivec_vsubuhs) -BU_ALTIVEC_2 (VSUBSHS, "vsubshs", CONST, altivec_vsubshs) -BU_ALTIVEC_2 (VSUBUWS, "vsubuws", CONST, altivec_vsubuws) -BU_ALTIVEC_2 (VSUBSWS, "vsubsws", CONST, altivec_vsubsws) -BU_ALTIVEC_2 (VSUM4UBS, "vsum4ubs", CONST, altivec_vsum4ubs) -BU_ALTIVEC_2 (VSUM4SBS, "vsum4sbs", CONST, altivec_vsum4sbs) -BU_ALTIVEC_2 (VSUM4SHS, "vsum4shs", CONST, altivec_vsum4shs) -BU_ALTIVEC_2 (VSUM2SWS, "vsum2sws", CONST, altivec_vsum2sws) -BU_ALTIVEC_2 (VSUMSWS, "vsumsws", CONST, altivec_vsumsws) -BU_ALTIVEC_2 (VSUMSWS_BE, "vsumsws_be", CONST, altivec_vsumsws_direct) -BU_ALTIVEC_2 (VXOR_V16QI_UNS, "vxor_v16qi_uns", CONST, xorv16qi3) -BU_ALTIVEC_2 (VXOR_V16QI, "vxor_v16qi", CONST, xorv16qi3) -BU_ALTIVEC_2 (VXOR_V8HI_UNS, "vxor_v8hi_uns", CONST, xorv8hi3) -BU_ALTIVEC_2 (VXOR_V8HI, "vxor_v8hi", CONST, xorv8hi3) -BU_ALTIVEC_2 (VXOR_V4SI_UNS, "vxor_v4si_uns", CONST, xorv4si3) -BU_ALTIVEC_2 (VXOR_V4SI, "vxor_v4si", CONST, xorv4si3) -BU_ALTIVEC_2 (VXOR_V2DI_UNS, "vxor_v2di_uns", CONST, xorv2di3) -BU_ALTIVEC_2 (VXOR_V2DI, "vxor_v2di", CONST, xorv2di3) -BU_ALTIVEC_2 (VXOR_V4SF, "vxor_v4sf", CONST, xorv4sf3) -BU_ALTIVEC_2 (VXOR_V2DF, "vxor_v2df", CONST, xorv2df3) - -BU_ALTIVEC_2 (COPYSIGN_V4SF, "copysignfp", CONST, vector_copysignv4sf3) - -/* Altivec ABS functions. */ -BU_ALTIVEC_A (ABS_V4SI, "abs_v4si", CONST, absv4si2) -BU_ALTIVEC_A (ABS_V8HI, "abs_v8hi", CONST, absv8hi2) -BU_ALTIVEC_A (ABS_V4SF, "abs_v4sf", CONST, absv4sf2) -BU_ALTIVEC_A (ABS_V16QI, "abs_v16qi", CONST, absv16qi2) -BU_ALTIVEC_A (ABSS_V4SI, "abss_v4si", SAT, altivec_abss_v4si) -BU_ALTIVEC_A (ABSS_V8HI, "abss_v8hi", SAT, altivec_abss_v8hi) -BU_ALTIVEC_A (ABSS_V16QI, "abss_v16qi", SAT, altivec_abss_v16qi) - -/* Altivec NABS functions. */ -BU_ALTIVEC_A (NABS_V2DI, "nabs_v2di", CONST, nabsv2di2) -BU_ALTIVEC_A (NABS_V4SI, "nabs_v4si", CONST, nabsv4si2) -BU_ALTIVEC_A (NABS_V8HI, "nabs_v8hi", CONST, nabsv8hi2) -BU_ALTIVEC_A (NABS_V16QI, "nabs_v16qi", CONST, nabsv16qi2) -BU_ALTIVEC_A (NABS_V4SF, "nabs_v4sf", CONST, vsx_nabsv4sf2) -BU_ALTIVEC_A (NABS_V2DF, "nabs_v2df", CONST, vsx_nabsv2df2) - -/* 1 argument Altivec builtin functions. */ -BU_ALTIVEC_1 (VEXPTEFP, "vexptefp", FP, altivec_vexptefp) -BU_ALTIVEC_1 (VLOGEFP, "vlogefp", FP, altivec_vlogefp) -BU_ALTIVEC_1 (VREFP, "vrefp", FP, rev4sf2) -BU_ALTIVEC_1 (VRFIM, "vrfim", FP, vector_floorv4sf2) -BU_ALTIVEC_1 (VRFIN, "vrfin", FP, altivec_vrfin) -BU_ALTIVEC_1 (VRFIP, "vrfip", FP, vector_ceilv4sf2) -BU_ALTIVEC_1 (VRFIZ, "vrfiz", FP, vector_btruncv4sf2) -BU_ALTIVEC_1 (VRSQRTFP, "vrsqrtfp", FP, rsqrtv4sf2) -BU_ALTIVEC_1 (VRSQRTEFP, "vrsqrtefp", FP, rsqrtev4sf2) -BU_ALTIVEC_1 (VSPLTISB, "vspltisb", CONST, altivec_vspltisb) -BU_ALTIVEC_1 (VSPLTISH, "vspltish", CONST, altivec_vspltish) -BU_ALTIVEC_1 (VSPLTISW, "vspltisw", CONST, altivec_vspltisw) -BU_ALTIVEC_1 (VUPKHSB, "vupkhsb", CONST, altivec_vupkhsb) -BU_ALTIVEC_1 (VUPKHPX, "vupkhpx", CONST, altivec_vupkhpx) -BU_ALTIVEC_1 (VUPKHSH, "vupkhsh", CONST, altivec_vupkhsh) -BU_ALTIVEC_1 (VUPKLSB, "vupklsb", CONST, altivec_vupklsb) -BU_ALTIVEC_1 (VUPKLPX, "vupklpx", CONST, altivec_vupklpx) -BU_ALTIVEC_1 (VUPKLSH, "vupklsh", CONST, altivec_vupklsh) - -BU_ALTIVEC_1 (VREVE_V2DI, "vreve_v2di", CONST, altivec_vrevev2di2) -BU_ALTIVEC_1 (VREVE_V4SI, "vreve_v4si", CONST, altivec_vrevev4si2) -BU_ALTIVEC_1 (VREVE_V8HI, "vreve_v8hi", CONST, altivec_vrevev8hi2) -BU_ALTIVEC_1 (VREVE_V16QI, "vreve_v16qi", CONST, altivec_vrevev16qi2) -BU_ALTIVEC_1 (VREVE_V2DF, "vreve_v2df", CONST, altivec_vrevev2df2) -BU_ALTIVEC_1 (VREVE_V4SF, "vreve_v4sf", CONST, altivec_vrevev4sf2) - -BU_ALTIVEC_1 (FLOAT_V4SI_V4SF, "float_sisf", FP, floatv4siv4sf2) -BU_ALTIVEC_1 (UNSFLOAT_V4SI_V4SF, "uns_float_sisf", FP, floatunsv4siv4sf2) -BU_ALTIVEC_1 (FIX_V4SF_V4SI, "fix_sfsi", FP, fix_truncv4sfv4si2) -BU_ALTIVEC_1 (FIXUNS_V4SF_V4SI, "fixuns_sfsi", FP, fixuns_truncv4sfv4si2) - -/* Altivec predicate functions. */ -BU_ALTIVEC_P (VCMPBFP_P, "vcmpbfp_p", CONST, altivec_vcmpbfp_p) -BU_ALTIVEC_P (VCMPEQFP_P, "vcmpeqfp_p", CONST, vector_eq_v4sf_p) -BU_ALTIVEC_P (VCMPGEFP_P, "vcmpgefp_p", CONST, vector_ge_v4sf_p) -BU_ALTIVEC_P (VCMPGTFP_P, "vcmpgtfp_p", CONST, vector_gt_v4sf_p) -BU_ALTIVEC_P (VCMPEQUW_P, "vcmpequw_p", CONST, vector_eq_v4si_p) -BU_ALTIVEC_P (VCMPGTSW_P, "vcmpgtsw_p", CONST, vector_gt_v4si_p) -BU_ALTIVEC_P (VCMPGTUW_P, "vcmpgtuw_p", CONST, vector_gtu_v4si_p) -BU_ALTIVEC_P (VCMPEQUH_P, "vcmpequh_p", CONST, vector_eq_v8hi_p) -BU_ALTIVEC_P (VCMPGTSH_P, "vcmpgtsh_p", CONST, vector_gt_v8hi_p) -BU_ALTIVEC_P (VCMPGTUH_P, "vcmpgtuh_p", CONST, vector_gtu_v8hi_p) -BU_ALTIVEC_P (VCMPEQUB_P, "vcmpequb_p", CONST, vector_eq_v16qi_p) -BU_ALTIVEC_P (VCMPGTSB_P, "vcmpgtsb_p", CONST, vector_gt_v16qi_p) -BU_ALTIVEC_P (VCMPGTUB_P, "vcmpgtub_p", CONST, vector_gtu_v16qi_p) - -/* AltiVec builtins that are handled as special cases. */ -BU_ALTIVEC_X (MTVSCR, "mtvscr", MISC) -BU_ALTIVEC_X (MFVSCR, "mfvscr", MISC) -BU_ALTIVEC_X (DSSALL, "dssall", MISC) -BU_ALTIVEC_X (DSS, "dss", MISC) -BU_ALTIVEC_X (LVSL, "lvsl", PURE) -BU_ALTIVEC_X (LVSR, "lvsr", PURE) -BU_ALTIVEC_X (LVEBX, "lvebx", PURE) -BU_ALTIVEC_X (LVEHX, "lvehx", PURE) -BU_ALTIVEC_X (LVEWX, "lvewx", PURE) -BU_P10V_AV_X (SE_LXVRBX, "se_lxvrbx", PURE) -BU_P10V_AV_X (SE_LXVRHX, "se_lxvrhx", PURE) -BU_P10V_AV_X (SE_LXVRWX, "se_lxvrwx", PURE) -BU_P10V_AV_X (SE_LXVRDX, "se_lxvrdx", PURE) -BU_P10V_AV_X (ZE_LXVRBX, "ze_lxvrbx", PURE) -BU_P10V_AV_X (ZE_LXVRHX, "ze_lxvrhx", PURE) -BU_P10V_AV_X (ZE_LXVRWX, "ze_lxvrwx", PURE) -BU_P10V_AV_X (ZE_LXVRDX, "ze_lxvrdx", PURE) -BU_P10V_AV_X (TR_STXVRBX, "tr_stxvrbx", MEM) -BU_P10V_AV_X (TR_STXVRHX, "tr_stxvrhx", MEM) -BU_P10V_AV_X (TR_STXVRWX, "tr_stxvrwx", MEM) -BU_P10V_AV_X (TR_STXVRDX, "tr_stxvrdx", MEM) -BU_ALTIVEC_X (LVXL, "lvxl", PURE) -BU_ALTIVEC_X (LVXL_V2DF, "lvxl_v2df", PURE) -BU_ALTIVEC_X (LVXL_V2DI, "lvxl_v2di", PURE) -BU_ALTIVEC_X (LVXL_V4SF, "lvxl_v4sf", PURE) -BU_ALTIVEC_X (LVXL_V4SI, "lvxl_v4si", PURE) -BU_ALTIVEC_X (LVXL_V8HI, "lvxl_v8hi", PURE) -BU_ALTIVEC_X (LVXL_V16QI, "lvxl_v16qi", PURE) -BU_ALTIVEC_X (LVX, "lvx", PURE) -BU_ALTIVEC_X (LVX_V1TI, "lvx_v1ti", PURE) -BU_ALTIVEC_X (LVX_V2DF, "lvx_v2df", PURE) -BU_ALTIVEC_X (LVX_V2DI, "lvx_v2di", PURE) -BU_ALTIVEC_X (LVX_V4SF, "lvx_v4sf", PURE) -BU_ALTIVEC_X (LVX_V4SI, "lvx_v4si", PURE) -BU_ALTIVEC_X (LVX_V8HI, "lvx_v8hi", PURE) -BU_ALTIVEC_X (LVX_V16QI, "lvx_v16qi", PURE) -BU_ALTIVEC_X (STVX, "stvx", MEM) -BU_ALTIVEC_X (STVX_V2DF, "stvx_v2df", MEM) -BU_ALTIVEC_X (STVX_V2DI, "stvx_v2di", MEM) -BU_ALTIVEC_X (STVX_V4SF, "stvx_v4sf", MEM) -BU_ALTIVEC_X (STVX_V4SI, "stvx_v4si", MEM) -BU_ALTIVEC_X (STVX_V8HI, "stvx_v8hi", MEM) -BU_ALTIVEC_X (STVX_V16QI, "stvx_v16qi", MEM) -BU_ALTIVEC_C (LVLX, "lvlx", PURE) -BU_ALTIVEC_C (LVLXL, "lvlxl", PURE) -BU_ALTIVEC_C (LVRX, "lvrx", PURE) -BU_ALTIVEC_C (LVRXL, "lvrxl", PURE) -BU_ALTIVEC_X (STVEBX, "stvebx", MEM) -BU_ALTIVEC_X (STVEHX, "stvehx", MEM) -BU_ALTIVEC_X (STVEWX, "stvewx", MEM) -BU_ALTIVEC_X (STVXL, "stvxl", MEM) -BU_ALTIVEC_X (STVXL_V2DF, "stvxl_v2df", MEM) -BU_ALTIVEC_X (STVXL_V2DI, "stvxl_v2di", MEM) -BU_ALTIVEC_X (STVXL_V4SF, "stvxl_v4sf", MEM) -BU_ALTIVEC_X (STVXL_V4SI, "stvxl_v4si", MEM) -BU_ALTIVEC_X (STVXL_V8HI, "stvxl_v8hi", MEM) -BU_ALTIVEC_X (STVXL_V16QI, "stvxl_v16qi", MEM) -BU_ALTIVEC_C (STVLX, "stvlx", MEM) -BU_ALTIVEC_C (STVLXL, "stvlxl", MEM) -BU_ALTIVEC_C (STVRX, "stvrx", MEM) -BU_ALTIVEC_C (STVRXL, "stvrxl", MEM) -BU_ALTIVEC_X (MASK_FOR_LOAD, "mask_for_load", MISC) -BU_ALTIVEC_X (VEC_INIT_V4SI, "vec_init_v4si", CONST) -BU_ALTIVEC_X (VEC_INIT_V8HI, "vec_init_v8hi", CONST) -BU_ALTIVEC_X (VEC_INIT_V16QI, "vec_init_v16qi", CONST) -BU_ALTIVEC_X (VEC_INIT_V4SF, "vec_init_v4sf", CONST) -BU_ALTIVEC_X (VEC_SET_V4SI, "vec_set_v4si", CONST) -BU_ALTIVEC_X (VEC_SET_V8HI, "vec_set_v8hi", CONST) -BU_ALTIVEC_X (VEC_SET_V16QI, "vec_set_v16qi", CONST) -BU_ALTIVEC_X (VEC_SET_V4SF, "vec_set_v4sf", CONST) -BU_ALTIVEC_X (VEC_EXT_V4SI, "vec_ext_v4si", CONST) -BU_ALTIVEC_X (VEC_EXT_V8HI, "vec_ext_v8hi", CONST) -BU_ALTIVEC_X (VEC_EXT_V16QI, "vec_ext_v16qi", CONST) -BU_ALTIVEC_X (VEC_EXT_V4SF, "vec_ext_v4sf", CONST) - -/* Altivec overloaded builtins. */ -/* For now, don't set the classification for overloaded functions. - The function should be converted to the type specific instruction - before we get to the point about classifying the builtin type. */ - -/* 3 argument Altivec overloaded builtins. */ -BU_ALTIVEC_OVERLOAD_3 (MADD, "madd") -BU_ALTIVEC_OVERLOAD_3 (MADDS, "madds") -BU_ALTIVEC_OVERLOAD_3 (MLADD, "mladd") -BU_ALTIVEC_OVERLOAD_3 (MRADDS, "mradds") -BU_ALTIVEC_OVERLOAD_3 (MSUM, "msum") -BU_ALTIVEC_OVERLOAD_3 (MSUMS, "msums") -BU_ALTIVEC_OVERLOAD_3 (NMSUB, "nmsub") -BU_ALTIVEC_OVERLOAD_3 (PERM, "perm") -BU_ALTIVEC_OVERLOAD_3 (SEL, "sel") -BU_ALTIVEC_OVERLOAD_3 (VMSUMMBM, "vmsummbm") -BU_ALTIVEC_OVERLOAD_3 (VMSUMSHM, "vmsumshm") -BU_ALTIVEC_OVERLOAD_3 (VMSUMSHS, "vmsumshs") -BU_ALTIVEC_OVERLOAD_3 (VMSUMUBM, "vmsumubm") -BU_ALTIVEC_OVERLOAD_3 (VMSUMUHM, "vmsumuhm") -BU_ALTIVEC_OVERLOAD_3 (VMSUMUDM, "vmsumudm") -BU_ALTIVEC_OVERLOAD_3 (VMSUMUHS, "vmsumuhs") - -/* Altivec DST overloaded builtins. */ -BU_ALTIVEC_OVERLOAD_D (DST, "dst") -BU_ALTIVEC_OVERLOAD_D (DSTT, "dstt") -BU_ALTIVEC_OVERLOAD_D (DSTST, "dstst") -BU_ALTIVEC_OVERLOAD_D (DSTSTT, "dststt") - -/* 2 argument Altivec overloaded builtins. */ -BU_ALTIVEC_OVERLOAD_2 (ADD, "add") -BU_ALTIVEC_OVERLOAD_2 (ADDC, "addc") -BU_ALTIVEC_OVERLOAD_2 (ADDS, "adds") -BU_ALTIVEC_OVERLOAD_2 (AND, "and") -BU_ALTIVEC_OVERLOAD_2 (ANDC, "andc") -BU_ALTIVEC_OVERLOAD_2 (AVG, "avg") -BU_ALTIVEC_OVERLOAD_2 (CMPB, "cmpb") -BU_ALTIVEC_OVERLOAD_2 (CMPEQ, "cmpeq") -BU_ALTIVEC_OVERLOAD_2 (CMPGE, "cmpge") -BU_ALTIVEC_OVERLOAD_2 (CMPGT, "cmpgt") -BU_ALTIVEC_OVERLOAD_2 (CMPLE, "cmple") -BU_ALTIVEC_OVERLOAD_2 (CMPLT, "cmplt") -BU_ALTIVEC_OVERLOAD_2 (COPYSIGN, "copysign") -BU_ALTIVEC_OVERLOAD_2 (MAX, "max") -BU_ALTIVEC_OVERLOAD_2 (MERGEH, "mergeh") -BU_ALTIVEC_OVERLOAD_2 (MERGEL, "mergel") -BU_ALTIVEC_OVERLOAD_2 (MIN, "min") -BU_ALTIVEC_OVERLOAD_2 (MULE, "mule") -BU_ALTIVEC_OVERLOAD_2 (MULO, "mulo") -BU_ALTIVEC_OVERLOAD_2 (NOR, "nor") -BU_ALTIVEC_OVERLOAD_2 (OR, "or") -BU_ALTIVEC_OVERLOAD_2 (PACK, "pack") -BU_ALTIVEC_OVERLOAD_2 (PACKPX, "packpx") -BU_ALTIVEC_OVERLOAD_2 (PACKS, "packs") -BU_ALTIVEC_OVERLOAD_2 (PACKSU, "packsu") -BU_ALTIVEC_OVERLOAD_2 (RECIP, "recipdiv") -BU_ALTIVEC_OVERLOAD_2 (RL, "rl") -BU_ALTIVEC_OVERLOAD_2 (SL, "sl") -BU_ALTIVEC_OVERLOAD_2 (SLL, "sll") -BU_ALTIVEC_OVERLOAD_2 (SLO, "slo") -BU_ALTIVEC_OVERLOAD_2 (SR, "sr") -BU_ALTIVEC_OVERLOAD_2 (SRA, "sra") -BU_ALTIVEC_OVERLOAD_2 (SRL, "srl") -BU_ALTIVEC_OVERLOAD_2 (SRO, "sro") -BU_ALTIVEC_OVERLOAD_2 (SUB, "sub") -BU_ALTIVEC_OVERLOAD_2 (SUBC, "subc") -BU_ALTIVEC_OVERLOAD_2 (SUBS, "subs") -BU_ALTIVEC_OVERLOAD_2 (SUM2S, "sum2s") -BU_ALTIVEC_OVERLOAD_2 (SUM4S, "sum4s") -BU_ALTIVEC_OVERLOAD_2 (SUMS, "sums") -BU_ALTIVEC_OVERLOAD_2 (VADDFP, "vaddfp") -BU_ALTIVEC_OVERLOAD_2 (VADDSBS, "vaddsbs") -BU_ALTIVEC_OVERLOAD_2 (VADDSHS, "vaddshs") -BU_ALTIVEC_OVERLOAD_2 (VADDSWS, "vaddsws") -BU_ALTIVEC_OVERLOAD_2 (VADDUBM, "vaddubm") -BU_ALTIVEC_OVERLOAD_2 (VADDUBS, "vaddubs") -BU_ALTIVEC_OVERLOAD_2 (VADDUHM, "vadduhm") -BU_ALTIVEC_OVERLOAD_2 (VADDUHS, "vadduhs") -BU_ALTIVEC_OVERLOAD_2 (VADDUWM, "vadduwm") -BU_ALTIVEC_OVERLOAD_2 (VADDUWS, "vadduws") -BU_ALTIVEC_OVERLOAD_2 (VAVGSB, "vavgsb") -BU_ALTIVEC_OVERLOAD_2 (VAVGSH, "vavgsh") -BU_ALTIVEC_OVERLOAD_2 (VAVGSW, "vavgsw") -BU_ALTIVEC_OVERLOAD_2 (VAVGUB, "vavgub") -BU_ALTIVEC_OVERLOAD_2 (VAVGUH, "vavguh") -BU_ALTIVEC_OVERLOAD_2 (VAVGUW, "vavguw") -BU_ALTIVEC_OVERLOAD_2 (VCMPEQFP, "vcmpeqfp") -BU_ALTIVEC_OVERLOAD_2 (VCMPEQUB, "vcmpequb") -BU_ALTIVEC_OVERLOAD_2 (VCMPEQUH, "vcmpequh") -BU_ALTIVEC_OVERLOAD_2 (VCMPEQUW, "vcmpequw") -BU_ALTIVEC_OVERLOAD_2 (VCMPGTFP, "vcmpgtfp") -BU_ALTIVEC_OVERLOAD_2 (VCMPGTSB, "vcmpgtsb") -BU_ALTIVEC_OVERLOAD_2 (VCMPGTSH, "vcmpgtsh") -BU_ALTIVEC_OVERLOAD_2 (VCMPGTSW, "vcmpgtsw") -BU_ALTIVEC_OVERLOAD_2 (VCMPGTUB, "vcmpgtub") -BU_ALTIVEC_OVERLOAD_2 (VCMPGTUH, "vcmpgtuh") -BU_ALTIVEC_OVERLOAD_2 (VCMPGTUW, "vcmpgtuw") -BU_ALTIVEC_OVERLOAD_2 (VMAXFP, "vmaxfp") -BU_ALTIVEC_OVERLOAD_2 (VMAXSB, "vmaxsb") -BU_ALTIVEC_OVERLOAD_2 (VMAXSH, "vmaxsh") -BU_ALTIVEC_OVERLOAD_2 (VMAXSW, "vmaxsw") -BU_ALTIVEC_OVERLOAD_2 (VMAXUB, "vmaxub") -BU_ALTIVEC_OVERLOAD_2 (VMAXUH, "vmaxuh") -BU_ALTIVEC_OVERLOAD_2 (VMAXUW, "vmaxuw") -BU_ALTIVEC_OVERLOAD_2 (VMINFP, "vminfp") -BU_ALTIVEC_OVERLOAD_2 (VMINSB, "vminsb") -BU_ALTIVEC_OVERLOAD_2 (VMINSH, "vminsh") -BU_ALTIVEC_OVERLOAD_2 (VMINSW, "vminsw") -BU_ALTIVEC_OVERLOAD_2 (VMINUB, "vminub") -BU_ALTIVEC_OVERLOAD_2 (VMINUH, "vminuh") -BU_ALTIVEC_OVERLOAD_2 (VMINUW, "vminuw") -BU_ALTIVEC_OVERLOAD_2 (VMRGHB, "vmrghb") -BU_ALTIVEC_OVERLOAD_2 (VMRGHH, "vmrghh") -BU_ALTIVEC_OVERLOAD_2 (VMRGHW, "vmrghw") -BU_ALTIVEC_OVERLOAD_2 (VMRGLB, "vmrglb") -BU_ALTIVEC_OVERLOAD_2 (VMRGLH, "vmrglh") -BU_ALTIVEC_OVERLOAD_2 (VMRGLW, "vmrglw") -BU_ALTIVEC_OVERLOAD_2 (VMULESB, "vmulesb") -BU_ALTIVEC_OVERLOAD_2 (VMULESH, "vmulesh") -BU_ALTIVEC_OVERLOAD_2 (VMULESW, "vmulesw") -BU_ALTIVEC_OVERLOAD_2 (VMULEUB, "vmuleub") -BU_ALTIVEC_OVERLOAD_2 (VMULEUH, "vmuleuh") -BU_ALTIVEC_OVERLOAD_2 (VMULEUW, "vmuleuw") -BU_ALTIVEC_OVERLOAD_2 (VMULOSB, "vmulosb") -BU_ALTIVEC_OVERLOAD_2 (VMULOSH, "vmulosh") -BU_ALTIVEC_OVERLOAD_2 (VMULOSW, "vmulosw") -BU_ALTIVEC_OVERLOAD_2 (VMULOUB, "vmuloub") -BU_ALTIVEC_OVERLOAD_2 (VMULOUH, "vmulouh") -BU_ALTIVEC_OVERLOAD_2 (VMULOUW, "vmulouw") -BU_ALTIVEC_OVERLOAD_2 (VPKSHSS, "vpkshss") -BU_ALTIVEC_OVERLOAD_2 (VPKSHUS, "vpkshus") -BU_ALTIVEC_OVERLOAD_2 (VPKSWSS, "vpkswss") -BU_ALTIVEC_OVERLOAD_2 (VPKSWUS, "vpkswus") -BU_ALTIVEC_OVERLOAD_2 (VPKUHUM, "vpkuhum") -BU_ALTIVEC_OVERLOAD_2 (VPKUHUS, "vpkuhus") -BU_ALTIVEC_OVERLOAD_2 (VPKUWUM, "vpkuwum") -BU_ALTIVEC_OVERLOAD_2 (VPKUWUS, "vpkuwus") -BU_ALTIVEC_OVERLOAD_2 (VRLB, "vrlb") -BU_ALTIVEC_OVERLOAD_2 (VRLH, "vrlh") -BU_ALTIVEC_OVERLOAD_2 (VRLW, "vrlw") -BU_ALTIVEC_OVERLOAD_2 (VSLB, "vslb") -BU_ALTIVEC_OVERLOAD_2 (VSLH, "vslh") -BU_ALTIVEC_OVERLOAD_2 (VSLW, "vslw") -BU_ALTIVEC_OVERLOAD_2 (VSRAB, "vsrab") -BU_ALTIVEC_OVERLOAD_2 (VSRAH, "vsrah") -BU_ALTIVEC_OVERLOAD_2 (VSRAW, "vsraw") -BU_ALTIVEC_OVERLOAD_2 (VSRB, "vsrb") -BU_ALTIVEC_OVERLOAD_2 (VSRH, "vsrh") -BU_ALTIVEC_OVERLOAD_2 (VSRW, "vsrw") -BU_ALTIVEC_OVERLOAD_2 (VSUBFP, "vsubfp") -BU_ALTIVEC_OVERLOAD_2 (VSUBSBS, "vsubsbs") -BU_ALTIVEC_OVERLOAD_2 (VSUBSHS, "vsubshs") -BU_ALTIVEC_OVERLOAD_2 (VSUBSWS, "vsubsws") -BU_ALTIVEC_OVERLOAD_2 (VSUBUBM, "vsububm") -BU_ALTIVEC_OVERLOAD_2 (VSUBUBS, "vsububs") -BU_ALTIVEC_OVERLOAD_2 (VSUBUHM, "vsubuhm") -BU_ALTIVEC_OVERLOAD_2 (VSUBUHS, "vsubuhs") -BU_ALTIVEC_OVERLOAD_2 (VSUBUWM, "vsubuwm") -BU_ALTIVEC_OVERLOAD_2 (VSUBUWS, "vsubuws") -BU_ALTIVEC_OVERLOAD_2 (VSUM4SBS, "vsum4sbs") -BU_ALTIVEC_OVERLOAD_2 (VSUM4SHS, "vsum4shs") -BU_ALTIVEC_OVERLOAD_2 (VSUM4UBS, "vsum4ubs") -BU_ALTIVEC_OVERLOAD_2 (XOR, "xor") - -/* 1 argument Altivec overloaded functions. */ -BU_ALTIVEC_OVERLOAD_1 (ABS, "abs") -BU_ALTIVEC_OVERLOAD_1 (NABS, "nabs") -BU_ALTIVEC_OVERLOAD_1 (ABSS, "abss") -BU_ALTIVEC_OVERLOAD_1 (CEIL, "ceil") -BU_ALTIVEC_OVERLOAD_1 (EXPTE, "expte") -BU_ALTIVEC_OVERLOAD_1 (FLOOR, "floor") -BU_ALTIVEC_OVERLOAD_1 (LOGE, "loge") -BU_ALTIVEC_OVERLOAD_1 (MTVSCR, "mtvscr") -BU_ALTIVEC_OVERLOAD_1 (NEARBYINT, "nearbyint") -BU_ALTIVEC_OVERLOAD_1 (RE, "re") -BU_ALTIVEC_OVERLOAD_1 (RINT, "rint") -BU_ALTIVEC_OVERLOAD_1 (ROUND, "round") -BU_ALTIVEC_OVERLOAD_1 (RSQRT, "rsqrt") -BU_ALTIVEC_OVERLOAD_1 (RSQRTE, "rsqrte") -BU_ALTIVEC_OVERLOAD_1 (SQRT, "sqrt") -BU_ALTIVEC_OVERLOAD_1 (TRUNC, "trunc") -BU_ALTIVEC_OVERLOAD_1 (UNPACKH, "unpackh") -BU_ALTIVEC_OVERLOAD_1 (UNPACKL, "unpackl") -BU_ALTIVEC_OVERLOAD_1 (VUPKHPX, "vupkhpx") -BU_ALTIVEC_OVERLOAD_1 (VUPKHSB, "vupkhsb") -BU_ALTIVEC_OVERLOAD_1 (VUPKHSH, "vupkhsh") -BU_ALTIVEC_OVERLOAD_1 (VUPKLPX, "vupklpx") -BU_ALTIVEC_OVERLOAD_1 (VUPKLSB, "vupklsb") -BU_ALTIVEC_OVERLOAD_1 (VUPKLSH, "vupklsh") - -BU_ALTIVEC_OVERLOAD_1 (VREVE, "vreve") - -/* Overloaded altivec predicates. */ -BU_ALTIVEC_OVERLOAD_P (VCMPEQ_P, "vcmpeq_p") -BU_ALTIVEC_OVERLOAD_P (VCMPGT_P, "vcmpgt_p") -BU_ALTIVEC_OVERLOAD_P (VCMPGE_P, "vcmpge_p") - -/* Overloaded Altivec builtins that are handled as special cases. */ -BU_ALTIVEC_OVERLOAD_X (ADDE, "adde") -BU_ALTIVEC_OVERLOAD_X (ADDEC, "addec") -BU_ALTIVEC_OVERLOAD_X (CMPNE, "cmpne") -BU_ALTIVEC_OVERLOAD_X (CTF, "ctf") -BU_ALTIVEC_OVERLOAD_X (CTS, "cts") -BU_ALTIVEC_OVERLOAD_X (CTU, "ctu") -BU_ALTIVEC_OVERLOAD_X (EXTRACT, "extract") -BU_ALTIVEC_OVERLOAD_X (INSERT, "insert") -BU_ALTIVEC_OVERLOAD_X (LD, "ld") -BU_ALTIVEC_OVERLOAD_X (LDE, "lde") -BU_ALTIVEC_OVERLOAD_X (LDL, "ldl") -BU_ALTIVEC_OVERLOAD_X (LVEBX, "lvebx") -BU_ALTIVEC_OVERLOAD_X (LVEHX, "lvehx") -BU_ALTIVEC_OVERLOAD_X (LVEWX, "lvewx") -BU_P10V_OVERLOAD_X (SE_LXVRX, "se_lxvrx") -BU_P10V_OVERLOAD_X (ZE_LXVRX, "ze_lxvrx") -BU_P10V_OVERLOAD_X (TR_STXVRX, "tr_stxvrx") -BU_ALTIVEC_OVERLOAD_X (LVLX, "lvlx") -BU_ALTIVEC_OVERLOAD_X (LVLXL, "lvlxl") -BU_ALTIVEC_OVERLOAD_X (LVRX, "lvrx") -BU_ALTIVEC_OVERLOAD_X (LVRXL, "lvrxl") -BU_ALTIVEC_OVERLOAD_X (LVSL, "lvsl") -BU_ALTIVEC_OVERLOAD_X (LVSR, "lvsr") -BU_ALTIVEC_OVERLOAD_X (MUL, "mul") -BU_ALTIVEC_OVERLOAD_X (PROMOTE, "promote") -BU_ALTIVEC_OVERLOAD_X (SLD, "sld") -BU_ALTIVEC_OVERLOAD_X (SLDW, "sldw") -BU_ALTIVEC_OVERLOAD_X (SPLAT, "splat") -BU_ALTIVEC_OVERLOAD_X (SPLATS, "splats") -BU_ALTIVEC_OVERLOAD_X (ST, "st") -BU_ALTIVEC_OVERLOAD_X (STE, "ste") -BU_ALTIVEC_OVERLOAD_X (STEP, "step") -BU_ALTIVEC_OVERLOAD_X (STL, "stl") -BU_ALTIVEC_OVERLOAD_X (STVEBX, "stvebx") -BU_ALTIVEC_OVERLOAD_X (STVEHX, "stvehx") -BU_ALTIVEC_OVERLOAD_X (STVEWX, "stvewx") -BU_ALTIVEC_OVERLOAD_X (STVLX, "stvlx") -BU_ALTIVEC_OVERLOAD_X (STVLXL, "stvlxl") -BU_ALTIVEC_OVERLOAD_X (STVRX, "stvrx") -BU_ALTIVEC_OVERLOAD_X (STVRXL, "stvrxl") -BU_ALTIVEC_OVERLOAD_X (SUBE, "sube") -BU_ALTIVEC_OVERLOAD_X (SUBEC, "subec") -BU_ALTIVEC_OVERLOAD_X (VCFSX, "vcfsx") -BU_ALTIVEC_OVERLOAD_X (VCFUX, "vcfux") -BU_ALTIVEC_OVERLOAD_X (VSPLTB, "vspltb") -BU_ALTIVEC_OVERLOAD_X (VSPLTH, "vsplth") -BU_ALTIVEC_OVERLOAD_X (VSPLTW, "vspltw") - -/* 3 argument VSX builtins. */ -BU_VSX_3 (XVMADDSP, "xvmaddsp", CONST, fmav4sf4) -BU_VSX_3 (XVMSUBSP, "xvmsubsp", CONST, fmsv4sf4) -BU_VSX_3 (XVNMADDSP, "xvnmaddsp", CONST, nfmav4sf4) -BU_VSX_3 (XVNMSUBSP, "xvnmsubsp", CONST, nfmsv4sf4) - -BU_VSX_3 (XVMADDDP, "xvmadddp", CONST, fmav2df4) -BU_VSX_3 (XVMSUBDP, "xvmsubdp", CONST, fmsv2df4) -BU_VSX_3 (XVNMADDDP, "xvnmadddp", CONST, nfmav2df4) -BU_VSX_3 (XVNMSUBDP, "xvnmsubdp", CONST, nfmsv2df4) - -BU_VSX_3 (XXSEL_1TI, "xxsel_1ti", CONST, vector_select_v1ti) -BU_VSX_3 (XXSEL_2DI, "xxsel_2di", CONST, vector_select_v2di) -BU_VSX_3 (XXSEL_2DF, "xxsel_2df", CONST, vector_select_v2df) -BU_VSX_3 (XXSEL_4SF, "xxsel_4sf", CONST, vector_select_v4sf) -BU_VSX_3 (XXSEL_4SI, "xxsel_4si", CONST, vector_select_v4si) -BU_VSX_3 (XXSEL_8HI, "xxsel_8hi", CONST, vector_select_v8hi) -BU_VSX_3 (XXSEL_16QI, "xxsel_16qi", CONST, vector_select_v16qi) -BU_VSX_3 (XXSEL_1TI_UNS, "xxsel_1ti_uns", CONST, vector_select_v1ti_uns) -BU_VSX_3 (XXSEL_2DI_UNS, "xxsel_2di_uns", CONST, vector_select_v2di_uns) -BU_VSX_3 (XXSEL_4SI_UNS, "xxsel_4si_uns", CONST, vector_select_v4si_uns) -BU_VSX_3 (XXSEL_8HI_UNS, "xxsel_8hi_uns", CONST, vector_select_v8hi_uns) -BU_VSX_3 (XXSEL_16QI_UNS, "xxsel_16qi_uns", CONST, vector_select_v16qi_uns) - -BU_VSX_3 (VPERM_1TI, "vperm_1ti", CONST, altivec_vperm_v1ti) -BU_VSX_3 (VPERM_2DI, "vperm_2di", CONST, altivec_vperm_v2di) -BU_VSX_3 (VPERM_2DF, "vperm_2df", CONST, altivec_vperm_v2df) -BU_VSX_3 (VPERM_4SF, "vperm_4sf", CONST, altivec_vperm_v4sf) -BU_VSX_3 (VPERM_4SI, "vperm_4si", CONST, altivec_vperm_v4si) -BU_VSX_3 (VPERM_8HI, "vperm_8hi", CONST, altivec_vperm_v8hi) -BU_VSX_3 (VPERM_16QI, "vperm_16qi", CONST, altivec_vperm_v16qi) -BU_VSX_3 (VPERM_1TI_UNS, "vperm_1ti_uns", CONST, altivec_vperm_v1ti_uns) -BU_VSX_3 (VPERM_2DI_UNS, "vperm_2di_uns", CONST, altivec_vperm_v2di_uns) -BU_VSX_3 (VPERM_4SI_UNS, "vperm_4si_uns", CONST, altivec_vperm_v4si_uns) -BU_VSX_3 (VPERM_8HI_UNS, "vperm_8hi_uns", CONST, altivec_vperm_v8hi_uns) -BU_VSX_3 (VPERM_16QI_UNS, "vperm_16qi_uns", CONST, altivec_vperm_v16qi_uns) - -BU_VSX_3 (XXPERMDI_1TI, "xxpermdi_1ti", CONST, vsx_xxpermdi_v1ti) -BU_VSX_3 (XXPERMDI_2DF, "xxpermdi_2df", CONST, vsx_xxpermdi_v2df) -BU_VSX_3 (XXPERMDI_2DI, "xxpermdi_2di", CONST, vsx_xxpermdi_v2di) -BU_VSX_3 (XXPERMDI_4SF, "xxpermdi_4sf", CONST, vsx_xxpermdi_v4sf) -BU_VSX_3 (XXPERMDI_4SI, "xxpermdi_4si", CONST, vsx_xxpermdi_v4si) -BU_VSX_3 (XXPERMDI_8HI, "xxpermdi_8hi", CONST, vsx_xxpermdi_v8hi) -BU_VSX_3 (XXPERMDI_16QI, "xxpermdi_16qi", CONST, vsx_xxpermdi_v16qi) -BU_VSX_3 (SET_1TI, "set_1ti", CONST, vsx_set_v1ti) -BU_VSX_3 (SET_2DF, "set_2df", CONST, vsx_set_v2df) -BU_VSX_3 (SET_2DI, "set_2di", CONST, vsx_set_v2di) -BU_VSX_3 (XXSLDWI_2DI, "xxsldwi_2di", CONST, vsx_xxsldwi_v2di) -BU_VSX_3 (XXSLDWI_2DF, "xxsldwi_2df", CONST, vsx_xxsldwi_v2df) -BU_VSX_3 (XXSLDWI_4SF, "xxsldwi_4sf", CONST, vsx_xxsldwi_v4sf) -BU_VSX_3 (XXSLDWI_4SI, "xxsldwi_4si", CONST, vsx_xxsldwi_v4si) -BU_VSX_3 (XXSLDWI_8HI, "xxsldwi_8hi", CONST, vsx_xxsldwi_v8hi) -BU_VSX_3 (XXSLDWI_16QI, "xxsldwi_16qi", CONST, vsx_xxsldwi_v16qi) - -/* 2 argument VSX builtins. */ -BU_VSX_2 (XVADDDP, "xvadddp", FP, addv2df3) -BU_VSX_2 (XVSUBDP, "xvsubdp", FP, subv2df3) -BU_VSX_2 (XVMULDP, "xvmuldp", FP, mulv2df3) -BU_VSX_2 (XVDIVDP, "xvdivdp", FP, divv2df3) -BU_VSX_2 (RECIP_V2DF, "xvrecipdivdp", FP, recipv2df3) -BU_VSX_2 (XVMINDP, "xvmindp", CONST, sminv2df3) -BU_VSX_2 (XVMAXDP, "xvmaxdp", CONST, smaxv2df3) -BU_VSX_2 (XVTDIVDP_FE, "xvtdivdp_fe", CONST, vsx_tdivv2df3_fe) -BU_VSX_2 (XVTDIVDP_FG, "xvtdivdp_fg", CONST, vsx_tdivv2df3_fg) -BU_VSX_2 (XVCMPEQDP, "xvcmpeqdp", CONST, vector_eqv2df) -BU_VSX_2 (XVCMPGTDP, "xvcmpgtdp", CONST, vector_gtv2df) -BU_VSX_2 (XVCMPGEDP, "xvcmpgedp", CONST, vector_gev2df) - -BU_VSX_2 (XVADDSP, "xvaddsp", FP, addv4sf3) -BU_VSX_2 (XVSUBSP, "xvsubsp", FP, subv4sf3) -BU_VSX_2 (XVMULSP, "xvmulsp", FP, mulv4sf3) -BU_VSX_2 (XVDIVSP, "xvdivsp", FP, divv4sf3) -BU_VSX_2 (RECIP_V4SF, "xvrecipdivsp", FP, recipv4sf3) -BU_VSX_2 (XVMINSP, "xvminsp", CONST, sminv4sf3) -BU_VSX_2 (XVMAXSP, "xvmaxsp", CONST, smaxv4sf3) -BU_VSX_2 (XVTDIVSP_FE, "xvtdivsp_fe", CONST, vsx_tdivv4sf3_fe) -BU_VSX_2 (XVTDIVSP_FG, "xvtdivsp_fg", CONST, vsx_tdivv4sf3_fg) -BU_VSX_2 (XVCMPEQSP, "xvcmpeqsp", CONST, vector_eqv4sf) -BU_VSX_2 (XVCMPGTSP, "xvcmpgtsp", CONST, vector_gtv4sf) -BU_VSX_2 (XVCMPGESP, "xvcmpgesp", CONST, vector_gev4sf) - -BU_VSX_2 (XSMINDP, "xsmindp", CONST, smindf3) -BU_VSX_2 (XSMAXDP, "xsmaxdp", CONST, smaxdf3) -BU_VSX_2 (XSTDIVDP_FE, "xstdivdp_fe", CONST, vsx_tdivdf3_fe) -BU_VSX_2 (XSTDIVDP_FG, "xstdivdp_fg", CONST, vsx_tdivdf3_fg) -BU_VSX_2 (CPSGNDP, "cpsgndp", CONST, vector_copysignv2df3) -BU_VSX_2 (CPSGNSP, "cpsgnsp", CONST, vector_copysignv4sf3) - -BU_VSX_2 (CONCAT_2DF, "concat_2df", CONST, vsx_concat_v2df) -BU_VSX_2 (CONCAT_2DI, "concat_2di", CONST, vsx_concat_v2di) -BU_VSX_2 (SPLAT_2DF, "splat_2df", CONST, vsx_splat_v2df) -BU_VSX_2 (SPLAT_2DI, "splat_2di", CONST, vsx_splat_v2di) -BU_VSX_2 (XXMRGHW_4SF, "xxmrghw", CONST, vsx_xxmrghw_v4sf) -BU_VSX_2 (XXMRGHW_4SI, "xxmrghw_4si", CONST, vsx_xxmrghw_v4si) -BU_VSX_2 (XXMRGLW_4SF, "xxmrglw", CONST, vsx_xxmrglw_v4sf) -BU_VSX_2 (XXMRGLW_4SI, "xxmrglw_4si", CONST, vsx_xxmrglw_v4si) -BU_VSX_2 (VEC_MERGEL_V2DF, "mergel_2df", CONST, vsx_mergel_v2df) -BU_VSX_2 (VEC_MERGEL_V2DI, "mergel_2di", CONST, vsx_mergel_v2di) -BU_VSX_2 (VEC_MERGEH_V2DF, "mergeh_2df", CONST, vsx_mergeh_v2df) -BU_VSX_2 (VEC_MERGEH_V2DI, "mergeh_2di", CONST, vsx_mergeh_v2di) -BU_VSX_2 (XXSPLTD_V2DF, "xxspltd_2df", CONST, vsx_xxspltd_v2df) -BU_VSX_2 (XXSPLTD_V2DI, "xxspltd_2di", CONST, vsx_xxspltd_v2di) -BU_VSX_2 (DIV_V2DI, "div_2di", CONST, vsx_div_v2di) -BU_VSX_2 (UDIV_V2DI, "udiv_2di", CONST, vsx_udiv_v2di) -BU_VSX_2 (MUL_V2DI, "mul_2di", CONST, vsx_mul_v2di) - -BU_VSX_2 (XVCVSXDDP_SCALE, "xvcvsxddp_scale", CONST, vsx_xvcvsxddp_scale) -BU_VSX_2 (XVCVUXDDP_SCALE, "xvcvuxddp_scale", CONST, vsx_xvcvuxddp_scale) -BU_VSX_2 (XVCVDPSXDS_SCALE, "xvcvdpsxds_scale", CONST, vsx_xvcvdpsxds_scale) -BU_VSX_2 (XVCVDPUXDS_SCALE, "xvcvdpuxds_scale", CONST, vsx_xvcvdpuxds_scale) - -BU_VSX_2 (CMPGE_16QI, "cmpge_16qi", CONST, vector_nltv16qi) -BU_VSX_2 (CMPGE_8HI, "cmpge_8hi", CONST, vector_nltv8hi) -BU_VSX_2 (CMPGE_4SI, "cmpge_4si", CONST, vector_nltv4si) -BU_VSX_2 (CMPGE_2DI, "cmpge_2di", CONST, vector_nltv2di) -BU_VSX_2 (CMPGE_U16QI, "cmpge_u16qi", CONST, vector_nltuv16qi) -BU_VSX_2 (CMPGE_U8HI, "cmpge_u8hi", CONST, vector_nltuv8hi) -BU_VSX_2 (CMPGE_U4SI, "cmpge_u4si", CONST, vector_nltuv4si) -BU_VSX_2 (CMPGE_U2DI, "cmpge_u2di", CONST, vector_nltuv2di) - -BU_VSX_2 (CMPLE_16QI, "cmple_16qi", CONST, vector_ngtv16qi) -BU_VSX_2 (CMPLE_8HI, "cmple_8hi", CONST, vector_ngtv8hi) -BU_VSX_2 (CMPLE_4SI, "cmple_4si", CONST, vector_ngtv4si) -BU_VSX_2 (CMPLE_2DI, "cmple_2di", CONST, vector_ngtv2di) -BU_VSX_2 (CMPLE_U16QI, "cmple_u16qi", CONST, vector_ngtuv16qi) -BU_VSX_2 (CMPLE_U8HI, "cmple_u8hi", CONST, vector_ngtuv8hi) -BU_VSX_2 (CMPLE_U4SI, "cmple_u4si", CONST, vector_ngtuv4si) -BU_VSX_2 (CMPLE_U2DI, "cmple_u2di", CONST, vector_ngtuv2di) - -/* VSX abs builtin functions. */ -BU_VSX_A (XVABSDP, "xvabsdp", CONST, absv2df2) -BU_VSX_A (XVNABSDP, "xvnabsdp", CONST, vsx_nabsv2df2) -BU_VSX_A (XVABSSP, "xvabssp", CONST, absv4sf2) -BU_VSX_A (XVNABSSP, "xvnabssp", CONST, vsx_nabsv4sf2) - -/* 1 argument VSX builtin functions. */ -BU_VSX_1 (XVNEGDP, "xvnegdp", CONST, negv2df2) -BU_VSX_1 (XVSQRTDP, "xvsqrtdp", CONST, sqrtv2df2) -BU_VSX_1 (RSQRT_2DF, "xvrsqrtdp", CONST, rsqrtv2df2) -BU_VSX_1 (XVRSQRTEDP, "xvrsqrtedp", CONST, rsqrtev2df2) -BU_VSX_1 (XVTSQRTDP_FE, "xvtsqrtdp_fe", CONST, vsx_tsqrtv2df2_fe) -BU_VSX_1 (XVTSQRTDP_FG, "xvtsqrtdp_fg", CONST, vsx_tsqrtv2df2_fg) -BU_VSX_1 (XVREDP, "xvredp", CONST, vsx_frev2df2) - -BU_VSX_1 (XVNEGSP, "xvnegsp", CONST, negv4sf2) -BU_VSX_1 (XVSQRTSP, "xvsqrtsp", CONST, sqrtv4sf2) -BU_VSX_1 (RSQRT_4SF, "xvrsqrtsp", CONST, rsqrtv4sf2) -BU_VSX_1 (XVRSQRTESP, "xvrsqrtesp", CONST, rsqrtev4sf2) -BU_VSX_1 (XVTSQRTSP_FE, "xvtsqrtsp_fe", CONST, vsx_tsqrtv4sf2_fe) -BU_VSX_1 (XVTSQRTSP_FG, "xvtsqrtsp_fg", CONST, vsx_tsqrtv4sf2_fg) -BU_VSX_1 (XVRESP, "xvresp", CONST, vsx_frev4sf2) - -BU_VSX_1 (XSCVDPSP, "xscvdpsp", CONST, vsx_xscvdpsp) -BU_VSX_1 (XSCVSPDP, "xscvspdp", CONST, vsx_xscvspdp) -BU_VSX_1 (XVCVDPSP, "xvcvdpsp", CONST, vsx_xvcvdpsp) -BU_VSX_1 (XVCVSPDP, "xvcvspdp", CONST, vsx_xvcvspdp) -BU_VSX_1 (XSTSQRTDP_FE, "xstsqrtdp_fe", CONST, vsx_tsqrtdf2_fe) -BU_VSX_1 (XSTSQRTDP_FG, "xstsqrtdp_fg", CONST, vsx_tsqrtdf2_fg) - -BU_VSX_1 (XVCVDPSXDS, "xvcvdpsxds", CONST, vsx_fix_truncv2dfv2di2) -BU_VSX_1 (XVCVDPUXDS, "xvcvdpuxds", CONST, vsx_fixuns_truncv2dfv2di2) -BU_VSX_1 (XVCVDPUXDS_UNS, "xvcvdpuxds_uns", CONST, vsx_fixuns_truncv2dfv2di2) -BU_VSX_1 (XVCVSXDDP, "xvcvsxddp", CONST, vsx_floatv2div2df2) -BU_VSX_1 (XVCVUXDDP, "xvcvuxddp", CONST, vsx_floatunsv2div2df2) -BU_VSX_1 (XVCVUXDDP_UNS, "xvcvuxddp_uns", CONST, vsx_floatunsv2div2df2) - -BU_VSX_1 (XVCVSPSXWS, "xvcvspsxws", CONST, vsx_fix_truncv4sfv4si2) -BU_VSX_1 (XVCVSPUXWS, "xvcvspuxws", CONST, vsx_fixuns_truncv4sfv4si2) -BU_VSX_1 (XVCVSXWSP, "xvcvsxwsp", CONST, vsx_floatv4siv4sf2) -BU_VSX_1 (XVCVUXWSP, "xvcvuxwsp", CONST, vsx_floatunsv4siv4sf2) - -BU_VSX_1 (XVCVDPSXWS, "xvcvdpsxws", CONST, vsx_xvcvdpsxws) -BU_VSX_1 (XVCVDPUXWS, "xvcvdpuxws", CONST, vsx_xvcvdpuxws) -BU_VSX_1 (XVCVSXWDP, "xvcvsxwdp", CONST, vsx_xvcvsxwdp) -BU_VSX_1 (XVCVUXWDP, "xvcvuxwdp", CONST, vsx_xvcvuxwdp) -BU_VSX_1 (XVRDPI, "xvrdpi", CONST, vsx_xvrdpi) -BU_VSX_1 (XVRDPIC, "xvrdpic", CONST, vsx_xvrdpic) -BU_VSX_1 (XVRDPIM, "xvrdpim", CONST, vsx_floorv2df2) -BU_VSX_1 (XVRDPIP, "xvrdpip", CONST, vsx_ceilv2df2) -BU_VSX_1 (XVRDPIZ, "xvrdpiz", CONST, vsx_btruncv2df2) - -BU_VSX_1 (XVCVSPSXDS, "xvcvspsxds", CONST, vsx_xvcvspsxds) -BU_VSX_1 (XVCVSPUXDS, "xvcvspuxds", CONST, vsx_xvcvspuxds) -BU_VSX_1 (XVCVSXDSP, "xvcvsxdsp", CONST, vsx_xvcvsxdsp) -BU_VSX_1 (XVCVUXDSP, "xvcvuxdsp", CONST, vsx_xvcvuxdsp) - -BU_VSX_1 (XVCVSXWSP_V4SF, "vsx_xvcvsxwsp", CONST, vsx_xvcvsxwsp) -BU_VSX_1 (XVCVUXWSP_V4SF, "vsx_xvcvuxwsp", CONST, vsx_xvcvuxwsp) -BU_VSX_1 (FLOATE_V2DI, "floate_v2di", CONST, floatev2di) -BU_VSX_1 (FLOATE_V2DF, "floate_v2df", CONST, floatev2df) -BU_VSX_1 (FLOATO_V2DI, "floato_v2di", CONST, floatov2di) -BU_VSX_1 (FLOATO_V2DF, "floato_v2df", CONST, floatov2df) -BU_VSX_1 (UNS_FLOATO_V2DI, "uns_floato_v2di", CONST, unsfloatov2di) -BU_VSX_1 (UNS_FLOATE_V2DI, "uns_floate_v2di", CONST, unsfloatev2di) - -BU_VSX_1 (XVRSPI, "xvrspi", CONST, vsx_xvrspi) -BU_VSX_1 (XVRSPIC, "xvrspic", CONST, vsx_xvrspic) -BU_VSX_1 (XVRSPIM, "xvrspim", CONST, vsx_floorv4sf2) -BU_VSX_1 (XVRSPIP, "xvrspip", CONST, vsx_ceilv4sf2) -BU_VSX_1 (XVRSPIZ, "xvrspiz", CONST, vsx_btruncv4sf2) - -BU_VSX_1 (XSRDPI, "xsrdpi", CONST, vsx_xsrdpi) -BU_VSX_1 (XSRDPIC, "xsrdpic", CONST, vsx_xsrdpic) -BU_VSX_1 (XSRDPIM, "xsrdpim", CONST, floordf2) -BU_VSX_1 (XSRDPIP, "xsrdpip", CONST, ceildf2) -BU_VSX_1 (XSRDPIZ, "xsrdpiz", CONST, btruncdf2) - -BU_VSX_1 (DOUBLEE_V4SI, "doublee_v4si", CONST, doubleev4si2) -BU_VSX_1 (DOUBLEE_V4SF, "doublee_v4sf", CONST, doubleev4sf2) -BU_VSX_1 (UNS_DOUBLEE_V4SI, "uns_doublee_v4si", CONST, unsdoubleev4si2) -BU_VSX_1 (DOUBLEO_V4SI, "doubleo_v4si", CONST, doubleov4si2) -BU_VSX_1 (DOUBLEO_V4SF, "doubleo_v4sf", CONST, doubleov4sf2) -BU_VSX_1 (UNS_DOUBLEO_V4SI, "uns_doubleo_v4si", CONST, unsdoubleov4si2) -BU_VSX_1 (DOUBLEH_V4SI, "doubleh_v4si", CONST, doublehv4si2) -BU_VSX_1 (DOUBLEH_V4SF, "doubleh_v4sf", CONST, doublehv4sf2) -BU_VSX_1 (UNS_DOUBLEH_V4SI, "uns_doubleh_v4si", CONST, unsdoublehv4si2) -BU_VSX_1 (DOUBLEL_V4SI, "doublel_v4si", CONST, doublelv4si2) -BU_VSX_1 (DOUBLEL_V4SF, "doublel_v4sf", CONST, doublelv4sf2) -BU_VSX_1 (UNS_DOUBLEL_V4SI, "uns_doublel_v4si", CONST, unsdoublelv4si2) - -BU_VSX_1 (VEC_VSIGNED_V4SF, "vsigned_v4sf", CONST, vsx_xvcvspsxws) -BU_VSX_1 (VEC_VSIGNED_V2DF, "vsigned_v2df", CONST, vsx_xvcvdpsxds) -BU_VSX_1 (VEC_VSIGNEDE_V2DF, "vsignede_v2df", CONST, vsignede_v2df) -BU_VSX_1 (VEC_VSIGNEDO_V2DF, "vsignedo_v2df", CONST, vsignedo_v2df) - -BU_VSX_1 (VEC_VUNSIGNED_V4SF, "vunsigned_v4sf", CONST, vsx_xvcvspsxws) -BU_VSX_1 (VEC_VUNSIGNED_V2DF, "vunsigned_v2df", CONST, vsx_xvcvdpsxds) -BU_VSX_1 (VEC_VUNSIGNEDE_V2DF, "vunsignede_v2df", CONST, vunsignede_v2df) -BU_VSX_1 (VEC_VUNSIGNEDO_V2DF, "vunsignedo_v2df", CONST, vunsignedo_v2df) - -/* VSX predicate functions. */ -BU_VSX_P (XVCMPEQSP_P, "xvcmpeqsp_p", CONST, vector_eq_v4sf_p) -BU_VSX_P (XVCMPGESP_P, "xvcmpgesp_p", CONST, vector_ge_v4sf_p) -BU_VSX_P (XVCMPGTSP_P, "xvcmpgtsp_p", CONST, vector_gt_v4sf_p) -BU_VSX_P (XVCMPEQDP_P, "xvcmpeqdp_p", CONST, vector_eq_v2df_p) -BU_VSX_P (XVCMPGEDP_P, "xvcmpgedp_p", CONST, vector_ge_v2df_p) -BU_VSX_P (XVCMPGTDP_P, "xvcmpgtdp_p", CONST, vector_gt_v2df_p) - -/* VSX builtins that are handled as special cases. */ -BU_VSX_X (LXSDX, "lxsdx", PURE) -BU_VSX_X (LXVD2X_V1TI, "lxvd2x_v1ti", PURE) -BU_VSX_X (LXVD2X_V2DF, "lxvd2x_v2df", PURE) -BU_VSX_X (LXVD2X_V2DI, "lxvd2x_v2di", PURE) -BU_VSX_X (LXVDSX, "lxvdsx", PURE) -BU_VSX_X (LXVW4X_V4SF, "lxvw4x_v4sf", PURE) -BU_VSX_X (LXVW4X_V4SI, "lxvw4x_v4si", PURE) -BU_VSX_X (LXVW4X_V8HI, "lxvw4x_v8hi", PURE) -BU_VSX_X (LXVW4X_V16QI, "lxvw4x_v16qi", PURE) -BU_VSX_X (STXSDX, "stxsdx", MEM) -BU_VSX_X (STXVD2X_V1TI, "stxvd2x_v1ti", MEM) -BU_VSX_X (STXVD2X_V2DF, "stxvd2x_v2df", MEM) -BU_VSX_X (STXVD2X_V2DI, "stxvd2x_v2di", MEM) -BU_VSX_X (STXVW4X_V4SF, "stxvw4x_v4sf", MEM) -BU_VSX_X (STXVW4X_V4SI, "stxvw4x_v4si", MEM) -BU_VSX_X (STXVW4X_V8HI, "stxvw4x_v8hi", MEM) -BU_VSX_X (STXVW4X_V16QI, "stxvw4x_v16qi", MEM) -BU_VSX_X (LD_ELEMREV_V1TI, "ld_elemrev_v1ti", PURE) -BU_VSX_X (LD_ELEMREV_V2DF, "ld_elemrev_v2df", PURE) -BU_VSX_X (LD_ELEMREV_V2DI, "ld_elemrev_v2di", PURE) -BU_VSX_X (LD_ELEMREV_V4SF, "ld_elemrev_v4sf", PURE) -BU_VSX_X (LD_ELEMREV_V4SI, "ld_elemrev_v4si", PURE) -BU_VSX_X (LD_ELEMREV_V8HI, "ld_elemrev_v8hi", PURE) -BU_VSX_X (LD_ELEMREV_V16QI, "ld_elemrev_v16qi", PURE) -BU_VSX_X (ST_ELEMREV_V1TI, "st_elemrev_v1ti", MEM) -BU_VSX_X (ST_ELEMREV_V2DF, "st_elemrev_v2df", MEM) -BU_VSX_X (ST_ELEMREV_V2DI, "st_elemrev_v2di", MEM) -BU_VSX_X (ST_ELEMREV_V4SF, "st_elemrev_v4sf", MEM) -BU_VSX_X (ST_ELEMREV_V4SI, "st_elemrev_v4si", MEM) -BU_VSX_X (ST_ELEMREV_V8HI, "st_elemrev_v8hi", MEM) -BU_VSX_X (ST_ELEMREV_V16QI, "st_elemrev_v16qi", MEM) -BU_VSX_X (XSABSDP, "xsabsdp", CONST) -BU_VSX_X (XSADDDP, "xsadddp", FP) -BU_VSX_X (XSCMPODP, "xscmpodp", FP) -BU_VSX_X (XSCMPUDP, "xscmpudp", FP) -BU_VSX_X (XSCVDPSXDS, "xscvdpsxds", FP) -BU_VSX_X (XSCVDPSXWS, "xscvdpsxws", FP) -BU_VSX_X (XSCVDPUXDS, "xscvdpuxds", FP) -BU_VSX_X (XSCVDPUXWS, "xscvdpuxws", FP) -BU_VSX_X (XSCVSXDDP, "xscvsxddp", FP) -BU_VSX_X (XSCVUXDDP, "xscvuxddp", FP) -BU_VSX_X (XSDIVDP, "xsdivdp", FP) -BU_VSX_X (XSMADDADP, "xsmaddadp", FP) -BU_VSX_X (XSMADDMDP, "xsmaddmdp", FP) -BU_VSX_X (XSMOVDP, "xsmovdp", FP) -BU_VSX_X (XSMSUBADP, "xsmsubadp", FP) -BU_VSX_X (XSMSUBMDP, "xsmsubmdp", FP) -BU_VSX_X (XSMULDP, "xsmuldp", FP) -BU_VSX_X (XSNABSDP, "xsnabsdp", FP) -BU_VSX_X (XSNEGDP, "xsnegdp", FP) -BU_VSX_X (XSNMADDADP, "xsnmaddadp", FP) -BU_VSX_X (XSNMADDMDP, "xsnmaddmdp", FP) -BU_VSX_X (XSNMSUBADP, "xsnmsubadp", FP) -BU_VSX_X (XSNMSUBMDP, "xsnmsubmdp", FP) -BU_VSX_X (XSSUBDP, "xssubdp", FP) -BU_VSX_X (VEC_INIT_V1TI, "vec_init_v1ti", CONST) -BU_VSX_X (VEC_INIT_V2DF, "vec_init_v2df", CONST) -BU_VSX_X (VEC_INIT_V2DI, "vec_init_v2di", CONST) -BU_VSX_X (VEC_SET_V1TI, "vec_set_v1ti", CONST) -BU_VSX_X (VEC_SET_V2DF, "vec_set_v2df", CONST) -BU_VSX_X (VEC_SET_V2DI, "vec_set_v2di", CONST) -BU_VSX_X (VEC_EXT_V1TI, "vec_ext_v1ti", CONST) -BU_VSX_X (VEC_EXT_V2DF, "vec_ext_v2df", CONST) -BU_VSX_X (VEC_EXT_V2DI, "vec_ext_v2di", CONST) - -/* VSX overloaded builtins, add the overloaded functions not present in - Altivec. */ - -/* 3 argument VSX overloaded builtins. */ -BU_VSX_OVERLOAD_3 (MSUB, "msub") -BU_VSX_OVERLOAD_3 (NMADD, "nmadd") -BU_VSX_OVERLOAD_3V (XXPERMDI, "xxpermdi") -BU_VSX_OVERLOAD_3V (XXSLDWI, "xxsldwi") - -/* 2 argument VSX overloaded builtin functions. */ -BU_VSX_OVERLOAD_2 (DIV, "div") -BU_VSX_OVERLOAD_2 (XXMRGHW, "xxmrghw") -BU_VSX_OVERLOAD_2 (XXMRGLW, "xxmrglw") -BU_VSX_OVERLOAD_2 (XXSPLTD, "xxspltd") -BU_VSX_OVERLOAD_2 (XXSPLTW, "xxspltw") - -/* 1 argument VSX overloaded builtin functions. */ -BU_VSX_OVERLOAD_1 (DOUBLE, "double") -BU_VSX_OVERLOAD_1 (DOUBLEE, "doublee") -BU_VSX_OVERLOAD_1 (UNS_DOUBLEE, "uns_doublee") -BU_VSX_OVERLOAD_1 (DOUBLEO, "doubleo") -BU_VSX_OVERLOAD_1 (UNS_DOUBLEO, "uns_doubleo") -BU_VSX_OVERLOAD_1 (DOUBLEH, "doubleh") -BU_VSX_OVERLOAD_1 (UNS_DOUBLEH, "uns_doubleh") -BU_VSX_OVERLOAD_1 (DOUBLEL, "doublel") -BU_VSX_OVERLOAD_1 (UNS_DOUBLEL, "uns_doublel") -BU_VSX_OVERLOAD_1 (FLOAT, "float") -BU_VSX_OVERLOAD_1 (FLOATE, "floate") -BU_VSX_OVERLOAD_1 (FLOATO, "floato") - -BU_VSX_OVERLOAD_1 (VSIGNED, "vsigned") -BU_VSX_OVERLOAD_1 (VSIGNEDE, "vsignede") -BU_VSX_OVERLOAD_1 (VSIGNEDO, "vsignedo") - -BU_VSX_OVERLOAD_1 (VUNSIGNED, "vunsigned") -BU_VSX_OVERLOAD_1 (VUNSIGNEDE, "vunsignede") -BU_VSX_OVERLOAD_1 (VUNSIGNEDO, "vunsignedo") - -/* VSX builtins that are handled as special cases. */ - - -/* NON-TRADITIONAL BEHAVIOR HERE: Besides introducing the - __builtin_vec_ld and __builtin_vec_st built-in functions, - the VSX_BUILTIN_VEC_LD and VSX_BUILTIN_VEC_ST symbolic constants - introduced below are also affiliated with the __builtin_vec_vsx_ld - and __builtin_vec_vsx_st functions respectively. This unnatural - binding is formed with explicit calls to the def_builtin function - found in rs6000.c. */ -BU_VSX_OVERLOAD_X (LD, "ld") -BU_VSX_OVERLOAD_X (ST, "st") -BU_VSX_OVERLOAD_X (XL, "xl") -BU_VSX_OVERLOAD_X (XL_BE, "xl_be") -BU_VSX_OVERLOAD_X (XST, "xst") -BU_VSX_OVERLOAD_X (XST_BE, "xst_be") - - -/* 2 argument CMPB instructions added in ISA 2.05. */ -BU_P6_2 (CMPB_32, "cmpb_32", CONST, cmpbsi3) -BU_P6_64BIT_2 (CMPB, "cmpb", CONST, cmpbdi3) - -/* 1 argument VSX instructions added in ISA 2.07. */ -BU_P8V_VSX_1 (XSCVSPDPN, "xscvspdpn", CONST, vsx_xscvspdpn) -BU_P8V_VSX_1 (XSCVDPSPN, "xscvdpspn", CONST, vsx_xscvdpspn) -BU_P8V_VSX_1 (REVB_V1TI, "revb_v1ti", CONST, revb_v1ti) -BU_P8V_VSX_1 (REVB_V2DI, "revb_v2di", CONST, revb_v2di) -BU_P8V_VSX_1 (REVB_V4SI, "revb_v4si", CONST, revb_v4si) -BU_P8V_VSX_1 (REVB_V8HI, "revb_v8hi", CONST, revb_v8hi) -BU_P8V_VSX_1 (REVB_V16QI, "revb_v16qi", CONST, revb_v16qi) -BU_P8V_VSX_1 (REVB_V2DF, "revb_v2df", CONST, revb_v2df) -BU_P8V_VSX_1 (REVB_V4SF, "revb_v4sf", CONST, revb_v4sf) - -/* Power 8 Altivec NEG functions. */ -BU_P8V_AV_1 (NEG_V2DI, "neg_v2di", CONST, negv2di2) -BU_P8V_AV_1 (NEG_V4SI, "neg_v4si", CONST, negv4si2) -BU_P8V_AV_1 (NEG_V8HI, "neg_v8hi", CONST, negv8hi2) -BU_P8V_AV_1 (NEG_V16QI, "neg_v16qi", CONST, negv16qi2) -BU_P8V_AV_1 (NEG_V4SF, "neg_v4sf", CONST, negv4sf2) -BU_P8V_AV_1 (NEG_V2DF, "neg_v2df", CONST, negv2df2) - - -/* 2 argument VSX instructions added in ISA 2.07. */ -BU_P8V_VSX_2 (FLOAT2_V2DF, "float2_v2df", CONST, float2_v2df) -BU_P8V_VSX_2 (FLOAT2_V2DI, "float2_v2di", CONST, float2_v2di) -BU_P8V_VSX_2 (UNS_FLOAT2_V2DI, "uns_float2_v2di", CONST, uns_float2_v2di) -BU_P8V_VSX_2 (VEC_VSIGNED2_V2DF, "vsigned2_v2df", CONST, vsigned2_v2df) -BU_P8V_VSX_2 (VEC_VUNSIGNED2_V2DF, "vunsigned2_v2df", CONST, vunsigned2_v2df) - - -/* 1 argument altivec instructions added in ISA 2.07. */ -BU_P8V_AV_1 (ABS_V2DI, "abs_v2di", CONST, absv2di2) -BU_P8V_AV_1 (VUPKHSW, "vupkhsw", CONST, altivec_vupkhsw) -BU_P8V_AV_1 (VUPKLSW, "vupklsw", CONST, altivec_vupklsw) -BU_P8V_AV_1 (VCLZB, "vclzb", CONST, clzv16qi2) -BU_P8V_AV_1 (VCLZH, "vclzh", CONST, clzv8hi2) -BU_P8V_AV_1 (VCLZW, "vclzw", CONST, clzv4si2) -BU_P8V_AV_1 (VCLZD, "vclzd", CONST, clzv2di2) -BU_P8V_AV_1 (VPOPCNTB, "vpopcntb", CONST, popcountv16qi2) -BU_P8V_AV_1 (VPOPCNTH, "vpopcnth", CONST, popcountv8hi2) -BU_P8V_AV_1 (VPOPCNTW, "vpopcntw", CONST, popcountv4si2) -BU_P8V_AV_1 (VPOPCNTD, "vpopcntd", CONST, popcountv2di2) -BU_P8V_AV_1 (VPOPCNTUB, "vpopcntub", CONST, popcountv16qi2) -BU_P8V_AV_1 (VPOPCNTUH, "vpopcntuh", CONST, popcountv8hi2) -BU_P8V_AV_1 (VPOPCNTUW, "vpopcntuw", CONST, popcountv4si2) -BU_P8V_AV_1 (VPOPCNTUD, "vpopcntud", CONST, popcountv2di2) -BU_P8V_AV_1 (VGBBD, "vgbbd", CONST, p8v_vgbbd) - -/* 2 argument altivec instructions added in ISA 2.07. */ -BU_P8V_AV_2 (VADDCUQ, "vaddcuq", CONST, altivec_vaddcuq) -BU_P8V_AV_2 (VADDUDM, "vaddudm", CONST, addv2di3) -BU_P8V_AV_2 (VADDUQM, "vadduqm", CONST, altivec_vadduqm) -BU_P8V_AV_2 (VMINSD, "vminsd", CONST, sminv2di3) -BU_P8V_AV_2 (VMAXSD, "vmaxsd", CONST, smaxv2di3) -BU_P8V_AV_2 (VMINUD, "vminud", CONST, uminv2di3) -BU_P8V_AV_2 (VMAXUD, "vmaxud", CONST, umaxv2di3) -BU_P8V_AV_2 (VMRGEW_V2DI, "vmrgew_v2di", CONST, p8_vmrgew_v2di) -BU_P8V_AV_2 (VMRGEW_V2DF, "vmrgew_v2df", CONST, p8_vmrgew_v2df) -BU_P8V_AV_2 (VMRGEW_V4SI, "vmrgew_v4si", CONST, p8_vmrgew_v4si) -BU_P8V_AV_2 (VMRGEW_V4SF, "vmrgew_v4sf", CONST, p8_vmrgew_v4sf) -BU_P8V_AV_2 (VMRGOW_V4SI, "vmrgow_v4si", CONST, p8_vmrgow_v4si) -BU_P8V_AV_2 (VMRGOW_V4SF, "vmrgow_v4sf", CONST, p8_vmrgow_v4sf) -BU_P8V_AV_2 (VMRGOW_V2DI, "vmrgow_v2di", CONST, p8_vmrgow_v2di) -BU_P8V_AV_2 (VMRGOW_V2DF, "vmrgow_v2df", CONST, p8_vmrgow_v2df) -BU_P8V_AV_2 (VBPERMQ, "vbpermq", CONST, altivec_vbpermq) -BU_P8V_AV_2 (VBPERMQ2, "vbpermq2", CONST, altivec_vbpermq2) -BU_P8V_AV_2 (VPKUDUM, "vpkudum", CONST, altivec_vpkudum) -BU_P8V_AV_2 (VPKSDSS, "vpksdss", CONST, altivec_vpksdss) -BU_P8V_AV_2 (VPKUDUS, "vpkudus", CONST, altivec_vpkudus) -BU_P8V_AV_2 (VPKSDUS, "vpksdus", CONST, altivec_vpksdus) -BU_P8V_AV_2 (VPMSUMB, "vpmsumb", CONST, crypto_vpmsumb) -BU_P8V_AV_2 (VPMSUMH, "vpmsumh", CONST, crypto_vpmsumh) -BU_P8V_AV_2 (VPMSUMW, "vpmsumw", CONST, crypto_vpmsumw) -BU_P8V_AV_2 (VPMSUMD, "vpmsumd", CONST, crypto_vpmsumd) -BU_P8V_AV_2 (VRLD, "vrld", CONST, vrotlv2di3) -BU_P8V_AV_2 (VSLD, "vsld", CONST, vashlv2di3) -BU_P8V_AV_2 (VSRD, "vsrd", CONST, vlshrv2di3) -BU_P8V_AV_2 (VSRAD, "vsrad", CONST, vashrv2di3) -BU_P8V_AV_2 (VSUBCUQ, "vsubcuq", CONST, altivec_vsubcuq) -BU_P8V_AV_2 (VSUBUDM, "vsubudm", CONST, subv2di3) -BU_P8V_AV_2 (VSUBUQM, "vsubuqm", CONST, altivec_vsubuqm) - -BU_P8V_AV_2 (EQV_V16QI_UNS, "eqv_v16qi_uns",CONST, eqvv16qi3) -BU_P8V_AV_2 (EQV_V16QI, "eqv_v16qi", CONST, eqvv16qi3) -BU_P8V_AV_2 (EQV_V8HI_UNS, "eqv_v8hi_uns", CONST, eqvv8hi3) -BU_P8V_AV_2 (EQV_V8HI, "eqv_v8hi", CONST, eqvv8hi3) -BU_P8V_AV_2 (EQV_V4SI_UNS, "eqv_v4si_uns", CONST, eqvv4si3) -BU_P8V_AV_2 (EQV_V4SI, "eqv_v4si", CONST, eqvv4si3) -BU_P8V_AV_2 (EQV_V2DI_UNS, "eqv_v2di_uns", CONST, eqvv2di3) -BU_P8V_AV_2 (EQV_V2DI, "eqv_v2di", CONST, eqvv2di3) -BU_P8V_AV_2 (EQV_V1TI_UNS, "eqv_v1ti_uns", CONST, eqvv1ti3) -BU_P8V_AV_2 (EQV_V1TI, "eqv_v1ti", CONST, eqvv1ti3) -BU_P8V_AV_2 (EQV_V4SF, "eqv_v4sf", CONST, eqvv4sf3) -BU_P8V_AV_2 (EQV_V2DF, "eqv_v2df", CONST, eqvv2df3) - -BU_P8V_AV_2 (NAND_V16QI_UNS, "nand_v16qi_uns", CONST, nandv16qi3) -BU_P8V_AV_2 (NAND_V16QI, "nand_v16qi", CONST, nandv16qi3) -BU_P8V_AV_2 (NAND_V8HI_UNS, "nand_v8hi_uns", CONST, nandv8hi3) -BU_P8V_AV_2 (NAND_V8HI, "nand_v8hi", CONST, nandv8hi3) -BU_P8V_AV_2 (NAND_V4SI_UNS, "nand_v4si_uns", CONST, nandv4si3) -BU_P8V_AV_2 (NAND_V4SI, "nand_v4si", CONST, nandv4si3) -BU_P8V_AV_2 (NAND_V2DI_UNS, "nand_v2di_uns", CONST, nandv2di3) -BU_P8V_AV_2 (NAND_V2DI, "nand_v2di", CONST, nandv2di3) -BU_P8V_AV_2 (NAND_V1TI_UNS, "nand_v1ti_uns", CONST, nandv1ti3) -BU_P8V_AV_2 (NAND_V1TI, "nand_v1ti", CONST, nandv1ti3) -BU_P8V_AV_2 (NAND_V4SF, "nand_v4sf", CONST, nandv4sf3) -BU_P8V_AV_2 (NAND_V2DF, "nand_v2df", CONST, nandv2df3) - -BU_P8V_AV_2 (ORC_V16QI_UNS, "orc_v16qi_uns",CONST, orcv16qi3) -BU_P8V_AV_2 (ORC_V16QI, "orc_v16qi", CONST, orcv16qi3) -BU_P8V_AV_2 (ORC_V8HI_UNS, "orc_v8hi_uns", CONST, orcv8hi3) -BU_P8V_AV_2 (ORC_V8HI, "orc_v8hi", CONST, orcv8hi3) -BU_P8V_AV_2 (ORC_V4SI_UNS, "orc_v4si_uns", CONST, orcv4si3) -BU_P8V_AV_2 (ORC_V4SI, "orc_v4si", CONST, orcv4si3) -BU_P8V_AV_2 (ORC_V2DI_UNS, "orc_v2di_uns", CONST, orcv2di3) -BU_P8V_AV_2 (ORC_V2DI, "orc_v2di", CONST, orcv2di3) -BU_P8V_AV_2 (ORC_V1TI_UNS, "orc_v1ti_uns", CONST, orcv1ti3) -BU_P8V_AV_2 (ORC_V1TI, "orc_v1ti", CONST, orcv1ti3) -BU_P8V_AV_2 (ORC_V4SF, "orc_v4sf", CONST, orcv4sf3) -BU_P8V_AV_2 (ORC_V2DF, "orc_v2df", CONST, orcv2df3) - -/* 3 argument altivec instructions added in ISA 2.07. */ -BU_P8V_AV_3 (VADDEUQM, "vaddeuqm", CONST, altivec_vaddeuqm) -BU_P8V_AV_3 (VADDECUQ, "vaddecuq", CONST, altivec_vaddecuq) -BU_P8V_AV_3 (VSUBEUQM, "vsubeuqm", CONST, altivec_vsubeuqm) -BU_P8V_AV_3 (VSUBECUQ, "vsubecuq", CONST, altivec_vsubecuq) - -/* Vector comparison instructions added in ISA 2.07. */ -BU_P8V_AV_2 (VCMPEQUD, "vcmpequd", CONST, vector_eqv2di) -BU_P8V_AV_2 (VCMPGTSD, "vcmpgtsd", CONST, vector_gtv2di) -BU_P8V_AV_2 (VCMPGTUD, "vcmpgtud", CONST, vector_gtuv2di) - -/* Vector comparison predicate instructions added in ISA 2.07. */ -BU_P8V_AV_P (VCMPEQUD_P, "vcmpequd_p", CONST, vector_eq_v2di_p) -BU_P8V_AV_P (VCMPGTSD_P, "vcmpgtsd_p", CONST, vector_gt_v2di_p) -BU_P8V_AV_P (VCMPGTUD_P, "vcmpgtud_p", CONST, vector_gtu_v2di_p) - -BU_P8V_AV_3 (VPERMXOR, "vpermxor", CONST, altivec_vpermxor) - -/* ISA 2.05 overloaded 2 argument functions. */ -BU_P6_OVERLOAD_2 (CMPB, "cmpb") - -/* ISA 2.07 vector overloaded 1 argument functions. */ -BU_P8V_OVERLOAD_1 (VUPKHSW, "vupkhsw") -BU_P8V_OVERLOAD_1 (VUPKLSW, "vupklsw") -BU_P8V_OVERLOAD_1 (VCLZ, "vclz") -BU_P8V_OVERLOAD_1 (VCLZB, "vclzb") -BU_P8V_OVERLOAD_1 (VCLZH, "vclzh") -BU_P8V_OVERLOAD_1 (VCLZW, "vclzw") -BU_P8V_OVERLOAD_1 (VCLZD, "vclzd") -BU_P8V_OVERLOAD_1 (VPOPCNT, "vpopcnt") -BU_P8V_OVERLOAD_1 (VPOPCNTB, "vpopcntb") -BU_P8V_OVERLOAD_1 (VPOPCNTH, "vpopcnth") -BU_P8V_OVERLOAD_1 (VPOPCNTW, "vpopcntw") -BU_P8V_OVERLOAD_1 (VPOPCNTD, "vpopcntd") -BU_P8V_OVERLOAD_1 (VPOPCNTU, "vpopcntu") -BU_P8V_OVERLOAD_1 (VPOPCNTUB, "vpopcntub") -BU_P8V_OVERLOAD_1 (VPOPCNTUH, "vpopcntuh") -BU_P8V_OVERLOAD_1 (VPOPCNTUW, "vpopcntuw") -BU_P8V_OVERLOAD_1 (VPOPCNTUD, "vpopcntud") -BU_P8V_OVERLOAD_1 (VGBBD, "vgbbd") -BU_P8V_OVERLOAD_1 (REVB, "revb") -BU_P8V_OVERLOAD_1 (NEG, "neg") - -/* ISA 2.07 vector overloaded 2 argument functions. */ -BU_P8V_OVERLOAD_2 (EQV, "eqv") -BU_P8V_OVERLOAD_2 (NAND, "nand") -BU_P8V_OVERLOAD_2 (ORC, "orc") -BU_P8V_OVERLOAD_2 (VADDCUQ, "vaddcuq") -BU_P8V_OVERLOAD_2 (VADDUDM, "vaddudm") -BU_P8V_OVERLOAD_2 (VADDUQM, "vadduqm") -BU_P8V_OVERLOAD_2 (VBPERMQ, "vbpermq") -BU_P8V_OVERLOAD_2 (VMAXSD, "vmaxsd") -BU_P8V_OVERLOAD_2 (VMAXUD, "vmaxud") -BU_P8V_OVERLOAD_2 (VMINSD, "vminsd") -BU_P8V_OVERLOAD_2 (VMINUD, "vminud") -BU_P8V_OVERLOAD_2 (VMRGEW, "vmrgew") -BU_P8V_OVERLOAD_2 (VMRGOW, "vmrgow") -BU_P8V_OVERLOAD_2 (VPKSDSS, "vpksdss") -BU_P8V_OVERLOAD_2 (VPKSDUS, "vpksdus") -BU_P8V_OVERLOAD_2 (VPKUDUM, "vpkudum") -BU_P8V_OVERLOAD_2 (VPKUDUS, "vpkudus") -BU_P8V_OVERLOAD_2 (VPMSUM, "vpmsum") -BU_P8V_OVERLOAD_2 (VRLD, "vrld") -BU_P8V_OVERLOAD_2 (VSLD, "vsld") -BU_P8V_OVERLOAD_2 (VSRAD, "vsrad") -BU_P8V_OVERLOAD_2 (VSRD, "vsrd") -BU_P8V_OVERLOAD_2 (VSUBCUQ, "vsubcuq") -BU_P8V_OVERLOAD_2 (VSUBUDM, "vsubudm") -BU_P8V_OVERLOAD_2 (VSUBUQM, "vsubuqm") -BU_P8V_OVERLOAD_2 (FLOAT2, "float2") -BU_P8V_OVERLOAD_2 (UNS_FLOAT2, "uns_float2") -BU_P8V_OVERLOAD_2 (VSIGNED2, "vsigned2") -BU_P8V_OVERLOAD_2 (VUNSIGNED2, "vunsigned2") - -/* ISA 2.07 vector overloaded 3 argument functions. */ -BU_P8V_OVERLOAD_3 (VADDECUQ, "vaddecuq") -BU_P8V_OVERLOAD_3 (VADDEUQM, "vaddeuqm") -BU_P8V_OVERLOAD_3 (VSUBECUQ, "vsubecuq") -BU_P8V_OVERLOAD_3 (VSUBEUQM, "vsubeuqm") -BU_P8V_OVERLOAD_3 (VPERMXOR, "vpermxor") - -/* ISA 3.0 vector overloaded 2-argument functions. */ -BU_P9V_AV_2 (VSLV, "vslv", CONST, vslv) -BU_P9V_AV_2 (VSRV, "vsrv", CONST, vsrv) -BU_P9V_AV_2 (CONVERT_4F32_8I16, "convert_4f32_8i16", CONST, convert_4f32_8i16) -BU_P9V_AV_2 (CONVERT_4F32_8F16, "convert_4f32_8f16", CONST, convert_4f32_8f16) - -BU_P9V_AV_2 (VFIRSTMATCHINDEX_V16QI, "first_match_index_v16qi", - CONST, first_match_index_v16qi) -BU_P9V_AV_2 (VFIRSTMATCHINDEX_V8HI, "first_match_index_v8hi", - CONST, first_match_index_v8hi) -BU_P9V_AV_2 (VFIRSTMATCHINDEX_V4SI, "first_match_index_v4si", - CONST, first_match_index_v4si) -BU_P9V_AV_2 (VFIRSTMATCHOREOSINDEX_V16QI, "first_match_or_eos_index_v16qi", - CONST, first_match_or_eos_index_v16qi) -BU_P9V_AV_2 (VFIRSTMATCHOREOSINDEX_V8HI, "first_match_or_eos_index_v8hi", - CONST, first_match_or_eos_index_v8hi) -BU_P9V_AV_2 (VFIRSTMATCHOREOSINDEX_V4SI, "first_match_or_eos_index_v4si", - CONST, first_match_or_eos_index_v4si) -BU_P9V_AV_2 (VFIRSTMISMATCHINDEX_V16QI, "first_mismatch_index_v16qi", - CONST, first_mismatch_index_v16qi) -BU_P9V_AV_2 (VFIRSTMISMATCHINDEX_V8HI, "first_mismatch_index_v8hi", - CONST, first_mismatch_index_v8hi) -BU_P9V_AV_2 (VFIRSTMISMATCHINDEX_V4SI, "first_mismatch_index_v4si", - CONST, first_mismatch_index_v4si) -BU_P9V_AV_2 (VFIRSTMISMATCHOREOSINDEX_V16QI, "first_mismatch_or_eos_index_v16qi", - CONST, first_mismatch_or_eos_index_v16qi) -BU_P9V_AV_2 (VFIRSTMISMATCHOREOSINDEX_V8HI, "first_mismatch_or_eos_index_v8hi", - CONST, first_mismatch_or_eos_index_v8hi) -BU_P9V_AV_2 (VFIRSTMISMATCHOREOSINDEX_V4SI, "first_mismatch_or_eos_index_v4si", - CONST, first_mismatch_or_eos_index_v4si) - -/* ISA 3.0 vector overloaded 2-argument functions. */ -BU_P9V_OVERLOAD_2 (VSLV, "vslv") -BU_P9V_OVERLOAD_2 (VSRV, "vsrv") -BU_P9V_OVERLOAD_2 (CONVERT_4F32_8I16, "convert_4f32_8i16") -BU_P9V_OVERLOAD_2 (CONVERT_4F32_8F16, "convert_4f32_8f16") - -/* 2 argument vector functions added in ISA 3.0 (power9). */ -BU_P9V_AV_2 (VADUB, "vadub", CONST, vaduv16qi3) -BU_P9V_AV_2 (VADUH, "vaduh", CONST, vaduv8hi3) -BU_P9V_AV_2 (VADUW, "vaduw", CONST, vaduv4si3) -BU_P9V_AV_2 (VRLWNM, "vrlwnm", CONST, altivec_vrlwnm) -BU_P9V_AV_2 (VRLDNM, "vrldnm", CONST, altivec_vrldnm) -BU_P9V_AV_2 (VBPERMD, "vbpermd", CONST, altivec_vbpermd) - -/* ISA 3.0 vector overloaded 2 argument functions. */ -BU_P9V_OVERLOAD_2 (VADU, "vadu") -BU_P9V_OVERLOAD_2 (VADUB, "vadub") -BU_P9V_OVERLOAD_2 (VADUH, "vaduh") -BU_P9V_OVERLOAD_2 (VADUW, "vaduw") -BU_P9V_OVERLOAD_2 (RLNM, "rlnm") -BU_P9V_OVERLOAD_2 (VBPERM, "vbperm_api") - -/* ISA 3.0 3-argument vector functions. */ -BU_P9V_AV_3 (VRLWMI, "vrlwmi", CONST, altivec_vrlwmi) -BU_P9V_AV_3 (VRLDMI, "vrldmi", CONST, altivec_vrldmi) - -/* ISA 3.0 vector overloaded 3-argument functions. */ -BU_P9V_OVERLOAD_3 (RLMI, "rlmi") - -/* 1 argument vsx scalar functions added in ISA 3.0 (power9). */ -BU_P9V_64BIT_VSX_1 (VSEEDP, "scalar_extract_exp", CONST, xsxexpdp) -BU_P9V_64BIT_VSX_1 (VSESDP, "scalar_extract_sig", CONST, xsxsigdp) - -BU_FLOAT128_HW_VSX_1 (VSEEQP, "scalar_extract_expq", CONST, xsxexpqp_kf) -BU_FLOAT128_HW_VSX_1 (VSESQP, "scalar_extract_sigq", CONST, xsxsigqp_kf) - -BU_FLOAT128_HW_VSX_1 (VSTDCNQP, "scalar_test_neg_qp", CONST, xststdcnegqp_kf) -BU_P9V_VSX_1 (VSTDCNDP, "scalar_test_neg_dp", CONST, xststdcnegdp) -BU_P9V_VSX_1 (VSTDCNSP, "scalar_test_neg_sp", CONST, xststdcnegsp) - -BU_P9V_VSX_1 (XXBRQ_V16QI, "xxbrq_v16qi", CONST, p9_xxbrq_v16qi) -BU_P9V_VSX_1 (XXBRQ_V1TI, "xxbrq_v1ti", CONST, p9_xxbrq_v1ti) -BU_P9V_VSX_1 (XXBRD_V2DI, "xxbrd_v2di", CONST, p9_xxbrd_v2di) -BU_P9V_VSX_1 (XXBRD_V2DF, "xxbrd_v2df", CONST, p9_xxbrd_v2df) -BU_P9V_VSX_1 (XXBRW_V4SI, "xxbrw_v4si", CONST, p9_xxbrw_v4si) -BU_P9V_VSX_1 (XXBRW_V4SF, "xxbrw_v4sf", CONST, p9_xxbrw_v4sf) -BU_P9V_VSX_1 (XXBRH_V8HI, "xxbrh_v8hi", CONST, p9_xxbrh_v8hi) - -/* 2 argument vsx scalar functions added in ISA 3.0 (power9). */ -BU_P9V_64BIT_VSX_2 (VSIEDP, "scalar_insert_exp", CONST, xsiexpdp) -BU_P9V_64BIT_VSX_2 (VSIEDPF, "scalar_insert_exp_dp", CONST, xsiexpdpf) - -BU_FLOAT128_HW_VSX_2 (VSIEQP, "scalar_insert_exp_q", CONST, xsiexpqp_kf) -BU_FLOAT128_HW_VSX_2 (VSIEQPF, "scalar_insert_exp_qp", CONST, xsiexpqpf_kf) - -BU_P9V_VSX_2 (VSCEDPGT, "scalar_cmp_exp_dp_gt", CONST, xscmpexpdp_gt) -BU_P9V_VSX_2 (VSCEDPLT, "scalar_cmp_exp_dp_lt", CONST, xscmpexpdp_lt) -BU_P9V_VSX_2 (VSCEDPEQ, "scalar_cmp_exp_dp_eq", CONST, xscmpexpdp_eq) -BU_P9V_VSX_2 (VSCEDPUO, "scalar_cmp_exp_dp_unordered", CONST, xscmpexpdp_unordered) - -BU_P9V_VSX_2 (VSCEQPGT, "scalar_cmp_exp_qp_gt", CONST, xscmpexpqp_gt_kf) -BU_P9V_VSX_2 (VSCEQPLT, "scalar_cmp_exp_qp_lt", CONST, xscmpexpqp_lt_kf) -BU_P9V_VSX_2 (VSCEQPEQ, "scalar_cmp_exp_qp_eq", CONST, xscmpexpqp_eq_kf) -BU_P9V_VSX_2 (VSCEQPUO, "scalar_cmp_exp_qp_unordered", CONST, xscmpexpqp_unordered_kf) - -BU_FLOAT128_HW_VSX_2 (VSTDCQP, "scalar_test_data_class_qp", CONST, xststdcqp_kf) -BU_P9V_VSX_2 (VSTDCDP, "scalar_test_data_class_dp", CONST, xststdcdp) -BU_P9V_VSX_2 (VSTDCSP, "scalar_test_data_class_sp", CONST, xststdcsp) - -/* ISA 3.0 vector scalar overloaded 1 argument functions. */ -BU_P9V_OVERLOAD_1 (VSEEDP, "scalar_extract_exp") -BU_P9V_OVERLOAD_1 (VSESDP, "scalar_extract_sig") - -BU_P9V_OVERLOAD_1 (VSTDCN, "scalar_test_neg") -BU_P9V_OVERLOAD_1 (VSTDCNQP, "scalar_test_neg_qp") -BU_P9V_OVERLOAD_1 (VSTDCNDP, "scalar_test_neg_dp") -BU_P9V_OVERLOAD_1 (VSTDCNSP, "scalar_test_neg_sp") - -BU_P9V_OVERLOAD_1 (VEXTRACT_FP_FROM_SHORTH, "vextract_fp_from_shorth") -BU_P9V_OVERLOAD_1 (VEXTRACT_FP_FROM_SHORTL, "vextract_fp_from_shortl") - -/* ISA 3.0 vector scalar overloaded 2 argument functions. */ -BU_P9V_OVERLOAD_2 (VFIRSTMATCHINDEX, "first_match_index") -BU_P9V_OVERLOAD_2 (VFIRSTMISMATCHINDEX, "first_mismatch_index") -BU_P9V_OVERLOAD_2 (VFIRSTMATCHOREOSINDEX, "first_match_or_eos_index") -BU_P9V_OVERLOAD_2 (VFIRSTMISMATCHOREOSINDEX, "first_mismatch_or_eos_index") - -BU_P9V_OVERLOAD_2 (VSIEDP, "scalar_insert_exp") - -BU_P9V_OVERLOAD_2 (VSTDC, "scalar_test_data_class") -BU_P9V_OVERLOAD_2 (VSTDCQP, "scalar_test_data_class_qp") -BU_P9V_OVERLOAD_2 (VSTDCDP, "scalar_test_data_class_dp") -BU_P9V_OVERLOAD_2 (VSTDCSP, "scalar_test_data_class_sp") - -BU_P9V_OVERLOAD_2 (VSCEGT, "scalar_cmp_exp_gt") -BU_P9V_OVERLOAD_2 (VSCEDPGT, "scalar_cmp_exp_dp_gt") -BU_P9V_OVERLOAD_2 (VSCEQPGT, "scalar_cmp_exp_qp_gt") -BU_P9V_OVERLOAD_2 (VSCELT, "scalar_cmp_exp_lt") -BU_P9V_OVERLOAD_2 (VSCEDPLT, "scalar_cmp_exp_dp_lt") -BU_P9V_OVERLOAD_2 (VSCEQPLT, "scalar_cmp_exp_qp_lt") -BU_P9V_OVERLOAD_2 (VSCEEQ, "scalar_cmp_exp_eq") -BU_P9V_OVERLOAD_2 (VSCEDPEQ, "scalar_cmp_exp_dp_eq") -BU_P9V_OVERLOAD_2 (VSCEQPEQ, "scalar_cmp_exp_qp_eq") -BU_P9V_OVERLOAD_2 (VSCEUO, "scalar_cmp_exp_unordered") -BU_P9V_OVERLOAD_2 (VSCEDPUO, "scalar_cmp_exp_dp_unordered") -BU_P9V_OVERLOAD_2 (VSCEQPUO, "scalar_cmp_exp_qp_unordered") - -/* 1 argument vsx vector functions added in ISA 3.0 (power9). */ -BU_P9V_VSX_1 (VEEDP, "extract_exp_dp", CONST, xvxexpdp) -BU_P9V_VSX_1 (VEESP, "extract_exp_sp", CONST, xvxexpsp) -BU_P9V_VSX_1 (VESDP, "extract_sig_dp", CONST, xvxsigdp) -BU_P9V_VSX_1 (VESSP, "extract_sig_sp", CONST, xvxsigsp) -BU_P9V_VSX_1 (VEXTRACT_FP_FROM_SHORTH, "vextract_fp_from_shorth", CONST, vextract_fp_from_shorth) -BU_P9V_VSX_1 (VEXTRACT_FP_FROM_SHORTL, "vextract_fp_from_shortl", CONST, vextract_fp_from_shortl) - -/* 2 argument vsx vector functions added in ISA 3.0 (power9). */ -BU_P9V_VSX_2 (VIEDP, "insert_exp_dp", CONST, xviexpdp) -BU_P9V_VSX_2 (VIESP, "insert_exp_sp", CONST, xviexpsp) -BU_P9V_VSX_2 (VTDCDP, "test_data_class_dp", CONST, xvtstdcdp) -BU_P9V_VSX_2 (VTDCSP, "test_data_class_sp", CONST, xvtstdcsp) - -/* ISA 3.0 vector overloaded 1 argument functions. */ -BU_P9V_OVERLOAD_1 (VES, "extract_sig") -BU_P9V_OVERLOAD_1 (VESDP, "extract_sig_dp") -BU_P9V_OVERLOAD_1 (VESSP, "extract_sig_sp") - -BU_P9V_OVERLOAD_1 (VEE, "extract_exp") -BU_P9V_OVERLOAD_1 (VEEDP, "extract_exp_dp") -BU_P9V_OVERLOAD_1 (VEESP, "extract_exp_sp") - -/* ISA 3.0 vector overloaded 2 argument functions. */ -BU_P9V_OVERLOAD_2 (VTDC, "test_data_class") -BU_P9V_OVERLOAD_2 (VTDCDP, "test_data_class_dp") -BU_P9V_OVERLOAD_2 (VTDCSP, "test_data_class_sp") - -BU_P9V_OVERLOAD_2 (VIE, "insert_exp") -BU_P9V_OVERLOAD_2 (VIEDP, "insert_exp_dp") -BU_P9V_OVERLOAD_2 (VIESP, "insert_exp_sp") - -/* 2 argument vector functions added in ISA 3.0 (power9). */ -BU_P9V_64BIT_VSX_2 (LXVL, "lxvl", PURE, lxvl) -BU_P9V_64BIT_VSX_2 (XL_LEN_R, "xl_len_r", PURE, xl_len_r) - -BU_P9V_AV_2 (VEXTUBLX, "vextublx", CONST, vextublx) -BU_P9V_AV_2 (VEXTUBRX, "vextubrx", CONST, vextubrx) -BU_P9V_AV_2 (VEXTUHLX, "vextuhlx", CONST, vextuhlx) -BU_P9V_AV_2 (VEXTUHRX, "vextuhrx", CONST, vextuhrx) -BU_P9V_AV_2 (VEXTUWLX, "vextuwlx", CONST, vextuwlx) -BU_P9V_AV_2 (VEXTUWRX, "vextuwrx", CONST, vextuwrx) - -/* Insert/extract 4 byte word into a vector. */ -BU_P9V_VSX_3 (INSERT4B, "insert4b", CONST, insert4b) -BU_P9V_VSX_2 (EXTRACT4B, "extract4b", CONST, extract4b) - -/* Hardware IEEE 128-bit floating point round to odd instrucitons added in ISA - 3.0 (power9). */ -BU_FLOAT128_HW_1 (SQRTF128_ODD, "sqrtf128_round_to_odd", FP, sqrtkf2_odd) -BU_FLOAT128_HW_1 (TRUNCF128_ODD, "truncf128_round_to_odd", FP, trunckfdf2_odd) -BU_FLOAT128_HW_2 (ADDF128_ODD, "addf128_round_to_odd", FP, addkf3_odd) -BU_FLOAT128_HW_2 (SUBF128_ODD, "subf128_round_to_odd", FP, subkf3_odd) -BU_FLOAT128_HW_2 (MULF128_ODD, "mulf128_round_to_odd", FP, mulkf3_odd) -BU_FLOAT128_HW_2 (DIVF128_ODD, "divf128_round_to_odd", FP, divkf3_odd) -BU_FLOAT128_HW_3 (FMAF128_ODD, "fmaf128_round_to_odd", FP, fmakf4_odd) - -/* 3 argument vector functions returning void, treated as SPECIAL, - added in ISA 3.0 (power9). */ -BU_P9V_64BIT_AV_X (STXVL, "stxvl", MISC) -BU_P9V_64BIT_AV_X (XST_LEN_R, "xst_len_r", MISC) - -/* 1 argument vector functions added in ISA 3.0 (power9). */ -BU_P9V_AV_1 (VCLZLSBB_V16QI, "vclzlsbb_v16qi", CONST, vclzlsbb_v16qi) -BU_P9V_AV_1 (VCLZLSBB_V8HI, "vclzlsbb_v8hi", CONST, vclzlsbb_v8hi) -BU_P9V_AV_1 (VCLZLSBB_V4SI, "vclzlsbb_v4si", CONST, vclzlsbb_v4si) -BU_P9V_AV_1 (VCTZLSBB_V16QI, "vctzlsbb_v16qi", CONST, vctzlsbb_v16qi) -BU_P9V_AV_1 (VCTZLSBB_V8HI, "vctzlsbb_v8hi", CONST, vctzlsbb_v8hi) -BU_P9V_AV_1 (VCTZLSBB_V4SI, "vctzlsbb_v4si", CONST, vctzlsbb_v4si) - -/* Built-in support for Power9 "VSU option" string operations includes - new awareness of the "vector compare not equal" (vcmpneb, vcmpneb., - vcmpneh, vcmpneh., vcmpnew, vcmpnew.) and "vector compare - not equal or zero" (vcmpnezb, vcmpnezb., vcmpnezh, vcmpnezh., - vcmpnezw, vcmpnezw.) instructions. */ - -BU_P9V_AV_2 (CMPNEB, "vcmpneb", CONST, vcmpneb) -BU_P9V_AV_2 (CMPNEH, "vcmpneh", CONST, vcmpneh) -BU_P9V_AV_2 (CMPNEW, "vcmpnew", CONST, vcmpnew) - -BU_P9V_AV_2 (VCMPNEB_P, "vcmpneb_p", CONST, vector_ne_v16qi_p) -BU_P9V_AV_2 (VCMPNEH_P, "vcmpneh_p", CONST, vector_ne_v8hi_p) -BU_P9V_AV_2 (VCMPNEW_P, "vcmpnew_p", CONST, vector_ne_v4si_p) -BU_P9V_AV_2 (VCMPNED_P, "vcmpned_p", CONST, vector_ne_v2di_p) - -BU_P9V_AV_2 (VCMPNEFP_P, "vcmpnefp_p", CONST, vector_ne_v4sf_p) -BU_P9V_AV_2 (VCMPNEDP_P, "vcmpnedp_p", CONST, vector_ne_v2df_p) - -BU_P9V_AV_2 (VCMPAEB_P, "vcmpaeb_p", CONST, vector_ae_v16qi_p) -BU_P9V_AV_2 (VCMPAEH_P, "vcmpaeh_p", CONST, vector_ae_v8hi_p) -BU_P9V_AV_2 (VCMPAEW_P, "vcmpaew_p", CONST, vector_ae_v4si_p) -BU_P9V_AV_2 (VCMPAED_P, "vcmpaed_p", CONST, vector_ae_v2di_p) - -BU_P9V_AV_2 (VCMPAEFP_P, "vcmpaefp_p", CONST, vector_ae_v4sf_p) -BU_P9V_AV_2 (VCMPAEDP_P, "vcmpaedp_p", CONST, vector_ae_v2df_p) - -BU_P9V_AV_2 (CMPNEZB, "vcmpnezb", CONST, vcmpnezb) -BU_P9V_AV_2 (CMPNEZH, "vcmpnezh", CONST, vcmpnezh) -BU_P9V_AV_2 (CMPNEZW, "vcmpnezw", CONST, vcmpnezw) - -BU_P9V_AV_P (VCMPNEZB_P, "vcmpnezb_p", CONST, vector_nez_v16qi_p) -BU_P9V_AV_P (VCMPNEZH_P, "vcmpnezh_p", CONST, vector_nez_v8hi_p) -BU_P9V_AV_P (VCMPNEZW_P, "vcmpnezw_p", CONST, vector_nez_v4si_p) - -/* ISA 3.0 Vector scalar overloaded 2 argument functions */ -BU_P9V_OVERLOAD_2 (LXVL, "lxvl") -BU_P9V_OVERLOAD_2 (XL_LEN_R, "xl_len_r") -BU_P9V_OVERLOAD_2 (VEXTULX, "vextulx") -BU_P9V_OVERLOAD_2 (VEXTURX, "vexturx") -BU_P9V_OVERLOAD_2 (EXTRACT4B, "extract4b") - -/* ISA 3.0 Vector scalar overloaded 3 argument functions */ -BU_P9V_OVERLOAD_3 (STXVL, "stxvl") -BU_P9V_OVERLOAD_3 (XST_LEN_R, "xst_len_r") -BU_P9V_OVERLOAD_3 (INSERT4B, "insert4b") - -/* Overloaded CMPNE support was implemented prior to Power 9, - so is not mentioned here. */ -BU_P9V_OVERLOAD_2 (CMPNEZ, "vcmpnez") - -BU_P9V_OVERLOAD_P (VCMPNEZ_P, "vcmpnez_p") -BU_P9V_OVERLOAD_2 (VCMPNE_P, "vcmpne_p") -BU_P9V_OVERLOAD_2 (VCMPAE_P, "vcmpae_p") - -/* ISA 3.0 Vector scalar overloaded 1 argument functions */ -BU_P9V_OVERLOAD_1 (VCLZLSBB, "vclzlsbb") -BU_P9V_OVERLOAD_1 (VCTZLSBB, "vctzlsbb") - -/* 2 argument extended divide functions added in ISA 2.06. */ -BU_P7_MISC_2 (DIVWE, "divwe", CONST, dive_si) -BU_P7_MISC_2 (DIVWEU, "divweu", CONST, diveu_si) -BU_P7_POWERPC64_MISC_2 (DIVDE, "divde", CONST, dive_di) -BU_P7_POWERPC64_MISC_2 (DIVDEU, "divdeu", CONST, diveu_di) - -/* 1 argument DFP (decimal floating point) functions added in ISA 2.05. */ -BU_DFP_MISC_1 (DXEX, "dxex", CONST, dfp_dxex_dd) -BU_DFP_MISC_1 (DXEXQ, "dxexq", CONST, dfp_dxex_td) - -/* 2 argument DFP (decimal floating point) functions added in ISA 2.05. */ -BU_DFP_MISC_2 (DDEDPD, "ddedpd", CONST, dfp_ddedpd_dd) -BU_DFP_MISC_2 (DDEDPDQ, "ddedpdq", CONST, dfp_ddedpd_td) -BU_DFP_MISC_2 (DENBCD, "denbcd", CONST, dfp_denbcd_dd) -BU_DFP_MISC_2 (DENBCDQ, "denbcdq", CONST, dfp_denbcd_td) -BU_DFP_MISC_2 (DIEX, "diex", CONST, dfp_diex_dd) -BU_DFP_MISC_2 (DIEXQ, "diexq", CONST, dfp_diex_td) -BU_DFP_MISC_2 (DSCLI, "dscli", CONST, dfp_dscli_dd) -BU_DFP_MISC_2 (DSCLIQ, "dscliq", CONST, dfp_dscli_td) -BU_DFP_MISC_2 (DSCRI, "dscri", CONST, dfp_dscri_dd) -BU_DFP_MISC_2 (DSCRIQ, "dscriq", CONST, dfp_dscri_td) - -/* 0 argument void function that we pretend was added in ISA 2.06. - It's a special nop recognized by 2018+ firmware for P7 and up, - with speculation barrier semantics. */ -BU_P7_MISC_X (SPEC_BARRIER, "ppc_speculation_barrier", MISC) - -/* 1 argument BCD functions added in ISA 2.06. */ -BU_P7_MISC_1 (CDTBCD, "cdtbcd", CONST, cdtbcd) -BU_P7_MISC_1 (CBCDTD, "cbcdtd", CONST, cbcdtd) - -/* 2 argument BCD functions added in ISA 2.06. */ -BU_P7_MISC_2 (ADDG6S, "addg6s", CONST, addg6s) - -/* 3 argument BCD functions added in ISA 2.07. */ -BU_P8V_MISC_3 (BCDADD_V1TI, "bcdadd_v1ti", CONST, bcdadd_v1ti) -BU_P8V_MISC_3 (BCDADD_V16QI, "bcdadd_v16qi", CONST, bcdadd_v16qi) -BU_P8V_MISC_3 (BCDADD_LT_V1TI, "bcdadd_lt_v1ti", CONST, bcdadd_lt_v1ti) -BU_P8V_MISC_3 (BCDADD_LT_V16QI, "bcdadd_lt_v16qi", CONST, bcdadd_lt_v16qi) -BU_P8V_MISC_3 (BCDADD_EQ_V1TI, "bcdadd_eq_v1ti", CONST, bcdadd_eq_v1ti) -BU_P8V_MISC_3 (BCDADD_EQ_V16QI, "bcdadd_eq_v16qi", CONST, bcdadd_eq_v16qi) -BU_P8V_MISC_3 (BCDADD_GT_V1TI, "bcdadd_gt_v1ti", CONST, bcdadd_gt_v1ti) -BU_P8V_MISC_3 (BCDADD_GT_V16QI, "bcdadd_gt_v16qi", CONST, bcdadd_gt_v16qi) -BU_P8V_MISC_3 (BCDADD_OV_V1TI, "bcdadd_ov_v1ti", CONST, bcdadd_unordered_v1ti) -BU_P8V_MISC_3 (BCDADD_OV_V16QI, "bcdadd_ov_v16qi", CONST, bcdadd_unordered_v16qi) - -BU_P8V_MISC_3 (BCDSUB_V1TI, "bcdsub_v1ti", CONST, bcdsub_v1ti) -BU_P8V_MISC_3 (BCDSUB_V16QI, "bcdsub_v16qi", CONST, bcdsub_v16qi) -BU_P8V_MISC_3 (BCDSUB_LT_V1TI, "bcdsub_lt_v1ti", CONST, bcdsub_lt_v1ti) -BU_P8V_MISC_3 (BCDSUB_LT_V16QI, "bcdsub_lt_v16qi", CONST, bcdsub_lt_v16qi) -BU_P8V_MISC_3 (BCDSUB_LE_V1TI, "bcdsub_le_v1ti", CONST, bcdsub_le_v1ti) -BU_P8V_MISC_3 (BCDSUB_LE_V16QI, "bcdsub_le_v16qi", CONST, bcdsub_le_v16qi) -BU_P8V_MISC_3 (BCDSUB_EQ_V1TI, "bcdsub_eq_v1ti", CONST, bcdsub_eq_v1ti) -BU_P8V_MISC_3 (BCDSUB_EQ_V16QI, "bcdsub_eq_v16qi", CONST, bcdsub_eq_v16qi) -BU_P8V_MISC_3 (BCDSUB_GT_V1TI, "bcdsub_gt_v1ti", CONST, bcdsub_gt_v1ti) -BU_P8V_MISC_3 (BCDSUB_GT_V16QI, "bcdsub_gt_v16qi", CONST, bcdsub_gt_v16qi) -BU_P8V_MISC_3 (BCDSUB_GE_V1TI, "bcdsub_ge_v1ti", CONST, bcdsub_ge_v1ti) -BU_P8V_MISC_3 (BCDSUB_GE_V16QI, "bcdsub_ge_v16qi", CONST, bcdsub_ge_v16qi) -BU_P8V_MISC_3 (BCDSUB_OV_V1TI, "bcdsub_ov_v1ti", CONST, bcdsub_unordered_v1ti) -BU_P8V_MISC_3 (BCDSUB_OV_V16QI, "bcdsub_ov_v16qi", CONST, bcdsub_unordered_v16qi) - -BU_P8V_MISC_1 (BCDINVALID_V1TI, "bcdinvalid_v1ti", CONST, bcdinvalid_v1ti) -BU_P8V_MISC_1 (BCDINVALID_V16QI, "bcdinvalid_v16qi", CONST, bcdinvalid_v16qi) - -BU_P9V_AV_1 (BCDMUL10_V16QI, "bcdmul10_v16qi", CONST, bcdmul10_v16qi) -BU_P9V_AV_1 (BCDDIV10_V16QI, "bcddiv10_v16qi", CONST, bcddiv10_v16qi) -BU_P8V_MISC_1 (DENBCD_V16QI, "denb2dfp_v16qi", CONST, dfp_denbcd_v16qi) - -BU_P8V_OVERLOAD_3 (BCDADD, "bcdadd") -BU_P8V_OVERLOAD_3 (BCDADD_LT, "bcdadd_lt") -BU_P8V_OVERLOAD_3 (BCDADD_EQ, "bcdadd_eq") -BU_P8V_OVERLOAD_3 (BCDADD_GT, "bcdadd_gt") -BU_P8V_OVERLOAD_3 (BCDADD_OV, "bcdadd_ov") -BU_P8V_OVERLOAD_3 (BCDSUB, "bcdsub") -BU_P8V_OVERLOAD_3 (BCDSUB_LT, "bcdsub_lt") -BU_P8V_OVERLOAD_3 (BCDSUB_LE, "bcdsub_le") -BU_P8V_OVERLOAD_3 (BCDSUB_EQ, "bcdsub_eq") -BU_P8V_OVERLOAD_3 (BCDSUB_GT, "bcdsub_gt") -BU_P8V_OVERLOAD_3 (BCDSUB_GE, "bcdsub_ge") -BU_P8V_OVERLOAD_3 (BCDSUB_OV, "bcdsub_ov") -BU_P8V_OVERLOAD_1 (BCDINVALID, "bcdinvalid") -BU_P9V_OVERLOAD_1 (BCDMUL10, "bcdmul10") -BU_P9V_OVERLOAD_1 (BCDDIV10, "bcddiv10") -BU_P8V_OVERLOAD_1 (DENBCD, "denb2dfp") - -/* 2 argument pack/unpack 128-bit floating point types. */ -BU_DFP_MISC_2 (PACK_TD, "pack_dec128", CONST, packtd) -BU_DFP_MISC_2 (UNPACK_TD, "unpack_dec128", CONST, unpacktd) - -/* 0 argument general-purpose register functions added in ISA 3.0 (power9). */ -BU_P9_MISC_0 (DARN_32, "darn_32", MISC, darn_32) -BU_P9_64BIT_MISC_0 (DARN_RAW, "darn_raw", MISC, darn_raw) -BU_P9_64BIT_MISC_0 (DARN, "darn", MISC, darn) - -BU_LDBL128_2 (PACK_TF, "pack_longdouble", CONST, packtf) -BU_LDBL128_2 (UNPACK_TF, "unpack_longdouble", CONST, unpacktf) - -BU_IBM128_2 (PACK_IF, "pack_ibm128", CONST, packif) -BU_IBM128_2 (UNPACK_IF, "unpack_ibm128", CONST, unpackif) - -BU_P7_MISC_2 (PACK_V1TI, "pack_vector_int128", CONST, packv1ti) -BU_P7_MISC_2 (UNPACK_V1TI, "unpack_vector_int128", CONST, unpackv1ti) - -/* 2 argument DFP (Decimal Floating Point) functions added in ISA 3.0. */ -BU_P9_DFP_MISC_2 (TSTSFI_LT_DD, "dtstsfi_lt_dd", CONST, dfptstsfi_lt_dd) -BU_P9_DFP_MISC_2 (TSTSFI_LT_TD, "dtstsfi_lt_td", CONST, dfptstsfi_lt_td) - -BU_P9_DFP_MISC_2 (TSTSFI_EQ_DD, "dtstsfi_eq_dd", CONST, dfptstsfi_eq_dd) -BU_P9_DFP_MISC_2 (TSTSFI_EQ_TD, "dtstsfi_eq_td", CONST, dfptstsfi_eq_td) - -BU_P9_DFP_MISC_2 (TSTSFI_GT_DD, "dtstsfi_gt_dd", CONST, dfptstsfi_gt_dd) -BU_P9_DFP_MISC_2 (TSTSFI_GT_TD, "dtstsfi_gt_td", CONST, dfptstsfi_gt_td) - -BU_P9_DFP_MISC_2 (TSTSFI_OV_DD, "dtstsfi_ov_dd", CONST, dfptstsfi_unordered_dd) -BU_P9_DFP_MISC_2 (TSTSFI_OV_TD, "dtstsfi_ov_td", CONST, dfptstsfi_unordered_td) - -/* 2 argument overloaded DFP functions added in ISA 3.0. */ -BU_P9_DFP_OVERLOAD_2 (TSTSFI_LT, "dtstsfi_lt") -BU_P9_DFP_OVERLOAD_2 (TSTSFI_LT_DD, "dtstsfi_lt_dd") -BU_P9_DFP_OVERLOAD_2 (TSTSFI_LT_TD, "dtstsfi_lt_td") - -BU_P9_DFP_OVERLOAD_2 (TSTSFI_EQ, "dtstsfi_eq") -BU_P9_DFP_OVERLOAD_2 (TSTSFI_EQ_DD, "dtstsfi_eq_dd") -BU_P9_DFP_OVERLOAD_2 (TSTSFI_EQ_TD, "dtstsfi_eq_td") - -BU_P9_DFP_OVERLOAD_2 (TSTSFI_GT, "dtstsfi_gt") -BU_P9_DFP_OVERLOAD_2 (TSTSFI_GT_DD, "dtstsfi_gt_dd") -BU_P9_DFP_OVERLOAD_2 (TSTSFI_GT_TD, "dtstsfi_gt_td") - -BU_P9_DFP_OVERLOAD_2 (TSTSFI_OV, "dtstsfi_ov") -BU_P9_DFP_OVERLOAD_2 (TSTSFI_OV_DD, "dtstsfi_ov_dd") -BU_P9_DFP_OVERLOAD_2 (TSTSFI_OV_TD, "dtstsfi_ov_td") - -/* 1 argument vector functions added in ISA 3.0 (power9). */ -BU_P9V_AV_1 (VCTZB, "vctzb", CONST, ctzv16qi2) -BU_P9V_AV_1 (VCTZH, "vctzh", CONST, ctzv8hi2) -BU_P9V_AV_1 (VCTZW, "vctzw", CONST, ctzv4si2) -BU_P9V_AV_1 (VCTZD, "vctzd", CONST, ctzv2di2) -BU_P9V_AV_1 (VPRTYBD, "vprtybd", CONST, parityv2di2) -BU_P9V_AV_1 (VPRTYBQ, "vprtybq", CONST, parityv1ti2) -BU_P9V_AV_1 (VPRTYBW, "vprtybw", CONST, parityv4si2) - -/* ISA 3.0 vector overloaded 1 argument functions. */ -BU_P9V_OVERLOAD_1 (VCTZ, "vctz") -BU_P9V_OVERLOAD_1 (VCTZB, "vctzb") -BU_P9V_OVERLOAD_1 (VCTZH, "vctzh") -BU_P9V_OVERLOAD_1 (VCTZW, "vctzw") -BU_P9V_OVERLOAD_1 (VCTZD, "vctzd") -BU_P9V_OVERLOAD_1 (VPRTYB, "vprtyb") -BU_P9V_OVERLOAD_1 (VPRTYBD, "vprtybd") -BU_P9V_OVERLOAD_1 (VPRTYBQ, "vprtybq") -BU_P9V_OVERLOAD_1 (VPRTYBW, "vprtybw") -BU_P9V_OVERLOAD_1 (VPARITY_LSBB, "vparity_lsbb") -BU_P9V_OVERLOAD_1 (VSIGNEXTI, "vsignexti") -BU_P9V_OVERLOAD_1 (VSIGNEXTLL, "vsignextll") - -/* 2 argument functions added in ISA 3.0 (power9). */ -BU_P9_2 (CMPRB, "byte_in_range", CONST, cmprb) -BU_P9_2 (CMPRB2, "byte_in_either_range", CONST, cmprb2) -BU_P9_64BIT_2 (CMPEQB, "byte_in_set", CONST, cmpeqb) - -/* 2 argument overloaded functions added in ISA 3.0 (power9). */ -BU_P9_OVERLOAD_2 (CMPRB, "byte_in_range") -BU_P9_OVERLOAD_2 (CMPRB2, "byte_in_either_range") -BU_P9_OVERLOAD_2 (CMPEQB, "byte_in_set") - - -BU_P9V_AV_1 (VSIGNEXTSB2W, "vsignextsb2w", CONST, vsignextend_qi_v4si) -BU_P9V_AV_1 (VSIGNEXTSH2W, "vsignextsh2w", CONST, vsignextend_hi_v4si) -BU_P9V_AV_1 (VSIGNEXTSB2D, "vsignextsb2d", CONST, vsignextend_qi_v2di) -BU_P9V_AV_1 (VSIGNEXTSH2D, "vsignextsh2d", CONST, vsignextend_hi_v2di) -BU_P9V_AV_1 (VSIGNEXTSW2D, "vsignextsw2d", CONST, vsignextend_si_v2di) - -/* Builtins for scalar instructions added in ISA 3.1 (power10). */ -BU_P10V_AV_P (VCMPEQUT_P, "vcmpequt_p", CONST, vector_eq_v1ti_p) -BU_P10V_AV_P (VCMPGTST_P, "vcmpgtst_p", CONST, vector_gt_v1ti_p) -BU_P10V_AV_P (VCMPGTUT_P, "vcmpgtut_p", CONST, vector_gtu_v1ti_p) - -BU_P10_POWERPC64_MISC_2 (CFUGED, "cfuged", CONST, cfuged) -BU_P10_POWERPC64_MISC_2 (CNTLZDM, "cntlzdm", CONST, cntlzdm) -BU_P10_POWERPC64_MISC_2 (CNTTZDM, "cnttzdm", CONST, cnttzdm) -BU_P10_POWERPC64_MISC_2 (PDEPD, "pdepd", CONST, pdepd) -BU_P10_POWERPC64_MISC_2 (PEXTD, "pextd", CONST, pextd) - -/* Builtins for vector instructions added in ISA 3.1 (power10). */ -BU_P10V_AV_2 (VCLRLB, "vclrlb", CONST, vclrlb) -BU_P10V_AV_2 (VCLRRB, "vclrrb", CONST, vclrrb) -BU_P10V_AV_2 (VCFUGED, "vcfuged", CONST, vcfuged) -BU_P10V_AV_2 (VCLZDM, "vclzdm", CONST, vclzdm) -BU_P10V_AV_2 (VCTZDM, "vctzdm", CONST, vctzdm) -BU_P10V_AV_2 (VPDEPD, "vpdepd", CONST, vpdepd) -BU_P10V_AV_2 (VPEXTD, "vpextd", CONST, vpextd) -BU_P10V_AV_2 (VGNB, "vgnb", CONST, vgnb) -BU_P10V_VSX_4 (XXEVAL, "xxeval", CONST, xxeval) -BU_P10V_VSX_2 (XXGENPCVM_V16QI, "xxgenpcvm_v16qi", CONST, xxgenpcvm_v16qi) -BU_P10V_VSX_2 (XXGENPCVM_V8HI, "xxgenpcvm_v8hi", CONST, xxgenpcvm_v8hi) -BU_P10V_VSX_2 (XXGENPCVM_V4SI, "xxgenpcvm_v4si", CONST, xxgenpcvm_v4si) -BU_P10V_VSX_2 (XXGENPCVM_V2DI, "xxgenpcvm_v2di", CONST, xxgenpcvm_v2di) -BU_P10V_AV_2 (VCMPGTUT, "vcmpgtut", CONST, vector_gtuv1ti) -BU_P10V_AV_2 (VCMPGTST, "vcmpgtst", CONST, vector_gtv1ti) -BU_P10V_AV_2 (VCMPEQUT, "vcmpequt", CONST, vector_eqv1ti) -BU_P10V_AV_2 (CMPNET, "vcmpnet", CONST, vcmpnet) -BU_P10V_AV_2 (CMPGE_1TI, "cmpge_1ti", CONST, vector_nltv1ti) -BU_P10V_AV_2 (CMPGE_U1TI, "cmpge_u1ti", CONST, vector_nltuv1ti) -BU_P10V_AV_2 (CMPLE_1TI, "cmple_1ti", CONST, vector_ngtv1ti) -BU_P10V_AV_2 (CMPLE_U1TI, "cmple_u1ti", CONST, vector_ngtuv1ti) -BU_P10V_AV_2 (VNOR_V1TI_UNS, "vnor_v1ti_uns",CONST, norv1ti3) -BU_P10V_AV_2 (VNOR_V1TI, "vnor_v1ti", CONST, norv1ti3) -BU_P10V_AV_2 (VCMPNET_P, "vcmpnet_p", CONST, vector_ne_v1ti_p) -BU_P10V_AV_2 (VCMPAET_P, "vcmpaet_p", CONST, vector_ae_v1ti_p) - -BU_P10V_AV_1 (VSIGNEXTSD2Q, "vsignext", CONST, vsignextend_v2di_v1ti) - -BU_P10V_AV_2 (VMULEUD, "vmuleud", CONST, vec_widen_umult_even_v2di) -BU_P10V_AV_2 (VMULESD, "vmulesd", CONST, vec_widen_smult_even_v2di) -BU_P10V_AV_2 (VMULOUD, "vmuloud", CONST, vec_widen_umult_odd_v2di) -BU_P10V_AV_2 (VMULOSD, "vmulosd", CONST, vec_widen_smult_odd_v2di) -BU_P10V_AV_2 (VRLQ, "vrlq", CONST, vrotlv1ti3) -BU_P10V_AV_2 (VSLQ, "vslq", CONST, vashlv1ti3) -BU_P10V_AV_2 (VSRQ, "vsrq", CONST, vlshrv1ti3) -BU_P10V_AV_2 (VSRAQ, "vsraq", CONST, vashrv1ti3) -BU_P10V_AV_2 (VRLQNM, "vrlqnm", CONST, altivec_vrlqnm) -BU_P10V_AV_2 (DIV_V1TI, "div_1ti", CONST, vsx_div_v1ti) -BU_P10V_AV_2 (UDIV_V1TI, "udiv_1ti", CONST, vsx_udiv_v1ti) -BU_P10V_AV_2 (DIVES_V1TI, "dives", CONST, vsx_dives_v1ti) -BU_P10V_AV_2 (DIVEU_V1TI, "diveu", CONST, vsx_diveu_v1ti) -BU_P10V_AV_2 (MODS_V1TI, "mods", CONST, vsx_mods_v1ti) -BU_P10V_AV_2 (MODU_V1TI, "modu", CONST, vsx_modu_v1ti) - -BU_P10V_AV_3 (VRLQMI, "vrlqmi", CONST, altivec_vrlqmi) -BU_P10V_AV_3 (VEXTRACTBL, "vextdubvlx", CONST, vextractlv16qi) -BU_P10V_AV_3 (VEXTRACTHL, "vextduhvlx", CONST, vextractlv8hi) -BU_P10V_AV_3 (VEXTRACTWL, "vextduwvlx", CONST, vextractlv4si) -BU_P10V_AV_3 (VEXTRACTDL, "vextddvlx", CONST, vextractlv2di) - -BU_P10V_AV_3 (VEXTRACTBR, "vextdubvhx", CONST, vextractrv16qi) -BU_P10V_AV_3 (VEXTRACTHR, "vextduhvhx", CONST, vextractrv8hi) -BU_P10V_AV_3 (VEXTRACTWR, "vextduwvhx", CONST, vextractrv4si) -BU_P10V_AV_3 (VEXTRACTDR, "vextddvhx", CONST, vextractrv2di) - -BU_P10V_AV_3 (VINSERTGPRBL, "vinsgubvlx", CONST, vinsertgl_v16qi) -BU_P10V_AV_3 (VINSERTGPRHL, "vinsguhvlx", CONST, vinsertgl_v8hi) -BU_P10V_AV_3 (VINSERTGPRWL, "vinsguwvlx", CONST, vinsertgl_v4si) -BU_P10V_AV_3 (VINSERTGPRDL, "vinsgudvlx", CONST, vinsertgl_v2di) -BU_P10V_AV_3 (VINSERTVPRBL, "vinsvubvlx", CONST, vinsertvl_v16qi) -BU_P10V_AV_3 (VINSERTVPRHL, "vinsvuhvlx", CONST, vinsertvl_v8hi) -BU_P10V_AV_3 (VINSERTVPRWL, "vinsvuwvlx", CONST, vinsertvl_v4si) - -BU_P10V_AV_3 (VINSERTGPRBR, "vinsgubvrx", CONST, vinsertgr_v16qi) -BU_P10V_AV_3 (VINSERTGPRHR, "vinsguhvrx", CONST, vinsertgr_v8hi) -BU_P10V_AV_3 (VINSERTGPRWR, "vinsguwvrx", CONST, vinsertgr_v4si) -BU_P10V_AV_3 (VINSERTGPRDR, "vinsgudvrx", CONST, vinsertgr_v2di) -BU_P10V_AV_3 (VINSERTVPRBR, "vinsvubvrx", CONST, vinsertvr_v16qi) -BU_P10V_AV_3 (VINSERTVPRHR, "vinsvuhvrx", CONST, vinsertvr_v8hi) -BU_P10V_AV_3 (VINSERTVPRWR, "vinsvuwvrx", CONST, vinsertvr_v4si) - -BU_P10V_AV_3 (VREPLACE_ELT_V4SI, "vreplace_v4si", CONST, vreplace_elt_v4si) -BU_P10V_AV_3 (VREPLACE_ELT_UV4SI, "vreplace_uv4si", CONST, vreplace_elt_v4si) -BU_P10V_AV_3 (VREPLACE_ELT_V4SF, "vreplace_v4sf", CONST, vreplace_elt_v4sf) -BU_P10V_AV_3 (VREPLACE_ELT_V2DI, "vreplace_v2di", CONST, vreplace_elt_v2di) -BU_P10V_AV_3 (VREPLACE_ELT_UV2DI, "vreplace_uv2di", CONST, vreplace_elt_v2di) -BU_P10V_AV_3 (VREPLACE_ELT_V2DF, "vreplace_v2df", CONST, vreplace_elt_v2df) - -BU_P10V_AV_3 (VREPLACE_UN_V4SI, "vreplace_un_v4si", CONST, vreplace_un_v4si) -BU_P10V_AV_3 (VREPLACE_UN_UV4SI, "vreplace_un_uv4si", CONST, vreplace_un_v4si) -BU_P10V_AV_3 (VREPLACE_UN_V4SF, "vreplace_un_v4sf", CONST, vreplace_un_v4sf) -BU_P10V_AV_3 (VREPLACE_UN_V2DI, "vreplace_un_v2di", CONST, vreplace_un_v2di) -BU_P10V_AV_3 (VREPLACE_UN_UV2DI, "vreplace_un_uv2di", CONST, vreplace_un_v2di) -BU_P10V_AV_3 (VREPLACE_UN_V2DF, "vreplace_un_v2df", CONST, vreplace_un_v2df) - -BU_P10V_AV_3 (VSLDB_V16QI, "vsldb_v16qi", CONST, vsldb_v16qi) -BU_P10V_AV_3 (VSLDB_V8HI, "vsldb_v8hi", CONST, vsldb_v8hi) -BU_P10V_AV_3 (VSLDB_V4SI, "vsldb_v4si", CONST, vsldb_v4si) -BU_P10V_AV_3 (VSLDB_V2DI, "vsldb_v2di", CONST, vsldb_v2di) - -BU_P10V_AV_3 (VSRDB_V16QI, "vsrdb_v16qi", CONST, vsrdb_v16qi) -BU_P10V_AV_3 (VSRDB_V8HI, "vsrdb_v8hi", CONST, vsrdb_v8hi) -BU_P10V_AV_3 (VSRDB_V4SI, "vsrdb_v4si", CONST, vsrdb_v4si) -BU_P10V_AV_3 (VSRDB_V2DI, "vsrdb_v2di", CONST, vsrdb_v2di) - -BU_P10V_AV_2 (DIVES_V4SI, "vdivesw", CONST, dives_v4si) -BU_P10V_AV_2 (DIVES_V2DI, "vdivesd", CONST, dives_v2di) -BU_P10V_AV_2 (DIVEU_V4SI, "vdiveuw", CONST, diveu_v4si) -BU_P10V_AV_2 (DIVEU_V2DI, "vdiveud", CONST, diveu_v2di) -BU_P10V_AV_2 (DIVS_V4SI, "vdivsw", CONST, divv4si3) -BU_P10V_AV_2 (DIVS_V2DI, "vdivsd", CONST, divv2di3) -BU_P10V_AV_2 (DIVU_V4SI, "vdivuw", CONST, udivv4si3) -BU_P10V_AV_2 (DIVU_V2DI, "vdivud", CONST, udivv2di3) -BU_P10V_AV_2 (MODS_V2DI, "vmodsd", CONST, modv2di3) -BU_P10V_AV_2 (MODS_V4SI, "vmodsw", CONST, modv4si3) -BU_P10V_AV_2 (MODU_V2DI, "vmodud", CONST, umodv2di3) -BU_P10V_AV_2 (MODU_V4SI, "vmoduw", CONST, umodv4si3) -BU_P10V_AV_2 (MULHS_V2DI, "vmulhsd", CONST, smulv2di3_highpart) -BU_P10V_AV_2 (MULHS_V4SI, "vmulhsw", CONST, smulv4si3_highpart) -BU_P10V_AV_2 (MULHU_V2DI, "vmulhud", CONST, umulv2di3_highpart) -BU_P10V_AV_2 (MULHU_V4SI, "vmulhuw", CONST, umulv4si3_highpart) -BU_P10V_AV_2 (MULLD_V2DI, "vmulld", CONST, mulv2di3) - -BU_P10V_VSX_1 (VXXSPLTIW_V4SI, "vxxspltiw_v4si", CONST, xxspltiw_v4si) -BU_P10V_VSX_1 (VXXSPLTIW_V4SF, "vxxspltiw_v4sf", CONST, xxspltiw_v4sf) - -BU_P10V_VSX_1 (VXXSPLTID, "vxxspltidp", CONST, xxspltidp_v2df) - -BU_P10V_VSX_3 (VXXSPLTI32DX_V4SI, "vxxsplti32dx_v4si", CONST, xxsplti32dx_v4si) -BU_P10V_VSX_3 (VXXSPLTI32DX_V4SF, "vxxsplti32dx_v4sf", CONST, xxsplti32dx_v4sf) - -BU_P10V_VSX_3 (VXXBLEND_V16QI, "xxblend_v16qi", CONST, xxblend_v16qi) -BU_P10V_VSX_3 (VXXBLEND_V8HI, "xxblend_v8hi", CONST, xxblend_v8hi) -BU_P10V_VSX_3 (VXXBLEND_V4SI, "xxblend_v4si", CONST, xxblend_v4si) -BU_P10V_VSX_3 (VXXBLEND_V2DI, "xxblend_v2di", CONST, xxblend_v2di) -BU_P10V_VSX_3 (VXXBLEND_V4SF, "xxblend_v4sf", CONST, xxblend_v4sf) -BU_P10V_VSX_3 (VXXBLEND_V2DF, "xxblend_v2df", CONST, xxblend_v2df) - -BU_P10V_VSX_4 (VXXPERMX, "xxpermx", CONST, xxpermx) - -BU_P10V_AV_1 (VSTRIBR, "vstribr", CONST, vstrir_v16qi) -BU_P10V_AV_1 (VSTRIHR, "vstrihr", CONST, vstrir_v8hi) -BU_P10V_AV_1 (VSTRIBL, "vstribl", CONST, vstril_v16qi) -BU_P10V_AV_1 (VSTRIHL, "vstrihl", CONST, vstril_v8hi) - -BU_P10V_AV_1 (VSTRIBR_P, "vstribr_p", CONST, vstrir_p_v16qi) -BU_P10V_AV_1 (VSTRIHR_P, "vstrihr_p", CONST, vstrir_p_v8hi) -BU_P10V_AV_1 (VSTRIBL_P, "vstribl_p", CONST, vstril_p_v16qi) -BU_P10V_AV_1 (VSTRIHL_P, "vstrihl_p", CONST, vstril_p_v8hi) - -BU_P10V_VSX_1 (XVTLSBB_ZEROS, "xvtlsbb_all_zeros", CONST, xvtlsbbz) -BU_P10V_VSX_1 (XVTLSBB_ONES, "xvtlsbb_all_ones", CONST, xvtlsbbo) - -BU_P10V_AV_1 (MTVSRBM, "mtvsrbm", CONST, vec_mtvsr_v16qi) -BU_P10V_AV_1 (MTVSRHM, "mtvsrhm", CONST, vec_mtvsr_v8hi) -BU_P10V_AV_1 (MTVSRWM, "mtvsrwm", CONST, vec_mtvsr_v4si) -BU_P10V_AV_1 (MTVSRDM, "mtvsrdm", CONST, vec_mtvsr_v2di) -BU_P10V_AV_1 (MTVSRQM, "mtvsrqm", CONST, vec_mtvsr_v1ti) -BU_P10V_AV_2 (VCNTMBB, "cntmbb", CONST, vec_cntmb_v16qi) -BU_P10V_AV_2 (VCNTMBH, "cntmbh", CONST, vec_cntmb_v8hi) -BU_P10V_AV_2 (VCNTMBW, "cntmbw", CONST, vec_cntmb_v4si) -BU_P10V_AV_2 (VCNTMBD, "cntmbd", CONST, vec_cntmb_v2di) -BU_P10V_AV_1 (VEXPANDMB, "vexpandmb", CONST, vec_expand_v16qi) -BU_P10V_AV_1 (VEXPANDMH, "vexpandmh", CONST, vec_expand_v8hi) -BU_P10V_AV_1 (VEXPANDMW, "vexpandmw", CONST, vec_expand_v4si) -BU_P10V_AV_1 (VEXPANDMD, "vexpandmd", CONST, vec_expand_v2di) -BU_P10V_AV_1 (VEXPANDMQ, "vexpandmq", CONST, vec_expand_v1ti) -BU_P10V_AV_1 (VEXTRACTMB, "vextractmb", CONST, vec_extract_v16qi) -BU_P10V_AV_1 (VEXTRACTMH, "vextractmh", CONST, vec_extract_v8hi) -BU_P10V_AV_1 (VEXTRACTMW, "vextractmw", CONST, vec_extract_v4si) -BU_P10V_AV_1 (VEXTRACTMD, "vextractmd", CONST, vec_extract_v2di) -BU_P10V_AV_1 (VEXTRACTMQ, "vextractmq", CONST, vec_extract_v1ti) - -/* Overloaded vector builtins for ISA 3.1 (power10). */ -BU_P10_OVERLOAD_2 (CLRL, "clrl") -BU_P10_OVERLOAD_2 (CLRR, "clrr") -BU_P10_OVERLOAD_2 (GNB, "gnb") -BU_P10_OVERLOAD_4 (XXEVAL, "xxeval") -BU_P10_OVERLOAD_2 (XXGENPCVM, "xxgenpcvm") - -BU_P10_OVERLOAD_3 (EXTRACTL, "extractl") -BU_P10_OVERLOAD_3 (EXTRACTH, "extracth") -BU_P10_OVERLOAD_3 (INSERTL, "insertl") -BU_P10_OVERLOAD_3 (INSERTH, "inserth") -BU_P10_OVERLOAD_3 (REPLACE_ELT, "replace_elt") -BU_P10_OVERLOAD_3 (REPLACE_UN, "replace_un") -BU_P10_OVERLOAD_3 (SLDB, "sldb") -BU_P10_OVERLOAD_3 (SRDB, "srdb") - -BU_P10_OVERLOAD_1 (VSTRIR, "strir") -BU_P10_OVERLOAD_1 (VSTRIL, "stril") - -BU_P10_OVERLOAD_1 (VSTRIR_P, "strir_p") -BU_P10_OVERLOAD_1 (VSTRIL_P, "stril_p") - -BU_P10_OVERLOAD_1 (XVTLSBB_ZEROS, "xvtlsbb_all_zeros") -BU_P10_OVERLOAD_1 (XVTLSBB_ONES, "xvtlsbb_all_ones") - -BU_P10_OVERLOAD_2 (MULH, "mulh") -BU_P10_OVERLOAD_2 (DIVE, "dive") -BU_P10_OVERLOAD_2 (MOD, "mod") - -BU_P10_OVERLOAD_1 (MTVSRBM, "mtvsrbm") -BU_P10_OVERLOAD_1 (MTVSRHM, "mtvsrhm") -BU_P10_OVERLOAD_1 (MTVSRWM, "mtvsrwm") -BU_P10_OVERLOAD_1 (MTVSRDM, "mtvsrdm") -BU_P10_OVERLOAD_1 (MTVSRQM, "mtvsrqm") -BU_P10_OVERLOAD_2 (VCNTM, "cntm") -BU_P10_OVERLOAD_1 (VEXPANDM, "vexpandm") -BU_P10_OVERLOAD_1 (VEXTRACTM, "vextractm") -BU_P10_OVERLOAD_1 (XXSPLTIW, "xxspltiw") -BU_P10_OVERLOAD_1 (XXSPLTID, "xxspltid") -BU_P10_OVERLOAD_3 (XXSPLTI32DX, "xxsplti32dx") -BU_P10_OVERLOAD_3 (XXBLEND, "xxblend") -BU_P10_OVERLOAD_4 (XXPERMX, "xxpermx") - -/* 1 argument crypto functions. */ -BU_CRYPTO_1 (VSBOX, "vsbox", CONST, crypto_vsbox_v2di) -BU_CRYPTO_1 (VSBOX_BE, "vsbox_be", CONST, crypto_vsbox_v16qi) - -/* 2 argument crypto functions. */ -BU_CRYPTO_2 (VCIPHER, "vcipher", CONST, crypto_vcipher_v2di) -BU_CRYPTO_2 (VCIPHER_BE, "vcipher_be", CONST, crypto_vcipher_v16qi) -BU_CRYPTO_2 (VCIPHERLAST, "vcipherlast", - CONST, crypto_vcipherlast_v2di) -BU_CRYPTO_2 (VCIPHERLAST_BE, "vcipherlast_be", - CONST, crypto_vcipherlast_v16qi) -BU_CRYPTO_2 (VNCIPHER, "vncipher", CONST, crypto_vncipher_v2di) -BU_CRYPTO_2 (VNCIPHER_BE, "vncipher_be", CONST, crypto_vncipher_v16qi) -BU_CRYPTO_2 (VNCIPHERLAST, "vncipherlast", - CONST, crypto_vncipherlast_v2di) -BU_CRYPTO_2 (VNCIPHERLAST_BE, "vncipherlast_be", - CONST, crypto_vncipherlast_v16qi) -BU_CRYPTO_2A (VPMSUMB, "vpmsumb", CONST, crypto_vpmsumb) -BU_CRYPTO_2A (VPMSUMH, "vpmsumh", CONST, crypto_vpmsumh) -BU_CRYPTO_2A (VPMSUMW, "vpmsumw", CONST, crypto_vpmsumw) -BU_CRYPTO_2A (VPMSUMD, "vpmsumd", CONST, crypto_vpmsumd) - -/* 3 argument crypto functions. */ -BU_CRYPTO_3A (VPERMXOR_V2DI, "vpermxor_v2di", CONST, crypto_vpermxor_v2di) -BU_CRYPTO_3A (VPERMXOR_V4SI, "vpermxor_v4si", CONST, crypto_vpermxor_v4si) -BU_CRYPTO_3A (VPERMXOR_V8HI, "vpermxor_v8hi", CONST, crypto_vpermxor_v8hi) -BU_CRYPTO_3A (VPERMXOR_V16QI, "vpermxor_v16qi", CONST, crypto_vpermxor_v16qi) -BU_CRYPTO_3 (VSHASIGMAW, "vshasigmaw", CONST, crypto_vshasigmaw) -BU_CRYPTO_3 (VSHASIGMAD, "vshasigmad", CONST, crypto_vshasigmad) - -/* 2 argument crypto overloaded functions. */ -BU_CRYPTO_OVERLOAD_2A (VPMSUM, "vpmsum") - -/* 3 argument crypto overloaded functions. */ -BU_CRYPTO_OVERLOAD_3A (VPERMXOR, "vpermxor") -BU_CRYPTO_OVERLOAD_3 (VSHASIGMA, "vshasigma") - -BU_P10_OVERLOAD_1 (SIGNEXT, "vsignextq") - -/* HTM functions. */ -BU_HTM_1 (TABORT, "tabort", CR, tabort) -BU_HTM_3 (TABORTDC, "tabortdc", CR, tabortdc) -BU_HTM_3 (TABORTDCI, "tabortdci", CR, tabortdci) -BU_HTM_3 (TABORTWC, "tabortwc", CR, tabortwc) -BU_HTM_3 (TABORTWCI, "tabortwci", CR, tabortwci) -BU_HTM_1 (TBEGIN, "tbegin", CR, tbegin) -BU_HTM_0 (TCHECK, "tcheck", CR, tcheck) -BU_HTM_1 (TEND, "tend", CR, tend) -BU_HTM_0 (TENDALL, "tendall", CR, tend) -BU_HTM_0 (TRECHKPT, "trechkpt", CR, trechkpt) -BU_HTM_1 (TRECLAIM, "treclaim", CR, treclaim) -BU_HTM_0 (TRESUME, "tresume", CR, tsr) -BU_HTM_0 (TSUSPEND, "tsuspend", CR, tsr) -BU_HTM_1 (TSR, "tsr", CR, tsr) -BU_HTM_0 (TTEST, "ttest", CR, ttest) - -BU_HTM_0 (GET_TFHAR, "get_tfhar", SPR, nothing) -BU_HTM_V1 (SET_TFHAR, "set_tfhar", SPR, nothing) -BU_HTM_0 (GET_TFIAR, "get_tfiar", SPR, nothing) -BU_HTM_V1 (SET_TFIAR, "set_tfiar", SPR, nothing) -BU_HTM_0 (GET_TEXASR, "get_texasr", SPR, nothing) -BU_HTM_V1 (SET_TEXASR, "set_texasr", SPR, nothing) -BU_HTM_0 (GET_TEXASRU, "get_texasru", SPR, nothing) -BU_HTM_V1 (SET_TEXASRU, "set_texasru", SPR, nothing) - - -/* Power7 builtins, that aren't VSX instructions. */ -BU_SPECIAL_X (POWER7_BUILTIN_BPERMD, "__builtin_bpermd", RS6000_BTM_POPCNTD, - RS6000_BTC_CONST) - -/* Miscellaneous builtins. */ -BU_SPECIAL_X (RS6000_BUILTIN_RECIP, "__builtin_recipdiv", RS6000_BTM_FRE, - RS6000_BTC_FP) - -BU_SPECIAL_X (RS6000_BUILTIN_RECIPF, "__builtin_recipdivf", RS6000_BTM_FRES, - RS6000_BTC_FP) - -BU_SPECIAL_X (RS6000_BUILTIN_RSQRT, "__builtin_rsqrt", RS6000_BTM_FRSQRTE, - RS6000_BTC_FP) - -BU_SPECIAL_X (RS6000_BUILTIN_RSQRTF, "__builtin_rsqrtf", RS6000_BTM_FRSQRTES, - RS6000_BTC_FP) - -BU_SPECIAL_X (RS6000_BUILTIN_GET_TB, "__builtin_ppc_get_timebase", - RS6000_BTM_ALWAYS, RS6000_BTC_MISC) - -BU_SPECIAL_X (RS6000_BUILTIN_MFTB, "__builtin_ppc_mftb", - RS6000_BTM_ALWAYS, RS6000_BTC_MISC) - -BU_SPECIAL_X (RS6000_BUILTIN_MFFS, "__builtin_mffs", - RS6000_BTM_ALWAYS, RS6000_BTC_MISC) - -BU_SPECIAL_X (RS6000_BUILTIN_MFFSL, "__builtin_mffsl", - RS6000_BTM_ALWAYS, RS6000_BTC_MISC) - -RS6000_BUILTIN_X (RS6000_BUILTIN_MTFSF, "__builtin_mtfsf", - RS6000_BTM_ALWAYS, - RS6000_BTC_MISC | RS6000_BTC_UNARY | RS6000_BTC_VOID, - CODE_FOR_rs6000_mtfsf) - -RS6000_BUILTIN_X (RS6000_BUILTIN_MTFSB0, "__builtin_mtfsb0", - RS6000_BTM_ALWAYS, - RS6000_BTC_MISC | RS6000_BTC_UNARY | RS6000_BTC_VOID, - CODE_FOR_rs6000_mtfsb0) - -RS6000_BUILTIN_X (RS6000_BUILTIN_MTFSB1, "__builtin_mtfsb1", - RS6000_BTM_ALWAYS, - RS6000_BTC_MISC | RS6000_BTC_UNARY | RS6000_BTC_VOID, - CODE_FOR_rs6000_mtfsb1) - -RS6000_BUILTIN_X (RS6000_BUILTIN_SET_FPSCR_RN, "__builtin_set_fpscr_rn", - RS6000_BTM_ALWAYS, - RS6000_BTC_MISC | RS6000_BTC_UNARY| RS6000_BTC_VOID, - CODE_FOR_rs6000_set_fpscr_rn) - -RS6000_BUILTIN_X (RS6000_BUILTIN_SET_FPSCR_DRN, "__builtin_set_fpscr_drn", - RS6000_BTM_DFP, - RS6000_BTC_MISC | RS6000_BTM_64BIT | RS6000_BTC_UNARY - | RS6000_BTC_VOID, - CODE_FOR_rs6000_set_fpscr_drn) - -BU_SPECIAL_X (RS6000_BUILTIN_CPU_INIT, "__builtin_cpu_init", - RS6000_BTM_ALWAYS, RS6000_BTC_MISC) - -BU_SPECIAL_X (RS6000_BUILTIN_CPU_IS, "__builtin_cpu_is", - RS6000_BTM_ALWAYS, RS6000_BTC_MISC) - -BU_SPECIAL_X (RS6000_BUILTIN_CPU_SUPPORTS, "__builtin_cpu_supports", - RS6000_BTM_ALWAYS, RS6000_BTC_MISC) - -/* Darwin CfString builtin. */ -BU_SPECIAL_X (RS6000_BUILTIN_CFSTRING, "__builtin_cfstring", RS6000_BTM_ALWAYS, - RS6000_BTC_MISC) - -/* POWER10 MMA builtins. */ -BU_P10V_VSX_1 (XVCVBF16SPN, "xvcvbf16spn", MISC, vsx_xvcvbf16spn) -BU_P10V_VSX_1 (XVCVSPBF16, "xvcvspbf16", MISC, vsx_xvcvspbf16) - -BU_MMA_PAIR_LD (LXVP, "lxvp", MISC) -BU_MMA_PAIR_ST (STXVP, "stxvp", PAIR) - -BU_MMA_1 (XXMFACC, "xxmfacc", QUAD, mma_xxmfacc) -BU_MMA_1 (XXMTACC, "xxmtacc", QUAD, mma_xxmtacc) -BU_MMA_1 (XXSETACCZ, "xxsetaccz", MISC, mma_xxsetaccz) - -BU_MMA_2 (DISASSEMBLE_ACC, "disassemble_acc", QUAD, mma_disassemble_acc) -BU_MMA_V2 (DISASSEMBLE_PAIR, "disassemble_pair", PAIR, vsx_disassemble_pair) -BU_COMPAT (VSX_BUILTIN_DISASSEMBLE_PAIR, "mma_disassemble_pair") - -BU_MMA_V3 (BUILD_PAIR, "build_pair", MISC, vsx_assemble_pair) -BU_MMA_V3 (ASSEMBLE_PAIR, "assemble_pair", MISC, vsx_assemble_pair) -BU_COMPAT (VSX_BUILTIN_ASSEMBLE_PAIR, "mma_assemble_pair") -BU_MMA_3 (XVBF16GER2, "xvbf16ger2", MISC, mma_xvbf16ger2) -BU_MMA_3 (XVF16GER2, "xvf16ger2", MISC, mma_xvf16ger2) -BU_MMA_3 (XVF32GER, "xvf32ger", MISC, mma_xvf32ger) -BU_MMA_3 (XVF64GER, "xvf64ger", PAIR, mma_xvf64ger) -BU_MMA_3 (XVI4GER8, "xvi4ger8", MISC, mma_xvi4ger8) -BU_MMA_3 (XVI8GER4, "xvi8ger4", MISC, mma_xvi8ger4) -BU_MMA_3 (XVI16GER2, "xvi16ger2", MISC, mma_xvi16ger2) -BU_MMA_3 (XVI16GER2S, "xvi16ger2s", MISC, mma_xvi16ger2s) -BU_MMA_3 (XVBF16GER2NN, "xvbf16ger2nn", QUAD, mma_xvbf16ger2nn) -BU_MMA_3 (XVBF16GER2NP, "xvbf16ger2np", QUAD, mma_xvbf16ger2np) -BU_MMA_3 (XVBF16GER2PN, "xvbf16ger2pn", QUAD, mma_xvbf16ger2pn) -BU_MMA_3 (XVBF16GER2PP, "xvbf16ger2pp", QUAD, mma_xvbf16ger2pp) -BU_MMA_3 (XVF16GER2NN, "xvf16ger2nn", QUAD, mma_xvf16ger2nn) -BU_MMA_3 (XVF16GER2NP, "xvf16ger2np", QUAD, mma_xvf16ger2np) -BU_MMA_3 (XVF16GER2PN, "xvf16ger2pn", QUAD, mma_xvf16ger2pn) -BU_MMA_3 (XVF16GER2PP, "xvf16ger2pp", QUAD, mma_xvf16ger2pp) -BU_MMA_3 (XVF32GERNN, "xvf32gernn", QUAD, mma_xvf32gernn) -BU_MMA_3 (XVF32GERNP, "xvf32gernp", QUAD, mma_xvf32gernp) -BU_MMA_3 (XVF32GERPN, "xvf32gerpn", QUAD, mma_xvf32gerpn) -BU_MMA_3 (XVF32GERPP, "xvf32gerpp", QUAD, mma_xvf32gerpp) -BU_MMA_3 (XVF64GERNN, "xvf64gernn", QUADPAIR, mma_xvf64gernn) -BU_MMA_3 (XVF64GERNP, "xvf64gernp", QUADPAIR, mma_xvf64gernp) -BU_MMA_3 (XVF64GERPN, "xvf64gerpn", QUADPAIR, mma_xvf64gerpn) -BU_MMA_3 (XVF64GERPP, "xvf64gerpp", QUADPAIR, mma_xvf64gerpp) -BU_MMA_3 (XVI4GER8PP, "xvi4ger8pp", QUAD, mma_xvi4ger8pp) -BU_MMA_3 (XVI8GER4PP, "xvi8ger4pp", QUAD, mma_xvi8ger4pp) -BU_MMA_3 (XVI8GER4SPP, "xvi8ger4spp", QUAD, mma_xvi8ger4spp) -BU_MMA_3 (XVI16GER2PP, "xvi16ger2pp", QUAD, mma_xvi16ger2pp) -BU_MMA_3 (XVI16GER2SPP, "xvi16ger2spp", QUAD, mma_xvi16ger2spp) - -BU_MMA_5 (BUILD_ACC, "build_acc", MISC, mma_assemble_acc) -BU_MMA_5 (ASSEMBLE_ACC, "assemble_acc", MISC, mma_assemble_acc) -BU_MMA_5 (PMXVF32GER, "pmxvf32ger", MISC, mma_pmxvf32ger) -BU_MMA_5 (PMXVF64GER, "pmxvf64ger", PAIR, mma_pmxvf64ger) -BU_MMA_5 (PMXVF32GERNN, "pmxvf32gernn", QUAD, mma_pmxvf32gernn) -BU_MMA_5 (PMXVF32GERNP, "pmxvf32gernp", QUAD, mma_pmxvf32gernp) -BU_MMA_5 (PMXVF32GERPN, "pmxvf32gerpn", QUAD, mma_pmxvf32gerpn) -BU_MMA_5 (PMXVF32GERPP, "pmxvf32gerpp", QUAD, mma_pmxvf32gerpp) -BU_MMA_5 (PMXVF64GERNN, "pmxvf64gernn", QUADPAIR, mma_pmxvf64gernn) -BU_MMA_5 (PMXVF64GERNP, "pmxvf64gernp", QUADPAIR, mma_pmxvf64gernp) -BU_MMA_5 (PMXVF64GERPN, "pmxvf64gerpn", QUADPAIR, mma_pmxvf64gerpn) -BU_MMA_5 (PMXVF64GERPP, "pmxvf64gerpp", QUADPAIR, mma_pmxvf64gerpp) - -BU_MMA_6 (PMXVBF16GER2, "pmxvbf16ger2", MISC, mma_pmxvbf16ger2) -BU_MMA_6 (PMXVF16GER2, "pmxvf16ger2", MISC, mma_pmxvf16ger2) -BU_MMA_6 (PMXVI4GER8, "pmxvi4ger8", MISC, mma_pmxvi4ger8) -BU_MMA_6 (PMXVI8GER4, "pmxvi8ger4", MISC, mma_pmxvi8ger4) -BU_MMA_6 (PMXVI16GER2, "pmxvi16ger2", MISC, mma_pmxvi16ger2) -BU_MMA_6 (PMXVI16GER2S, "pmxvi16ger2s", MISC, mma_pmxvi16ger2s) -BU_MMA_6 (PMXVBF16GER2NN, "pmxvbf16ger2nn", QUAD, mma_pmxvbf16ger2nn) -BU_MMA_6 (PMXVBF16GER2NP, "pmxvbf16ger2np", QUAD, mma_pmxvbf16ger2np) -BU_MMA_6 (PMXVBF16GER2PN, "pmxvbf16ger2pn", QUAD, mma_pmxvbf16ger2pn) -BU_MMA_6 (PMXVBF16GER2PP, "pmxvbf16ger2pp", QUAD, mma_pmxvbf16ger2pp) -BU_MMA_6 (PMXVF16GER2NN, "pmxvf16ger2nn", QUAD, mma_pmxvf16ger2nn) -BU_MMA_6 (PMXVF16GER2NP, "pmxvf16ger2np", QUAD, mma_pmxvf16ger2np) -BU_MMA_6 (PMXVF16GER2PN, "pmxvf16ger2pn", QUAD, mma_pmxvf16ger2pn) -BU_MMA_6 (PMXVF16GER2PP, "pmxvf16ger2pp", QUAD, mma_pmxvf16ger2pp) -BU_MMA_6 (PMXVI4GER8PP, "pmxvi4ger8pp", QUAD, mma_pmxvi4ger8pp) -BU_MMA_6 (PMXVI8GER4PP, "pmxvi8ger4pp", QUAD, mma_pmxvi8ger4pp) -BU_MMA_6 (PMXVI8GER4SPP, "pmxvi8ger4spp", QUAD, mma_pmxvi8ger4spp) -BU_MMA_6 (PMXVI16GER2PP, "pmxvi16ger2pp", QUAD, mma_pmxvi16ger2pp) -BU_MMA_6 (PMXVI16GER2SPP, "pmxvi16ger2spp", QUAD, mma_pmxvi16ger2spp) diff --git a/gcc/config/rs6000/rs6000-call.c b/gcc/config/rs6000/rs6000-call.c index d0fe960..594d09e 100644 --- a/gcc/config/rs6000/rs6000-call.c +++ b/gcc/config/rs6000/rs6000-call.c @@ -89,20 +89,6 @@ #define TARGET_NO_PROTOTYPE 0 #endif -struct builtin_compatibility -{ - const enum rs6000_builtins code; - const char *const name; -}; - -struct builtin_description -{ - const HOST_WIDE_INT mask; - const enum insn_code icode; - const char *const name; - const enum rs6000_builtins code; -}; - /* Used by __builtin_cpu_is(), mapping from PLATFORM names to values. */ static const struct { @@ -184,127 +170,6 @@ static const struct static rtx rs6000_expand_new_builtin (tree, rtx, rtx, machine_mode, int); static bool rs6000_gimple_fold_new_builtin (gimple_stmt_iterator *gsi); - - -/* Hash table to keep track of the argument types for builtin functions. */ - -struct GTY((for_user)) builtin_hash_struct -{ - tree type; - machine_mode mode[4]; /* return value + 3 arguments. */ - unsigned char uns_p[4]; /* and whether the types are unsigned. */ -}; - -struct builtin_hasher : ggc_ptr_hash<builtin_hash_struct> -{ - static hashval_t hash (builtin_hash_struct *); - static bool equal (builtin_hash_struct *, builtin_hash_struct *); -}; - -static GTY (()) hash_table<builtin_hasher> *builtin_hash_table; - -/* Hash function for builtin functions with up to 3 arguments and a return - type. */ -hashval_t -builtin_hasher::hash (builtin_hash_struct *bh) -{ - unsigned ret = 0; - int i; - - for (i = 0; i < 4; i++) - { - ret = (ret * (unsigned)MAX_MACHINE_MODE) + ((unsigned)bh->mode[i]); - ret = (ret * 2) + bh->uns_p[i]; - } - - return ret; -} - -/* Compare builtin hash entries H1 and H2 for equivalence. */ -bool -builtin_hasher::equal (builtin_hash_struct *p1, builtin_hash_struct *p2) -{ - return ((p1->mode[0] == p2->mode[0]) - && (p1->mode[1] == p2->mode[1]) - && (p1->mode[2] == p2->mode[2]) - && (p1->mode[3] == p2->mode[3]) - && (p1->uns_p[0] == p2->uns_p[0]) - && (p1->uns_p[1] == p2->uns_p[1]) - && (p1->uns_p[2] == p2->uns_p[2]) - && (p1->uns_p[3] == p2->uns_p[3])); -} - - -/* Table that classifies rs6000 builtin functions (pure, const, etc.). */ -#undef RS6000_BUILTIN_0 -#undef RS6000_BUILTIN_1 -#undef RS6000_BUILTIN_2 -#undef RS6000_BUILTIN_3 -#undef RS6000_BUILTIN_4 -#undef RS6000_BUILTIN_A -#undef RS6000_BUILTIN_D -#undef RS6000_BUILTIN_H -#undef RS6000_BUILTIN_M -#undef RS6000_BUILTIN_P -#undef RS6000_BUILTIN_X - -#define RS6000_BUILTIN_0(ENUM, NAME, MASK, ATTR, ICODE) \ - { NAME, ICODE, MASK, ATTR }, - -#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE) \ - { NAME, ICODE, MASK, ATTR }, - -#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE) \ - { NAME, ICODE, MASK, ATTR }, - -#define RS6000_BUILTIN_3(ENUM, NAME, MASK, ATTR, ICODE) \ - { NAME, ICODE, MASK, ATTR }, - -#define RS6000_BUILTIN_4(ENUM, NAME, MASK, ATTR, ICODE) \ - { NAME, ICODE, MASK, ATTR }, - -#define RS6000_BUILTIN_A(ENUM, NAME, MASK, ATTR, ICODE) \ - { NAME, ICODE, MASK, ATTR }, - -#define RS6000_BUILTIN_D(ENUM, NAME, MASK, ATTR, ICODE) \ - { NAME, ICODE, MASK, ATTR }, - -#define RS6000_BUILTIN_H(ENUM, NAME, MASK, ATTR, ICODE) \ - { NAME, ICODE, MASK, ATTR }, - -#define RS6000_BUILTIN_M(ENUM, NAME, MASK, ATTR, ICODE) \ - { NAME, ICODE, MASK, ATTR }, - -#define RS6000_BUILTIN_P(ENUM, NAME, MASK, ATTR, ICODE) \ - { NAME, ICODE, MASK, ATTR }, - -#define RS6000_BUILTIN_X(ENUM, NAME, MASK, ATTR, ICODE) \ - { NAME, ICODE, MASK, ATTR }, - -struct rs6000_builtin_info_type { - const char *name; - const enum insn_code icode; - const HOST_WIDE_INT mask; - const unsigned attr; -}; - -static const struct rs6000_builtin_info_type rs6000_builtin_info[] = -{ -#include "rs6000-builtin.def" -}; - -#undef RS6000_BUILTIN_0 -#undef RS6000_BUILTIN_1 -#undef RS6000_BUILTIN_2 -#undef RS6000_BUILTIN_3 -#undef RS6000_BUILTIN_4 -#undef RS6000_BUILTIN_A -#undef RS6000_BUILTIN_D -#undef RS6000_BUILTIN_H -#undef RS6000_BUILTIN_M -#undef RS6000_BUILTIN_P -#undef RS6000_BUILTIN_X - /* Nonzero if we can use a floating-point register to pass this arg. */ #define USE_FP_FOR_ARG_P(CUM,MODE) \ @@ -3130,367 +2995,6 @@ const char *rs6000_type_string (tree type_node) return "unknown"; } -static const struct builtin_compatibility bdesc_compat[] = -{ -#define RS6000_BUILTIN_COMPAT -#include "rs6000-builtin.def" -}; -#undef RS6000_BUILTIN_COMPAT - -/* Simple ternary operations: VECd = foo (VECa, VECb, VECc). */ - -#undef RS6000_BUILTIN_0 -#undef RS6000_BUILTIN_1 -#undef RS6000_BUILTIN_2 -#undef RS6000_BUILTIN_3 -#undef RS6000_BUILTIN_4 -#undef RS6000_BUILTIN_A -#undef RS6000_BUILTIN_D -#undef RS6000_BUILTIN_H -#undef RS6000_BUILTIN_M -#undef RS6000_BUILTIN_P -#undef RS6000_BUILTIN_X - -#define RS6000_BUILTIN_0(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_3(ENUM, NAME, MASK, ATTR, ICODE) \ - { MASK, ICODE, NAME, ENUM }, - -#define RS6000_BUILTIN_4(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_A(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_D(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_H(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_M(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_P(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_X(ENUM, NAME, MASK, ATTR, ICODE) - -static const struct builtin_description bdesc_3arg[] = -{ -#include "rs6000-builtin.def" -}; - -/* Simple quaternary operations: VECd = foo (VECa, VECb, VECc, VECd). */ - -#undef RS6000_BUILTIN_0 -#undef RS6000_BUILTIN_1 -#undef RS6000_BUILTIN_2 -#undef RS6000_BUILTIN_3 -#undef RS6000_BUILTIN_4 -#undef RS6000_BUILTIN_A -#undef RS6000_BUILTIN_D -#undef RS6000_BUILTIN_H -#undef RS6000_BUILTIN_M -#undef RS6000_BUILTIN_P -#undef RS6000_BUILTIN_X - -#define RS6000_BUILTIN_0(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_3(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_4(ENUM, NAME, MASK, ATTR, ICODE) \ - { MASK, ICODE, NAME, ENUM }, - -#define RS6000_BUILTIN_A(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_D(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_H(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_M(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_P(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_X(ENUM, NAME, MASK, ATTR, ICODE) - -static const struct builtin_description bdesc_4arg[] = -{ -#include "rs6000-builtin.def" -}; - -/* DST operations: void foo (void *, const int, const char). */ - -#undef RS6000_BUILTIN_0 -#undef RS6000_BUILTIN_1 -#undef RS6000_BUILTIN_2 -#undef RS6000_BUILTIN_3 -#undef RS6000_BUILTIN_4 -#undef RS6000_BUILTIN_A -#undef RS6000_BUILTIN_D -#undef RS6000_BUILTIN_H -#undef RS6000_BUILTIN_M -#undef RS6000_BUILTIN_P -#undef RS6000_BUILTIN_X - -#define RS6000_BUILTIN_0(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_3(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_4(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_A(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_D(ENUM, NAME, MASK, ATTR, ICODE) \ - { MASK, ICODE, NAME, ENUM }, - -#define RS6000_BUILTIN_H(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_M(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_P(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_X(ENUM, NAME, MASK, ATTR, ICODE) - -static const struct builtin_description bdesc_dst[] = -{ -#include "rs6000-builtin.def" -}; - -/* Simple binary operations: VECc = foo (VECa, VECb). */ - -#undef RS6000_BUILTIN_0 -#undef RS6000_BUILTIN_1 -#undef RS6000_BUILTIN_2 -#undef RS6000_BUILTIN_3 -#undef RS6000_BUILTIN_4 -#undef RS6000_BUILTIN_A -#undef RS6000_BUILTIN_D -#undef RS6000_BUILTIN_H -#undef RS6000_BUILTIN_M -#undef RS6000_BUILTIN_P -#undef RS6000_BUILTIN_X - -#define RS6000_BUILTIN_0(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE) \ - { MASK, ICODE, NAME, ENUM }, - -#define RS6000_BUILTIN_3(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_4(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_A(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_D(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_H(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_M(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_P(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_X(ENUM, NAME, MASK, ATTR, ICODE) - -static const struct builtin_description bdesc_2arg[] = -{ -#include "rs6000-builtin.def" -}; - -#undef RS6000_BUILTIN_0 -#undef RS6000_BUILTIN_1 -#undef RS6000_BUILTIN_2 -#undef RS6000_BUILTIN_3 -#undef RS6000_BUILTIN_4 -#undef RS6000_BUILTIN_A -#undef RS6000_BUILTIN_D -#undef RS6000_BUILTIN_H -#undef RS6000_BUILTIN_M -#undef RS6000_BUILTIN_P -#undef RS6000_BUILTIN_X - -#define RS6000_BUILTIN_0(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_3(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_4(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_A(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_D(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_H(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_M(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_P(ENUM, NAME, MASK, ATTR, ICODE) \ - { MASK, ICODE, NAME, ENUM }, - -#define RS6000_BUILTIN_X(ENUM, NAME, MASK, ATTR, ICODE) - -/* AltiVec predicates. */ - -static const struct builtin_description bdesc_altivec_preds[] = -{ -#include "rs6000-builtin.def" -}; - -/* ABS* operations. */ - -#undef RS6000_BUILTIN_0 -#undef RS6000_BUILTIN_1 -#undef RS6000_BUILTIN_2 -#undef RS6000_BUILTIN_3 -#undef RS6000_BUILTIN_4 -#undef RS6000_BUILTIN_A -#undef RS6000_BUILTIN_D -#undef RS6000_BUILTIN_H -#undef RS6000_BUILTIN_M -#undef RS6000_BUILTIN_P -#undef RS6000_BUILTIN_X - -#define RS6000_BUILTIN_0(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_3(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_4(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_A(ENUM, NAME, MASK, ATTR, ICODE) \ - { MASK, ICODE, NAME, ENUM }, - -#define RS6000_BUILTIN_D(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_H(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_M(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_P(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_X(ENUM, NAME, MASK, ATTR, ICODE) - -static const struct builtin_description bdesc_abs[] = -{ -#include "rs6000-builtin.def" -}; - -/* Simple unary operations: VECb = foo (unsigned literal) or VECb = - foo (VECa). */ - -#undef RS6000_BUILTIN_0 -#undef RS6000_BUILTIN_1 -#undef RS6000_BUILTIN_2 -#undef RS6000_BUILTIN_3 -#undef RS6000_BUILTIN_4 -#undef RS6000_BUILTIN_A -#undef RS6000_BUILTIN_D -#undef RS6000_BUILTIN_H -#undef RS6000_BUILTIN_M -#undef RS6000_BUILTIN_P -#undef RS6000_BUILTIN_X - -#define RS6000_BUILTIN_0(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE) \ - { MASK, ICODE, NAME, ENUM }, - -#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_3(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_4(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_A(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_D(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_H(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_M(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_P(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_X(ENUM, NAME, MASK, ATTR, ICODE) - -static const struct builtin_description bdesc_1arg[] = -{ -#include "rs6000-builtin.def" -}; - -/* Simple no-argument operations: result = __builtin_darn_32 () */ - -#undef RS6000_BUILTIN_0 -#undef RS6000_BUILTIN_1 -#undef RS6000_BUILTIN_2 -#undef RS6000_BUILTIN_3 -#undef RS6000_BUILTIN_4 -#undef RS6000_BUILTIN_A -#undef RS6000_BUILTIN_D -#undef RS6000_BUILTIN_H -#undef RS6000_BUILTIN_M -#undef RS6000_BUILTIN_P -#undef RS6000_BUILTIN_X - -#define RS6000_BUILTIN_0(ENUM, NAME, MASK, ATTR, ICODE) \ - { MASK, ICODE, NAME, ENUM }, - -#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_3(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_4(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_A(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_D(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_H(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_M(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_P(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_X(ENUM, NAME, MASK, ATTR, ICODE) - -static const struct builtin_description bdesc_0arg[] = -{ -#include "rs6000-builtin.def" -}; - -/* HTM builtins. */ -#undef RS6000_BUILTIN_0 -#undef RS6000_BUILTIN_1 -#undef RS6000_BUILTIN_2 -#undef RS6000_BUILTIN_3 -#undef RS6000_BUILTIN_4 -#undef RS6000_BUILTIN_A -#undef RS6000_BUILTIN_D -#undef RS6000_BUILTIN_H -#undef RS6000_BUILTIN_M -#undef RS6000_BUILTIN_P -#undef RS6000_BUILTIN_X - -#define RS6000_BUILTIN_0(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_3(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_4(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_A(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_D(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_H(ENUM, NAME, MASK, ATTR, ICODE) \ - { MASK, ICODE, NAME, ENUM }, - -#define RS6000_BUILTIN_M(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_P(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_X(ENUM, NAME, MASK, ATTR, ICODE) - -static const struct builtin_description bdesc_htm[] = -{ -#include "rs6000-builtin.def" -}; - -/* MMA builtins. */ -#undef RS6000_BUILTIN_0 -#undef RS6000_BUILTIN_1 -#undef RS6000_BUILTIN_2 -#undef RS6000_BUILTIN_3 -#undef RS6000_BUILTIN_4 -#undef RS6000_BUILTIN_A -#undef RS6000_BUILTIN_D -#undef RS6000_BUILTIN_H -#undef RS6000_BUILTIN_M -#undef RS6000_BUILTIN_P -#undef RS6000_BUILTIN_X - -#define RS6000_BUILTIN_0(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_3(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_4(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_A(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_D(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_H(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_M(ENUM, NAME, MASK, ATTR, ICODE) \ - { MASK, ICODE, NAME, ENUM }, - -#define RS6000_BUILTIN_P(ENUM, NAME, MASK, ATTR, ICODE) -#define RS6000_BUILTIN_X(ENUM, NAME, MASK, ATTR, ICODE) - -static const struct builtin_description bdesc_mma[] = -{ -#include "rs6000-builtin.def" -}; - -#undef RS6000_BUILTIN_0 -#undef RS6000_BUILTIN_1 -#undef RS6000_BUILTIN_2 -#undef RS6000_BUILTIN_3 -#undef RS6000_BUILTIN_4 -#undef RS6000_BUILTIN_A -#undef RS6000_BUILTIN_D -#undef RS6000_BUILTIN_H -#undef RS6000_BUILTIN_M -#undef RS6000_BUILTIN_P -#undef RS6000_BUILTIN_X - -/* Return true if a builtin function is overloaded. */ -bool -rs6000_overloaded_builtin_p (enum rs6000_builtins fncode) -{ - return (rs6000_builtin_info[(int)fncode].attr & RS6000_BTC_OVERLOADED) != 0; -} - -const char * -rs6000_overloaded_builtin_name (enum rs6000_builtins fncode) -{ - return rs6000_builtin_info[(int)fncode].name; -} - static rtx altivec_expand_predicate_builtin (enum insn_code icode, tree exp, rtx target) { @@ -3611,24 +3115,6 @@ swap_endian_selector_for_mode (machine_mode mode) gen_rtvec_v (16, perm))); } -/* Return the appropriate SPR number associated with the given builtin. */ -static inline HOST_WIDE_INT -htm_spr_num (enum rs6000_builtins code) -{ - if (code == HTM_BUILTIN_GET_TFHAR - || code == HTM_BUILTIN_SET_TFHAR) - return TFHAR_SPR; - else if (code == HTM_BUILTIN_GET_TFIAR - || code == HTM_BUILTIN_SET_TFIAR) - return TFIAR_SPR; - else if (code == HTM_BUILTIN_GET_TEXASR - || code == HTM_BUILTIN_SET_TEXASR) - return TEXASR_SPR; - gcc_assert (code == HTM_BUILTIN_GET_TEXASRU - || code == HTM_BUILTIN_SET_TEXASRU); - return TEXASRU_SPR; -} - /* Return the correct ICODE value depending on whether we are setting or reading the HTM SPRs. */ static inline enum insn_code @@ -3768,18 +3254,6 @@ altivec_expand_vec_ext_builtin (tree exp, rtx target) return target; } -/* Check whether a builtin function is supported in this target - configuration. */ -bool -rs6000_builtin_is_supported_p (enum rs6000_builtins fncode) -{ - HOST_WIDE_INT fnmask = rs6000_builtin_info[fncode].mask; - if ((fnmask & rs6000_builtin_mask) != fnmask) - return false; - else - return true; -} - /* Raise an error message for a builtin function that is called without the appropriate target options being set. */ @@ -4005,190 +3479,6 @@ fold_mergeeo_helper (gimple_stmt_iterator *gsi, gimple *stmt, int use_odd) gsi_replace (gsi, g, true); } -/* Expand the MMA built-ins early, so that we can convert the pass-by-reference - __vector_quad arguments into pass-by-value arguments, leading to more - efficient code generation. */ - -bool -rs6000_gimple_fold_mma_builtin (gimple_stmt_iterator *gsi) -{ - gimple *stmt = gsi_stmt (*gsi); - tree fndecl = gimple_call_fndecl (stmt); - enum rs6000_builtins fncode - = (enum rs6000_builtins) DECL_MD_FUNCTION_CODE (fndecl); - unsigned attr = rs6000_builtin_info[fncode].attr; - - if ((attr & RS6000_BTC_GIMPLE) == 0) - return false; - - unsigned nopnds = (attr & RS6000_BTC_OPND_MASK); - gimple_seq new_seq = NULL; - gimple *new_call; - tree new_decl; - - if (fncode == MMA_BUILTIN_DISASSEMBLE_ACC - || fncode == VSX_BUILTIN_DISASSEMBLE_PAIR) - { - /* This is an MMA disassemble built-in function. */ - push_gimplify_context (true); - unsigned nvec = (fncode == MMA_BUILTIN_DISASSEMBLE_ACC) ? 4 : 2; - tree dst_ptr = gimple_call_arg (stmt, 0); - tree src_ptr = gimple_call_arg (stmt, 1); - tree src_type = TREE_TYPE (src_ptr); - tree src = create_tmp_reg_or_ssa_name (TREE_TYPE (src_type)); - gimplify_assign (src, build_simple_mem_ref (src_ptr), &new_seq); - - /* If we are not disassembling an accumulator/pair or our destination is - another accumulator/pair, then just copy the entire thing as is. */ - if ((fncode == MMA_BUILTIN_DISASSEMBLE_ACC - && TREE_TYPE (TREE_TYPE (dst_ptr)) == vector_quad_type_node) - || (fncode == VSX_BUILTIN_DISASSEMBLE_PAIR - && TREE_TYPE (TREE_TYPE (dst_ptr)) == vector_pair_type_node)) - { - tree dst = build_simple_mem_ref (build1 (VIEW_CONVERT_EXPR, - src_type, dst_ptr)); - gimplify_assign (dst, src, &new_seq); - pop_gimplify_context (NULL); - gsi_replace_with_seq (gsi, new_seq, true); - return true; - } - - /* If we're disassembling an accumulator into a different type, we need - to emit a xxmfacc instruction now, since we cannot do it later. */ - if (fncode == MMA_BUILTIN_DISASSEMBLE_ACC) - { - new_decl = rs6000_builtin_decls[MMA_BUILTIN_XXMFACC_INTERNAL]; - new_call = gimple_build_call (new_decl, 1, src); - src = create_tmp_reg_or_ssa_name (vector_quad_type_node); - gimple_call_set_lhs (new_call, src); - gimple_seq_add_stmt (&new_seq, new_call); - } - - /* Copy the accumulator/pair vector by vector. */ - new_decl = rs6000_builtin_decls[fncode + 1]; - tree dst_type = build_pointer_type_for_mode (unsigned_V16QI_type_node, - ptr_mode, true); - tree dst_base = build1 (VIEW_CONVERT_EXPR, dst_type, dst_ptr); - for (unsigned i = 0; i < nvec; i++) - { - unsigned index = WORDS_BIG_ENDIAN ? i : nvec - 1 - i; - tree dst = build2 (MEM_REF, unsigned_V16QI_type_node, dst_base, - build_int_cst (dst_type, index * 16)); - tree dstssa = create_tmp_reg_or_ssa_name (unsigned_V16QI_type_node); - new_call = gimple_build_call (new_decl, 2, src, - build_int_cstu (uint16_type_node, i)); - gimple_call_set_lhs (new_call, dstssa); - gimple_seq_add_stmt (&new_seq, new_call); - gimplify_assign (dst, dstssa, &new_seq); - } - pop_gimplify_context (NULL); - gsi_replace_with_seq (gsi, new_seq, true); - return true; - } - else if (fncode == VSX_BUILTIN_LXVP) - { - push_gimplify_context (true); - tree offset = gimple_call_arg (stmt, 0); - tree ptr = gimple_call_arg (stmt, 1); - tree lhs = gimple_call_lhs (stmt); - if (TREE_TYPE (TREE_TYPE (ptr)) != vector_pair_type_node) - ptr = build1 (VIEW_CONVERT_EXPR, - build_pointer_type (vector_pair_type_node), ptr); - tree mem = build_simple_mem_ref (build2 (POINTER_PLUS_EXPR, - TREE_TYPE (ptr), ptr, offset)); - gimplify_assign (lhs, mem, &new_seq); - pop_gimplify_context (NULL); - gsi_replace_with_seq (gsi, new_seq, true); - return true; - } - else if (fncode == VSX_BUILTIN_STXVP) - { - push_gimplify_context (true); - tree src = gimple_call_arg (stmt, 0); - tree offset = gimple_call_arg (stmt, 1); - tree ptr = gimple_call_arg (stmt, 2); - if (TREE_TYPE (TREE_TYPE (ptr)) != vector_pair_type_node) - ptr = build1 (VIEW_CONVERT_EXPR, - build_pointer_type (vector_pair_type_node), ptr); - tree mem = build_simple_mem_ref (build2 (POINTER_PLUS_EXPR, - TREE_TYPE (ptr), ptr, offset)); - gimplify_assign (mem, src, &new_seq); - pop_gimplify_context (NULL); - gsi_replace_with_seq (gsi, new_seq, true); - return true; - } - - /* Convert this built-in into an internal version that uses pass-by-value - arguments. The internal built-in follows immediately after this one. */ - new_decl = rs6000_builtin_decls[fncode + 1]; - tree lhs, op[MAX_MMA_OPERANDS]; - tree acc = gimple_call_arg (stmt, 0); - push_gimplify_context (true); - - if ((attr & RS6000_BTC_QUAD) != 0) - { - /* This built-in has a pass-by-reference accumulator input, so load it - into a temporary accumulator for use as a pass-by-value input. */ - op[0] = create_tmp_reg_or_ssa_name (vector_quad_type_node); - for (unsigned i = 1; i < nopnds; i++) - op[i] = gimple_call_arg (stmt, i); - gimplify_assign (op[0], build_simple_mem_ref (acc), &new_seq); - } - else - { - /* This built-in does not use its pass-by-reference accumulator argument - as an input argument, so remove it from the input list. */ - nopnds--; - for (unsigned i = 0; i < nopnds; i++) - op[i] = gimple_call_arg (stmt, i + 1); - } - - switch (nopnds) - { - case 0: - new_call = gimple_build_call (new_decl, 0); - break; - case 1: - new_call = gimple_build_call (new_decl, 1, op[0]); - break; - case 2: - new_call = gimple_build_call (new_decl, 2, op[0], op[1]); - break; - case 3: - new_call = gimple_build_call (new_decl, 3, op[0], op[1], op[2]); - break; - case 4: - new_call = gimple_build_call (new_decl, 4, op[0], op[1], op[2], op[3]); - break; - case 5: - new_call = gimple_build_call (new_decl, 5, op[0], op[1], op[2], op[3], - op[4]); - break; - case 6: - new_call = gimple_build_call (new_decl, 6, op[0], op[1], op[2], op[3], - op[4], op[5]); - break; - case 7: - new_call = gimple_build_call (new_decl, 7, op[0], op[1], op[2], op[3], - op[4], op[5], op[6]); - break; - default: - gcc_unreachable (); - } - - if (fncode == VSX_BUILTIN_BUILD_PAIR || fncode == VSX_BUILTIN_ASSEMBLE_PAIR) - lhs = create_tmp_reg_or_ssa_name (vector_pair_type_node); - else - lhs = create_tmp_reg_or_ssa_name (vector_quad_type_node); - gimple_call_set_lhs (new_call, lhs); - gimple_seq_add_stmt (&new_seq, new_call); - gimplify_assign (build_simple_mem_ref (acc), lhs, &new_seq); - pop_gimplify_context (NULL); - gsi_replace_with_seq (gsi, new_seq, true); - - return true; -} - /* Fold a machine-dependent built-in in GIMPLE. (For folding into a constant, use rs6000_fold_builtin.) */ @@ -7262,5 +6552,3 @@ rs6000_output_mi_thunk (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED, reload_completed = 0; epilogue_completed = 0; } - -#include "gt-rs6000-call.h" diff --git a/gcc/config/rs6000/rs6000-protos.h b/gcc/config/rs6000/rs6000-protos.h index 14f6b31..c01ae00 100644 --- a/gcc/config/rs6000/rs6000-protos.h +++ b/gcc/config/rs6000/rs6000-protos.h @@ -272,9 +272,6 @@ extern void rs6000_call_darwin (rtx, rtx, rtx, rtx); extern void rs6000_sibcall_darwin (rtx, rtx, rtx, rtx); extern void rs6000_aix_asm_output_dwarf_table_ref (char *); extern void get_ppc476_thunk_name (char name[32]); -extern bool rs6000_overloaded_builtin_p (enum rs6000_builtins); -extern bool rs6000_builtin_is_supported_p (enum rs6000_builtins); -extern const char *rs6000_overloaded_builtin_name (enum rs6000_builtins); extern int rs6000_store_data_bypass_p (rtx_insn *, rtx_insn *); extern HOST_WIDE_INT rs6000_builtin_mask_calculate (void); extern void rs6000_asm_output_dwarf_pcrel (FILE *file, int size, diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index 9fc1577..5c077cd 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -171,7 +171,6 @@ static int dbg_cost_ctrl; /* Built in types. */ tree rs6000_builtin_types[RS6000_BTI_MAX]; -tree rs6000_builtin_decls[RS6000_BUILTIN_COUNT]; /* Flag to say the TOC is initialized */ int toc_initialized, need_toc_init; @@ -2585,8 +2584,6 @@ rs6000_debug_reg_global (void) (int)rs6000_sched_restricted_insns_priority); fprintf (stderr, DEBUG_FMT_D, "Number of standard builtins", (int)END_BUILTINS); - fprintf (stderr, DEBUG_FMT_D, "Number of rs6000 builtins", - (int)RS6000_BUILTIN_COUNT); fprintf (stderr, DEBUG_FMT_D, "Enable float128 on VSX", (int)TARGET_FLOAT128_ENABLE_TYPE); diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h index b12ee8b..4d2f88d 100644 --- a/gcc/config/rs6000/rs6000.h +++ b/gcc/config/rs6000/rs6000.h @@ -2344,62 +2344,6 @@ extern int frame_pointer_needed; | RS6000_BTM_MMA \ | RS6000_BTM_P10) -/* Define builtin enum index. */ - -#undef RS6000_BUILTIN_0 -#undef RS6000_BUILTIN_1 -#undef RS6000_BUILTIN_2 -#undef RS6000_BUILTIN_3 -#undef RS6000_BUILTIN_4 -#undef RS6000_BUILTIN_A -#undef RS6000_BUILTIN_D -#undef RS6000_BUILTIN_H -#undef RS6000_BUILTIN_M -#undef RS6000_BUILTIN_P -#undef RS6000_BUILTIN_X - -#define RS6000_BUILTIN_0(ENUM, NAME, MASK, ATTR, ICODE) ENUM, -#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE) ENUM, -#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE) ENUM, -#define RS6000_BUILTIN_3(ENUM, NAME, MASK, ATTR, ICODE) ENUM, -#define RS6000_BUILTIN_4(ENUM, NAME, MASK, ATTR, ICODE) ENUM, -#define RS6000_BUILTIN_A(ENUM, NAME, MASK, ATTR, ICODE) ENUM, -#define RS6000_BUILTIN_D(ENUM, NAME, MASK, ATTR, ICODE) ENUM, -#define RS6000_BUILTIN_H(ENUM, NAME, MASK, ATTR, ICODE) ENUM, -#define RS6000_BUILTIN_M(ENUM, NAME, MASK, ATTR, ICODE) ENUM, -#define RS6000_BUILTIN_P(ENUM, NAME, MASK, ATTR, ICODE) ENUM, -#define RS6000_BUILTIN_X(ENUM, NAME, MASK, ATTR, ICODE) ENUM, - -enum rs6000_builtins -{ -#include "rs6000-builtin.def" - - RS6000_BUILTIN_COUNT -}; - -#undef RS6000_BUILTIN_0 -#undef RS6000_BUILTIN_1 -#undef RS6000_BUILTIN_2 -#undef RS6000_BUILTIN_3 -#undef RS6000_BUILTIN_4 -#undef RS6000_BUILTIN_A -#undef RS6000_BUILTIN_D -#undef RS6000_BUILTIN_H -#undef RS6000_BUILTIN_M -#undef RS6000_BUILTIN_P -#undef RS6000_BUILTIN_X - -/* Mappings for overloaded builtins. */ -struct altivec_builtin_types -{ - enum rs6000_builtins code; - enum rs6000_builtins overloaded_code; - signed char ret_type; - signed char op1; - signed char op2; - signed char op3; -}; - enum rs6000_builtin_type_index { RS6000_BTI_NOT_OPAQUE, @@ -2600,7 +2544,6 @@ enum rs6000_builtin_type_index #define ptr_long_long_unsigned_type_node (rs6000_builtin_types[RS6000_BTI_ptr_long_long_unsigned]) extern GTY(()) tree rs6000_builtin_types[RS6000_BTI_MAX]; -extern GTY(()) tree rs6000_builtin_decls[RS6000_BUILTIN_COUNT]; #ifndef USED_FOR_TARGET extern GTY(()) tree builtin_mode_to_type[MAX_MACHINE_MODE][2]; diff --git a/gcc/config/rs6000/t-rs6000 b/gcc/config/rs6000/t-rs6000 index 3d3143a..98ddd97 100644 --- a/gcc/config/rs6000/t-rs6000 +++ b/gcc/config/rs6000/t-rs6000 @@ -18,7 +18,6 @@ # along with GCC; see the file COPYING3. If not see # <http://www.gnu.org/licenses/>. -TM_H += $(srcdir)/config/rs6000/rs6000-builtin.def TM_H += $(srcdir)/config/rs6000/rs6000-cpus.def TM_H += $(srcdir)/config/rs6000/rs6000-modes.h PASSES_EXTRA += $(srcdir)/config/rs6000/rs6000-passes.def |