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-rw-r--r--gcc/ChangeLog21
-rw-r--r--gcc/config/i386/i386-modes.def13
-rw-r--r--gcc/config/i386/i386.c2
-rw-r--r--gcc/config/i386/i386.h2
-rw-r--r--gcc/config/i386/sco5.h2
-rw-r--r--gcc/config/ia64/ia64-modes.def18
-rw-r--r--gcc/config/ia64/ia64.c4
-rw-r--r--gcc/config/ia64/ia64.h4
-rw-r--r--gcc/config/m68k/m68k-modes.def2
-rw-r--r--gcc/config/m68k/m68k.h2
-rw-r--r--gcc/config/m68k/netbsd-elf.h4
-rw-r--r--gcc/doc/rtl.texi13
-rw-r--r--gcc/libgcc2.c8
-rw-r--r--gcc/libgcc2.h4
14 files changed, 59 insertions, 40 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 491b3bb..5d180c8 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,24 @@
+2004-07-27 Zack Weinberg <zack@codesourcery.com>
+
+ * libgcc2.c: Change all conditionals testing
+ LIBGCC2_LONG_DOUBLE_TYPE_SIZE == 96 to == 80.
+ * libgcc2.h: Likewise.
+ * config/i386/i386.c (ix86_init_mmx_sse_builtins): Set
+ TYPE_PRECISION of float80_type to 80.
+ * config/ia64/ia64.c (ia64_init_builtins): Set TYPE_PRECISION
+ of fpreg_type and float80_type to 80.
+ * config/i386/i386.h, config/ia64/ia64.h, config/m68k/m68k.h
+ * config/m68k/netbsd-elf.h:
+ Change LONG_DOUBLE_TYPE_SIZE and possibly LIBGCC2_LONG_DOUBLE_TYPE_SIZE
+ to evaluate to 80 whenever they would formerly have evaluated to 96.
+ * config/i386/sco5.h: Remove unnecessary redefinition of
+ LONG_DOUBLE_TYPE_SIZE.
+ * doc/rtl.texi: Clarify uses of XFmode and TFmode.
+ * config/i386/i386-modes.def: Use FRACTIONAL_FLOAT_MODE for
+ XFmode, with a bitsize of 80. Update commentary.
+ * config/ia64/ia64-modes.def: Likewise.
+ * config/m68k/m68k-modes.def: Likewise.
+
2004-07-27 Steven Bosscher <stevenb@suse.de>
* cfgexpand.c (tree_expand_cfg): Fix comment.
diff --git a/gcc/config/i386/i386-modes.def b/gcc/config/i386/i386-modes.def
index 3a7c3e6..ee36637 100644
--- a/gcc/config/i386/i386-modes.def
+++ b/gcc/config/i386/i386-modes.def
@@ -18,21 +18,20 @@ along with GCC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
-/* x86_64 ABI specifies both XF and TF modes.
+/* The x86_64 ABI specifies both XF and TF modes.
XFmode is __float80 is IEEE extended; TFmode is __float128
- is IEEE quad.
+ is IEEE quad. */
- IEEE extended is 128 bits wide, except in ILP32 mode, but we
- have to say it's 12 bytes so that the bitsize and wider_mode
- tables are correctly set up. We correct its size below. */
+FRACTIONAL_FLOAT_MODE (XF, 80, 12, ieee_extended_intel_96_format);
+FLOAT_MODE (TF, 16, ieee_quad_format);
-FLOAT_MODE (XF, 12, ieee_extended_intel_96_format);
+/* In ILP32 mode, XFmode has size 12 and alignment 4.
+ In LP64 mode, XFmode has size and alignment 16. */
ADJUST_FLOAT_FORMAT (XF, (TARGET_128BIT_LONG_DOUBLE
? &ieee_extended_intel_128_format
: &ieee_extended_intel_96_format));
ADJUST_BYTESIZE (XF, TARGET_128BIT_LONG_DOUBLE ? 16 : 12);
ADJUST_ALIGNMENT (XF, TARGET_128BIT_LONG_DOUBLE ? 16 : 4);
-FLOAT_MODE (TF, 16, ieee_quad_format);
/* Add any extra modes needed to represent the condition code.
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 797f7c3..5b37ea8 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -13401,7 +13401,7 @@ ix86_init_mmx_sse_builtins (void)
{
/* The __float80 type. */
float80_type = make_node (REAL_TYPE);
- TYPE_PRECISION (float80_type) = 96;
+ TYPE_PRECISION (float80_type) = 80;
layout_type (float80_type);
(*lang_hooks.types.register_builtin_type) (float80_type, "__float80");
}
diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h
index 40bf959..f998fdb 100644
--- a/gcc/config/i386/i386.h
+++ b/gcc/config/i386/i386.h
@@ -736,7 +736,7 @@ extern int x86_prefetch_sse;
/* target machine storage layout */
-#define LONG_DOUBLE_TYPE_SIZE 96
+#define LONG_DOUBLE_TYPE_SIZE 80
/* Set the value of FLT_EVAL_METHOD in float.h. When using only the
FPU, assume that the fpcw is set to extended precision; when using
diff --git a/gcc/config/i386/sco5.h b/gcc/config/i386/sco5.h
index bb872d5..7dbc9c7 100644
--- a/gcc/config/i386/sco5.h
+++ b/gcc/config/i386/sco5.h
@@ -96,13 +96,11 @@ Boston, MA 02111-1307, USA. */
#undef WCHAR_TYPE
#undef WCHAR_TYPE_SIZE
#undef WINT_TYPE
-#undef LONG_DOUBLE_TYPE_SIZE
#define SIZE_TYPE "unsigned int"
#define PTRDIFF_TYPE "int"
#define WCHAR_TYPE "long int"
#define WCHAR_TYPE_SIZE BITS_PER_WORD
#define WINT_TYPE "long int"
-#define LONG_DOUBLE_TYPE_SIZE 96
/*
* New for multilib support. Set the default switches for multilib,
diff --git a/gcc/config/ia64/ia64-modes.def b/gcc/config/ia64/ia64-modes.def
index 17688bd..1cb59ad 100644
--- a/gcc/config/ia64/ia64-modes.def
+++ b/gcc/config/ia64/ia64-modes.def
@@ -22,35 +22,35 @@ Boston, MA 02111-1307, USA. */
/* IA64 requires both XF and TF modes.
XFmode is __float80 is IEEE extended; TFmode is __float128
- is IEEE quad.
+ is IEEE quad. Both these modes occupy 16 bytes, but XFmode
+ only has 80 significant bits. */
- IEEE extended is 128 bits wide, except in ILP32 mode, but we
- have to say it's 12 bytes so that the bitsize and wider_mode
- tables are correctly set up. We correct its size below. */
-
-FLOAT_MODE (XF, 12, ieee_extended_intel_128_format);
+FRACTIONAL_FLOAT_MODE (XF, 80, 16, ieee_extended_intel_128_format);
FLOAT_MODE (TF, 16, ieee_quad_format);
/* The above produces:
mode ILP32 size/align LP64 size/align
- XF 12/4 12/4
+ XF 16/16 16/16
TF 16/16 16/16
psABI expectations:
mode ILP32 size/align LP64 size/align
- XF - 16/16
+ XF 12/4 -
TF - -
HPUX expectations:
mode ILP32 size/align LP64 size/align
- XF 16/16 16/16
+ XF - -
TF 16/8 -
We fix this up here. */
+ADJUST_FLOAT_FORMAT (XF, (TARGET_ILP32 && !TARGET_HPUX)
+ ? &ieee_extended_intel_96_format
+ : &ieee_extended_intel_128_format);
ADJUST_BYTESIZE (XF, (TARGET_ILP32 && !TARGET_HPUX) ? 12 : 16);
ADJUST_ALIGNMENT (XF, (TARGET_ILP32 && !TARGET_HPUX) ? 4 : 16);
diff --git a/gcc/config/ia64/ia64.c b/gcc/config/ia64/ia64.c
index d88b8e7d..2899c0f 100644
--- a/gcc/config/ia64/ia64.c
+++ b/gcc/config/ia64/ia64.c
@@ -8138,13 +8138,13 @@ ia64_init_builtins (void)
fpreg_type = make_node (REAL_TYPE);
/* ??? The back end should know to load/save __fpreg variables using
the ldf.fill and stf.spill instructions. */
- TYPE_PRECISION (fpreg_type) = 96;
+ TYPE_PRECISION (fpreg_type) = 80;
layout_type (fpreg_type);
(*lang_hooks.types.register_builtin_type) (fpreg_type, "__fpreg");
/* The __float80 type. */
float80_type = make_node (REAL_TYPE);
- TYPE_PRECISION (float80_type) = 96;
+ TYPE_PRECISION (float80_type) = 80;
layout_type (float80_type);
(*lang_hooks.types.register_builtin_type) (float80_type, "__float80");
diff --git a/gcc/config/ia64/ia64.h b/gcc/config/ia64/ia64.h
index 00d35ea..8bc4e3b 100644
--- a/gcc/config/ia64/ia64.h
+++ b/gcc/config/ia64/ia64.h
@@ -448,10 +448,10 @@ while (0)
#define DOUBLE_TYPE_SIZE 64
/* long double is XFmode normally, TFmode for HPUX. */
-#define LONG_DOUBLE_TYPE_SIZE (TARGET_HPUX ? 128 : 96)
+#define LONG_DOUBLE_TYPE_SIZE (TARGET_HPUX ? 128 : 80)
/* We always want the XFmode operations from libgcc2.c. */
-#define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 96
+#define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 80
#define DEFAULT_SIGNED_CHAR 1
diff --git a/gcc/config/m68k/m68k-modes.def b/gcc/config/m68k/m68k-modes.def
index b0ee620..51919b3 100644
--- a/gcc/config/m68k/m68k-modes.def
+++ b/gcc/config/m68k/m68k-modes.def
@@ -19,4 +19,4 @@ the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
/* 80-bit floating point (IEEE extended, in a 96-bit field) */
-FLOAT_MODE (XF, 12, ieee_extended_motorola_format);
+FRACTIONAL_FLOAT_MODE (XF, 80, 12, ieee_extended_motorola_format);
diff --git a/gcc/config/m68k/m68k.h b/gcc/config/m68k/m68k.h
index 62f839a..14a8b9b 100644
--- a/gcc/config/m68k/m68k.h
+++ b/gcc/config/m68k/m68k.h
@@ -354,7 +354,7 @@ extern int target_flags;
/* target machine storage layout */
-#define LONG_DOUBLE_TYPE_SIZE 96
+#define LONG_DOUBLE_TYPE_SIZE 80
/* Set the value of FLT_EVAL_METHOD in float.h. When using 68040 fp
instructions, we get proper intermediate rounding, otherwise we
diff --git a/gcc/config/m68k/netbsd-elf.h b/gcc/config/m68k/netbsd-elf.h
index ecb1469..97eb89c 100644
--- a/gcc/config/m68k/netbsd-elf.h
+++ b/gcc/config/m68k/netbsd-elf.h
@@ -43,12 +43,12 @@ Boston, MA 02111-1307, USA. */
#undef LONG_DOUBLE_TYPE_SIZE
#define LONG_DOUBLE_TYPE_SIZE \
((TARGET_68020 || TARGET_68040 || TARGET_68040_ONLY || \
- TARGET_68060) ? 96 : 64)
+ TARGET_68060) ? 80 : 64)
#ifdef __mc68010__
#define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 64
#else
-#define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 96
+#define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 80
#endif
#define EXTRA_SPECS \
diff --git a/gcc/doc/rtl.texi b/gcc/doc/rtl.texi
index 422f6d6..210e182 100644
--- a/gcc/doc/rtl.texi
+++ b/gcc/doc/rtl.texi
@@ -1100,15 +1100,16 @@ this is a double-precision IEEE floating point number.
@findex XFmode
@item XFmode
-``Extended Floating'' mode represents a twelve byte floating point
-number. This mode is used for IEEE extended floating point. On some
-systems not all bits within these bytes will actually be used.
+``Extended Floating'' mode represents an IEEE extended floating point
+number. This mode only has 80 meaningful bits (ten bytes). Some
+processors require such numbers to be padded to twelve bytes, others
+to sixteen; this mode is used for either.
@findex TFmode
@item TFmode
-``Tetra Floating'' mode represents a sixteen byte floating point number.
-This gets used for both the 96-bit extended IEEE floating-point types
-padded to 128 bits, and true 128-bit extended IEEE floating-point types.
+``Tetra Floating'' mode represents a sixteen byte floating point number
+all 128 of whose bits are meaningful. One common use is the
+IEEE quad-precision format.
@findex CCmode
@item CCmode
diff --git a/gcc/libgcc2.c b/gcc/libgcc2.c
index 8a3529b..2da20e3 100644
--- a/gcc/libgcc2.c
+++ b/gcc/libgcc2.c
@@ -1137,7 +1137,7 @@ __fixtfdi (TFtype a)
}
#endif
-#if defined(L_fixunsxfdi) && (LIBGCC2_LONG_DOUBLE_TYPE_SIZE == 96)
+#if defined(L_fixunsxfdi) && (LIBGCC2_LONG_DOUBLE_TYPE_SIZE == 80)
#define WORD_SIZE (sizeof (Wtype) * BITS_PER_UNIT)
#define HIGH_WORD_COEFF (((UDWtype) 1) << WORD_SIZE)
@@ -1166,7 +1166,7 @@ __fixunsxfDI (XFtype a)
}
#endif
-#if defined(L_fixxfdi) && (LIBGCC2_LONG_DOUBLE_TYPE_SIZE == 96)
+#if defined(L_fixxfdi) && (LIBGCC2_LONG_DOUBLE_TYPE_SIZE == 80)
DWtype
__fixxfdi (XFtype a)
{
@@ -1245,7 +1245,7 @@ __fixsfdi (SFtype a)
}
#endif
-#if defined(L_floatdixf) && (LIBGCC2_LONG_DOUBLE_TYPE_SIZE == 96)
+#if defined(L_floatdixf) && (LIBGCC2_LONG_DOUBLE_TYPE_SIZE == 80)
#define WORD_SIZE (sizeof (Wtype) * BITS_PER_UNIT)
#define HIGH_HALFWORD_COEFF (((UDWtype) 1) << (WORD_SIZE / 2))
#define HIGH_WORD_COEFF (((UDWtype) 1) << WORD_SIZE)
@@ -1340,7 +1340,7 @@ __floatdisf (DWtype u)
}
#endif
-#if defined(L_fixunsxfsi) && LIBGCC2_LONG_DOUBLE_TYPE_SIZE == 96
+#if defined(L_fixunsxfsi) && LIBGCC2_LONG_DOUBLE_TYPE_SIZE == 80
/* Reenable the normal types, in case limits.h needs them. */
#undef char
#undef short
diff --git a/gcc/libgcc2.h b/gcc/libgcc2.h
index 0bd6d2e..9ca0b50 100644
--- a/gcc/libgcc2.h
+++ b/gcc/libgcc2.h
@@ -89,7 +89,7 @@ typedef unsigned int UTItype __attribute__ ((mode (TI)));
typedef float SFtype __attribute__ ((mode (SF)));
typedef float DFtype __attribute__ ((mode (DF)));
-#if LIBGCC2_LONG_DOUBLE_TYPE_SIZE == 96
+#if LIBGCC2_LONG_DOUBLE_TYPE_SIZE == 80
typedef float XFtype __attribute__ ((mode (XF)));
#endif
#if LIBGCC2_LONG_DOUBLE_TYPE_SIZE == 128
@@ -272,7 +272,7 @@ extern UWtype __fixunssfSI (SFtype);
extern DWtype __fixunsdfDI (DFtype);
extern DWtype __fixunssfDI (SFtype);
-#if LIBGCC2_LONG_DOUBLE_TYPE_SIZE == 96
+#if LIBGCC2_LONG_DOUBLE_TYPE_SIZE == 80
extern DWtype __fixxfdi (XFtype);
extern DWtype __fixunsxfDI (XFtype);
extern XFtype __floatdixf (DWtype);
generated by cgit v1.1 at 2024-11-04 18:38:16 +0000