diff options
| -rw-r--r-- | gcc/ChangeLog | 10 | ||||
| -rw-r--r-- | gcc/config/arm/iterators.md | 5 | ||||
| -rw-r--r-- | gcc/config/arm/neon.md | 45 | ||||
| -rw-r--r-- | gcc/config/arm/unspecs.md | 2 |
4 files changed, 62 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 7f43a76..b4e8618 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,15 @@ 2015-12-16 Matthew Wahab <matthew.wahab@arm.com> + * config/arm/iterators.md (VQRDMLH_AS): New. + (neon_rdma_as): New. + * config/arm/neon.md + (neon_vqrdml<VQRDMLH_AS:neon_rdma_as>h<mode>): New. + (neon_vqrdml<VQRDMLH_AS:neon_rdma_as>h_lane<mode>): New. + * config/arm/unspecs.md (UNSPEC_VQRDMLAH): New. + (UNSPEC_VQRDMLSH): New. + +2015-12-16 Matthew Wahab <matthew.wahab@arm.com> + * config/arm/t-aprofile: Make "armv8.1-a" and "armv8.1-a+crc" matches for "armv8-a". diff --git a/gcc/config/arm/iterators.md b/gcc/config/arm/iterators.md index 6a54125..c7a6880 100644 --- a/gcc/config/arm/iterators.md +++ b/gcc/config/arm/iterators.md @@ -362,6 +362,8 @@ (define_int_iterator CRYPTO_SELECTING [UNSPEC_SHA1C UNSPEC_SHA1M UNSPEC_SHA1P]) +(define_int_iterator VQRDMLH_AS [UNSPEC_VQRDMLAH UNSPEC_VQRDMLSH]) + ;;---------------------------------------------------------------------------- ;; Mode attributes ;;---------------------------------------------------------------------------- @@ -831,3 +833,6 @@ (simple_return " && use_simple_return_p ()")]) (define_code_attr return_cond_true [(return " && USE_RETURN_INSN (TRUE)") (simple_return " && use_simple_return_p ()")]) + +;; Attributes for VQRDMLAH/VQRDMLSH +(define_int_attr neon_rdma_as [(UNSPEC_VQRDMLAH "a") (UNSPEC_VQRDMLSH "s")]) diff --git a/gcc/config/arm/neon.md b/gcc/config/arm/neon.md index 62fb6da..844ef5e 100644 --- a/gcc/config/arm/neon.md +++ b/gcc/config/arm/neon.md @@ -2014,6 +2014,18 @@ [(set_attr "type" "neon_sat_mul_<V_elem_ch><q>")] ) +;; vqrdmlah, vqrdmlsh +(define_insn "neon_vqrdml<VQRDMLH_AS:neon_rdma_as>h<mode>" + [(set (match_operand:VMDQI 0 "s_register_operand" "=w") + (unspec:VMDQI [(match_operand:VMDQI 1 "s_register_operand" "0") + (match_operand:VMDQI 2 "s_register_operand" "w") + (match_operand:VMDQI 3 "s_register_operand" "w")] + VQRDMLH_AS))] + "TARGET_NEON_RDMA" + "vqrdml<VQRDMLH_AS:neon_rdma_as>h.<V_s_elem>\t%<V_reg>0, %<V_reg>2, %<V_reg>3" + [(set_attr "type" "neon_sat_mla_<V_elem_ch>_long")] +) + (define_insn "neon_vqdmlal<mode>" [(set (match_operand:<V_widen> 0 "s_register_operand" "=w") (unspec:<V_widen> [(match_operand:<V_widen> 1 "s_register_operand" "0") @@ -3176,6 +3188,39 @@ if (BYTES_BIG_ENDIAN) [(set_attr "type" "neon_sat_mul_<V_elem_ch>_scalar_q")] ) +;; vqrdmlah_lane, vqrdmlsh_lane +(define_insn "neon_vqrdml<VQRDMLH_AS:neon_rdma_as>h_lane<mode>" + [(set (match_operand:VMQI 0 "s_register_operand" "=w") + (unspec:VMQI [(match_operand:VMQI 1 "s_register_operand" "0") + (match_operand:VMQI 2 "s_register_operand" "w") + (match_operand:<V_HALF> 3 "s_register_operand" + "<scalar_mul_constraint>") + (match_operand:SI 4 "immediate_operand" "i")] + VQRDMLH_AS))] + "TARGET_NEON_RDMA" +{ + return + "vqrdml<VQRDMLH_AS:neon_rdma_as>h.<V_s_elem>\t%q0, %q2, %P3[%c4]"; +} + [(set_attr "type" "neon_mla_<V_elem_ch>_scalar<q>")] +) + +(define_insn "neon_vqrdml<VQRDMLH_AS:neon_rdma_as>h_lane<mode>" + [(set (match_operand:VMDI 0 "s_register_operand" "=w") + (unspec:VMDI [(match_operand:VMDI 1 "s_register_operand" "0") + (match_operand:VMDI 2 "s_register_operand" "w") + (match_operand:VMDI 3 "s_register_operand" + "<scalar_mul_constraint>") + (match_operand:SI 4 "immediate_operand" "i")] + VQRDMLH_AS))] + "TARGET_NEON_RDMA" +{ + return + "vqrdml<VQRDMLH_AS:neon_rdma_as>h.<V_s_elem>\t%P0, %P2, %P3[%c4]"; +} + [(set_attr "type" "neon_mla_<V_elem_ch>_scalar")] +) + (define_insn "neon_vmla_lane<mode>" [(set (match_operand:VMD 0 "s_register_operand" "=w") (unspec:VMD [(match_operand:VMD 1 "s_register_operand" "0") diff --git a/gcc/config/arm/unspecs.md b/gcc/config/arm/unspecs.md index 67acafd..ffe703c 100644 --- a/gcc/config/arm/unspecs.md +++ b/gcc/config/arm/unspecs.md @@ -360,5 +360,7 @@ UNSPEC_NVRINTX UNSPEC_NVRINTA UNSPEC_NVRINTN + UNSPEC_VQRDMLAH + UNSPEC_VQRDMLSH ]) |