diff options
| -rw-r--r-- | gcc/config/i386/i386-expand.cc | 37 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/i386/pr107322.c | 33 |
2 files changed, 70 insertions, 0 deletions
diff --git a/gcc/config/i386/i386-expand.cc b/gcc/config/i386/i386-expand.cc index 0e8ba14..5d9e5a1 100644 --- a/gcc/config/i386/i386-expand.cc +++ b/gcc/config/i386/i386-expand.cc @@ -2626,6 +2626,35 @@ ix86_prepare_fp_compare_args (enum rtx_code code, rtx *pop0, rtx *pop1) machine_mode op_mode = GET_MODE (op0); bool is_sse = SSE_FLOAT_MODE_SSEMATH_OR_HF_P (op_mode); + if (op_mode == BFmode) + { + rtx op = gen_lowpart (HImode, op0); + if (CONST_INT_P (op)) + op = simplify_const_unary_operation (FLOAT_EXTEND, SFmode, + op0, BFmode); + else + { + rtx t1 = gen_reg_rtx (SImode); + emit_insn (gen_zero_extendhisi2 (t1, op)); + emit_insn (gen_ashlsi3 (t1, t1, GEN_INT (16))); + op = gen_lowpart (SFmode, t1); + } + *pop0 = op; + op = gen_lowpart (HImode, op1); + if (CONST_INT_P (op)) + op = simplify_const_unary_operation (FLOAT_EXTEND, SFmode, + op1, BFmode); + else + { + rtx t1 = gen_reg_rtx (SImode); + emit_insn (gen_zero_extendhisi2 (t1, op)); + emit_insn (gen_ashlsi3 (t1, t1, GEN_INT (16))); + op = gen_lowpart (SFmode, t1); + } + *pop1 = op; + return ix86_prepare_fp_compare_args (code, pop0, pop1); + } + /* All of the unordered compare instructions only work on registers. The same is true of the fcomi compare instructions. The XFmode compare instructions require registers except when comparing @@ -3164,6 +3193,10 @@ ix86_expand_int_movcc (rtx operands[]) && !TARGET_64BIT)) return false; + if (GET_MODE (op0) == BFmode + && !ix86_fp_comparison_operator (operands[1], VOIDmode)) + return false; + start_sequence (); compare_op = ix86_expand_compare (code, op0, op1); compare_seq = get_insns (); @@ -4238,6 +4271,10 @@ ix86_expand_fp_movcc (rtx operands[]) rtx op0 = XEXP (operands[1], 0); rtx op1 = XEXP (operands[1], 1); + if (GET_MODE (op0) == BFmode + && !ix86_fp_comparison_operator (operands[1], VOIDmode)) + return false; + if (SSE_FLOAT_MODE_SSEMATH_OR_HF_P (mode)) { machine_mode cmode; diff --git a/gcc/testsuite/gcc.target/i386/pr107322.c b/gcc/testsuite/gcc.target/i386/pr107322.c new file mode 100644 index 0000000..d3d11fe --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr107322.c @@ -0,0 +1,33 @@ +/* PR target/107322 */ +/* { dg-do compile } */ +/* { dg-options "-fexcess-precision=16 -O -msse2 -mfpmath=sse" } */ + +int i, j; +float k, l; +__bf16 f; + +void +foo (void) +{ + i *= 0 >= f; +} + +void +bar (void) +{ + i *= 0 <= f; +} + +void +baz (int x, int y) +{ + i = 0 >= f ? x : y; + j = 0 <= f ? x + 2 : y + 3; +} + +void +qux (float x, float y) +{ + k = 0 >= f ? x : y; + l = 0 <= f ? x + 2 : y + 3; +} |