diff options
43 files changed, 240 insertions, 413 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index a403733..7c27ea1 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,112 @@ +2005-05-26 Richard Sandiford <rsandifo@redhat.com> + + * opt-functions.awk (var_type): New function. + (var_set): Use CLVC_STRING if var_type returns "const char *". + * opth-gen.awk: Use var_type to find out the types of variables. + Don't print comments above each "extern" definition. + * optc-gen.awk: Use var_type in the same way. + * opts.h (cl_var_cond): Rename to... + (cl_var_type): ...this. Add CLVC_STRING. + (cl_option): Make "flag_var" a "void *" pointer. Replace "var_cond" + with "var_type". + * opts.c (handle_option, option_enabled): Update after above name + change. Cast flag_var before using it. Handle CLVC_STRING. + + * config/alpha/alpha.h (alpha_tls_size): Delete. + * config/alpha/alpha.c (alpha_tls_size, alpha_cpu_string) + (alpha_tune_string, alpha_tp_string, alpha_fprm_string) + (alpha_fptm_string, alpha_mlat_string): Delete. + (alpha_handle_option): Don't set the above variables here. Use the + integer argument to check the validity of -mtls-size=. + * config/alpha/alpha.opt (mcpu=, mtune=, mfp-rounding-mode=) + (mfp-trap-mode=, mtrap-precision=, mmemory-latency=): Add Var()s. + (mtls-size=): Likewise. Convert to a UInteger and initialize the + variable to 32. + + * config/arc/arc.c (arc_cpu_string, arc_text_string) + (arc_data_string, arc_rodata_string): Delete. + (arc_handle_option): Don't set the above variables here. + * config/arc/arc.opt (mcpu=, mtext=, mdata=, mrodata=): Add Var()s + and initialize them. + + * config/arm/arm.c (target_fpu_name, target_fpe_name) + (target_float_abi_name, target_abi_name, structure_size_string) + (arm_pic_register_string): Delete. + (arm_handle_option): Don't set the above variables here, except + in the handling of -mhard-float and -msoft-float. + * config/arm/arm.opt (mabi=, mfloat-abi=, mfp=, mfpe=, mfpu=) + (mpic-register=, mstructure-size-boundary=): Add Var()s. + + * config/avr/avr.c (avr_init_stack, avr_mcu_name, TARGET_HANDLE_OPTION) + (avr_handle_option): Delete. + * config/avr/avr.opt (mmcu=, minit-stack=): Add Var()s and initialize + them. + + * config/bfin/bfin.c (bfin_library_id): Delete. + (bfin_handle_option): Don't set it. + * config/bfin/bfin.opt (mshared-library-id=): Add Var(). + + * config/c4x/c4x.h (c4x_rpts_cycles): Delete. + * config/c4x/c4x.c (c4x_rpts_cycles): Delete. + (c4x_handle_option): Don't set c4x_rpts_cycles here. + * config/c4x/c4x.opt (mrpts=): Add Var(). + + * config/cris/aout.h (CRIS_SUBTARGET_HANDLE_OPTION): Don't set + cris_elinux_stacksize_str here. + * config/cris/aout.opt (melinux-stacksize=): Add Var(). + * config/cris/cris.h (cris_max_stackframe_str, cris_cpu_str) + (cris_tune_str, cris_elinux_stacksize_str): Delete. + * config/cris/cris.c (cris_max_stackframe_str, cris_cpu_str) + (cris_tune_str, cris_elinux_stacksize_str): Delete. + (cris_handle_option): Don't set the above variables here. + * config/cris/cris.opt (mcpu=, march=, mtune=, mmax-stackframe=) + (max-stackframe=): Add Var()s. + + * config/i386/i386.h (ix86_tune_string, ix86_arch_string): Delete. + * config/i386/i386.c (ix86_cmodel_string, ix86_asm_string) + (ix86_tls_dialect_string, ix86_tune_string, ix86_arch_string) + (ix86_fpmath_string, ix86_regparm_string, ix86_align_loops_string) + (ix86_align_jumps_string, ix86_preferred_stack_boundary_string) + (ix86_branch_cost_string, ix86_align_funcs_string): Delete. + (ix86_handle_option): Don't set the above variables here. + * config/i386/i386.opt (malign-functions=, malign-jumps=) + (malign-loops=, march=, masm=, mbranch-cost=, mcmodel=, mfpmath=) + (mpreferred-stack-boundary=, mregparm=, mtls-dialect=, mtune=): Add + Var()s. + + * config/ia64/ia64.h (ia64_tls_size): Delete. + * config/ia64/ia64.c (ia64_tls_size): Delete. + (ia64_handle_option): Treat -mtls-size= as a UInteger option, + reading the integer argument from the "value" parameter. Don't + set ia64_tls_size here. + * config/ia64/ia64.opt (mtls-size=): Turn into a UInteger option. + Add Var() and Init(). + + * config/m32r/m32r.h (m32r_cache_flush_func): Delete. + (m32r_cache_flush_trap): Delete. + * config/m32r/m32r.c (m32r_cache_flush_func): Delete. + (m32r_cache_flush_trap): Delete. + (m32r_handle_option): Don't set the above variables when handling + -mflush-func= and -mflush-trap=. + * config/m32r/m32r.opt (-mflush-func=, -mflush-trap=): Add Var()s + and Init()s. + + * config/mips/mips.h (mips_cache_flush_func): Delete. + * config/mips/mips.c (mips_arch_string, mips_tune_string) + (mips_cache_flush_func): Delete. + (mips_handle_option): Don't set the above variables when handling + -march=, -mtune= and -mflush-func=. + * config/mips/mips.opt (march=, mflush-func=, mtune=): Add Var()s. + + * config/s390/s390.c (s390_arch_string): Delete. + (s390_handle_option): Don't set it here. + * config/s390/s390.opt (march=): Add Var(). + + * config/sparc/sparc.h (sparc_cmodel_string): Delete. + * config/sparc/sparc.c (sparc_cmodel_string): Delete. + (sparc_handle_option): Don't set it here. + * config/sparc/sparc.opt (mcmodel=): Add Var(). + 2005-05-25 Roger Sayle <roger@eyesopen.com> * convert.c (convert_to_integer) <POINTER_TYPE>: Avoid recursive diff --git a/gcc/config/alpha/alpha.c b/gcc/config/alpha/alpha.c index 56e08c5..b02175e 100644 --- a/gcc/config/alpha/alpha.c +++ b/gcc/config/alpha/alpha.c @@ -79,19 +79,6 @@ enum alpha_fp_rounding_mode alpha_fprm; enum alpha_fp_trap_mode alpha_fptm; -/* Specify bit size of immediate TLS offsets. */ - -int alpha_tls_size = 32; - -/* Strings decoded into the above options. */ - -static const char *alpha_cpu_string; /* -mcpu= */ -static const char *alpha_tune_string; /* -mtune= */ -static const char *alpha_tp_string; /* -mtrap-precision=[p|s|i] */ -static const char *alpha_fprm_string; /* -mfp-rounding-mode=[n|m|c|d] */ -static const char *alpha_fptm_string; /* -mfp-trap-mode=[n|u|su|sui] */ -static const char *alpha_mlat_string; /* -mmemory-latency= */ - /* Save information from a "cmpxx" operation until the branch or scc is emitted. */ @@ -239,38 +226,8 @@ alpha_handle_option (size_t code, const char *arg, int value) target_flags |= MASK_IEEE_CONFORMANT; break; - case OPT_mcpu_: - alpha_cpu_string = arg; - break; - - case OPT_mtune_: - alpha_tune_string = arg; - break; - - case OPT_mfp_rounding_mode_: - alpha_fprm_string = arg; - break; - - case OPT_mfp_trap_mode_: - alpha_fptm_string = arg; - break; - - case OPT_mtrap_precision_: - alpha_tp_string = arg; - break; - - case OPT_mmemory_latency_: - alpha_mlat_string = arg; - break; - case OPT_mtls_size_: - if (strcmp (arg, "16") == 0) - alpha_tls_size = 16; - else if (strcmp (arg, "32") == 0) - alpha_tls_size = 32; - else if (strcmp (arg, "64") == 0) - alpha_tls_size = 64; - else + if (value != 16 && value != 32 && value != 64) error ("bad value %qs for -mtls-size switch", arg); break; } diff --git a/gcc/config/alpha/alpha.h b/gcc/config/alpha/alpha.h index 8d29745..6850822 100644 --- a/gcc/config/alpha/alpha.h +++ b/gcc/config/alpha/alpha.h @@ -152,7 +152,6 @@ extern int target_flags; extern enum alpha_trap_precision alpha_tp; extern enum alpha_fp_rounding_mode alpha_fprm; extern enum alpha_fp_trap_mode alpha_fptm; -extern int alpha_tls_size; /* Invert the easy way to make options work. */ #define TARGET_FP (!TARGET_SOFT_FP) diff --git a/gcc/config/alpha/alpha.opt b/gcc/config/alpha/alpha.opt index 0c6ca3c..d3bc904 100644 --- a/gcc/config/alpha/alpha.opt +++ b/gcc/config/alpha/alpha.opt @@ -107,29 +107,29 @@ Target Report RejectNegative InverseMask(LONG_DOUBLE_128) Use 64-bit long double mcpu= -Target RejectNegative Joined +Target RejectNegative Joined Var(alpha_cpu_string) Use features of and schedule given CPU mtune= -Target RejectNegative Joined +Target RejectNegative Joined Var(alpha_tune_string) Schedule given CPU mfp-rounding-mode= -Target RejectNegative Joined +Target RejectNegative Joined Var(alpha_fprm_string) Control the generated fp rounding mode mfp-trap-mode= -Target RejectNegative Joined +Target RejectNegative Joined Var(alpha_fptm_string) Control the IEEE trap mode mtrap-precision= -Target RejectNegative Joined +Target RejectNegative Joined Var(alpha_tp_string) Control the precision given to fp exceptions mmemory-latency= -Target RejectNegative Joined +Target RejectNegative Joined Var(alpha_mlat_string) Tune expected memory latency mtls-size= -Target RejectNegative Joined +Target RejectNegative Joined UInteger Var(alpha_tls_size) Init(32) Specify bit size of immediate TLS offsets diff --git a/gcc/config/arc/arc.c b/gcc/config/arc/arc.c index 2161817..1a70245 100644 --- a/gcc/config/arc/arc.c +++ b/gcc/config/arc/arc.c @@ -45,7 +45,6 @@ Boston, MA 02111-1307, USA. */ #include "target-def.h" /* Which cpu we're compiling for. */ -static const char *arc_cpu_string = "base"; int arc_cpu_type; /* Name of mangle string to add to symbols to separate code compiled for each @@ -56,12 +55,6 @@ const char *arc_mangle_cpu; generate a scc or bcc insn. */ rtx arc_compare_op0, arc_compare_op1; -/* Name of text, data, and rodata sections, as specified on command line. - Selected by -m{text,data,rodata} flags. */ -static const char *arc_text_string = ARC_DEFAULT_TEXT_SECTION; -static const char *arc_data_string = ARC_DEFAULT_DATA_SECTION; -static const char *arc_rodata_string = ARC_DEFAULT_RODATA_SECTION; - /* Name of text, data, and rodata sections used in varasm.c. */ const char *arc_text_section; const char *arc_data_section; @@ -163,24 +156,7 @@ arc_handle_option (size_t code, const char *arg, int value ATTRIBUTE_UNUSED) switch (code) { case OPT_mcpu_: - if (strcmp (arg, "base") == 0 || ARC_EXTENSION_CPU (arg)) - { - arc_cpu_string = arg; - return true; - } - return false; - - case OPT_mtext_: - arc_text_string = arg; - return true; - - case OPT_mdata_: - arc_data_string = arg; - return true; - - case OPT_mrodata_: - arc_rodata_string = arg; - return true; + return strcmp (arg, "base") == 0 || ARC_EXTENSION_CPU (arg); default: return true; diff --git a/gcc/config/arc/arc.opt b/gcc/config/arc/arc.opt index ffb6b01..919550a 100644 --- a/gcc/config/arc/arc.opt +++ b/gcc/config/arc/arc.opt @@ -39,17 +39,17 @@ mno-cond-exec Target Undocumented Report RejectNegative Mask(NO_COND_EXEC) mcpu= -Target RejectNegative Joined +Target RejectNegative Joined Var(arc_cpu_string) Init("base") -mcpu=CPU Compile code for ARC variant CPU mtext= -Target RejectNegative Joined +Target RejectNegative Joined Var(arc_text_string) Init(ARC_DEFAULT_TEXT_SECTION) -mtext=SECTION Put functions in SECTION mdata= -Target RejectNegative Joined +Target RejectNegative Joined Var(arc_data_string) Init(ARC_DEFAULT_DATA_SECTION) -mdata=SECTION Put data in SECTION mrodata= -Target RejectNegative Joined +Target RejectNegative Joined Var(arc_rodata_string) Init(ARC_DEFAULT_RODATA_SECTION) -mrodata=SECTION Put read-only data in SECTION diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index f2266c7..3cfca14 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -374,20 +374,7 @@ enum float_abi_type arm_float_abi; /* Which ABI to use. */ enum arm_abi_type arm_abi; -/* Set by the -mfpu=... option. */ -static const char * target_fpu_name = NULL; - -/* Set by the -mfpe=... option. */ -static const char * target_fpe_name = NULL; - -/* Set by the -mfloat-abi=... option. */ -static const char * target_float_abi_name = NULL; - -/* Set by the -mabi=... option. */ -static const char * target_abi_name = NULL; - /* Used to parse -mstructure_size_boundary command line option. */ -static const char * structure_size_string = NULL; int arm_structure_size_boundary = DEFAULT_STRUCTURE_SIZE_BOUNDARY; /* Used for Thumb call_via trampolines. */ @@ -498,7 +485,6 @@ int arm_cpp_interwork = 0; enum machine_mode output_memory_reference_mode; /* The register number to be used for the PIC offset register. */ -static const char * arm_pic_register_string = NULL; int arm_pic_register = INVALID_REGNUM; /* Set to 1 when a return insn is output, this means that the epilogue @@ -801,10 +787,6 @@ arm_handle_option (size_t code, const char *arg, int value ATTRIBUTE_UNUSED) { switch (code) { - case OPT_mabi_: - target_abi_name = arg; - return true; - case OPT_march_: arm_select[1].string = arg; return true; @@ -813,35 +795,14 @@ arm_handle_option (size_t code, const char *arg, int value ATTRIBUTE_UNUSED) arm_select[0].string = arg; return true; - case OPT_mfloat_abi_: - target_float_abi_name = arg; - return true; - - case OPT_mfp_: - case OPT_mfpe_: - target_fpe_name = arg; - return true; - - case OPT_mfpu_: - target_fpu_name = arg; - return true; - case OPT_mhard_float: target_float_abi_name = "hard"; return true; - case OPT_mpic_register_: - arm_pic_register_string = arg; - return true; - case OPT_msoft_float: target_float_abi_name = "soft"; return true; - case OPT_mstructure_size_boundary_: - structure_size_string = arg; - return true; - case OPT_mtune_: arm_select[2].string = arg; return true; diff --git a/gcc/config/arm/arm.opt b/gcc/config/arm/arm.opt index 28bec49..d03679a 100644 --- a/gcc/config/arm/arm.opt +++ b/gcc/config/arm/arm.opt @@ -20,7 +20,7 @@ ; 02111-1307, USA. mabi= -Target RejectNegative Joined +Target RejectNegative Joined Var(target_abi_name) Specify an ABI mabort-on-noreturn @@ -73,21 +73,21 @@ Target RejectNegative Joined Specify the name of the target CPU mfloat-abi= -Target RejectNegative Joined +Target RejectNegative Joined Var(target_float_abi_name) Specify if floating point hardware should be used mfp= -Target RejectNegative Joined Undocumented +Target RejectNegative Joined Undocumented Var(target_fpe_name) VarExists ;; Now ignored. mfpe Target RejectNegative Mask(FPE) Undocumented mfpe= -Target RejectNegative Joined Undocumented +Target RejectNegative Joined Undocumented Var(target_fpe_name) mfpu= -Target RejectNegative Joined +Target RejectNegative Joined Var(target_fpu_name) Specify the name of the target floating point hardware/format mhard-float @@ -103,7 +103,7 @@ Target Report Mask(LONG_CALLS) Generate call insns as indirect calls, if necessary mpic-register= -Target RejectNegative Joined +Target RejectNegative Joined Var(arm_pic_register_string) Specify the register to be used for PIC addressing mpoke-function-name @@ -123,7 +123,7 @@ Target RejectNegative Alias for -mfloat-abi=soft mstructure-size-boundary= -Target RejectNegative Joined +Target RejectNegative Joined Var(structure_size_string) Specify the minimum bit alignment of structures mthumb diff --git a/gcc/config/avr/avr.c b/gcc/config/avr/avr.c index 45b51f2..3de646b 100644 --- a/gcc/config/avr/avr.c +++ b/gcc/config/avr/avr.c @@ -48,7 +48,6 @@ /* Maximal allowed offset for an address in the LD command */ #define MAX_LD_OFFSET(MODE) (64 - (signed)GET_MODE_SIZE (MODE)) -static bool avr_handle_option (size_t, const char *, int); static int avr_naked_function_p (tree); static int interrupt_function_p (tree); static int signal_function_p (tree); @@ -111,12 +110,6 @@ static int epilogue_size; /* Size of all jump tables in the current function, in words. */ static int jump_tables_size; -/* Initial stack value specified by the `-minit-stack=' option */ -static const char *avr_init_stack = "__stack"; - -/* Default MCU name */ -static const char *avr_mcu_name = "avr2"; - /* Preprocessor macros to define depending on MCU type. */ const char *avr_base_arch_macro; const char *avr_extra_arch_macro; @@ -245,8 +238,6 @@ int avr_case_values_threshold = 30000; #define TARGET_ATTRIBUTE_TABLE avr_attribute_table #undef TARGET_ASM_FUNCTION_RODATA_SECTION #define TARGET_ASM_FUNCTION_RODATA_SECTION default_no_function_rodata_section -#undef TARGET_HANDLE_OPTION -#define TARGET_HANDLE_OPTION avr_handle_option #undef TARGET_INSERT_ATTRIBUTES #define TARGET_INSERT_ATTRIBUTES avr_insert_attributes #undef TARGET_SECTION_TYPE_FLAGS @@ -266,26 +257,6 @@ int avr_case_values_threshold = 30000; struct gcc_target targetm = TARGET_INITIALIZER; -/* Implement TARGET_HANDLE_OPTION. */ - -static bool -avr_handle_option (size_t code, const char *arg, int value ATTRIBUTE_UNUSED) -{ - switch (code) - { - case OPT_minit_stack_: - avr_init_stack = arg; - return true; - - case OPT_mmcu_: - avr_mcu_name = arg; - return true; - - default: - return true; - } -} - void avr_override_options (void) { diff --git a/gcc/config/avr/avr.opt b/gcc/config/avr/avr.opt index 8d40f92..303816a 100644 --- a/gcc/config/avr/avr.opt +++ b/gcc/config/avr/avr.opt @@ -24,14 +24,14 @@ Target Report Mask(CALL_PROLOGUES) Use subroutines for function prologues and epilogues mmcu= -Target RejectNegative Joined +Target RejectNegative Joined Var(avr_mcu_name) Init("avr2") -mmcu=MCU Select the target MCU mdeb Target Report Undocumented Mask(ALL_DEBUG) minit-stack= -Target RejectNegative Joined +Target RejectNegative Joined Var(avr_init_stack) Init("__stack") -minit-stack=STACK Use STACK as the initial value of the stack pointer mint8 diff --git a/gcc/config/bfin/bfin.c b/gcc/config/bfin/bfin.c index 8f3e054..e20a6c3 100644 --- a/gcc/config/bfin/bfin.c +++ b/gcc/config/bfin/bfin.c @@ -67,8 +67,6 @@ const char *byte_reg_names[] = BYTE_REGISTER_NAMES; static int arg_regs[] = FUNCTION_ARG_REGISTERS; -/* The value passed to -mshared-library-id=. */ -static int bfin_library_id; /* Nonzero if -mshared-library-id was given. */ static int bfin_lib_id_given; @@ -1722,8 +1720,6 @@ bfin_handle_option (size_t code, const char *arg, int value) if (value > MAX_LIBRARY_ID) error ("-mshared-library-id=%s is not between 0 and %d", arg, MAX_LIBRARY_ID); - else - bfin_library_id = value; bfin_lib_id_given = 1; return true; diff --git a/gcc/config/bfin/bfin.opt b/gcc/config/bfin/bfin.opt index 827947d..4aace2f 100644 --- a/gcc/config/bfin/bfin.opt +++ b/gcc/config/bfin/bfin.opt @@ -36,5 +36,5 @@ Target Report Mask(ID_SHARED_LIBRARY) Enabled ID based shared library mshared-library-id= -Target RejectNegative Joined UInteger +Target RejectNegative Joined UInteger Var(bfin_library_id) ID of shared library to build diff --git a/gcc/config/c4x/c4x.c b/gcc/config/c4x/c4x.c index 119c7be..110dfcc 100644 --- a/gcc/config/c4x/c4x.c +++ b/gcc/config/c4x/c4x.c @@ -153,7 +153,6 @@ enum machine_mode c4x_caller_save_map[FIRST_PSEUDO_REGISTER] = rtx c4x_compare_op0; rtx c4x_compare_op1; -int c4x_rpts_cycles = 0; /* Max. cycles for RPTS. */ int c4x_cpu_version = 40; /* CPU version C30/31/32/33/40/44. */ /* Pragma definitions. */ @@ -291,10 +290,6 @@ c4x_handle_option (size_t code, const char *arg, int value) } return false; - case OPT_mrpts_: - c4x_rpts_cycles = value; - return true; - default: return true; } diff --git a/gcc/config/c4x/c4x.h b/gcc/config/c4x/c4x.h index 832ed8e..b9fd452 100644 --- a/gcc/config/c4x/c4x.h +++ b/gcc/config/c4x/c4x.h @@ -121,7 +121,6 @@ RPTS blocks interrupts. */ -extern int c4x_rpts_cycles; /* Max cycles for RPTS. */ extern int c4x_cpu_version; /* Cpu version C30/31/32/33/40/44. */ #define TARGET_INLINE (! optimize_size) /* Inline MPYI. */ diff --git a/gcc/config/c4x/c4x.opt b/gcc/config/c4x/c4x.opt index a135e63..4328846 100644 --- a/gcc/config/c4x/c4x.opt +++ b/gcc/config/c4x/c4x.opt @@ -128,7 +128,7 @@ Target Report Mask(RPTS) Enable use of RTPS instruction mrpts= -Target RejectNegative Joined UInteger +Target RejectNegative Joined UInteger Var(c4x_rpts_cycles) -mrpts=N Set the maximum number of iterations for RPTS to N msmall diff --git a/gcc/config/cris/aout.h b/gcc/config/cris/aout.h index 0b6e61e..f39676c 100644 --- a/gcc/config/cris/aout.h +++ b/gcc/config/cris/aout.h @@ -94,10 +94,6 @@ Boston, MA 02111-1307, USA. */ + MASK_ALIGN_BY_32); \ break; \ \ - case OPT_melinux_stacksize_: \ - cris_elinux_stacksize_str = (ARG); \ - break; \ - \ default: \ break; \ } \ diff --git a/gcc/config/cris/aout.opt b/gcc/config/cris/aout.opt index f51dc2e..b821d57 100644 --- a/gcc/config/cris/aout.opt +++ b/gcc/config/cris/aout.opt @@ -27,6 +27,8 @@ melinux Target Report RejectNegative Compile for the MMU-less Etrax 100-based elinux system +;; We don't parse it currently; it's just passed on to the linker. +;; We might want to do something here someday. melinux-stacksize= -Target Report RejectNegative Joined +Target Report RejectNegative Joined Var(cris_elinux_stacksize_str) -melinux-stacksize=SIZE For elinux, request a specified stack-size for this program diff --git a/gcc/config/cris/cris.c b/gcc/config/cris/cris.c index 81e3ce6..0bc8b8c 100644 --- a/gcc/config/cris/cris.c +++ b/gcc/config/cris/cris.c @@ -132,18 +132,6 @@ static tree cris_md_asm_clobbers (tree, tree, tree); static bool cris_handle_option (size_t, const char *, int); -/* This is the argument from the "-max-stack-stackframe=" option. */ -const char *cris_max_stackframe_str; - -/* This is the argument from the "-march=" option. */ -const char *cris_cpu_str; - -/* This is the argument from the "-mtune=" option. */ -const char *cris_tune_str; - -/* This is the argument from the "-melinux-stacksize=" option. */ -const char *cris_elinux_stacksize_str; - /* This is the parsed result of the "-max-stack-stackframe=" option. If it (still) is zero, then there was no such option given. */ int cris_max_stackframe = 0; @@ -2073,20 +2061,6 @@ cris_handle_option (size_t code, const char *arg, int value ATTRIBUTE_UNUSED) + MASK_DATA_ALIGN); break; - case OPT_max_stackframe_: - case OPT_mmax_stackframe_: - cris_max_stackframe_str = arg; - break; - - case OPT_march_: - case OPT_mcpu_: - cris_cpu_str = arg; - break; - - case OPT_mtune_: - cris_tune_str = arg; - break; - default: break; } diff --git a/gcc/config/cris/cris.h b/gcc/config/cris/cris.h index bdf4823..4f998d0 100644 --- a/gcc/config/cris/cris.h +++ b/gcc/config/cris/cris.h @@ -75,23 +75,9 @@ Boston, MA 02111-1307, USA. */ ((MODE) != BLKmode ? GET_MODE_SIZE (MODE) \ : (unsigned) int_size_in_bytes (TYPE)) -/* Check for max allowed stackframe. A "const char *" to be parsed. */ -extern const char *cris_max_stackframe_str; - -/* Which CPU version this is. A "const char *" to be parsed. */ -extern const char *cris_cpu_str; - /* Which CPU version this is. The parsed and adjusted cris_cpu_str. */ extern int cris_cpu_version; -/* Which CPU version to tune for. A "const char *" to be parsed. */ -extern const char *cris_tune_str; - -/* The argument to "-melinux-stacksize=". We don't parse it currently; - it's just passed on to the linker. We might want to do something - here someday. */ -extern const char *cris_elinux_stacksize_str; - /* Changing the order used to be necessary to put the fourth __make_dp argument (a DImode parameter) in registers, to fit with the libfunc parameter passing scheme used for intrinsic functions. FIXME: Check diff --git a/gcc/config/cris/cris.opt b/gcc/config/cris/cris.opt index 0aad8e7..c828f61 100644 --- a/gcc/config/cris/cris.opt +++ b/gcc/config/cris/cris.opt @@ -159,22 +159,22 @@ Target Report RejectNegative Override -mbest-lib-options mcpu= -Target Report RejectNegative Joined Undocumented +Target Report RejectNegative Joined Undocumented Var(cris_cpu_str) march= -Target Report RejectNegative Joined +Target Report RejectNegative Joined Var(cris_cpu_str) VarExists -march=ARCH Generate code for the specified chip or CPU version mtune= -Target Report RejectNegative Joined +Target Report RejectNegative Joined Var(cris_tune_str) -mtune=ARCH Tune alignment for the specified chip or CPU version mmax-stackframe= -Target Report RejectNegative Joined +Target Report RejectNegative Joined Var(cris_max_stackframe_str) -mmax-stackframe=SIZE Warn when a stackframe is larger than the specified size max-stackframe= -Target Report RejectNegative Joined Undocumented +Target Report RejectNegative Joined Undocumented Var(cris_max_stackframe_str) VarExists ; TARGET_SVINTO: Currently this just affects alignment. FIXME: ; Redundant with TARGET_ALIGN_BY_32, or put machine stuff here? diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 43fcd2e..55d0069 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -787,15 +787,11 @@ struct ix86_frame bool save_regs_using_mov; }; -/* Code model option as passed by user. */ -static const char *ix86_cmodel_string; -/* Parsed value. */ +/* Code model option. */ enum cmodel ix86_cmodel; /* Asm dialect. */ -static const char *ix86_asm_string; enum asm_dialect ix86_asm_dialect = ASM_ATT; /* TLS dialext. */ -static const char *ix86_tls_dialect_string; enum tls_dialect ix86_tls_dialect = TLS_DIALECT_GNU; /* Which unit we are generating floating point math for. */ @@ -806,40 +802,17 @@ enum processor_type ix86_tune; /* Which instruction set architecture to use. */ enum processor_type ix86_arch; -/* Strings to hold which cpu and instruction set architecture to use. */ -const char *ix86_tune_string; /* for -mtune=<xxx> */ -const char *ix86_arch_string; /* for -march=<xxx> */ -static const char *ix86_fpmath_string; /* for -mfpmath=<xxx> */ - -/* # of registers to use to pass arguments. */ -static const char *ix86_regparm_string; - /* true if sse prefetch instruction is not NOOP. */ int x86_prefetch_sse; /* ix86_regparm_string as a number */ static int ix86_regparm; -/* Alignment to use for loops and jumps: */ - -/* Power of two alignment for loops. */ -static const char *ix86_align_loops_string; - -/* Power of two alignment for non-loop jumps. */ -static const char *ix86_align_jumps_string; - -/* Power of two alignment for stack boundary in bytes. */ -static const char *ix86_preferred_stack_boundary_string; - /* Preferred alignment for stack boundary in bits. */ unsigned int ix86_preferred_stack_boundary; /* Values 1-5: see jump.c */ int ix86_branch_cost; -static const char *ix86_branch_cost_string; - -/* Power of two alignment for functions. */ -static const char *ix86_align_funcs_string; /* Prefix built by ASM_GENERATE_INTERNAL_LABEL. */ char internal_label_prefix[16]; @@ -1107,7 +1080,7 @@ struct gcc_target targetm = TARGET_INITIALIZER; /* Implement TARGET_HANDLE_OPTION. */ static bool -ix86_handle_option (size_t code, const char *arg, int value) +ix86_handle_option (size_t code, const char *arg ATTRIBUTE_UNUSED, int value) { switch (code) { @@ -1119,38 +1092,6 @@ ix86_handle_option (size_t code, const char *arg, int value) } return true; - case OPT_malign_functions_: - ix86_align_funcs_string = arg; - return true; - - case OPT_malign_jumps_: - ix86_align_jumps_string = arg; - return true; - - case OPT_malign_loops_: - ix86_align_loops_string = arg; - return true; - - case OPT_march_: - ix86_arch_string = arg; - return true; - - case OPT_masm_: - ix86_asm_string = arg; - return true; - - case OPT_mbranch_cost_: - ix86_branch_cost_string = arg; - return true; - - case OPT_mcmodel_: - ix86_cmodel_string = arg; - return true; - - case OPT_mfpmath_: - ix86_fpmath_string = arg; - return true; - case OPT_mmmx: if (!value) { @@ -1159,14 +1100,6 @@ ix86_handle_option (size_t code, const char *arg, int value) } return true; - case OPT_mpreferred_stack_boundary_: - ix86_preferred_stack_boundary_string = arg; - return true; - - case OPT_mregparm_: - ix86_regparm_string = arg; - return true; - case OPT_msse: if (!value) { @@ -1183,14 +1116,6 @@ ix86_handle_option (size_t code, const char *arg, int value) } return true; - case OPT_mtls_dialect_: - ix86_tls_dialect_string = arg; - return true; - - case OPT_mtune_: - ix86_tune_string = arg; - return true; - default: return true; } diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h index d65ce49..0a9df5a 100644 --- a/gcc/config/i386/i386.h +++ b/gcc/config/i386/i386.h @@ -2132,10 +2132,7 @@ enum processor_type }; extern enum processor_type ix86_tune; -extern const char *ix86_tune_string; - extern enum processor_type ix86_arch; -extern const char *ix86_arch_string; enum fpmath_unit { diff --git a/gcc/config/i386/i386.opt b/gcc/config/i386/i386.opt index 5571dee..64337d4 100644 --- a/gcc/config/i386/i386.opt +++ b/gcc/config/i386/i386.opt @@ -60,15 +60,15 @@ Target Report Mask(ALIGN_DOUBLE) Align some doubles on dword boundary malign-functions= -Target RejectNegative Joined +Target RejectNegative Joined Var(ix86_align_funcs_string) Function starts are aligned to this power of 2 malign-jumps= -Target RejectNegative Joined +Target RejectNegative Joined Var(ix86_align_jumps_string) Jump targets are aligned to this power of 2 malign-loops= -Target RejectNegative Joined +Target RejectNegative Joined Var(ix86_align_loops_string) Loop code aligned to this power of 2 malign-stringops @@ -76,19 +76,19 @@ Target RejectNegative Report InverseMask(NO_ALIGN_STRINGOPS, ALIGN_STRINGOPS) Align destination of the string operations march= -Target RejectNegative Joined +Target RejectNegative Joined Var(ix86_arch_string) Generate code for given CPU masm= -Target RejectNegative Joined +Target RejectNegative Joined Var(ix86_asm_string) Use given assembler dialect mbranch-cost= -Target RejectNegative Joined +Target RejectNegative Joined Var(ix86_branch_cost_string) Branches are this expensive (1-5, arbitrary units) mcmodel= -Target RejectNegative Joined +Target RejectNegative Joined Var(ix86_cmodel_string) Use given x86-64 code model mdebug-addr @@ -106,7 +106,7 @@ Target Report Mask(FLOAT_RETURNS) Return values of functions in FPU registers mfpmath= -Target RejectNegative Joined +Target RejectNegative Joined Var(ix86_fpmath_string) Generate floating point mathematics using given instruction set mhard-float @@ -158,7 +158,7 @@ Target RejectNegative Undocumented ;; Deprecated mpreferred-stack-boundary= -Target RejectNegative Joined +Target RejectNegative Joined Var(ix86_preferred_stack_boundary_string) Attempt to keep stack aligned to this power of 2 mpush-args @@ -170,7 +170,7 @@ Target RejectNegative Report InverseMask(NO_RED_ZONE, RED_ZONE) Use red-zone in the x86-64 code mregparm= -Target RejectNegative Joined +Target RejectNegative Joined Var(ix86_regparm_string) Number of registers used to pass integer arguments mrtd @@ -202,7 +202,7 @@ Target Report Mask(STACK_PROBE) Enable stack probing mtls-dialect= -Target RejectNegative Joined +Target RejectNegative Joined Var(ix86_tls_dialect_string) Use given thread-local storage dialect mtls-direct-seg-refs @@ -210,7 +210,7 @@ Target Report Mask(TLS_DIRECT_SEG_REFS) Use direct references against %gs when accessing tls data mtune= -Target RejectNegative Joined +Target RejectNegative Joined Var(ix86_tune_string) Schedule code for given CPU ;; Support Athlon 3Dnow builtins diff --git a/gcc/config/ia64/ia64.c b/gcc/config/ia64/ia64.c index a52b7d8..69a7f1e 100644 --- a/gcc/config/ia64/ia64.c +++ b/gcc/config/ia64/ia64.c @@ -98,10 +98,6 @@ static const char * const ia64_local_reg_names[80] = static const char * const ia64_output_reg_names[8] = { "out0", "out1", "out2", "out3", "out4", "out5", "out6", "out7" }; -/* Determines whether we use adds, addl, or movl to generate our - TLS immediate offsets. */ -int ia64_tls_size = 22; - /* Which cpu are we scheduling for. */ enum processor_type ia64_tune = PROCESSOR_ITANIUM2; @@ -4822,7 +4818,7 @@ fix_range (const char *const_str) /* Implement TARGET_HANDLE_OPTION. */ static bool -ia64_handle_option (size_t code, const char *arg, int value ATTRIBUTE_UNUSED) +ia64_handle_option (size_t code, const char *arg, int value) { switch (code) { @@ -4831,15 +4827,9 @@ ia64_handle_option (size_t code, const char *arg, int value ATTRIBUTE_UNUSED) return true; case OPT_mtls_size_: - { - char *end; - unsigned long tmp = strtoul (arg, &end, 10); - if (*end || (tmp != 14 && tmp != 22 && tmp != 64)) - error ("bad value %<%s%> for -mtls-size= switch", arg); - else - ia64_tls_size = tmp; - return true; - } + if (value != 14 && value != 22 && value != 64) + error ("bad value %<%s%> for -mtls-size= switch", arg); + return true; case OPT_mtune_: { diff --git a/gcc/config/ia64/ia64.h b/gcc/config/ia64/ia64.h index bd32069..28a8637 100644 --- a/gcc/config/ia64/ia64.h +++ b/gcc/config/ia64/ia64.h @@ -67,7 +67,6 @@ extern unsigned int ia64_section_threshold; #define TARGET_HAVE_TLS true #endif -extern int ia64_tls_size; #define TARGET_TLS14 (ia64_tls_size == 14) #define TARGET_TLS22 (ia64_tls_size == 22) #define TARGET_TLS64 (ia64_tls_size == 64) diff --git a/gcc/config/ia64/ia64.opt b/gcc/config/ia64/ia64.opt index f3790ad..25a2cc6 100644 --- a/gcc/config/ia64/ia64.opt +++ b/gcc/config/ia64/ia64.opt @@ -89,7 +89,7 @@ Target RejectNegative Joined Specify range of registers to make fixed mtls-size= -Target RejectNegative Joined +Target RejectNegative Joined UInteger Var(ia64_tls_size) Init(22) Specify bit size of immediate TLS offsets mtune= diff --git a/gcc/config/m32r/m32r.c b/gcc/config/m32r/m32r.c index c27b244..c6c682d 100644 --- a/gcc/config/m32r/m32r.c +++ b/gcc/config/m32r/m32r.c @@ -64,18 +64,6 @@ enum m32r_sdata m32r_sdata = M32R_SDATA_DEFAULT; /* For string literals, etc. */ #define LIT_NAME_P(NAME) ((NAME)[0] == '*' && (NAME)[1] == '.') -/* Cache-flush support. Cache-flush is used at trampoline. - Default cache-flush is "trap 12". - default cache-flush function is "_flush_cache" (CACHE_FLUSH_FUNC) - default cache-flush trap-interrupt number is 12 (CACHE_FLUSH_TRAP) - You can change how to generate code of cache-flush with following options. - -mflush-func=FLUSH-FUNC-NAME - -mno-flush-func (sets m32r_cache_flush_func to NULL) - -mfluch-trap=TRAP-NUMBER - -mno-flush-trap. (sets m32r_cache_flush_trap to -1). */ -const char *m32r_cache_flush_func = CACHE_FLUSH_FUNC; -int m32r_cache_flush_trap = CACHE_FLUSH_TRAP; - /* Forward declaration. */ static bool m32r_handle_option (size_t, const char *, int); static void init_reg_tables (void); @@ -188,17 +176,12 @@ m32r_handle_option (size_t code, const char *arg, int value) return false; return true; - case OPT_mflush_func_: - m32r_cache_flush_func = arg; - return true; - case OPT_mno_flush_func: m32r_cache_flush_func = NULL; return true; case OPT_mflush_trap_: - m32r_cache_flush_trap = value; - return m32r_cache_flush_trap <= 15; + return value <= 15; case OPT_mno_flush_trap: m32r_cache_flush_trap = -1; diff --git a/gcc/config/m32r/m32r.h b/gcc/config/m32r/m32r.h index a83886f..5747c44 100644 --- a/gcc/config/m32r/m32r.h +++ b/gcc/config/m32r/m32r.h @@ -209,10 +209,6 @@ #define TARGET_CPU_DEFAULT 0 #endif -/* Cache-flush support. */ -extern const char * m32r_cache_flush_func; -extern int m32r_cache_flush_trap; - /* Code Models Code models are used to select between two choices of two separate diff --git a/gcc/config/m32r/m32r.opt b/gcc/config/m32r/m32r.opt index 7328785..85fb8ed 100644 --- a/gcc/config/m32r/m32r.opt +++ b/gcc/config/m32r/m32r.opt @@ -48,11 +48,11 @@ Target Mask(DEBUG) Display compile time statistics mflush-func= -Target RejectNegative Joined +Target RejectNegative Joined Var(m32r_cache_flush_func) Init(CACHE_FLUSH_FUNC) Specify cache flush function mflush-trap= -Target RejectNegative Joined UInteger +Target RejectNegative Joined UInteger Var(m32r_cache_flush_trap) Init(CACHE_FLUSH_TRAP) Specify cache flush trap number missue-rate=1 diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c index 9faddde..9ddcf4d 100644 --- a/gcc/config/mips/mips.c +++ b/gcc/config/mips/mips.c @@ -555,15 +555,9 @@ int mips_abi = MIPS_ABI_DEFAULT; should arrange to call mips32 hard floating point code. */ int mips16_hard_float; -/* The arguments passed to -march and -mtune. */ -static const char *mips_arch_string; -static const char *mips_tune_string; - /* The architecture selected by -mipsN. */ static const struct mips_cpu_info *mips_isa_info; -const char *mips_cache_flush_func = CACHE_FLUSH_FUNC; - /* If TRUE, we split addresses into their high and low parts in the RTL. */ int mips_split_addresses; @@ -4215,21 +4209,13 @@ mips_handle_option (size_t code, const char *arg, int value ATTRIBUTE_UNUSED) return true; case OPT_march_: - mips_arch_string = arg; - return mips_parse_cpu (arg) != 0; - case OPT_mtune_: - mips_tune_string = arg; return mips_parse_cpu (arg) != 0; case OPT_mips: mips_isa_info = mips_parse_cpu (ACONCAT (("mips", arg, NULL))); return mips_isa_info != 0; - case OPT_mflush_func_: - mips_cache_flush_func = arg; - return true; - case OPT_mno_flush_func: mips_cache_flush_func = NULL; return true; diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h index aeadac3..9de422d 100644 --- a/gcc/config/mips/mips.h +++ b/gcc/config/mips/mips.h @@ -105,7 +105,6 @@ extern enum processor_type mips_tune; /* which cpu to schedule for */ extern int mips_isa; /* architectural level */ extern int mips_abi; /* which ABI to use */ extern int mips16_hard_float; /* mips16 without -msoft-float */ -extern const char *mips_cache_flush_func;/* for -mflush-func= and -mno-flush-func */ extern const struct mips_cpu_info mips_cpu_info_table[]; extern const struct mips_cpu_info *mips_arch_info; extern const struct mips_cpu_info *mips_tune_info; diff --git a/gcc/config/mips/mips.opt b/gcc/config/mips/mips.opt index cb78b8e..3e02896 100644 --- a/gcc/config/mips/mips.opt +++ b/gcc/config/mips/mips.opt @@ -32,7 +32,7 @@ Target Report Var(TARGET_MAD) Use PMC-style 'mad' instructions march= -Target RejectNegative Joined +Target RejectNegative Joined Var(mips_arch_string) -march=ISA Generate code for the given ISA mbranch-likely @@ -114,7 +114,7 @@ Target Report RejectNegative Mask(FLOAT64) Use 64-bit floating-point registers mflush-func= -Target RejectNegative Joined +Target RejectNegative Joined Var(mips_cache_flush_func) Init(CACHE_FLUSH_FUNC) -mflush-func=FUNC Use FUNC to flush the cache before calling stack trampolines mfused-madd @@ -198,7 +198,7 @@ Target Report Var(TARGET_SYM32) Assume all symbols have 32-bit values mtune= -Target RejectNegative Joined +Target RejectNegative Joined Var(mips_tune_string) -mtune=PROCESSOR Optimize the output for PROCESSOR muninit-const-in-rodata diff --git a/gcc/config/s390/s390.c b/gcc/config/s390/s390.c index 2c860e7..2184320 100644 --- a/gcc/config/s390/s390.c +++ b/gcc/config/s390/s390.c @@ -186,7 +186,6 @@ enum processor_flags s390_tune_flags; /* Which instruction set architecture to use. */ enum processor_type s390_arch; enum processor_flags s390_arch_flags; -static const char *s390_arch_string; HOST_WIDE_INT s390_warn_framesize = 0; HOST_WIDE_INT s390_stack_size = 0; @@ -1128,7 +1127,6 @@ s390_handle_option (size_t code, const char *arg, int value ATTRIBUTE_UNUSED) switch (code) { case OPT_march_: - s390_arch_string = arg; return s390_handle_arch_option (arg, &s390_arch, &s390_arch_flags); case OPT_mstack_guard_: diff --git a/gcc/config/s390/s390.opt b/gcc/config/s390/s390.opt index 9ece6f1..e020e63 100644 --- a/gcc/config/s390/s390.opt +++ b/gcc/config/s390/s390.opt @@ -28,7 +28,7 @@ Target Report RejectNegative Mask(64BIT) 64 bit ABI march= -Target RejectNegative Joined +Target RejectNegative Joined Var(s390_arch_string) Generate code for given CPU mbackchain diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c index 1958f3f..e5e6430 100644 --- a/gcc/config/sparc/sparc.c +++ b/gcc/config/sparc/sparc.c @@ -370,9 +370,6 @@ const struct attribute_spec sparc_attribute_table[]; /* Option handling. */ -/* Code model option as passed by user. */ -const char *sparc_cmodel_string; - /* Parsed value. */ enum cmodel sparc_cmodel; @@ -540,10 +537,6 @@ sparc_handle_option (size_t code, const char *arg, int value ATTRIBUTE_UNUSED) case OPT_mtune_: sparc_select[2].string = arg; break; - - case OPT_mcmodel_: - sparc_cmodel_string = arg; - break; } return true; diff --git a/gcc/config/sparc/sparc.h b/gcc/config/sparc/sparc.h index 9fcee12..aa3752c 100644 --- a/gcc/config/sparc/sparc.h +++ b/gcc/config/sparc/sparc.h @@ -191,8 +191,6 @@ enum cmodel { CM_EMBMEDANY }; -/* Value of -mcmodel specified by user. */ -extern const char *sparc_cmodel_string; /* One of CM_FOO. */ extern enum cmodel sparc_cmodel; diff --git a/gcc/config/sparc/sparc.opt b/gcc/config/sparc/sparc.opt index 88a603c..6bee67d 100644 --- a/gcc/config/sparc/sparc.opt +++ b/gcc/config/sparc/sparc.opt @@ -96,7 +96,7 @@ Target RejectNegative Joined Schedule code for given CPU mcmodel= -Target RejectNegative Joined +Target RejectNegative Joined Var(sparc_cmodel_string) Use given SPARC-V9 code model diff --git a/gcc/doc/options.texi b/gcc/doc/options.texi index 307a325..b4ada5b 100644 --- a/gcc/doc/options.texi +++ b/gcc/doc/options.texi @@ -121,12 +121,29 @@ will check and convert the argument before passing it to the relevant option handler. @item Var(@var{var}) -The option controls an integer variable @var{var}. If the option has -the @code{UInteger} property, the option parser will set @var{var} to -the value of the user-specified argument. Otherwise the option is -assumed to be an on/off switch that is active when @var{var} is nonzero. -In this case, the option parser will set @var{var} to 1 when the positive -form of the option is used and 0 when the ``no-'' form is used. +The state of this option should be stored in variable @var{var}. +The way that the state is stored depends on the type of option: + +@itemize @bullet +@item +If the option uses the @code{Mask} or @code{InverseMask} properties, +@var{var} is the integer variable that contains the mask. + +@item +If the option is a normal on/off switch, @var{var} is an integer +variable that is nonzero when the option is enabled. The options +parser will set the variable to 1 when the positive form of the +option is used and 0 when the ``no-'' form is used. + +@item +If the option takes an argument and has the @code{UInteger} property, +@var{var} is an integer variable that stores the value of the argument. + +@item +Otherwise, if the option takes an argument, @var{var} is a pointer to +the argument string. The pointer will be null if the argument is optional +and wasn't given. +@end itemize The option-processing script will usually declare @var{var} in @file{options.c} and leave it to be zero-initialized at start-up time. diff --git a/gcc/opt-functions.awk b/gcc/opt-functions.awk index 9dc9640..9097dfb 100644 --- a/gcc/opt-functions.awk +++ b/gcc/opt-functions.awk @@ -89,6 +89,17 @@ function var_name(flags) return nth_arg(0, opt_args("Var", flags)) } +# Return the type of variable that should be associated with the given flags. +function var_type(flags) +{ + if (!flag_set_p("Joined.*", flags)) + return "int " + else if (flag_set_p("UInteger", flags)) + return "int " + else + return "const char *" +} + # Given that an option has flags FLAGS, return an initializer for the # "var_cond" and "var_value" fields of its cl_options[] entry. function var_set(flags) @@ -109,9 +120,11 @@ function var_set(flags) vn = var_name(flags); if (vn) return "CLVC_BIT_CLEAR, OPTION_MASK_" s - else + else return "CLVC_BIT_CLEAR, MASK_" s } + if (var_type(flags) == "const char *") + return "CLVC_STRING, 0" return "CLVC_BOOLEAN, 0" } diff --git a/gcc/optc-gen.awk b/gcc/optc-gen.awk index 4c4eef7..a71eb2a 100644 --- a/gcc/optc-gen.awk +++ b/gcc/optc-gen.awk @@ -77,8 +77,10 @@ for (i = 0; i < n_opts; i++) { else if (name in var_seen) continue; - printf ("/* Set by -%s.\n %s */\nint %s%s;\n\n", - opts[i], help[i], name,init) + print "/* Set by -" opts[i] "." + print " " help[i] " */" + print var_type(flags[i]) name init ";" + print "" var_seen[name] = 1; } diff --git a/gcc/opth-gen.awk b/gcc/opth-gen.awk index e95af00..1a63bc9 100644 --- a/gcc/opth-gen.awk +++ b/gcc/opth-gen.awk @@ -68,12 +68,9 @@ for (i = 0; i < n_opts; i++) { if (name == "") continue; - print "/* Set by -" opts[i] "." - print " " help[i] " */" - print "extern int " name ";" - print "" - - } + print "extern " var_type(flags[i]) name ";" +} +print "" for (i = 0; i < n_opts; i++) { name = opt_args("Mask", flags[i]) @@ -379,25 +379,31 @@ handle_option (const char **argv, unsigned int lang_mask) } if (option->flag_var) - switch (option->var_cond) + switch (option->var_type) { case CLVC_BOOLEAN: - *option->flag_var = value; + *(int *) option->flag_var = value; break; case CLVC_EQUAL: - *option->flag_var = value ? option->var_value : !option->var_value; + *(int *) option->flag_var = (value + ? option->var_value + : !option->var_value); break; case CLVC_BIT_CLEAR: case CLVC_BIT_SET: - if ((value != 0) == (option->var_cond == CLVC_BIT_SET)) - *option->flag_var |= option->var_value; + if ((value != 0) == (option->var_type == CLVC_BIT_SET)) + *(int *) option->flag_var |= option->var_value; else - *option->flag_var &= ~option->var_value; + *(int *) option->flag_var &= ~option->var_value; if (option->flag_var == &target_flags) target_flags_explicit |= option->var_value; break; + + case CLVC_STRING: + *(const char **) option->flag_var = arg; + break; } if (option->flags & lang_mask) @@ -1417,19 +1423,22 @@ option_enabled (int opt_idx) { const struct cl_option *option = &(cl_options[opt_idx]); if (option->flag_var) - switch (option->var_cond) + switch (option->var_type) { case CLVC_BOOLEAN: - return *option->flag_var != 0; + return *(int *) option->flag_var != 0; case CLVC_EQUAL: - return *option->flag_var == option->var_value; + return *(int *) option->flag_var == option->var_value; case CLVC_BIT_CLEAR: - return (*option->flag_var & option->var_value) == 0; + return (*(int *) option->flag_var & option->var_value) == 0; case CLVC_BIT_SET: - return (*option->flag_var & option->var_value) != 0; + return (*(int *) option->flag_var & option->var_value) != 0; + + case CLVC_STRING: + break; } return -1; } @@ -22,7 +22,7 @@ Software Foundation, 59 Temple Place - Suite 330, Boston, MA #define GCC_OPTS_H /* Specifies how a switch's VAR_VALUE relates to its FLAG_VAR. */ -enum cl_var_cond { +enum cl_var_type { /* The switch is enabled when FLAG_VAR is nonzero. */ CLVC_BOOLEAN, @@ -33,7 +33,11 @@ enum cl_var_cond { CLVC_BIT_CLEAR, /* The switch is enabled when VAR_VALUE is set in FLAG_VAR. */ - CLVC_BIT_SET + CLVC_BIT_SET, + + /* The switch takes a string argument and FLAG_VAR points to that + argument. */ + CLVC_STRING }; struct cl_option @@ -43,8 +47,8 @@ struct cl_option unsigned short back_chain; unsigned char opt_len; unsigned int flags; - int *flag_var; - enum cl_var_cond var_cond; + void *flag_var; + enum cl_var_type var_type; int var_value; }; |