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| -rw-r--r-- | gcc/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/regrename.c | 7 |
2 files changed, 13 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index bf00b68..19295b1 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2008-11-25 Eric Botcazou <ebotcazou@adacore.com> + + * regrename.c (merge_overlapping_regs): Add registers artificially + defined at the top of the basic block to the set of live ones just + before the first insn. + 2008-11-25 H.J. Lu <hongjiu.lu@intel.com> Joey Ye <joey.ye@intel.com> diff --git a/gcc/regrename.c b/gcc/regrename.c index b01c2e6..83fd605 100644 --- a/gcc/regrename.c +++ b/gcc/regrename.c @@ -137,8 +137,15 @@ merge_overlapping_regs (basic_block b, HARD_REG_SET *pset, struct du_chain *t = chain; rtx insn; HARD_REG_SET live; + df_ref *def_rec; REG_SET_TO_HARD_REG_SET (live, df_get_live_in (b)); + for (def_rec = df_get_artificial_defs (b->index); *def_rec; def_rec++) + { + df_ref def = *def_rec; + if (DF_REF_FLAGS (def) & DF_REF_AT_TOP) + SET_HARD_REG_BIT (live, DF_REF_REGNO (def)); + } insn = BB_HEAD (b); while (t) { |