diff options
-rw-r--r-- | gcc/ChangeLog | 6 | ||||
-rw-r--r-- | gcc/config/aarch64/aarch64.md | 18 | ||||
-rw-r--r-- | gcc/config/aarch64/iterators.md | 6 | ||||
-rw-r--r-- | gcc/testsuite/ChangeLog | 4 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/aarch64/cond_op_imm_1.c | 99 |
5 files changed, 133 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 2fe062a..5a7e44c 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,11 @@ 2015-11-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + * config/aarch64/aarch64.md (<neg_not_op><mode>cc): New define_expand. + * config/aarch64/iterators.md (NEG_NOT): New code iterator. + (neg_not_op): New code attribute. + +2015-11-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + * ifcvt.c (noce_try_inverse_constants): New function. (noce_process_if_block): Call it. * optabs.h (emit_conditional_neg_or_complement): Declare prototype. diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md index 6b08850..1586256 100644 --- a/gcc/config/aarch64/aarch64.md +++ b/gcc/config/aarch64/aarch64.md @@ -3102,6 +3102,24 @@ } ) +(define_expand "<neg_not_op><mode>cc" + [(set (match_operand:GPI 0 "register_operand" "") + (if_then_else:GPI (match_operand 1 "aarch64_comparison_operator" "") + (NEG_NOT:GPI (match_operand:GPI 2 "register_operand" "")) + (match_operand:GPI 3 "register_operand" "")))] + "" + { + rtx ccreg; + enum rtx_code code = GET_CODE (operands[1]); + + if (code == UNEQ || code == LTGT) + FAIL; + + ccreg = aarch64_gen_compare_reg (code, XEXP (operands[1], 0), + XEXP (operands[1], 1)); + operands[1] = gen_rtx_fmt_ee (code, VOIDmode, ccreg, const0_rtx); + } +) ;; CRC32 instructions. (define_insn "aarch64_<crc_variant>" diff --git a/gcc/config/aarch64/iterators.md b/gcc/config/aarch64/iterators.md index 6f35036..c4a1c98 100644 --- a/gcc/config/aarch64/iterators.md +++ b/gcc/config/aarch64/iterators.md @@ -693,6 +693,9 @@ ;; Code iterator for logical operations whose :nlogical works on SIMD registers. (define_code_iterator NLOGICAL [and ior]) +;; Code iterator for unary negate and bitwise complement. +(define_code_iterator NEG_NOT [neg not]) + ;; Code iterator for sign/zero extension (define_code_iterator ANY_EXTEND [sign_extend zero_extend]) @@ -822,6 +825,9 @@ ;; Logical operator instruction mnemonics (define_code_attr logical [(and "and") (ior "orr") (xor "eor")]) +;; Operation names for negate and bitwise complement. +(define_code_attr neg_not_op [(neg "neg") (not "not")]) + ;; Similar, but when not(op) (define_code_attr nlogical [(and "bic") (ior "orn") (xor "eon")]) diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 22761be..5c258f4 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,7 @@ +2015-11-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * gcc.target/aarch64/cond_op_imm_1.c: New test. + 2015-11-10 Eric Botcazou <ebotcazou@adacore.com> * gfortran.dg/pr68251.f90: New test. diff --git a/gcc/testsuite/gcc.target/aarch64/cond_op_imm_1.c b/gcc/testsuite/gcc.target/aarch64/cond_op_imm_1.c new file mode 100644 index 0000000..e93a693 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/cond_op_imm_1.c @@ -0,0 +1,99 @@ +/* { dg-do run } */ +/* { dg-options "-save-temps -O2 -fno-inline" } */ + +extern void abort (void); + +#define N 30 +#define M 25089992 + +int +foonegsi (int a) +{ + return a ? N : -N; +} + +/* { dg-final { scan-assembler "csneg\tw\[0-9\]*.*" } } */ + + +int +fooinvsi (int a) +{ + return a ? N : ~N; +} + +/* { dg-final { scan-assembler "csinv\tw\[0-9\]*.*" } } */ + + +long long +foonegdi (long long a) +{ + return a ? N : -N; +} + +long long +largefooneg (long long a) +{ + return a ? M : -M; +} + +/* { dg-final { scan-assembler "csneg\tx\[0-9\]*.*" } } */ + +long long +fooinvdi (long long a) +{ + return a ? N : ~N; +} + +long long +largefooinv (long long a) +{ + return a ? M : ~M; +} + +/* { dg-final { scan-assembler "csinv\tx\[0-9\]*.*" } } */ + + +int +main (void) +{ + if (foonegsi (1) != N) + abort (); + + if (foonegsi (0) != -N) + abort (); + + if (fooinvsi (1) != N) + abort (); + + if (fooinvsi (0) != ~N) + abort (); + + if (foonegdi (1) != N) + abort (); + + if (foonegdi (0) != -N) + abort (); + + if (fooinvdi (1) != N) + abort (); + + if (fooinvdi (0) != ~N) + abort (); + + if (largefooinv (0) != ~M) + abort (); + + if (largefooneg (0) != -M) + abort (); + + if (largefooinv (1) != M) + abort (); + + if (largefooneg (1) != M) + abort (); + + return 0; +} + +/* { dg-final { scan-assembler-not "csel\tx\[0-9\]*.*" } } */ +/* { dg-final { scan-assembler-not "csel\tw\[0-9\]*.*" } } */ |