diff options
| -rw-r--r-- | gcc/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/config/rs6000/rs6000.c | 5 | ||||
| -rw-r--r-- | gcc/testsuite/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/powerpc/pr71698.c | 13 |
4 files changed, 27 insertions, 2 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 6551c0e..3ed5fbb 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2016-07-01 Peter Bergner <bergner@vnet.ibm.com> + + PR target/71698 + * config/rs6000/rs6000.c (rs6000_secondary_reload_simple_move): Disallow + TDmode values. + 2016-07-01 Alan Modra <amodra@gmail.com> PR rtl-optimization/71709 diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index a34f287..dd77e1b1 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -19194,7 +19194,8 @@ rs6000_secondary_reload_simple_move (enum rs6000_reg_type to_type, simple move insns are issued. At present, 32-bit integers are not allowed in FPR/VSX registers. Single precision binary floating is not a simple move because we need to convert to the single precision memory layout. - The 4-byte SDmode can be moved. */ + The 4-byte SDmode can be moved. TDmode values are disallowed since they + need special direct move handling, which we do not support yet. */ size = GET_MODE_SIZE (mode); if (TARGET_DIRECT_MOVE && ((mode == SDmode) || (TARGET_POWERPC64 && size == 8)) @@ -19202,7 +19203,7 @@ rs6000_secondary_reload_simple_move (enum rs6000_reg_type to_type, || (to_type == VSX_REG_TYPE && from_type == GPR_REG_TYPE))) return true; - else if (TARGET_DIRECT_MOVE_128 && size == 16 + else if (TARGET_DIRECT_MOVE_128 && size == 16 && mode != TDmode && ((to_type == VSX_REG_TYPE && from_type == GPR_REG_TYPE) || (to_type == GPR_REG_TYPE && from_type == VSX_REG_TYPE))) return true; diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index c23836c..1eca9b2 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2016-07-01 Peter Bergner <bergner@vnet.ibm.com> + + PR target/71698 + * gcc.target/powerpc/pr71698.c: New test. + 2016-07-01 Georg-Johann Lay <avr@gjlay.de> PR target/71151 diff --git a/gcc/testsuite/gcc.target/powerpc/pr71698.c b/gcc/testsuite/gcc.target/powerpc/pr71698.c new file mode 100644 index 0000000..c752f64 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr71698.c @@ -0,0 +1,13 @@ +/* Test for a reload ICE arising from trying to direct move a TDmode value. */ +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-require-effective-target dfp } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-options "-O1 -mcpu=power9 -mno-lra" } */ + +extern void testvad128 (int n, ...); +void +testitd128 (_Decimal128 g01d128) +{ + testvad128 (1, g01d128); +} |