diff options
28 files changed, 89 insertions, 49 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index fb97618..ee5fb20 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,24 @@ +2014-12-03 Tom de Vries <tom@codesourcery.com> + + PR rtl-optimization/63957 + * doc/invoke.texi: Replace -fuse-caller-save with -fipa-ra. + * final.c (rest_of_handle_final): Replace flag_use_caller_save with + flag_ipa_ra. + (get_call_reg_set_usage): Same. + * lra-assigns.c (lra_assign): Same. + * lra-constraints.c (need_for_call_save_p): Same. + * lra-lives.c (process_bb_lives): Same. + * lra.c (lra): Same. + * calls.c (expand_call): Same. + (emit_library_call_value_1): Same. + * config/arm/arm.c (arm_option_override): Same. + * opts.c (default_options_table): Replace OPT_fuse_caller_save with + OPT_fipa_ra. + * target.def (call_fusage_contains_non_callee_clobbers): Replace + fuse-caller-save with fipa-ra. + * doc/tm.texi (TARGET_CALL_FUSAGE_CONTAINS_NON_CALLEE_CLOBBERS): Same. + * common.opt: Same. + 2014-12-03 Yury Gribov <y.gribov@samsung.com> * sanopt.c (maybe_get_single_definition): New function. diff --git a/gcc/calls.c b/gcc/calls.c index c64c0eb..d6bfa0a 100644 --- a/gcc/calls.c +++ b/gcc/calls.c @@ -3330,7 +3330,7 @@ expand_call (tree exp, rtx target, int ignore) next_arg_reg, valreg, old_inhibit_defer_pop, call_fusage, flags, args_so_far); - if (flag_use_caller_save) + if (flag_ipa_ra) { rtx_call_insn *last; rtx datum = NULL_RTX; @@ -4370,7 +4370,7 @@ emit_library_call_value_1 (int retval, rtx orgfun, rtx value, valreg, old_inhibit_defer_pop + 1, call_fusage, flags, args_so_far); - if (flag_use_caller_save) + if (flag_ipa_ra) { rtx last, datum = orgfun; gcc_assert (GET_CODE (datum) == SYMBOL_REF); diff --git a/gcc/common.opt b/gcc/common.opt index 752d939..a4dd3b3 100644 --- a/gcc/common.opt +++ b/gcc/common.opt @@ -2826,8 +2826,8 @@ Create a position independent executable z Driver Joined Separate -fuse-caller-save -Common Report Var(flag_use_caller_save) Optimization +fipa-ra +Common Report Var(flag_ipa_ra) Optimization Use caller save register across calls if possible ; This comment is to ensure we retain the blank line above. diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index f3be6cf..ceaef8d 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -3109,13 +3109,12 @@ arm_option_override (void) - epilogue_insns - does not accurately model the corresponding insns emitted in the asm file. In particular, see the comment in thumb_exit 'Find out how many of the (return) argument registers we can corrupt'. - As a consequence, the epilogue may clobber registers without - fuse-caller-save finding out about it. Therefore, disable fuse-caller-save - in Thumb1 mode. + As a consequence, the epilogue may clobber registers without fipa-ra + finding out about it. Therefore, disable fipa-ra in Thumb1 mode. TODO: Accurately model clobbers for epilogue_insns and reenable - fuse-caller-save. */ + fipa-ra. */ if (TARGET_THUMB1) - flag_use_caller_save = 0; + flag_ipa_ra = 0; /* Register global variables with the garbage collector. */ arm_add_gc_roots (); diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index d7bce2a..9ad3216 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -438,7 +438,7 @@ Objective-C and Objective-C++ Dialects}. -ftree-vectorize -ftree-vrp @gol -funit-at-a-time -funroll-all-loops -funroll-loops @gol -funsafe-loop-optimizations -funsafe-math-optimizations -funswitch-loops @gol --fuse-caller-save -fvariable-expansion-in-unroller -fvect-cost-model -fvpt @gol +-fipa-ra -fvariable-expansion-in-unroller -fvect-cost-model -fvpt @gol -fweb -fwhole-program -fwpa -fuse-ld=@var{linker} -fuse-linker-plugin @gol --param @var{name}=@var{value} -O -O0 -O1 -O2 -O3 -Os -Ofast -Og} @@ -7202,7 +7202,7 @@ also turns on the following optimization flags: -ftree-switch-conversion -ftree-tail-merge @gol -ftree-pre @gol -ftree-vrp @gol --fuse-caller-save} +-fipa-ra} Please note the warning under @option{-fgcse} about invoking @option{-O2} on programs that use computed gotos. @@ -8034,7 +8034,7 @@ and then tries to find ways to combine them. Enabled by default at @option{-O1} and higher. -@item -fuse-caller-save +@item -fipa-ra Use caller save registers for allocation if those registers are not used by any called function. In that case it is not necessary to save and restore them around calls. This is only possible if called functions are part of diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi index b9a7251..ee741a9 100644 --- a/gcc/doc/tm.texi +++ b/gcc/doc/tm.texi @@ -4844,7 +4844,7 @@ linker (e.g. stubs, veneers, branch islands), but not including those modifiable by the callee. The affected registers may be mentioned explicitly in the call pattern, or included as clobbers in CALL_INSN_FUNCTION_USAGE. The default version of this hook is set to false. The purpose of this hook -is to enable the fuse-caller-save optimization. +is to enable the fipa-ra optimization. @end deftypevr @node Varargs diff --git a/gcc/final.c b/gcc/final.c index c3805c9..4c894c3 100644 --- a/gcc/final.c +++ b/gcc/final.c @@ -4473,7 +4473,7 @@ rest_of_handle_final (void) assemble_start_function (current_function_decl, fnname); final_start_function (get_insns (), asm_out_file, optimize); final (get_insns (), asm_out_file, optimize); - if (flag_use_caller_save) + if (flag_ipa_ra) collect_fn_hard_reg_usage (); final_end_function (); @@ -4887,7 +4887,7 @@ bool get_call_reg_set_usage (rtx_insn *insn, HARD_REG_SET *reg_set, HARD_REG_SET default_set) { - if (flag_use_caller_save) + if (flag_ipa_ra) { struct cgraph_rtl_info *node = get_call_cgraph_rtl_info (insn); if (node != NULL diff --git a/gcc/lra-assigns.c b/gcc/lra-assigns.c index d35f112..707dbd0 100644 --- a/gcc/lra-assigns.c +++ b/gcc/lra-assigns.c @@ -1527,7 +1527,7 @@ lra_assign (void) create_live_range_start_chains (); setup_live_pseudos_and_spill_after_risky_transforms (&all_spilled_pseudos); #ifdef ENABLE_CHECKING - if (!flag_use_caller_save) + if (!flag_ipa_ra) for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++) if (lra_reg_info[i].nrefs != 0 && reg_renumber[i] >= 0 && lra_reg_info[i].call_p diff --git a/gcc/lra-constraints.c b/gcc/lra-constraints.c index a67bf8a..e9d8bf6 100644 --- a/gcc/lra-constraints.c +++ b/gcc/lra-constraints.c @@ -4644,7 +4644,7 @@ need_for_call_save_p (int regno) lra_assert (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] >= 0); return (usage_insns[regno].calls_num < calls_num && (overlaps_hard_reg_set_p - ((flag_use_caller_save && + ((flag_ipa_ra && ! hard_reg_set_empty_p (lra_reg_info[regno].actual_call_used_reg_set)) ? lra_reg_info[regno].actual_call_used_reg_set : call_used_reg_set, diff --git a/gcc/lra-lives.c b/gcc/lra-lives.c index a593b02..6f64be3 100644 --- a/gcc/lra-lives.c +++ b/gcc/lra-lives.c @@ -835,7 +835,7 @@ process_bb_lives (basic_block bb, int &curr_point, bool dead_insn_p) if (call_p) { - if (flag_use_caller_save) + if (flag_ipa_ra) { HARD_REG_SET this_call_used_reg_set; get_call_reg_set_usage (curr_insn, &this_call_used_reg_set, @@ -2290,7 +2290,7 @@ lra (FILE *f) /* Do inheritance only for regular algorithms. */ if (! lra_simple_p) { - if (flag_use_caller_save) + if (flag_ipa_ra) { if (live_p) lra_clear_live_ranges (); @@ -507,7 +507,7 @@ static const struct default_options default_options_table[] = { OPT_LEVELS_2_PLUS, OPT_fhoist_adjacent_loads, NULL, 1 }, { OPT_LEVELS_2_PLUS, OPT_fipa_icf, NULL, 1 }, { OPT_LEVELS_2_PLUS, OPT_fisolate_erroneous_paths_dereference, NULL, 1 }, - { OPT_LEVELS_2_PLUS, OPT_fuse_caller_save, NULL, 1 }, + { OPT_LEVELS_2_PLUS, OPT_fipa_ra, NULL, 1 }, { OPT_LEVELS_2_PLUS, OPT_flra_remat, NULL, 1 }, /* -O3 optimizations. */ diff --git a/gcc/target.def b/gcc/target.def index 647ebbe..e7cec46 100644 --- a/gcc/target.def +++ b/gcc/target.def @@ -5553,7 +5553,7 @@ linker (e.g. stubs, veneers, branch islands), but not including those\n\ modifiable by the callee. The affected registers may be mentioned explicitly\n\ in the call pattern, or included as clobbers in CALL_INSN_FUNCTION_USAGE.\n\ The default version of this hook is set to false. The purpose of this hook\n\ -is to enable the fuse-caller-save optimization.", +is to enable the fipa-ra optimization.", bool, false) diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index b0d1786..61427fc 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,23 @@ +2014-12-03 Tom de Vries <tom@codesourcery.com> + + PR rtl-optimization/63957 + * gcc.dg/ira-shrinkwrap-prep-1.c: Replace -fno-use-caller-save with + -fno-ipa-ra. + * gcc.dg/ira-shrinkwrap-prep-2.c: Same. + * gcc.target/aarch64/aapcs64/aapcs64.exp: Same. + * gcc.dg/fuse-caller-save.c: Replace -fuse-caller-save with -fipa-ra. + * gcc.target/aarch64/fuse-caller-save.c: Same. + * gcc.target/arm/fuse-caller-save.c: Same. + * gcc.target/i386/fuse-caller-save-rec.c: Same. + * gcc.target/i386/fuse-caller-save-xmm-run.c: Same. + * gcc.target/i386/fuse-caller-save-xmm.c: Same. + * gcc.target/i386/fuse-caller-save.c: Same. + * gcc.target/mips/fuse-caller-save-micromips.c: Same. + * gcc.target/mips/fuse-caller-save-mips16.c: Same. + * gcc.target/mips/fuse-caller-save.c: Same. + * gcc.target/mips/mips.exp: Replace use-caller-save with ipa-ra in + -ffoo/-fno-foo options. + 2014-12-03 Ilya Enkovich <ilya.enkovich@intel.com> * gcc.target/i386/sse2-init-v2di-2.c: Adjust to changed diff --git a/gcc/testsuite/gcc.dg/fuse-caller-save.c b/gcc/testsuite/gcc.dg/fuse-caller-save.c index 561a66d..2854b94 100644 --- a/gcc/testsuite/gcc.dg/fuse-caller-save.c +++ b/gcc/testsuite/gcc.dg/fuse-caller-save.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-fuse-caller-save" } */ -/* Testing -fuse-caller-save optimization option. */ +/* { dg-options "-fipa-ra" } */ +/* Testing -fipa-ra optimization option. */ static int __attribute__((noinline)) bar (int x) diff --git a/gcc/testsuite/gcc.dg/ira-shrinkwrap-prep-1.c b/gcc/testsuite/gcc.dg/ira-shrinkwrap-prep-1.c index 162232b..3cc96ab 100644 --- a/gcc/testsuite/gcc.dg/ira-shrinkwrap-prep-1.c +++ b/gcc/testsuite/gcc.dg/ira-shrinkwrap-prep-1.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { { { i?86-*-* x86_64-*-* } && lp64 } || { { powerpc*-*-* && lp64 } || { arm_nothumb || { aarch64*-*-* && lp64 } } } } } } */ -/* { dg-options "-O3 -fdump-rtl-ira -fdump-rtl-pro_and_epilogue -fno-use-caller-save" } */ +/* { dg-options "-O3 -fdump-rtl-ira -fdump-rtl-pro_and_epilogue -fno-ipa-ra" } */ long __attribute__((noinline, noclone)) foo (long a) diff --git a/gcc/testsuite/gcc.dg/ira-shrinkwrap-prep-2.c b/gcc/testsuite/gcc.dg/ira-shrinkwrap-prep-2.c index 1da12a4..253f477 100644 --- a/gcc/testsuite/gcc.dg/ira-shrinkwrap-prep-2.c +++ b/gcc/testsuite/gcc.dg/ira-shrinkwrap-prep-2.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { { { i?86-*-* x86_64-*-* } && lp64 } || { { powerpc*-*-* && lp64 } || { arm_nothumb || { aarch64*-*-* && lp64 } } } } } } */ -/* { dg-options "-O3 -fdump-rtl-ira -fdump-rtl-pro_and_epilogue -fno-use-caller-save" } */ +/* { dg-options "-O3 -fdump-rtl-ira -fdump-rtl-pro_and_epilogue -fno-ipa-ra" } */ long __attribute__((noinline, noclone)) foo (long a) diff --git a/gcc/testsuite/gcc.target/aarch64/aapcs64/aapcs64.exp b/gcc/testsuite/gcc.target/aarch64/aapcs64/aapcs64.exp index fdfbff1..92a741a 100644 --- a/gcc/testsuite/gcc.target/aarch64/aapcs64/aapcs64.exp +++ b/gcc/testsuite/gcc.target/aarch64/aapcs64/aapcs64.exp @@ -48,10 +48,10 @@ foreach src [lsort [glob -nocomplain $srcdir/$subdir/va_arg-*.c]] { } # Test function return value. -# Disable -fuse-caller-save to prevent the compiler from generating +# Disable -fipa-ra to prevent the compiler from generating # conflicting code. set additional_flags_for_func_ret $additional_flags -append additional_flags_for_func_ret " -fno-use-caller-save" +append additional_flags_for_func_ret " -fno-ipa-ra" foreach src [lsort [glob -nocomplain $srcdir/$subdir/func-ret-*.c]] { if {[runtest_file_p $runtests $src]} { c-torture-execute [list $src \ diff --git a/gcc/testsuite/gcc.target/aarch64/fuse-caller-save.c b/gcc/testsuite/gcc.target/aarch64/fuse-caller-save.c index 45e535c..bfedc94 100644 --- a/gcc/testsuite/gcc.target/aarch64/fuse-caller-save.c +++ b/gcc/testsuite/gcc.target/aarch64/fuse-caller-save.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ -/* { dg-options "-O2 -fuse-caller-save" } */ -/* Testing -fuse-caller-save optimization option. */ +/* { dg-options "-O2 -fipa-ra" } */ +/* Testing -fipa-ra optimization option. */ static int __attribute__((noinline)) bar (int x) diff --git a/gcc/testsuite/gcc.target/arm/fuse-caller-save.c b/gcc/testsuite/gcc.target/arm/fuse-caller-save.c index 5fa8998..ef9256d 100644 --- a/gcc/testsuite/gcc.target/arm/fuse-caller-save.c +++ b/gcc/testsuite/gcc.target/arm/fuse-caller-save.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ -/* { dg-options "-O2 -fuse-caller-save" } */ -/* Testing -fuse-caller-save optimization option. */ +/* { dg-options "-O2 -fipa-ra" } */ +/* Testing -fipa-ra optimization option. */ static int __attribute__((noinline)) bar (int x) @@ -21,5 +21,5 @@ main (void) } /* For thumb1, r3 is considered likely spilled, and treated differently in - ira_build_conflicts, which inhibits the fuse-caller-save optimization. */ + ira_build_conflicts, which inhibits the fipa-ra optimization. */ /* { dg-final { scan-assembler-times "mov\tr3, r0" 1 { target { ! arm_thumb1 } } } } */ diff --git a/gcc/testsuite/gcc.target/i386/fuse-caller-save-rec.c b/gcc/testsuite/gcc.target/i386/fuse-caller-save-rec.c index a0fcf9c..c660e01 100644 --- a/gcc/testsuite/gcc.target/i386/fuse-caller-save-rec.c +++ b/gcc/testsuite/gcc.target/i386/fuse-caller-save-rec.c @@ -1,8 +1,8 @@ /* { dg-do compile } */ -/* { dg-options "-O2 -fuse-caller-save -fomit-frame-pointer -fno-optimize-sibling-calls" } */ +/* { dg-options "-O2 -fipa-ra -fomit-frame-pointer -fno-optimize-sibling-calls" } */ /* { dg-additional-options "-mregparm=1" { target ia32 } } */ -/* Test -fuse-caller-save optimization on self-recursive function. */ +/* Test -fipa-ra optimization on self-recursive function. */ static int __attribute__((noinline)) bar (int x) diff --git a/gcc/testsuite/gcc.target/i386/fuse-caller-save-xmm-run.c b/gcc/testsuite/gcc.target/i386/fuse-caller-save-xmm-run.c index 66b133c..8057884 100644 --- a/gcc/testsuite/gcc.target/i386/fuse-caller-save-xmm-run.c +++ b/gcc/testsuite/gcc.target/i386/fuse-caller-save-xmm-run.c @@ -1,5 +1,5 @@ /* { dg-do run } */ -/* { dg-options "-O2 -msse -fuse-caller-save" } */ +/* { dg-options "-O2 -msse -fipa-ra" } */ typedef double v2df __attribute__((vector_size (16))); diff --git a/gcc/testsuite/gcc.target/i386/fuse-caller-save-xmm.c b/gcc/testsuite/gcc.target/i386/fuse-caller-save-xmm.c index e19798f..1d02844 100644 --- a/gcc/testsuite/gcc.target/i386/fuse-caller-save-xmm.c +++ b/gcc/testsuite/gcc.target/i386/fuse-caller-save-xmm.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O2 -msse2 -mno-avx -fuse-caller-save -fomit-frame-pointer" } */ +/* { dg-options "-O2 -msse2 -mno-avx -fipa-ra -fomit-frame-pointer" } */ typedef double v2df __attribute__((vector_size (16))); @@ -16,7 +16,7 @@ foo (v2df y) } /* Check presence of all insns on xmm registers. These checks are expected to - pass with both -fuse-caller-save and -fno-use-caller-save. */ + pass with both -fipa-ra and -fno-ipa-ra. */ /* { dg-final { scan-assembler-times "addpd\t\\.?LC0.*, %xmm0" 1 } } */ /* { dg-final { scan-assembler-times "addpd\t%xmm1, %xmm0" 1 } } */ /* { dg-final { scan-assembler-times "movapd\t%xmm0, %xmm1" 1 } } */ diff --git a/gcc/testsuite/gcc.target/i386/fuse-caller-save.c b/gcc/testsuite/gcc.target/i386/fuse-caller-save.c index a6e8f1c..7cfd22a 100644 --- a/gcc/testsuite/gcc.target/i386/fuse-caller-save.c +++ b/gcc/testsuite/gcc.target/i386/fuse-caller-save.c @@ -1,8 +1,8 @@ /* { dg-do compile } */ -/* { dg-options "-O2 -fuse-caller-save -fomit-frame-pointer" } */ +/* { dg-options "-O2 -fipa-ra -fomit-frame-pointer" } */ /* { dg-additional-options "-mregparm=1" { target ia32 } } */ -/* Testing -fuse-caller-save optimization option. */ +/* Testing -fipa-ra optimization option. */ static int __attribute__((noinline)) bar (int x) diff --git a/gcc/testsuite/gcc.target/mips/fuse-caller-save-micromips.c b/gcc/testsuite/gcc.target/mips/fuse-caller-save-micromips.c index 70349dc..88642ad 100644 --- a/gcc/testsuite/gcc.target/mips/fuse-caller-save-micromips.c +++ b/gcc/testsuite/gcc.target/mips/fuse-caller-save-micromips.c @@ -1,9 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-fuse-caller-save (-mmicromips) addressing=absolute" } */ +/* { dg-options "-fipa-ra (-mmicromips) addressing=absolute" } */ /* At -O0 and -O1, the register allocator behaves more conservatively, and - the fuse-caller-save optimization doesnt' trigger. */ + the fipa-ra optimization doesnt' trigger. */ /* { dg-skip-if "" { *-*-* } { "-O0" "-O1" } } */ -/* Testing -fuse-caller-save optimization option. */ +/* Testing -fipa-ra optimization option. */ #define ATTRIBUTE MICROMIPS #include "fuse-caller-save.h" diff --git a/gcc/testsuite/gcc.target/mips/fuse-caller-save-mips16.c b/gcc/testsuite/gcc.target/mips/fuse-caller-save-mips16.c index 43f1103..9071fcc 100644 --- a/gcc/testsuite/gcc.target/mips/fuse-caller-save-mips16.c +++ b/gcc/testsuite/gcc.target/mips/fuse-caller-save-mips16.c @@ -1,9 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-fuse-caller-save (-mips16) addressing=absolute isa_rev=0" } */ +/* { dg-options "-fipa-ra (-mips16) addressing=absolute isa_rev=0" } */ /* At -O0 and -O1, the register allocator behaves more conservatively, and - the fuse-caller-save optimization doesnt' trigger. */ + the fipa-ra optimization doesnt' trigger. */ /* { dg-skip-if "" { *-*-* } { "-O0" "-O1" } } */ -/* Testing -fuse-caller-save optimization option. */ +/* Testing -fipa-ra optimization option. */ #define ATTRIBUTE MIPS16 #include "fuse-caller-save.h" diff --git a/gcc/testsuite/gcc.target/mips/fuse-caller-save.c b/gcc/testsuite/gcc.target/mips/fuse-caller-save.c index 370b1ee..4a76744 100644 --- a/gcc/testsuite/gcc.target/mips/fuse-caller-save.c +++ b/gcc/testsuite/gcc.target/mips/fuse-caller-save.c @@ -1,9 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-fuse-caller-save addressing=absolute" } */ +/* { dg-options "-fipa-ra addressing=absolute" } */ /* At -O0 and -O1, the register allocator behaves more conservatively, and - the fuse-caller-save optimization doesnt' trigger. */ + the fipa-ra optimization doesnt' trigger. */ /* { dg-skip-if "" { *-*-* } { "-O0" "-O1" } } */ -/* Testing -fuse-caller-save optimization option. */ +/* Testing -fipa-ra optimization option. */ #define ATTRIBUTE NOCOMPRESSION #include "fuse-caller-save.h" diff --git a/gcc/testsuite/gcc.target/mips/mips.exp b/gcc/testsuite/gcc.target/mips/mips.exp index 6ae71ad..e117a80 100644 --- a/gcc/testsuite/gcc.target/mips/mips.exp +++ b/gcc/testsuite/gcc.target/mips/mips.exp @@ -311,7 +311,7 @@ foreach option { tree-vectorize unroll-all-loops unroll-loops - use-caller-save + ipa-ra } { lappend mips_option_groups $option "-f(no-|)$option" } |